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1d6316f5 RG |
1 | /* rtc-ds1343.c |
2 | * | |
3 | * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible | |
4 | * Real Time Clock | |
5 | * | |
6 | * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com> | |
571eb883 | 7 | * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support |
1d6316f5 RG |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/init.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/spi/spi.h> | |
20 | #include <linux/regmap.h> | |
21 | #include <linux/rtc.h> | |
22 | #include <linux/bcd.h> | |
23 | #include <linux/pm.h> | |
caff0cc4 | 24 | #include <linux/pm_wakeirq.h> |
1d6316f5 RG |
25 | #include <linux/slab.h> |
26 | ||
27 | #define DS1343_DRV_VERSION "01.00" | |
28 | #define DALLAS_MAXIM_DS1343 0 | |
29 | #define DALLAS_MAXIM_DS1344 1 | |
30 | ||
31 | /* RTC DS1343 Registers */ | |
32 | #define DS1343_SECONDS_REG 0x00 | |
33 | #define DS1343_MINUTES_REG 0x01 | |
34 | #define DS1343_HOURS_REG 0x02 | |
35 | #define DS1343_DAY_REG 0x03 | |
36 | #define DS1343_DATE_REG 0x04 | |
37 | #define DS1343_MONTH_REG 0x05 | |
38 | #define DS1343_YEAR_REG 0x06 | |
39 | #define DS1343_ALM0_SEC_REG 0x07 | |
40 | #define DS1343_ALM0_MIN_REG 0x08 | |
41 | #define DS1343_ALM0_HOUR_REG 0x09 | |
42 | #define DS1343_ALM0_DAY_REG 0x0A | |
43 | #define DS1343_ALM1_SEC_REG 0x0B | |
44 | #define DS1343_ALM1_MIN_REG 0x0C | |
45 | #define DS1343_ALM1_HOUR_REG 0x0D | |
46 | #define DS1343_ALM1_DAY_REG 0x0E | |
47 | #define DS1343_CONTROL_REG 0x0F | |
48 | #define DS1343_STATUS_REG 0x10 | |
49 | #define DS1343_TRICKLE_REG 0x11 | |
571eb883 RG |
50 | #define DS1343_NVRAM 0x20 |
51 | ||
52 | #define DS1343_NVRAM_LEN 96 | |
1d6316f5 RG |
53 | |
54 | /* DS1343 Control Registers bits */ | |
55 | #define DS1343_EOSC 0x80 | |
56 | #define DS1343_DOSF 0x20 | |
57 | #define DS1343_EGFIL 0x10 | |
58 | #define DS1343_SQW 0x08 | |
59 | #define DS1343_INTCN 0x04 | |
60 | #define DS1343_A1IE 0x02 | |
61 | #define DS1343_A0IE 0x01 | |
62 | ||
63 | /* DS1343 Status Registers bits */ | |
64 | #define DS1343_OSF 0x80 | |
65 | #define DS1343_IRQF1 0x02 | |
66 | #define DS1343_IRQF0 0x01 | |
67 | ||
68 | /* DS1343 Trickle Charger Registers bits */ | |
69 | #define DS1343_TRICKLE_MAGIC 0xa0 | |
70 | #define DS1343_TRICKLE_DS1 0x08 | |
71 | #define DS1343_TRICKLE_1K 0x01 | |
72 | #define DS1343_TRICKLE_2K 0x02 | |
73 | #define DS1343_TRICKLE_4K 0x03 | |
74 | ||
75 | static const struct spi_device_id ds1343_id[] = { | |
76 | { "ds1343", DALLAS_MAXIM_DS1343 }, | |
77 | { "ds1344", DALLAS_MAXIM_DS1344 }, | |
78 | { } | |
79 | }; | |
80 | MODULE_DEVICE_TABLE(spi, ds1343_id); | |
81 | ||
82 | struct ds1343_priv { | |
83 | struct spi_device *spi; | |
84 | struct rtc_device *rtc; | |
85 | struct regmap *map; | |
86 | struct mutex mutex; | |
87 | unsigned int irqen; | |
10b06b87 | 88 | int irq; |
1d6316f5 RG |
89 | int alarm_sec; |
90 | int alarm_min; | |
91 | int alarm_hour; | |
92 | int alarm_mday; | |
93 | }; | |
94 | ||
95 | static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
96 | { | |
97 | switch (cmd) { | |
98 | #ifdef RTC_SET_CHARGE | |
99 | case RTC_SET_CHARGE: | |
100 | { | |
101 | int val; | |
102 | ||
103 | if (copy_from_user(&val, (int __user *)arg, sizeof(int))) | |
104 | return -EFAULT; | |
105 | ||
106 | return regmap_write(priv->map, DS1343_TRICKLE_REG, val); | |
107 | } | |
108 | break; | |
109 | #endif | |
110 | } | |
111 | ||
112 | return -ENOIOCTLCMD; | |
113 | } | |
114 | ||
115 | static ssize_t ds1343_show_glitchfilter(struct device *dev, | |
116 | struct device_attribute *attr, char *buf) | |
117 | { | |
118 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
119 | int glitch_filt_status, data; | |
120 | ||
121 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
122 | ||
123 | glitch_filt_status = !!(data & DS1343_EGFIL); | |
124 | ||
125 | if (glitch_filt_status) | |
126 | return sprintf(buf, "enabled\n"); | |
127 | else | |
128 | return sprintf(buf, "disabled\n"); | |
129 | } | |
130 | ||
131 | static ssize_t ds1343_store_glitchfilter(struct device *dev, | |
132 | struct device_attribute *attr, | |
133 | const char *buf, size_t count) | |
134 | { | |
135 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
136 | int data; | |
137 | ||
138 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
139 | ||
140 | if (strncmp(buf, "enabled", 7) == 0) | |
141 | data |= DS1343_EGFIL; | |
142 | ||
143 | else if (strncmp(buf, "disabled", 8) == 0) | |
144 | data &= ~(DS1343_EGFIL); | |
145 | ||
146 | else | |
147 | return -EINVAL; | |
148 | ||
149 | regmap_write(priv->map, DS1343_CONTROL_REG, data); | |
150 | ||
151 | return count; | |
152 | } | |
153 | ||
154 | static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter, | |
155 | ds1343_store_glitchfilter); | |
156 | ||
571eb883 RG |
157 | static ssize_t ds1343_nvram_write(struct file *filp, struct kobject *kobj, |
158 | struct bin_attribute *attr, | |
159 | char *buf, loff_t off, size_t count) | |
160 | { | |
161 | int ret; | |
162 | unsigned char address; | |
163 | struct device *dev = kobj_to_dev(kobj); | |
164 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
165 | ||
571eb883 RG |
166 | address = DS1343_NVRAM + off; |
167 | ||
168 | ret = regmap_bulk_write(priv->map, address, buf, count); | |
169 | if (ret < 0) | |
170 | dev_err(&priv->spi->dev, "Error in nvram write %d", ret); | |
171 | ||
172 | return (ret < 0) ? ret : count; | |
173 | } | |
174 | ||
175 | ||
176 | static ssize_t ds1343_nvram_read(struct file *filp, struct kobject *kobj, | |
177 | struct bin_attribute *attr, | |
178 | char *buf, loff_t off, size_t count) | |
179 | { | |
180 | int ret; | |
181 | unsigned char address; | |
182 | struct device *dev = kobj_to_dev(kobj); | |
183 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
184 | ||
571eb883 RG |
185 | address = DS1343_NVRAM + off; |
186 | ||
187 | ret = regmap_bulk_read(priv->map, address, buf, count); | |
188 | if (ret < 0) | |
189 | dev_err(&priv->spi->dev, "Error in nvram read %d\n", ret); | |
190 | ||
191 | return (ret < 0) ? ret : count; | |
192 | } | |
193 | ||
194 | ||
195 | static struct bin_attribute nvram_attr = { | |
196 | .attr.name = "nvram", | |
197 | .attr.mode = S_IRUGO | S_IWUSR, | |
198 | .read = ds1343_nvram_read, | |
199 | .write = ds1343_nvram_write, | |
200 | .size = DS1343_NVRAM_LEN, | |
201 | }; | |
202 | ||
1d6316f5 RG |
203 | static ssize_t ds1343_show_alarmstatus(struct device *dev, |
204 | struct device_attribute *attr, char *buf) | |
205 | { | |
206 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
207 | int alarmstatus, data; | |
208 | ||
209 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
210 | ||
211 | alarmstatus = !!(data & DS1343_A0IE); | |
212 | ||
213 | if (alarmstatus) | |
214 | return sprintf(buf, "enabled\n"); | |
215 | else | |
216 | return sprintf(buf, "disabled\n"); | |
217 | } | |
218 | ||
219 | static DEVICE_ATTR(alarm_status, S_IRUGO, ds1343_show_alarmstatus, NULL); | |
220 | ||
221 | static ssize_t ds1343_show_alarmmode(struct device *dev, | |
222 | struct device_attribute *attr, char *buf) | |
223 | { | |
224 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
225 | int alarm_mode, data; | |
226 | char *alarm_str; | |
227 | ||
228 | regmap_read(priv->map, DS1343_ALM0_SEC_REG, &data); | |
229 | alarm_mode = (data & 0x80) >> 4; | |
230 | ||
231 | regmap_read(priv->map, DS1343_ALM0_MIN_REG, &data); | |
232 | alarm_mode |= (data & 0x80) >> 5; | |
233 | ||
234 | regmap_read(priv->map, DS1343_ALM0_HOUR_REG, &data); | |
235 | alarm_mode |= (data & 0x80) >> 6; | |
236 | ||
237 | regmap_read(priv->map, DS1343_ALM0_DAY_REG, &data); | |
238 | alarm_mode |= (data & 0x80) >> 7; | |
239 | ||
240 | switch (alarm_mode) { | |
241 | case 15: | |
242 | alarm_str = "each second"; | |
243 | break; | |
244 | ||
245 | case 7: | |
246 | alarm_str = "seconds match"; | |
247 | break; | |
248 | ||
249 | case 3: | |
250 | alarm_str = "minutes and seconds match"; | |
251 | break; | |
252 | ||
253 | case 1: | |
254 | alarm_str = "hours, minutes and seconds match"; | |
255 | break; | |
256 | ||
257 | case 0: | |
258 | alarm_str = "day, hours, minutes and seconds match"; | |
259 | break; | |
260 | ||
261 | default: | |
262 | alarm_str = "invalid"; | |
263 | break; | |
264 | } | |
265 | ||
266 | return sprintf(buf, "%s\n", alarm_str); | |
267 | } | |
268 | ||
269 | static DEVICE_ATTR(alarm_mode, S_IRUGO, ds1343_show_alarmmode, NULL); | |
270 | ||
271 | static ssize_t ds1343_show_tricklecharger(struct device *dev, | |
272 | struct device_attribute *attr, char *buf) | |
273 | { | |
274 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
275 | int data; | |
276 | char *diodes = "disabled", *resistors = " "; | |
277 | ||
278 | regmap_read(priv->map, DS1343_TRICKLE_REG, &data); | |
279 | ||
280 | if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) { | |
281 | switch (data & 0x0c) { | |
282 | case DS1343_TRICKLE_DS1: | |
283 | diodes = "one diode,"; | |
284 | break; | |
285 | ||
286 | default: | |
287 | diodes = "no diode,"; | |
288 | break; | |
289 | } | |
290 | ||
291 | switch (data & 0x03) { | |
292 | case DS1343_TRICKLE_1K: | |
293 | resistors = "1k Ohm"; | |
294 | break; | |
295 | ||
296 | case DS1343_TRICKLE_2K: | |
297 | resistors = "2k Ohm"; | |
298 | break; | |
299 | ||
300 | case DS1343_TRICKLE_4K: | |
301 | resistors = "4k Ohm"; | |
302 | break; | |
303 | ||
304 | default: | |
305 | diodes = "disabled"; | |
306 | break; | |
307 | } | |
308 | } | |
309 | ||
310 | return sprintf(buf, "%s %s\n", diodes, resistors); | |
311 | } | |
312 | ||
313 | static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL); | |
314 | ||
315 | static int ds1343_sysfs_register(struct device *dev) | |
316 | { | |
10b06b87 | 317 | struct ds1343_priv *priv = dev_get_drvdata(dev); |
1d6316f5 RG |
318 | int err; |
319 | ||
320 | err = device_create_file(dev, &dev_attr_glitch_filter); | |
321 | if (err) | |
322 | return err; | |
323 | ||
10b06b87 | 324 | err = device_create_file(dev, &dev_attr_trickle_charger); |
1d6316f5 RG |
325 | if (err) |
326 | goto error1; | |
327 | ||
571eb883 RG |
328 | err = device_create_bin_file(dev, &nvram_attr); |
329 | if (err) | |
330 | goto error2; | |
331 | ||
10b06b87 RG |
332 | if (priv->irq <= 0) |
333 | return err; | |
334 | ||
1d6316f5 RG |
335 | err = device_create_file(dev, &dev_attr_alarm_mode); |
336 | if (err) | |
571eb883 | 337 | goto error3; |
1d6316f5 | 338 | |
10b06b87 | 339 | err = device_create_file(dev, &dev_attr_alarm_status); |
1d6316f5 RG |
340 | if (!err) |
341 | return err; | |
342 | ||
343 | device_remove_file(dev, &dev_attr_alarm_mode); | |
344 | ||
571eb883 RG |
345 | error3: |
346 | device_remove_bin_file(dev, &nvram_attr); | |
347 | ||
1d6316f5 | 348 | error2: |
10b06b87 | 349 | device_remove_file(dev, &dev_attr_trickle_charger); |
1d6316f5 RG |
350 | |
351 | error1: | |
352 | device_remove_file(dev, &dev_attr_glitch_filter); | |
353 | ||
354 | return err; | |
355 | } | |
356 | ||
357 | static void ds1343_sysfs_unregister(struct device *dev) | |
358 | { | |
10b06b87 RG |
359 | struct ds1343_priv *priv = dev_get_drvdata(dev); |
360 | ||
1d6316f5 | 361 | device_remove_file(dev, &dev_attr_glitch_filter); |
10b06b87 | 362 | device_remove_file(dev, &dev_attr_trickle_charger); |
571eb883 | 363 | device_remove_bin_file(dev, &nvram_attr); |
10b06b87 RG |
364 | |
365 | if (priv->irq <= 0) | |
366 | return; | |
367 | ||
1d6316f5 RG |
368 | device_remove_file(dev, &dev_attr_alarm_status); |
369 | device_remove_file(dev, &dev_attr_alarm_mode); | |
1d6316f5 RG |
370 | } |
371 | ||
372 | static int ds1343_read_time(struct device *dev, struct rtc_time *dt) | |
373 | { | |
374 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
375 | unsigned char buf[7]; | |
376 | int res; | |
377 | ||
378 | res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7); | |
379 | if (res) | |
380 | return res; | |
381 | ||
382 | dt->tm_sec = bcd2bin(buf[0]); | |
383 | dt->tm_min = bcd2bin(buf[1]); | |
384 | dt->tm_hour = bcd2bin(buf[2] & 0x3F); | |
385 | dt->tm_wday = bcd2bin(buf[3]) - 1; | |
386 | dt->tm_mday = bcd2bin(buf[4]); | |
387 | dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1; | |
388 | dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */ | |
389 | ||
390 | return rtc_valid_tm(dt); | |
391 | } | |
392 | ||
393 | static int ds1343_set_time(struct device *dev, struct rtc_time *dt) | |
394 | { | |
395 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
396 | int res; | |
397 | ||
398 | res = regmap_write(priv->map, DS1343_SECONDS_REG, | |
399 | bin2bcd(dt->tm_sec)); | |
400 | if (res) | |
401 | return res; | |
402 | ||
403 | res = regmap_write(priv->map, DS1343_MINUTES_REG, | |
404 | bin2bcd(dt->tm_min)); | |
405 | if (res) | |
406 | return res; | |
407 | ||
408 | res = regmap_write(priv->map, DS1343_HOURS_REG, | |
409 | bin2bcd(dt->tm_hour) & 0x3F); | |
410 | if (res) | |
411 | return res; | |
412 | ||
413 | res = regmap_write(priv->map, DS1343_DAY_REG, | |
414 | bin2bcd(dt->tm_wday + 1)); | |
415 | if (res) | |
416 | return res; | |
417 | ||
418 | res = regmap_write(priv->map, DS1343_DATE_REG, | |
419 | bin2bcd(dt->tm_mday)); | |
420 | if (res) | |
421 | return res; | |
422 | ||
423 | res = regmap_write(priv->map, DS1343_MONTH_REG, | |
424 | bin2bcd(dt->tm_mon + 1)); | |
425 | if (res) | |
426 | return res; | |
427 | ||
428 | dt->tm_year %= 100; | |
429 | ||
430 | res = regmap_write(priv->map, DS1343_YEAR_REG, | |
431 | bin2bcd(dt->tm_year)); | |
432 | if (res) | |
433 | return res; | |
434 | ||
435 | return 0; | |
436 | } | |
437 | ||
438 | static int ds1343_update_alarm(struct device *dev) | |
439 | { | |
440 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
441 | unsigned int control, stat; | |
442 | unsigned char buf[4]; | |
443 | int res = 0; | |
444 | ||
445 | res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); | |
446 | if (res) | |
447 | return res; | |
448 | ||
449 | res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); | |
450 | if (res) | |
451 | return res; | |
452 | ||
453 | control &= ~(DS1343_A0IE); | |
454 | stat &= ~(DS1343_IRQF0); | |
455 | ||
456 | res = regmap_write(priv->map, DS1343_CONTROL_REG, control); | |
457 | if (res) | |
458 | return res; | |
459 | ||
460 | res = regmap_write(priv->map, DS1343_STATUS_REG, stat); | |
461 | if (res) | |
462 | return res; | |
463 | ||
464 | buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ? | |
465 | 0x80 : bin2bcd(priv->alarm_sec) & 0x7F; | |
466 | buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ? | |
467 | 0x80 : bin2bcd(priv->alarm_min) & 0x7F; | |
468 | buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ? | |
469 | 0x80 : bin2bcd(priv->alarm_hour) & 0x3F; | |
470 | buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ? | |
471 | 0x80 : bin2bcd(priv->alarm_mday) & 0x7F; | |
472 | ||
473 | res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4); | |
474 | if (res) | |
475 | return res; | |
476 | ||
477 | if (priv->irqen) { | |
478 | control |= DS1343_A0IE; | |
479 | res = regmap_write(priv->map, DS1343_CONTROL_REG, control); | |
480 | } | |
481 | ||
482 | return res; | |
483 | } | |
484 | ||
485 | static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
486 | { | |
487 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
1d6316f5 RG |
488 | int res = 0; |
489 | unsigned int stat; | |
490 | ||
10b06b87 | 491 | if (priv->irq <= 0) |
1d6316f5 RG |
492 | return -EINVAL; |
493 | ||
494 | mutex_lock(&priv->mutex); | |
495 | ||
496 | res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); | |
497 | if (res) | |
498 | goto out; | |
499 | ||
500 | alarm->enabled = !!(priv->irqen & RTC_AF); | |
501 | alarm->pending = !!(stat & DS1343_IRQF0); | |
502 | ||
503 | alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec; | |
504 | alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min; | |
505 | alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour; | |
506 | alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday; | |
507 | ||
508 | alarm->time.tm_mon = -1; | |
509 | alarm->time.tm_year = -1; | |
510 | alarm->time.tm_wday = -1; | |
511 | alarm->time.tm_yday = -1; | |
512 | alarm->time.tm_isdst = -1; | |
513 | ||
514 | out: | |
515 | mutex_unlock(&priv->mutex); | |
516 | return res; | |
517 | } | |
518 | ||
519 | static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
520 | { | |
521 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
1d6316f5 RG |
522 | int res = 0; |
523 | ||
10b06b87 | 524 | if (priv->irq <= 0) |
1d6316f5 RG |
525 | return -EINVAL; |
526 | ||
527 | mutex_lock(&priv->mutex); | |
528 | ||
529 | priv->alarm_sec = alarm->time.tm_sec; | |
530 | priv->alarm_min = alarm->time.tm_min; | |
531 | priv->alarm_hour = alarm->time.tm_hour; | |
532 | priv->alarm_mday = alarm->time.tm_mday; | |
533 | ||
534 | if (alarm->enabled) | |
535 | priv->irqen |= RTC_AF; | |
536 | ||
537 | res = ds1343_update_alarm(dev); | |
538 | ||
539 | mutex_unlock(&priv->mutex); | |
540 | ||
541 | return res; | |
542 | } | |
543 | ||
544 | static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
545 | { | |
546 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
1d6316f5 RG |
547 | int res = 0; |
548 | ||
10b06b87 | 549 | if (priv->irq <= 0) |
1d6316f5 RG |
550 | return -EINVAL; |
551 | ||
552 | mutex_lock(&priv->mutex); | |
553 | ||
554 | if (enabled) | |
555 | priv->irqen |= RTC_AF; | |
556 | else | |
557 | priv->irqen &= ~RTC_AF; | |
558 | ||
559 | res = ds1343_update_alarm(dev); | |
560 | ||
561 | mutex_unlock(&priv->mutex); | |
562 | ||
563 | return res; | |
564 | } | |
565 | ||
566 | static irqreturn_t ds1343_thread(int irq, void *dev_id) | |
567 | { | |
568 | struct ds1343_priv *priv = dev_id; | |
569 | unsigned int stat, control; | |
570 | int res = 0; | |
571 | ||
572 | mutex_lock(&priv->mutex); | |
573 | ||
574 | res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); | |
575 | if (res) | |
576 | goto out; | |
577 | ||
578 | if (stat & DS1343_IRQF0) { | |
579 | stat &= ~DS1343_IRQF0; | |
580 | regmap_write(priv->map, DS1343_STATUS_REG, stat); | |
581 | ||
582 | res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); | |
583 | if (res) | |
584 | goto out; | |
585 | ||
586 | control &= ~DS1343_A0IE; | |
587 | regmap_write(priv->map, DS1343_CONTROL_REG, control); | |
588 | ||
589 | rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF); | |
590 | } | |
591 | ||
592 | out: | |
593 | mutex_unlock(&priv->mutex); | |
594 | return IRQ_HANDLED; | |
595 | } | |
596 | ||
597 | static const struct rtc_class_ops ds1343_rtc_ops = { | |
598 | .ioctl = ds1343_ioctl, | |
599 | .read_time = ds1343_read_time, | |
600 | .set_time = ds1343_set_time, | |
601 | .read_alarm = ds1343_read_alarm, | |
602 | .set_alarm = ds1343_set_alarm, | |
603 | .alarm_irq_enable = ds1343_alarm_irq_enable, | |
604 | }; | |
605 | ||
606 | static int ds1343_probe(struct spi_device *spi) | |
607 | { | |
608 | struct ds1343_priv *priv; | |
609 | struct regmap_config config; | |
610 | unsigned int data; | |
611 | int res; | |
612 | ||
613 | memset(&config, 0, sizeof(config)); | |
614 | config.reg_bits = 8; | |
615 | config.val_bits = 8; | |
616 | config.write_flag_mask = 0x80; | |
617 | ||
618 | priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL); | |
619 | if (!priv) | |
620 | return -ENOMEM; | |
621 | ||
622 | priv->spi = spi; | |
623 | mutex_init(&priv->mutex); | |
624 | ||
625 | /* RTC DS1347 works in spi mode 3 and | |
626 | * its chip select is active high | |
627 | */ | |
628 | spi->mode = SPI_MODE_3 | SPI_CS_HIGH; | |
629 | spi->bits_per_word = 8; | |
630 | res = spi_setup(spi); | |
631 | if (res) | |
632 | return res; | |
633 | ||
634 | spi_set_drvdata(spi, priv); | |
635 | ||
636 | priv->map = devm_regmap_init_spi(spi, &config); | |
637 | ||
638 | if (IS_ERR(priv->map)) { | |
639 | dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n"); | |
640 | return PTR_ERR(priv->map); | |
641 | } | |
642 | ||
643 | res = regmap_read(priv->map, DS1343_SECONDS_REG, &data); | |
644 | if (res) | |
645 | return res; | |
646 | ||
647 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
648 | data |= DS1343_INTCN; | |
649 | data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE); | |
650 | regmap_write(priv->map, DS1343_CONTROL_REG, data); | |
651 | ||
652 | regmap_read(priv->map, DS1343_STATUS_REG, &data); | |
653 | data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0); | |
654 | regmap_write(priv->map, DS1343_STATUS_REG, data); | |
655 | ||
656 | priv->rtc = devm_rtc_device_register(&spi->dev, "ds1343", | |
657 | &ds1343_rtc_ops, THIS_MODULE); | |
658 | if (IS_ERR(priv->rtc)) { | |
659 | dev_err(&spi->dev, "unable to register rtc ds1343\n"); | |
660 | return PTR_ERR(priv->rtc); | |
661 | } | |
662 | ||
10b06b87 RG |
663 | priv->irq = spi->irq; |
664 | ||
665 | if (priv->irq >= 0) { | |
1d6316f5 | 666 | res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL, |
caff0cc4 | 667 | ds1343_thread, IRQF_ONESHOT, |
1d6316f5 RG |
668 | "ds1343", priv); |
669 | if (res) { | |
10b06b87 | 670 | priv->irq = -1; |
1d6316f5 RG |
671 | dev_err(&spi->dev, |
672 | "unable to request irq for rtc ds1343\n"); | |
10b06b87 | 673 | } else { |
caff0cc4 SH |
674 | device_init_wakeup(&spi->dev, true); |
675 | dev_pm_set_wake_irq(&spi->dev, spi->irq); | |
1d6316f5 | 676 | } |
1d6316f5 RG |
677 | } |
678 | ||
679 | res = ds1343_sysfs_register(&spi->dev); | |
680 | if (res) | |
681 | dev_err(&spi->dev, | |
682 | "unable to create sysfs entries for rtc ds1343\n"); | |
683 | ||
684 | return 0; | |
685 | } | |
686 | ||
687 | static int ds1343_remove(struct spi_device *spi) | |
688 | { | |
689 | struct ds1343_priv *priv = spi_get_drvdata(spi); | |
690 | ||
691 | if (spi->irq) { | |
692 | mutex_lock(&priv->mutex); | |
693 | priv->irqen &= ~RTC_AF; | |
694 | mutex_unlock(&priv->mutex); | |
695 | ||
caff0cc4 SH |
696 | dev_pm_clear_wake_irq(&spi->dev); |
697 | device_init_wakeup(&spi->dev, false); | |
1d6316f5 RG |
698 | devm_free_irq(&spi->dev, spi->irq, priv); |
699 | } | |
700 | ||
701 | spi_set_drvdata(spi, NULL); | |
702 | ||
703 | ds1343_sysfs_unregister(&spi->dev); | |
704 | ||
705 | return 0; | |
706 | } | |
707 | ||
708 | #ifdef CONFIG_PM_SLEEP | |
709 | ||
710 | static int ds1343_suspend(struct device *dev) | |
711 | { | |
712 | struct spi_device *spi = to_spi_device(dev); | |
713 | ||
714 | if (spi->irq >= 0 && device_may_wakeup(dev)) | |
715 | enable_irq_wake(spi->irq); | |
716 | ||
717 | return 0; | |
718 | } | |
719 | ||
720 | static int ds1343_resume(struct device *dev) | |
721 | { | |
722 | struct spi_device *spi = to_spi_device(dev); | |
723 | ||
724 | if (spi->irq >= 0 && device_may_wakeup(dev)) | |
725 | disable_irq_wake(spi->irq); | |
726 | ||
727 | return 0; | |
728 | } | |
729 | ||
730 | #endif | |
731 | ||
732 | static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume); | |
733 | ||
734 | static struct spi_driver ds1343_driver = { | |
735 | .driver = { | |
736 | .name = "ds1343", | |
1d6316f5 RG |
737 | .pm = &ds1343_pm, |
738 | }, | |
739 | .probe = ds1343_probe, | |
740 | .remove = ds1343_remove, | |
741 | .id_table = ds1343_id, | |
742 | }; | |
743 | ||
744 | module_spi_driver(ds1343_driver); | |
745 | ||
746 | MODULE_DESCRIPTION("DS1343 RTC SPI Driver"); | |
571eb883 RG |
747 | MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>," |
748 | "Ankur Srivastava <sankurece@gmail.com>"); | |
1d6316f5 RG |
749 | MODULE_LICENSE("GPL v2"); |
750 | MODULE_VERSION(DS1343_DRV_VERSION); |