Commit | Line | Data |
---|---|---|
1d6316f5 RG |
1 | /* rtc-ds1343.c |
2 | * | |
3 | * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible | |
4 | * Real Time Clock | |
5 | * | |
6 | * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com> | |
571eb883 | 7 | * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support |
1d6316f5 RG |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/init.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/spi/spi.h> | |
20 | #include <linux/regmap.h> | |
21 | #include <linux/rtc.h> | |
22 | #include <linux/bcd.h> | |
23 | #include <linux/pm.h> | |
24 | #include <linux/slab.h> | |
25 | ||
26 | #define DS1343_DRV_VERSION "01.00" | |
27 | #define DALLAS_MAXIM_DS1343 0 | |
28 | #define DALLAS_MAXIM_DS1344 1 | |
29 | ||
30 | /* RTC DS1343 Registers */ | |
31 | #define DS1343_SECONDS_REG 0x00 | |
32 | #define DS1343_MINUTES_REG 0x01 | |
33 | #define DS1343_HOURS_REG 0x02 | |
34 | #define DS1343_DAY_REG 0x03 | |
35 | #define DS1343_DATE_REG 0x04 | |
36 | #define DS1343_MONTH_REG 0x05 | |
37 | #define DS1343_YEAR_REG 0x06 | |
38 | #define DS1343_ALM0_SEC_REG 0x07 | |
39 | #define DS1343_ALM0_MIN_REG 0x08 | |
40 | #define DS1343_ALM0_HOUR_REG 0x09 | |
41 | #define DS1343_ALM0_DAY_REG 0x0A | |
42 | #define DS1343_ALM1_SEC_REG 0x0B | |
43 | #define DS1343_ALM1_MIN_REG 0x0C | |
44 | #define DS1343_ALM1_HOUR_REG 0x0D | |
45 | #define DS1343_ALM1_DAY_REG 0x0E | |
46 | #define DS1343_CONTROL_REG 0x0F | |
47 | #define DS1343_STATUS_REG 0x10 | |
48 | #define DS1343_TRICKLE_REG 0x11 | |
571eb883 RG |
49 | #define DS1343_NVRAM 0x20 |
50 | ||
51 | #define DS1343_NVRAM_LEN 96 | |
1d6316f5 RG |
52 | |
53 | /* DS1343 Control Registers bits */ | |
54 | #define DS1343_EOSC 0x80 | |
55 | #define DS1343_DOSF 0x20 | |
56 | #define DS1343_EGFIL 0x10 | |
57 | #define DS1343_SQW 0x08 | |
58 | #define DS1343_INTCN 0x04 | |
59 | #define DS1343_A1IE 0x02 | |
60 | #define DS1343_A0IE 0x01 | |
61 | ||
62 | /* DS1343 Status Registers bits */ | |
63 | #define DS1343_OSF 0x80 | |
64 | #define DS1343_IRQF1 0x02 | |
65 | #define DS1343_IRQF0 0x01 | |
66 | ||
67 | /* DS1343 Trickle Charger Registers bits */ | |
68 | #define DS1343_TRICKLE_MAGIC 0xa0 | |
69 | #define DS1343_TRICKLE_DS1 0x08 | |
70 | #define DS1343_TRICKLE_1K 0x01 | |
71 | #define DS1343_TRICKLE_2K 0x02 | |
72 | #define DS1343_TRICKLE_4K 0x03 | |
73 | ||
74 | static const struct spi_device_id ds1343_id[] = { | |
75 | { "ds1343", DALLAS_MAXIM_DS1343 }, | |
76 | { "ds1344", DALLAS_MAXIM_DS1344 }, | |
77 | { } | |
78 | }; | |
79 | MODULE_DEVICE_TABLE(spi, ds1343_id); | |
80 | ||
81 | struct ds1343_priv { | |
82 | struct spi_device *spi; | |
83 | struct rtc_device *rtc; | |
84 | struct regmap *map; | |
85 | struct mutex mutex; | |
86 | unsigned int irqen; | |
10b06b87 | 87 | int irq; |
1d6316f5 RG |
88 | int alarm_sec; |
89 | int alarm_min; | |
90 | int alarm_hour; | |
91 | int alarm_mday; | |
92 | }; | |
93 | ||
94 | static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
95 | { | |
96 | switch (cmd) { | |
97 | #ifdef RTC_SET_CHARGE | |
98 | case RTC_SET_CHARGE: | |
99 | { | |
100 | int val; | |
101 | ||
102 | if (copy_from_user(&val, (int __user *)arg, sizeof(int))) | |
103 | return -EFAULT; | |
104 | ||
105 | return regmap_write(priv->map, DS1343_TRICKLE_REG, val); | |
106 | } | |
107 | break; | |
108 | #endif | |
109 | } | |
110 | ||
111 | return -ENOIOCTLCMD; | |
112 | } | |
113 | ||
114 | static ssize_t ds1343_show_glitchfilter(struct device *dev, | |
115 | struct device_attribute *attr, char *buf) | |
116 | { | |
117 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
118 | int glitch_filt_status, data; | |
119 | ||
120 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
121 | ||
122 | glitch_filt_status = !!(data & DS1343_EGFIL); | |
123 | ||
124 | if (glitch_filt_status) | |
125 | return sprintf(buf, "enabled\n"); | |
126 | else | |
127 | return sprintf(buf, "disabled\n"); | |
128 | } | |
129 | ||
130 | static ssize_t ds1343_store_glitchfilter(struct device *dev, | |
131 | struct device_attribute *attr, | |
132 | const char *buf, size_t count) | |
133 | { | |
134 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
135 | int data; | |
136 | ||
137 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
138 | ||
139 | if (strncmp(buf, "enabled", 7) == 0) | |
140 | data |= DS1343_EGFIL; | |
141 | ||
142 | else if (strncmp(buf, "disabled", 8) == 0) | |
143 | data &= ~(DS1343_EGFIL); | |
144 | ||
145 | else | |
146 | return -EINVAL; | |
147 | ||
148 | regmap_write(priv->map, DS1343_CONTROL_REG, data); | |
149 | ||
150 | return count; | |
151 | } | |
152 | ||
153 | static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter, | |
154 | ds1343_store_glitchfilter); | |
155 | ||
571eb883 RG |
156 | static ssize_t ds1343_nvram_write(struct file *filp, struct kobject *kobj, |
157 | struct bin_attribute *attr, | |
158 | char *buf, loff_t off, size_t count) | |
159 | { | |
160 | int ret; | |
161 | unsigned char address; | |
162 | struct device *dev = kobj_to_dev(kobj); | |
163 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
164 | ||
165 | if (unlikely(!count)) | |
166 | return count; | |
167 | ||
168 | if ((count + off) > DS1343_NVRAM_LEN) | |
169 | count = DS1343_NVRAM_LEN - off; | |
170 | ||
171 | address = DS1343_NVRAM + off; | |
172 | ||
173 | ret = regmap_bulk_write(priv->map, address, buf, count); | |
174 | if (ret < 0) | |
175 | dev_err(&priv->spi->dev, "Error in nvram write %d", ret); | |
176 | ||
177 | return (ret < 0) ? ret : count; | |
178 | } | |
179 | ||
180 | ||
181 | static ssize_t ds1343_nvram_read(struct file *filp, struct kobject *kobj, | |
182 | struct bin_attribute *attr, | |
183 | char *buf, loff_t off, size_t count) | |
184 | { | |
185 | int ret; | |
186 | unsigned char address; | |
187 | struct device *dev = kobj_to_dev(kobj); | |
188 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
189 | ||
190 | if (unlikely(!count)) | |
191 | return count; | |
192 | ||
193 | if ((count + off) > DS1343_NVRAM_LEN) | |
194 | count = DS1343_NVRAM_LEN - off; | |
195 | ||
196 | address = DS1343_NVRAM + off; | |
197 | ||
198 | ret = regmap_bulk_read(priv->map, address, buf, count); | |
199 | if (ret < 0) | |
200 | dev_err(&priv->spi->dev, "Error in nvram read %d\n", ret); | |
201 | ||
202 | return (ret < 0) ? ret : count; | |
203 | } | |
204 | ||
205 | ||
206 | static struct bin_attribute nvram_attr = { | |
207 | .attr.name = "nvram", | |
208 | .attr.mode = S_IRUGO | S_IWUSR, | |
209 | .read = ds1343_nvram_read, | |
210 | .write = ds1343_nvram_write, | |
211 | .size = DS1343_NVRAM_LEN, | |
212 | }; | |
213 | ||
1d6316f5 RG |
214 | static ssize_t ds1343_show_alarmstatus(struct device *dev, |
215 | struct device_attribute *attr, char *buf) | |
216 | { | |
217 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
218 | int alarmstatus, data; | |
219 | ||
220 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
221 | ||
222 | alarmstatus = !!(data & DS1343_A0IE); | |
223 | ||
224 | if (alarmstatus) | |
225 | return sprintf(buf, "enabled\n"); | |
226 | else | |
227 | return sprintf(buf, "disabled\n"); | |
228 | } | |
229 | ||
230 | static DEVICE_ATTR(alarm_status, S_IRUGO, ds1343_show_alarmstatus, NULL); | |
231 | ||
232 | static ssize_t ds1343_show_alarmmode(struct device *dev, | |
233 | struct device_attribute *attr, char *buf) | |
234 | { | |
235 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
236 | int alarm_mode, data; | |
237 | char *alarm_str; | |
238 | ||
239 | regmap_read(priv->map, DS1343_ALM0_SEC_REG, &data); | |
240 | alarm_mode = (data & 0x80) >> 4; | |
241 | ||
242 | regmap_read(priv->map, DS1343_ALM0_MIN_REG, &data); | |
243 | alarm_mode |= (data & 0x80) >> 5; | |
244 | ||
245 | regmap_read(priv->map, DS1343_ALM0_HOUR_REG, &data); | |
246 | alarm_mode |= (data & 0x80) >> 6; | |
247 | ||
248 | regmap_read(priv->map, DS1343_ALM0_DAY_REG, &data); | |
249 | alarm_mode |= (data & 0x80) >> 7; | |
250 | ||
251 | switch (alarm_mode) { | |
252 | case 15: | |
253 | alarm_str = "each second"; | |
254 | break; | |
255 | ||
256 | case 7: | |
257 | alarm_str = "seconds match"; | |
258 | break; | |
259 | ||
260 | case 3: | |
261 | alarm_str = "minutes and seconds match"; | |
262 | break; | |
263 | ||
264 | case 1: | |
265 | alarm_str = "hours, minutes and seconds match"; | |
266 | break; | |
267 | ||
268 | case 0: | |
269 | alarm_str = "day, hours, minutes and seconds match"; | |
270 | break; | |
271 | ||
272 | default: | |
273 | alarm_str = "invalid"; | |
274 | break; | |
275 | } | |
276 | ||
277 | return sprintf(buf, "%s\n", alarm_str); | |
278 | } | |
279 | ||
280 | static DEVICE_ATTR(alarm_mode, S_IRUGO, ds1343_show_alarmmode, NULL); | |
281 | ||
282 | static ssize_t ds1343_show_tricklecharger(struct device *dev, | |
283 | struct device_attribute *attr, char *buf) | |
284 | { | |
285 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
286 | int data; | |
287 | char *diodes = "disabled", *resistors = " "; | |
288 | ||
289 | regmap_read(priv->map, DS1343_TRICKLE_REG, &data); | |
290 | ||
291 | if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) { | |
292 | switch (data & 0x0c) { | |
293 | case DS1343_TRICKLE_DS1: | |
294 | diodes = "one diode,"; | |
295 | break; | |
296 | ||
297 | default: | |
298 | diodes = "no diode,"; | |
299 | break; | |
300 | } | |
301 | ||
302 | switch (data & 0x03) { | |
303 | case DS1343_TRICKLE_1K: | |
304 | resistors = "1k Ohm"; | |
305 | break; | |
306 | ||
307 | case DS1343_TRICKLE_2K: | |
308 | resistors = "2k Ohm"; | |
309 | break; | |
310 | ||
311 | case DS1343_TRICKLE_4K: | |
312 | resistors = "4k Ohm"; | |
313 | break; | |
314 | ||
315 | default: | |
316 | diodes = "disabled"; | |
317 | break; | |
318 | } | |
319 | } | |
320 | ||
321 | return sprintf(buf, "%s %s\n", diodes, resistors); | |
322 | } | |
323 | ||
324 | static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL); | |
325 | ||
326 | static int ds1343_sysfs_register(struct device *dev) | |
327 | { | |
10b06b87 | 328 | struct ds1343_priv *priv = dev_get_drvdata(dev); |
1d6316f5 RG |
329 | int err; |
330 | ||
331 | err = device_create_file(dev, &dev_attr_glitch_filter); | |
332 | if (err) | |
333 | return err; | |
334 | ||
10b06b87 | 335 | err = device_create_file(dev, &dev_attr_trickle_charger); |
1d6316f5 RG |
336 | if (err) |
337 | goto error1; | |
338 | ||
571eb883 RG |
339 | err = device_create_bin_file(dev, &nvram_attr); |
340 | if (err) | |
341 | goto error2; | |
342 | ||
10b06b87 RG |
343 | if (priv->irq <= 0) |
344 | return err; | |
345 | ||
1d6316f5 RG |
346 | err = device_create_file(dev, &dev_attr_alarm_mode); |
347 | if (err) | |
571eb883 | 348 | goto error3; |
1d6316f5 | 349 | |
10b06b87 | 350 | err = device_create_file(dev, &dev_attr_alarm_status); |
1d6316f5 RG |
351 | if (!err) |
352 | return err; | |
353 | ||
354 | device_remove_file(dev, &dev_attr_alarm_mode); | |
355 | ||
571eb883 RG |
356 | error3: |
357 | device_remove_bin_file(dev, &nvram_attr); | |
358 | ||
1d6316f5 | 359 | error2: |
10b06b87 | 360 | device_remove_file(dev, &dev_attr_trickle_charger); |
1d6316f5 RG |
361 | |
362 | error1: | |
363 | device_remove_file(dev, &dev_attr_glitch_filter); | |
364 | ||
365 | return err; | |
366 | } | |
367 | ||
368 | static void ds1343_sysfs_unregister(struct device *dev) | |
369 | { | |
10b06b87 RG |
370 | struct ds1343_priv *priv = dev_get_drvdata(dev); |
371 | ||
1d6316f5 | 372 | device_remove_file(dev, &dev_attr_glitch_filter); |
10b06b87 | 373 | device_remove_file(dev, &dev_attr_trickle_charger); |
571eb883 | 374 | device_remove_bin_file(dev, &nvram_attr); |
10b06b87 RG |
375 | |
376 | if (priv->irq <= 0) | |
377 | return; | |
378 | ||
1d6316f5 RG |
379 | device_remove_file(dev, &dev_attr_alarm_status); |
380 | device_remove_file(dev, &dev_attr_alarm_mode); | |
1d6316f5 RG |
381 | } |
382 | ||
383 | static int ds1343_read_time(struct device *dev, struct rtc_time *dt) | |
384 | { | |
385 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
386 | unsigned char buf[7]; | |
387 | int res; | |
388 | ||
389 | res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7); | |
390 | if (res) | |
391 | return res; | |
392 | ||
393 | dt->tm_sec = bcd2bin(buf[0]); | |
394 | dt->tm_min = bcd2bin(buf[1]); | |
395 | dt->tm_hour = bcd2bin(buf[2] & 0x3F); | |
396 | dt->tm_wday = bcd2bin(buf[3]) - 1; | |
397 | dt->tm_mday = bcd2bin(buf[4]); | |
398 | dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1; | |
399 | dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */ | |
400 | ||
401 | return rtc_valid_tm(dt); | |
402 | } | |
403 | ||
404 | static int ds1343_set_time(struct device *dev, struct rtc_time *dt) | |
405 | { | |
406 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
407 | int res; | |
408 | ||
409 | res = regmap_write(priv->map, DS1343_SECONDS_REG, | |
410 | bin2bcd(dt->tm_sec)); | |
411 | if (res) | |
412 | return res; | |
413 | ||
414 | res = regmap_write(priv->map, DS1343_MINUTES_REG, | |
415 | bin2bcd(dt->tm_min)); | |
416 | if (res) | |
417 | return res; | |
418 | ||
419 | res = regmap_write(priv->map, DS1343_HOURS_REG, | |
420 | bin2bcd(dt->tm_hour) & 0x3F); | |
421 | if (res) | |
422 | return res; | |
423 | ||
424 | res = regmap_write(priv->map, DS1343_DAY_REG, | |
425 | bin2bcd(dt->tm_wday + 1)); | |
426 | if (res) | |
427 | return res; | |
428 | ||
429 | res = regmap_write(priv->map, DS1343_DATE_REG, | |
430 | bin2bcd(dt->tm_mday)); | |
431 | if (res) | |
432 | return res; | |
433 | ||
434 | res = regmap_write(priv->map, DS1343_MONTH_REG, | |
435 | bin2bcd(dt->tm_mon + 1)); | |
436 | if (res) | |
437 | return res; | |
438 | ||
439 | dt->tm_year %= 100; | |
440 | ||
441 | res = regmap_write(priv->map, DS1343_YEAR_REG, | |
442 | bin2bcd(dt->tm_year)); | |
443 | if (res) | |
444 | return res; | |
445 | ||
446 | return 0; | |
447 | } | |
448 | ||
449 | static int ds1343_update_alarm(struct device *dev) | |
450 | { | |
451 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
452 | unsigned int control, stat; | |
453 | unsigned char buf[4]; | |
454 | int res = 0; | |
455 | ||
456 | res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); | |
457 | if (res) | |
458 | return res; | |
459 | ||
460 | res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); | |
461 | if (res) | |
462 | return res; | |
463 | ||
464 | control &= ~(DS1343_A0IE); | |
465 | stat &= ~(DS1343_IRQF0); | |
466 | ||
467 | res = regmap_write(priv->map, DS1343_CONTROL_REG, control); | |
468 | if (res) | |
469 | return res; | |
470 | ||
471 | res = regmap_write(priv->map, DS1343_STATUS_REG, stat); | |
472 | if (res) | |
473 | return res; | |
474 | ||
475 | buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ? | |
476 | 0x80 : bin2bcd(priv->alarm_sec) & 0x7F; | |
477 | buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ? | |
478 | 0x80 : bin2bcd(priv->alarm_min) & 0x7F; | |
479 | buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ? | |
480 | 0x80 : bin2bcd(priv->alarm_hour) & 0x3F; | |
481 | buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ? | |
482 | 0x80 : bin2bcd(priv->alarm_mday) & 0x7F; | |
483 | ||
484 | res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4); | |
485 | if (res) | |
486 | return res; | |
487 | ||
488 | if (priv->irqen) { | |
489 | control |= DS1343_A0IE; | |
490 | res = regmap_write(priv->map, DS1343_CONTROL_REG, control); | |
491 | } | |
492 | ||
493 | return res; | |
494 | } | |
495 | ||
496 | static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
497 | { | |
498 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
1d6316f5 RG |
499 | int res = 0; |
500 | unsigned int stat; | |
501 | ||
10b06b87 | 502 | if (priv->irq <= 0) |
1d6316f5 RG |
503 | return -EINVAL; |
504 | ||
505 | mutex_lock(&priv->mutex); | |
506 | ||
507 | res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); | |
508 | if (res) | |
509 | goto out; | |
510 | ||
511 | alarm->enabled = !!(priv->irqen & RTC_AF); | |
512 | alarm->pending = !!(stat & DS1343_IRQF0); | |
513 | ||
514 | alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec; | |
515 | alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min; | |
516 | alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour; | |
517 | alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday; | |
518 | ||
519 | alarm->time.tm_mon = -1; | |
520 | alarm->time.tm_year = -1; | |
521 | alarm->time.tm_wday = -1; | |
522 | alarm->time.tm_yday = -1; | |
523 | alarm->time.tm_isdst = -1; | |
524 | ||
525 | out: | |
526 | mutex_unlock(&priv->mutex); | |
527 | return res; | |
528 | } | |
529 | ||
530 | static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
531 | { | |
532 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
1d6316f5 RG |
533 | int res = 0; |
534 | ||
10b06b87 | 535 | if (priv->irq <= 0) |
1d6316f5 RG |
536 | return -EINVAL; |
537 | ||
538 | mutex_lock(&priv->mutex); | |
539 | ||
540 | priv->alarm_sec = alarm->time.tm_sec; | |
541 | priv->alarm_min = alarm->time.tm_min; | |
542 | priv->alarm_hour = alarm->time.tm_hour; | |
543 | priv->alarm_mday = alarm->time.tm_mday; | |
544 | ||
545 | if (alarm->enabled) | |
546 | priv->irqen |= RTC_AF; | |
547 | ||
548 | res = ds1343_update_alarm(dev); | |
549 | ||
550 | mutex_unlock(&priv->mutex); | |
551 | ||
552 | return res; | |
553 | } | |
554 | ||
555 | static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
556 | { | |
557 | struct ds1343_priv *priv = dev_get_drvdata(dev); | |
1d6316f5 RG |
558 | int res = 0; |
559 | ||
10b06b87 | 560 | if (priv->irq <= 0) |
1d6316f5 RG |
561 | return -EINVAL; |
562 | ||
563 | mutex_lock(&priv->mutex); | |
564 | ||
565 | if (enabled) | |
566 | priv->irqen |= RTC_AF; | |
567 | else | |
568 | priv->irqen &= ~RTC_AF; | |
569 | ||
570 | res = ds1343_update_alarm(dev); | |
571 | ||
572 | mutex_unlock(&priv->mutex); | |
573 | ||
574 | return res; | |
575 | } | |
576 | ||
577 | static irqreturn_t ds1343_thread(int irq, void *dev_id) | |
578 | { | |
579 | struct ds1343_priv *priv = dev_id; | |
580 | unsigned int stat, control; | |
581 | int res = 0; | |
582 | ||
583 | mutex_lock(&priv->mutex); | |
584 | ||
585 | res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); | |
586 | if (res) | |
587 | goto out; | |
588 | ||
589 | if (stat & DS1343_IRQF0) { | |
590 | stat &= ~DS1343_IRQF0; | |
591 | regmap_write(priv->map, DS1343_STATUS_REG, stat); | |
592 | ||
593 | res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); | |
594 | if (res) | |
595 | goto out; | |
596 | ||
597 | control &= ~DS1343_A0IE; | |
598 | regmap_write(priv->map, DS1343_CONTROL_REG, control); | |
599 | ||
600 | rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF); | |
601 | } | |
602 | ||
603 | out: | |
604 | mutex_unlock(&priv->mutex); | |
605 | return IRQ_HANDLED; | |
606 | } | |
607 | ||
608 | static const struct rtc_class_ops ds1343_rtc_ops = { | |
609 | .ioctl = ds1343_ioctl, | |
610 | .read_time = ds1343_read_time, | |
611 | .set_time = ds1343_set_time, | |
612 | .read_alarm = ds1343_read_alarm, | |
613 | .set_alarm = ds1343_set_alarm, | |
614 | .alarm_irq_enable = ds1343_alarm_irq_enable, | |
615 | }; | |
616 | ||
617 | static int ds1343_probe(struct spi_device *spi) | |
618 | { | |
619 | struct ds1343_priv *priv; | |
620 | struct regmap_config config; | |
621 | unsigned int data; | |
622 | int res; | |
623 | ||
624 | memset(&config, 0, sizeof(config)); | |
625 | config.reg_bits = 8; | |
626 | config.val_bits = 8; | |
627 | config.write_flag_mask = 0x80; | |
628 | ||
629 | priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL); | |
630 | if (!priv) | |
631 | return -ENOMEM; | |
632 | ||
633 | priv->spi = spi; | |
634 | mutex_init(&priv->mutex); | |
635 | ||
636 | /* RTC DS1347 works in spi mode 3 and | |
637 | * its chip select is active high | |
638 | */ | |
639 | spi->mode = SPI_MODE_3 | SPI_CS_HIGH; | |
640 | spi->bits_per_word = 8; | |
641 | res = spi_setup(spi); | |
642 | if (res) | |
643 | return res; | |
644 | ||
645 | spi_set_drvdata(spi, priv); | |
646 | ||
647 | priv->map = devm_regmap_init_spi(spi, &config); | |
648 | ||
649 | if (IS_ERR(priv->map)) { | |
650 | dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n"); | |
651 | return PTR_ERR(priv->map); | |
652 | } | |
653 | ||
654 | res = regmap_read(priv->map, DS1343_SECONDS_REG, &data); | |
655 | if (res) | |
656 | return res; | |
657 | ||
658 | regmap_read(priv->map, DS1343_CONTROL_REG, &data); | |
659 | data |= DS1343_INTCN; | |
660 | data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE); | |
661 | regmap_write(priv->map, DS1343_CONTROL_REG, data); | |
662 | ||
663 | regmap_read(priv->map, DS1343_STATUS_REG, &data); | |
664 | data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0); | |
665 | regmap_write(priv->map, DS1343_STATUS_REG, data); | |
666 | ||
667 | priv->rtc = devm_rtc_device_register(&spi->dev, "ds1343", | |
668 | &ds1343_rtc_ops, THIS_MODULE); | |
669 | if (IS_ERR(priv->rtc)) { | |
670 | dev_err(&spi->dev, "unable to register rtc ds1343\n"); | |
671 | return PTR_ERR(priv->rtc); | |
672 | } | |
673 | ||
10b06b87 RG |
674 | priv->irq = spi->irq; |
675 | ||
676 | if (priv->irq >= 0) { | |
1d6316f5 RG |
677 | res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL, |
678 | ds1343_thread, | |
679 | IRQF_NO_SUSPEND | IRQF_ONESHOT, | |
680 | "ds1343", priv); | |
681 | if (res) { | |
10b06b87 | 682 | priv->irq = -1; |
1d6316f5 RG |
683 | dev_err(&spi->dev, |
684 | "unable to request irq for rtc ds1343\n"); | |
10b06b87 RG |
685 | } else { |
686 | device_set_wakeup_capable(&spi->dev, 1); | |
1d6316f5 | 687 | } |
1d6316f5 RG |
688 | } |
689 | ||
690 | res = ds1343_sysfs_register(&spi->dev); | |
691 | if (res) | |
692 | dev_err(&spi->dev, | |
693 | "unable to create sysfs entries for rtc ds1343\n"); | |
694 | ||
695 | return 0; | |
696 | } | |
697 | ||
698 | static int ds1343_remove(struct spi_device *spi) | |
699 | { | |
700 | struct ds1343_priv *priv = spi_get_drvdata(spi); | |
701 | ||
702 | if (spi->irq) { | |
703 | mutex_lock(&priv->mutex); | |
704 | priv->irqen &= ~RTC_AF; | |
705 | mutex_unlock(&priv->mutex); | |
706 | ||
707 | devm_free_irq(&spi->dev, spi->irq, priv); | |
708 | } | |
709 | ||
710 | spi_set_drvdata(spi, NULL); | |
711 | ||
712 | ds1343_sysfs_unregister(&spi->dev); | |
713 | ||
714 | return 0; | |
715 | } | |
716 | ||
717 | #ifdef CONFIG_PM_SLEEP | |
718 | ||
719 | static int ds1343_suspend(struct device *dev) | |
720 | { | |
721 | struct spi_device *spi = to_spi_device(dev); | |
722 | ||
723 | if (spi->irq >= 0 && device_may_wakeup(dev)) | |
724 | enable_irq_wake(spi->irq); | |
725 | ||
726 | return 0; | |
727 | } | |
728 | ||
729 | static int ds1343_resume(struct device *dev) | |
730 | { | |
731 | struct spi_device *spi = to_spi_device(dev); | |
732 | ||
733 | if (spi->irq >= 0 && device_may_wakeup(dev)) | |
734 | disable_irq_wake(spi->irq); | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
739 | #endif | |
740 | ||
741 | static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume); | |
742 | ||
743 | static struct spi_driver ds1343_driver = { | |
744 | .driver = { | |
745 | .name = "ds1343", | |
746 | .owner = THIS_MODULE, | |
747 | .pm = &ds1343_pm, | |
748 | }, | |
749 | .probe = ds1343_probe, | |
750 | .remove = ds1343_remove, | |
751 | .id_table = ds1343_id, | |
752 | }; | |
753 | ||
754 | module_spi_driver(ds1343_driver); | |
755 | ||
756 | MODULE_DESCRIPTION("DS1343 RTC SPI Driver"); | |
571eb883 RG |
757 | MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>," |
758 | "Ankur Srivastava <sankurece@gmail.com>"); | |
1d6316f5 RG |
759 | MODULE_LICENSE("GPL v2"); |
760 | MODULE_VERSION(DS1343_DRV_VERSION); |