Commit | Line | Data |
---|---|---|
fca1dd03 JL |
1 | /* |
2 | * RTC driver for Maxim MAX77686 | |
3 | * | |
4 | * Copyright (C) 2012 Samsung Electronics Co.Ltd | |
5 | * | |
6 | * based on rtc-max8997.c | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/slab.h> | |
16 | #include <linux/rtc.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/mutex.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/mfd/max77686-private.h> | |
22 | #include <linux/irqdomain.h> | |
23 | #include <linux/regmap.h> | |
24 | ||
25 | /* RTC Control Register */ | |
26 | #define BCD_EN_SHIFT 0 | |
ac60bf31 | 27 | #define BCD_EN_MASK (1 << BCD_EN_SHIFT) |
fca1dd03 JL |
28 | #define MODEL24_SHIFT 1 |
29 | #define MODEL24_MASK (1 << MODEL24_SHIFT) | |
30 | /* RTC Update Register1 */ | |
31 | #define RTC_UDR_SHIFT 0 | |
32 | #define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) | |
33 | #define RTC_RBUDR_SHIFT 4 | |
34 | #define RTC_RBUDR_MASK (1 << RTC_RBUDR_SHIFT) | |
fca1dd03 JL |
35 | /* RTC Hour register */ |
36 | #define HOUR_PM_SHIFT 6 | |
37 | #define HOUR_PM_MASK (1 << HOUR_PM_SHIFT) | |
38 | /* RTC Alarm Enable */ | |
39 | #define ALARM_ENABLE_SHIFT 7 | |
40 | #define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT) | |
41 | ||
42 | #define MAX77686_RTC_UPDATE_DELAY 16 | |
fca1dd03 JL |
43 | |
44 | enum { | |
45 | RTC_SEC = 0, | |
46 | RTC_MIN, | |
47 | RTC_HOUR, | |
48 | RTC_WEEKDAY, | |
49 | RTC_MONTH, | |
50 | RTC_YEAR, | |
51 | RTC_DATE, | |
52 | RTC_NR_TIME | |
53 | }; | |
54 | ||
55 | struct max77686_rtc_info { | |
56 | struct device *dev; | |
57 | struct max77686_dev *max77686; | |
58 | struct i2c_client *rtc; | |
59 | struct rtc_device *rtc_dev; | |
60 | struct mutex lock; | |
61 | ||
62 | struct regmap *regmap; | |
63 | ||
64 | int virq; | |
65 | int rtc_24hr_mode; | |
66 | }; | |
67 | ||
68 | enum MAX77686_RTC_OP { | |
69 | MAX77686_RTC_WRITE, | |
70 | MAX77686_RTC_READ, | |
71 | }; | |
72 | ||
fca1dd03 JL |
73 | static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm, |
74 | int rtc_24hr_mode) | |
75 | { | |
76 | tm->tm_sec = data[RTC_SEC] & 0x7f; | |
77 | tm->tm_min = data[RTC_MIN] & 0x7f; | |
78 | if (rtc_24hr_mode) | |
79 | tm->tm_hour = data[RTC_HOUR] & 0x1f; | |
80 | else { | |
81 | tm->tm_hour = data[RTC_HOUR] & 0x0f; | |
82 | if (data[RTC_HOUR] & HOUR_PM_MASK) | |
83 | tm->tm_hour += 12; | |
84 | } | |
85 | ||
a20cd88e JMC |
86 | /* Only a single bit is set in data[], so fls() would be equivalent */ |
87 | tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f) - 1; | |
fca1dd03 JL |
88 | tm->tm_mday = data[RTC_DATE] & 0x1f; |
89 | tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; | |
90 | tm->tm_year = (data[RTC_YEAR] & 0x7f) + 100; | |
91 | tm->tm_yday = 0; | |
92 | tm->tm_isdst = 0; | |
93 | } | |
94 | ||
95 | static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data) | |
96 | { | |
97 | data[RTC_SEC] = tm->tm_sec; | |
98 | data[RTC_MIN] = tm->tm_min; | |
99 | data[RTC_HOUR] = tm->tm_hour; | |
100 | data[RTC_WEEKDAY] = 1 << tm->tm_wday; | |
101 | data[RTC_DATE] = tm->tm_mday; | |
102 | data[RTC_MONTH] = tm->tm_mon + 1; | |
cdf5f4ac | 103 | data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; |
fca1dd03 JL |
104 | |
105 | if (tm->tm_year < 100) { | |
106 | pr_warn("%s: MAX77686 RTC cannot handle the year %d." | |
107 | "Assume it's 2000.\n", __func__, 1900 + tm->tm_year); | |
108 | return -EINVAL; | |
109 | } | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static int max77686_rtc_update(struct max77686_rtc_info *info, | |
114 | enum MAX77686_RTC_OP op) | |
115 | { | |
116 | int ret; | |
117 | unsigned int data; | |
118 | ||
119 | if (op == MAX77686_RTC_WRITE) | |
120 | data = 1 << RTC_UDR_SHIFT; | |
121 | else | |
122 | data = 1 << RTC_RBUDR_SHIFT; | |
123 | ||
124 | ret = regmap_update_bits(info->max77686->rtc_regmap, | |
125 | MAX77686_RTC_UPDATE0, data, data); | |
126 | if (ret < 0) | |
127 | dev_err(info->dev, "%s: fail to write update reg(ret=%d, data=0x%x)\n", | |
128 | __func__, ret, data); | |
129 | else { | |
130 | /* Minimum 16ms delay required before RTC update. */ | |
131 | msleep(MAX77686_RTC_UPDATE_DELAY); | |
132 | } | |
133 | ||
134 | return ret; | |
135 | } | |
136 | ||
137 | static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
138 | { | |
139 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
140 | u8 data[RTC_NR_TIME]; | |
141 | int ret; | |
142 | ||
143 | mutex_lock(&info->lock); | |
144 | ||
145 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
146 | if (ret < 0) | |
147 | goto out; | |
148 | ||
149 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
150 | MAX77686_RTC_SEC, data, RTC_NR_TIME); | |
151 | if (ret < 0) { | |
152 | dev_err(info->dev, "%s: fail to read time reg(%d)\n", __func__, ret); | |
153 | goto out; | |
154 | } | |
155 | ||
156 | max77686_rtc_data_to_tm(data, tm, info->rtc_24hr_mode); | |
157 | ||
158 | ret = rtc_valid_tm(tm); | |
159 | ||
160 | out: | |
161 | mutex_unlock(&info->lock); | |
162 | return ret; | |
163 | } | |
164 | ||
165 | static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
166 | { | |
167 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
168 | u8 data[RTC_NR_TIME]; | |
169 | int ret; | |
170 | ||
171 | ret = max77686_rtc_tm_to_data(tm, data); | |
172 | if (ret < 0) | |
173 | return ret; | |
174 | ||
175 | mutex_lock(&info->lock); | |
176 | ||
177 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
178 | MAX77686_RTC_SEC, data, RTC_NR_TIME); | |
179 | if (ret < 0) { | |
180 | dev_err(info->dev, "%s: fail to write time reg(%d)\n", __func__, | |
181 | ret); | |
182 | goto out; | |
183 | } | |
184 | ||
185 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
186 | ||
187 | out: | |
188 | mutex_unlock(&info->lock); | |
189 | return ret; | |
190 | } | |
191 | ||
192 | static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
193 | { | |
194 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
195 | u8 data[RTC_NR_TIME]; | |
196 | unsigned int val; | |
197 | int i, ret; | |
198 | ||
199 | mutex_lock(&info->lock); | |
200 | ||
201 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
202 | if (ret < 0) | |
203 | goto out; | |
204 | ||
205 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
206 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
207 | if (ret < 0) { | |
208 | dev_err(info->dev, "%s:%d fail to read alarm reg(%d)\n", | |
209 | __func__, __LINE__, ret); | |
210 | goto out; | |
211 | } | |
212 | ||
213 | max77686_rtc_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); | |
214 | ||
215 | alrm->enabled = 0; | |
216 | for (i = 0; i < RTC_NR_TIME; i++) { | |
217 | if (data[i] & ALARM_ENABLE_MASK) { | |
218 | alrm->enabled = 1; | |
219 | break; | |
220 | } | |
221 | } | |
222 | ||
223 | alrm->pending = 0; | |
1748cbf7 | 224 | ret = regmap_read(info->max77686->regmap, MAX77686_REG_STATUS2, &val); |
fca1dd03 | 225 | if (ret < 0) { |
1748cbf7 | 226 | dev_err(info->dev, "%s:%d fail to read status2 reg(%d)\n", |
fca1dd03 JL |
227 | __func__, __LINE__, ret); |
228 | goto out; | |
229 | } | |
230 | ||
231 | if (val & (1 << 4)) /* RTCA1 */ | |
232 | alrm->pending = 1; | |
233 | ||
234 | out: | |
235 | mutex_unlock(&info->lock); | |
236 | return 0; | |
237 | } | |
238 | ||
239 | static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info) | |
240 | { | |
241 | u8 data[RTC_NR_TIME]; | |
242 | int ret, i; | |
243 | struct rtc_time tm; | |
244 | ||
245 | if (!mutex_is_locked(&info->lock)) | |
246 | dev_warn(info->dev, "%s: should have mutex locked\n", __func__); | |
247 | ||
248 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
249 | if (ret < 0) | |
250 | goto out; | |
251 | ||
252 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
253 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
254 | if (ret < 0) { | |
255 | dev_err(info->dev, "%s: fail to read alarm reg(%d)\n", | |
256 | __func__, ret); | |
257 | goto out; | |
258 | } | |
259 | ||
260 | max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
261 | ||
262 | for (i = 0; i < RTC_NR_TIME; i++) | |
263 | data[i] &= ~ALARM_ENABLE_MASK; | |
264 | ||
265 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
266 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
267 | if (ret < 0) { | |
268 | dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", | |
269 | __func__, ret); | |
270 | goto out; | |
271 | } | |
272 | ||
273 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
274 | out: | |
275 | return ret; | |
276 | } | |
277 | ||
278 | static int max77686_rtc_start_alarm(struct max77686_rtc_info *info) | |
279 | { | |
280 | u8 data[RTC_NR_TIME]; | |
281 | int ret; | |
282 | struct rtc_time tm; | |
283 | ||
284 | if (!mutex_is_locked(&info->lock)) | |
285 | dev_warn(info->dev, "%s: should have mutex locked\n", __func__); | |
286 | ||
287 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
288 | if (ret < 0) | |
289 | goto out; | |
290 | ||
291 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
292 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
293 | if (ret < 0) { | |
294 | dev_err(info->dev, "%s: fail to read alarm reg(%d)\n", | |
295 | __func__, ret); | |
296 | goto out; | |
297 | } | |
298 | ||
299 | max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
300 | ||
301 | data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT); | |
302 | data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT); | |
303 | data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT); | |
304 | data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; | |
305 | if (data[RTC_MONTH] & 0xf) | |
306 | data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT); | |
307 | if (data[RTC_YEAR] & 0x7f) | |
308 | data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT); | |
309 | if (data[RTC_DATE] & 0x1f) | |
310 | data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT); | |
311 | ||
312 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
313 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
314 | if (ret < 0) { | |
315 | dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", | |
316 | __func__, ret); | |
317 | goto out; | |
318 | } | |
319 | ||
320 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
321 | out: | |
322 | return ret; | |
323 | } | |
324 | ||
325 | static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
326 | { | |
327 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
328 | u8 data[RTC_NR_TIME]; | |
329 | int ret; | |
330 | ||
331 | ret = max77686_rtc_tm_to_data(&alrm->time, data); | |
332 | if (ret < 0) | |
333 | return ret; | |
334 | ||
335 | mutex_lock(&info->lock); | |
336 | ||
337 | ret = max77686_rtc_stop_alarm(info); | |
338 | if (ret < 0) | |
339 | goto out; | |
340 | ||
341 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
342 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
343 | ||
344 | if (ret < 0) { | |
345 | dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", | |
346 | __func__, ret); | |
347 | goto out; | |
348 | } | |
349 | ||
350 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
351 | if (ret < 0) | |
352 | goto out; | |
353 | ||
354 | if (alrm->enabled) | |
355 | ret = max77686_rtc_start_alarm(info); | |
356 | out: | |
357 | mutex_unlock(&info->lock); | |
358 | return ret; | |
359 | } | |
360 | ||
361 | static int max77686_rtc_alarm_irq_enable(struct device *dev, | |
362 | unsigned int enabled) | |
363 | { | |
364 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
365 | int ret; | |
366 | ||
367 | mutex_lock(&info->lock); | |
368 | if (enabled) | |
369 | ret = max77686_rtc_start_alarm(info); | |
370 | else | |
371 | ret = max77686_rtc_stop_alarm(info); | |
372 | mutex_unlock(&info->lock); | |
373 | ||
374 | return ret; | |
375 | } | |
376 | ||
377 | static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data) | |
378 | { | |
379 | struct max77686_rtc_info *info = data; | |
380 | ||
381 | dev_info(info->dev, "%s:irq(%d)\n", __func__, irq); | |
382 | ||
383 | rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); | |
384 | ||
385 | return IRQ_HANDLED; | |
386 | } | |
387 | ||
388 | static const struct rtc_class_ops max77686_rtc_ops = { | |
389 | .read_time = max77686_rtc_read_time, | |
390 | .set_time = max77686_rtc_set_time, | |
391 | .read_alarm = max77686_rtc_read_alarm, | |
392 | .set_alarm = max77686_rtc_set_alarm, | |
393 | .alarm_irq_enable = max77686_rtc_alarm_irq_enable, | |
394 | }; | |
395 | ||
fca1dd03 JL |
396 | static int max77686_rtc_init_reg(struct max77686_rtc_info *info) |
397 | { | |
398 | u8 data[2]; | |
399 | int ret; | |
400 | ||
401 | /* Set RTC control register : Binary mode, 24hour mdoe */ | |
402 | data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
403 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
404 | ||
405 | info->rtc_24hr_mode = 1; | |
406 | ||
407 | ret = regmap_bulk_write(info->max77686->rtc_regmap, MAX77686_RTC_CONTROLM, data, 2); | |
408 | if (ret < 0) { | |
409 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", | |
410 | __func__, ret); | |
411 | return ret; | |
412 | } | |
413 | ||
414 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
415 | return ret; | |
416 | } | |
417 | ||
fca1dd03 JL |
418 | static int max77686_rtc_probe(struct platform_device *pdev) |
419 | { | |
420 | struct max77686_dev *max77686 = dev_get_drvdata(pdev->dev.parent); | |
421 | struct max77686_rtc_info *info; | |
6f1c1e71 | 422 | int ret; |
fca1dd03 | 423 | |
3cebeb53 | 424 | dev_info(&pdev->dev, "%s\n", __func__); |
fca1dd03 | 425 | |
0f64f853 JH |
426 | info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info), |
427 | GFP_KERNEL); | |
fca1dd03 JL |
428 | if (!info) |
429 | return -ENOMEM; | |
430 | ||
431 | mutex_init(&info->lock); | |
432 | info->dev = &pdev->dev; | |
433 | info->max77686 = max77686; | |
434 | info->rtc = max77686->rtc; | |
6f1c1e71 | 435 | |
fca1dd03 JL |
436 | platform_set_drvdata(pdev, info); |
437 | ||
438 | ret = max77686_rtc_init_reg(info); | |
439 | ||
440 | if (ret < 0) { | |
441 | dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret); | |
442 | goto err_rtc; | |
443 | } | |
444 | ||
fca1dd03 JL |
445 | device_init_wakeup(&pdev->dev, 1); |
446 | ||
f56950ec JH |
447 | info->rtc_dev = devm_rtc_device_register(&pdev->dev, "max77686-rtc", |
448 | &max77686_rtc_ops, THIS_MODULE); | |
fca1dd03 JL |
449 | |
450 | if (IS_ERR(info->rtc_dev)) { | |
fca1dd03 JL |
451 | ret = PTR_ERR(info->rtc_dev); |
452 | dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret); | |
453 | if (ret == 0) | |
454 | ret = -EINVAL; | |
455 | goto err_rtc; | |
456 | } | |
6f1c1e71 | 457 | |
1745d6d3 JMC |
458 | if (!max77686->rtc_irq_data) { |
459 | ret = -EINVAL; | |
460 | dev_err(&pdev->dev, "%s: no RTC regmap IRQ chip\n", __func__); | |
461 | goto err_rtc; | |
462 | } | |
463 | ||
6f1c1e71 JMC |
464 | info->virq = regmap_irq_get_virq(max77686->rtc_irq_data, |
465 | MAX77686_RTCIRQ_RTCA1); | |
466 | if (!info->virq) { | |
ad819039 | 467 | ret = -ENXIO; |
fca1dd03 | 468 | goto err_rtc; |
ad819039 | 469 | } |
fca1dd03 | 470 | |
6f1c1e71 JMC |
471 | ret = devm_request_threaded_irq(&pdev->dev, info->virq, NULL, |
472 | max77686_rtc_alarm_irq, 0, "rtc-alarm1", info); | |
ad819039 | 473 | if (ret < 0) |
fca1dd03 JL |
474 | dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", |
475 | info->virq, ret); | |
fca1dd03 | 476 | |
fca1dd03 | 477 | err_rtc: |
fca1dd03 JL |
478 | return ret; |
479 | } | |
480 | ||
e7f7fc73 DA |
481 | #ifdef CONFIG_PM_SLEEP |
482 | static int max77686_rtc_suspend(struct device *dev) | |
483 | { | |
484 | if (device_may_wakeup(dev)) { | |
485 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
486 | ||
487 | return enable_irq_wake(info->virq); | |
488 | } | |
489 | ||
490 | return 0; | |
491 | } | |
492 | ||
493 | static int max77686_rtc_resume(struct device *dev) | |
494 | { | |
495 | if (device_may_wakeup(dev)) { | |
496 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
497 | ||
498 | return disable_irq_wake(info->virq); | |
499 | } | |
500 | ||
501 | return 0; | |
502 | } | |
503 | #endif | |
504 | ||
505 | static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops, | |
506 | max77686_rtc_suspend, max77686_rtc_resume); | |
507 | ||
fca1dd03 JL |
508 | static const struct platform_device_id rtc_id[] = { |
509 | { "max77686-rtc", 0 }, | |
510 | {}, | |
511 | }; | |
512 | ||
513 | static struct platform_driver max77686_rtc_driver = { | |
514 | .driver = { | |
515 | .name = "max77686-rtc", | |
516 | .owner = THIS_MODULE, | |
e7f7fc73 | 517 | .pm = &max77686_rtc_pm_ops, |
fca1dd03 JL |
518 | }, |
519 | .probe = max77686_rtc_probe, | |
fca1dd03 JL |
520 | .id_table = rtc_id, |
521 | }; | |
522 | ||
0c58ff58 | 523 | module_platform_driver(max77686_rtc_driver); |
fca1dd03 JL |
524 | |
525 | MODULE_DESCRIPTION("Maxim MAX77686 RTC driver"); | |
f5b1d3c5 | 526 | MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>"); |
fca1dd03 | 527 | MODULE_LICENSE("GPL"); |