Merge branch 'generic-ipi' into generic-ipi-for-linus
[deliverable/linux.git] / drivers / rtc / rtc-omap.c
CommitLineData
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1/*
2 * TI OMAP1 Real Time Clock interface for Linux
3 *
4 * Copyright (C) 2003 MontaVista Software, Inc.
5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
6 *
7 * Copyright (C) 2006 David Brownell (new RTC framework)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/ioport.h>
19#include <linux/delay.h>
20#include <linux/rtc.h>
21#include <linux/bcd.h>
22#include <linux/platform_device.h>
23
24#include <asm/io.h>
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25
26
27/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
28 * with century-range alarm matching, driven by the 32kHz clock.
29 *
30 * The main user-visible ways it differs from PC RTCs are by omitting
31 * "don't care" alarm fields and sub-second periodic IRQs, and having
32 * an autoadjust mechanism to calibrate to the true oscillator rate.
33 *
34 * Board-specific wiring options include using split power mode with
35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
37 * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment.
38 */
39
40#define OMAP_RTC_BASE 0xfffb4800
41
42/* RTC registers */
43#define OMAP_RTC_SECONDS_REG 0x00
44#define OMAP_RTC_MINUTES_REG 0x04
45#define OMAP_RTC_HOURS_REG 0x08
46#define OMAP_RTC_DAYS_REG 0x0C
47#define OMAP_RTC_MONTHS_REG 0x10
48#define OMAP_RTC_YEARS_REG 0x14
49#define OMAP_RTC_WEEKS_REG 0x18
50
51#define OMAP_RTC_ALARM_SECONDS_REG 0x20
52#define OMAP_RTC_ALARM_MINUTES_REG 0x24
53#define OMAP_RTC_ALARM_HOURS_REG 0x28
54#define OMAP_RTC_ALARM_DAYS_REG 0x2c
55#define OMAP_RTC_ALARM_MONTHS_REG 0x30
56#define OMAP_RTC_ALARM_YEARS_REG 0x34
57
58#define OMAP_RTC_CTRL_REG 0x40
59#define OMAP_RTC_STATUS_REG 0x44
60#define OMAP_RTC_INTERRUPTS_REG 0x48
61
62#define OMAP_RTC_COMP_LSB_REG 0x4c
63#define OMAP_RTC_COMP_MSB_REG 0x50
64#define OMAP_RTC_OSC_REG 0x54
65
66/* OMAP_RTC_CTRL_REG bit fields: */
67#define OMAP_RTC_CTRL_SPLIT (1<<7)
68#define OMAP_RTC_CTRL_DISABLE (1<<6)
69#define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
70#define OMAP_RTC_CTRL_TEST (1<<4)
71#define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
72#define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
73#define OMAP_RTC_CTRL_ROUND_30S (1<<1)
74#define OMAP_RTC_CTRL_STOP (1<<0)
75
76/* OMAP_RTC_STATUS_REG bit fields: */
77#define OMAP_RTC_STATUS_POWER_UP (1<<7)
78#define OMAP_RTC_STATUS_ALARM (1<<6)
79#define OMAP_RTC_STATUS_1D_EVENT (1<<5)
80#define OMAP_RTC_STATUS_1H_EVENT (1<<4)
81#define OMAP_RTC_STATUS_1M_EVENT (1<<3)
82#define OMAP_RTC_STATUS_1S_EVENT (1<<2)
83#define OMAP_RTC_STATUS_RUN (1<<1)
84#define OMAP_RTC_STATUS_BUSY (1<<0)
85
86/* OMAP_RTC_INTERRUPTS_REG bit fields: */
87#define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
88#define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
89
90
91#define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr))
92#define rtc_write(val, addr) omap_writeb(val, OMAP_RTC_BASE + (addr))
93
94
95/* platform_bus isn't hotpluggable, so for static linkage it'd be safe
96 * to get rid of probe() and remove() code ... too bad the driver struct
97 * remembers probe(), that's about 25% of the runtime footprint!!
98 */
99#ifndef MODULE
100#undef __devexit
101#undef __devexit_p
102#define __devexit __exit
103#define __devexit_p __exit_p
104#endif
105
106
107/* we rely on the rtc framework to handle locking (rtc->ops_lock),
108 * so the only other requirement is that register accesses which
109 * require BUSY to be clear are made with IRQs locally disabled
110 */
111static void rtc_wait_not_busy(void)
112{
113 int count = 0;
114 u8 status;
115
116 /* BUSY may stay active for 1/32768 second (~30 usec) */
117 for (count = 0; count < 50; count++) {
118 status = rtc_read(OMAP_RTC_STATUS_REG);
119 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
120 break;
121 udelay(1);
122 }
123 /* now we have ~15 usec to read/write various registers */
124}
125
ab6a2d70 126static irqreturn_t rtc_irq(int irq, void *rtc)
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127{
128 unsigned long events = 0;
129 u8 irq_data;
130
131 irq_data = rtc_read(OMAP_RTC_STATUS_REG);
132
133 /* alarm irq? */
134 if (irq_data & OMAP_RTC_STATUS_ALARM) {
135 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
136 events |= RTC_IRQF | RTC_AF;
137 }
138
139 /* 1/sec periodic/update irq? */
140 if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
141 events |= RTC_IRQF | RTC_UF;
142
ab6a2d70 143 rtc_update_irq(rtc, 1, events);
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144
145 return IRQ_HANDLED;
146}
147
148#ifdef CONFIG_RTC_INTF_DEV
149
150static int
151omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
152{
153 u8 reg;
154
155 switch (cmd) {
156 case RTC_AIE_OFF:
157 case RTC_AIE_ON:
158 case RTC_UIE_OFF:
159 case RTC_UIE_ON:
160 break;
161 default:
162 return -ENOIOCTLCMD;
163 }
164
165 local_irq_disable();
166 rtc_wait_not_busy();
167 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
168 switch (cmd) {
169 /* AIE = Alarm Interrupt Enable */
170 case RTC_AIE_OFF:
171 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
172 break;
173 case RTC_AIE_ON:
174 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
175 break;
176 /* UIE = Update Interrupt Enable (1/second) */
177 case RTC_UIE_OFF:
178 reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
179 break;
180 case RTC_UIE_ON:
181 reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
182 break;
183 }
184 rtc_wait_not_busy();
185 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
186 local_irq_enable();
187
188 return 0;
189}
190
191#else
192#define omap_rtc_ioctl NULL
193#endif
194
195/* this hardware doesn't support "don't care" alarm fields */
196static int tm2bcd(struct rtc_time *tm)
197{
198 if (rtc_valid_tm(tm) != 0)
199 return -EINVAL;
200
201 tm->tm_sec = BIN2BCD(tm->tm_sec);
202 tm->tm_min = BIN2BCD(tm->tm_min);
203 tm->tm_hour = BIN2BCD(tm->tm_hour);
204 tm->tm_mday = BIN2BCD(tm->tm_mday);
205
206 tm->tm_mon = BIN2BCD(tm->tm_mon + 1);
207
208 /* epoch == 1900 */
209 if (tm->tm_year < 100 || tm->tm_year > 199)
210 return -EINVAL;
211 tm->tm_year = BIN2BCD(tm->tm_year - 100);
212
213 return 0;
214}
215
216static void bcd2tm(struct rtc_time *tm)
217{
218 tm->tm_sec = BCD2BIN(tm->tm_sec);
219 tm->tm_min = BCD2BIN(tm->tm_min);
220 tm->tm_hour = BCD2BIN(tm->tm_hour);
221 tm->tm_mday = BCD2BIN(tm->tm_mday);
222 tm->tm_mon = BCD2BIN(tm->tm_mon) - 1;
223 /* epoch == 1900 */
224 tm->tm_year = BCD2BIN(tm->tm_year) + 100;
225}
226
227
228static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
229{
230 /* we don't report wday/yday/isdst ... */
231 local_irq_disable();
232 rtc_wait_not_busy();
233
234 tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
235 tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
236 tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
237 tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
238 tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
239 tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
240
241 local_irq_enable();
242
243 bcd2tm(tm);
244 return 0;
245}
246
247static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
248{
249 if (tm2bcd(tm) < 0)
250 return -EINVAL;
251 local_irq_disable();
252 rtc_wait_not_busy();
253
254 rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
255 rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
256 rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
257 rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
258 rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
259 rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
260
261 local_irq_enable();
262
263 return 0;
264}
265
266static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
267{
268 local_irq_disable();
269 rtc_wait_not_busy();
270
271 alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
272 alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
273 alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
274 alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
275 alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
276 alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
277
278 local_irq_enable();
279
280 bcd2tm(&alm->time);
a2db8dfc 281 alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
db68b189 282 & OMAP_RTC_INTERRUPTS_IT_ALARM);
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283
284 return 0;
285}
286
287static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
288{
289 u8 reg;
290
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291 if (tm2bcd(&alm->time) < 0)
292 return -EINVAL;
293
294 local_irq_disable();
295 rtc_wait_not_busy();
296
297 rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
298 rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
299 rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
300 rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
301 rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
302 rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
303
304 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
305 if (alm->enabled)
306 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
307 else
308 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
309 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
310
311 local_irq_enable();
312
313 return 0;
314}
315
316static struct rtc_class_ops omap_rtc_ops = {
317 .ioctl = omap_rtc_ioctl,
318 .read_time = omap_rtc_read_time,
319 .set_time = omap_rtc_set_time,
320 .read_alarm = omap_rtc_read_alarm,
321 .set_alarm = omap_rtc_set_alarm,
322};
323
324static int omap_rtc_alarm;
325static int omap_rtc_timer;
326
327static int __devinit omap_rtc_probe(struct platform_device *pdev)
328{
329 struct resource *res, *mem;
330 struct rtc_device *rtc;
331 u8 reg, new_ctrl;
332
333 omap_rtc_timer = platform_get_irq(pdev, 0);
334 if (omap_rtc_timer <= 0) {
335 pr_debug("%s: no update irq?\n", pdev->name);
336 return -ENOENT;
337 }
338
339 omap_rtc_alarm = platform_get_irq(pdev, 1);
340 if (omap_rtc_alarm <= 0) {
341 pr_debug("%s: no alarm irq?\n", pdev->name);
342 return -ENOENT;
343 }
344
345 /* NOTE: using static mapping for RTC registers */
346 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
347 if (res && res->start != OMAP_RTC_BASE) {
348 pr_debug("%s: RTC registers at %08x, expected %08x\n",
349 pdev->name, (unsigned) res->start, OMAP_RTC_BASE);
350 return -ENOENT;
351 }
352
353 if (res)
354 mem = request_mem_region(res->start,
355 res->end - res->start + 1,
356 pdev->name);
357 else
358 mem = NULL;
359 if (!mem) {
360 pr_debug("%s: RTC registers at %08x are not free\n",
361 pdev->name, OMAP_RTC_BASE);
362 return -EBUSY;
363 }
364
365 rtc = rtc_device_register(pdev->name, &pdev->dev,
366 &omap_rtc_ops, THIS_MODULE);
367 if (IS_ERR(rtc)) {
368 pr_debug("%s: can't register RTC device, err %ld\n",
369 pdev->name, PTR_ERR(rtc));
370 goto fail;
371 }
372 platform_set_drvdata(pdev, rtc);
558a40f7 373 dev_set_drvdata(&rtc->dev, mem);
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374
375 /* clear pending irqs, and set 1/second periodic,
376 * which we'll use instead of update irqs
377 */
378 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
379
380 /* clear old status */
381 reg = rtc_read(OMAP_RTC_STATUS_REG);
382 if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
383 pr_info("%s: RTC power up reset detected\n",
384 pdev->name);
385 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
386 }
387 if (reg & (u8) OMAP_RTC_STATUS_ALARM)
388 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
389
390 /* handle periodic and alarm irqs */
38515e90 391 if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
cd966209 392 rtc->dev.bus_id, rtc)) {
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393 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
394 pdev->name, omap_rtc_timer);
395 goto fail0;
396 }
38515e90 397 if (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
cd966209 398 rtc->dev.bus_id, rtc)) {
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399 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
400 pdev->name, omap_rtc_alarm);
401 goto fail1;
402 }
403
404 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
405 reg = rtc_read(OMAP_RTC_CTRL_REG);
406 if (reg & (u8) OMAP_RTC_CTRL_STOP)
407 pr_info("%s: already running\n", pdev->name);
408
409 /* force to 24 hour mode */
410 new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
411 new_ctrl |= OMAP_RTC_CTRL_STOP;
412
413 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
414 *
415 * - Boards wired so that RTC_WAKE_INT does something, and muxed
416 * right (W13_1610_RTC_WAKE_INT is the default after chip reset),
417 * should initialize the device wakeup flag appropriately.
418 *
419 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
420 * rather than nPWRON_RESET, should forcibly enable split
421 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
422 * is write-only, and always reads as zero...)
423 */
424 device_init_wakeup(&pdev->dev, 0);
425
426 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
427 pr_info("%s: split power mode\n", pdev->name);
428
429 if (reg != new_ctrl)
430 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
431
432 return 0;
433
434fail1:
435 free_irq(omap_rtc_timer, NULL);
436fail0:
437 rtc_device_unregister(rtc);
438fail:
439 release_resource(mem);
440 return -EIO;
441}
442
443static int __devexit omap_rtc_remove(struct platform_device *pdev)
444{
445 struct rtc_device *rtc = platform_get_drvdata(pdev);;
446
447 device_init_wakeup(&pdev->dev, 0);
448
449 /* leave rtc running, but disable irqs */
450 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
451
452 free_irq(omap_rtc_timer, rtc);
453 free_irq(omap_rtc_alarm, rtc);
454
558a40f7 455 release_resource(dev_get_drvdata(&rtc->dev));
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456 rtc_device_unregister(rtc);
457 return 0;
458}
459
460#ifdef CONFIG_PM
461
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462static u8 irqstat;
463
464static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
465{
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466 irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
467
468 /* FIXME the RTC alarm is not currently acting as a wakeup event
469 * source, and in fact this enable() call is just saving a flag
470 * that's never used...
471 */
472 if (device_may_wakeup(&pdev->dev))
473 enable_irq_wake(omap_rtc_alarm);
474 else
475 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
476
477 return 0;
478}
479
480static int omap_rtc_resume(struct platform_device *pdev)
481{
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DB
482 if (device_may_wakeup(&pdev->dev))
483 disable_irq_wake(omap_rtc_alarm);
484 else
485 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
486 return 0;
487}
488
489#else
490#define omap_rtc_suspend NULL
491#define omap_rtc_resume NULL
492#endif
493
494static void omap_rtc_shutdown(struct platform_device *pdev)
495{
496 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
497}
498
ad28a07b 499MODULE_ALIAS("platform:omap_rtc");
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500static struct platform_driver omap_rtc_driver = {
501 .probe = omap_rtc_probe,
502 .remove = __devexit_p(omap_rtc_remove),
503 .suspend = omap_rtc_suspend,
504 .resume = omap_rtc_resume,
505 .shutdown = omap_rtc_shutdown,
506 .driver = {
507 .name = "omap_rtc",
508 .owner = THIS_MODULE,
509 },
510};
511
512static int __init rtc_init(void)
513{
514 return platform_driver_register(&omap_rtc_driver);
515}
516module_init(rtc_init);
517
518static void __exit rtc_exit(void)
519{
520 platform_driver_unregister(&omap_rtc_driver);
521}
522module_exit(rtc_exit);
523
524MODULE_AUTHOR("George G. Davis (and others)");
525MODULE_LICENSE("GPL");
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