rtc: omap: silence bogus power-up reset message at probe
[deliverable/linux.git] / drivers / rtc / rtc-omap.c
CommitLineData
db68b189
DB
1/*
2 * TI OMAP1 Real Time Clock interface for Linux
3 *
4 * Copyright (C) 2003 MontaVista Software, Inc.
5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
6 *
7 * Copyright (C) 2006 David Brownell (new RTC framework)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/ioport.h>
19#include <linux/delay.h>
20#include <linux/rtc.h>
21#include <linux/bcd.h>
22#include <linux/platform_device.h>
9e0344dc
AM
23#include <linux/of.h>
24#include <linux/of_device.h>
fc9bd902 25#include <linux/pm_runtime.h>
4b30c9fc 26#include <linux/io.h>
db68b189
DB
27
28/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
29 * with century-range alarm matching, driven by the 32kHz clock.
30 *
31 * The main user-visible ways it differs from PC RTCs are by omitting
32 * "don't care" alarm fields and sub-second periodic IRQs, and having
33 * an autoadjust mechanism to calibrate to the true oscillator rate.
34 *
35 * Board-specific wiring options include using split power mode with
36 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
37 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
fa5b0782
SN
38 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
39 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
db68b189
DB
40 */
41
db68b189
DB
42/* RTC registers */
43#define OMAP_RTC_SECONDS_REG 0x00
44#define OMAP_RTC_MINUTES_REG 0x04
45#define OMAP_RTC_HOURS_REG 0x08
46#define OMAP_RTC_DAYS_REG 0x0C
47#define OMAP_RTC_MONTHS_REG 0x10
48#define OMAP_RTC_YEARS_REG 0x14
49#define OMAP_RTC_WEEKS_REG 0x18
50
51#define OMAP_RTC_ALARM_SECONDS_REG 0x20
52#define OMAP_RTC_ALARM_MINUTES_REG 0x24
53#define OMAP_RTC_ALARM_HOURS_REG 0x28
54#define OMAP_RTC_ALARM_DAYS_REG 0x2c
55#define OMAP_RTC_ALARM_MONTHS_REG 0x30
56#define OMAP_RTC_ALARM_YEARS_REG 0x34
57
58#define OMAP_RTC_CTRL_REG 0x40
59#define OMAP_RTC_STATUS_REG 0x44
60#define OMAP_RTC_INTERRUPTS_REG 0x48
61
62#define OMAP_RTC_COMP_LSB_REG 0x4c
63#define OMAP_RTC_COMP_MSB_REG 0x50
64#define OMAP_RTC_OSC_REG 0x54
65
cab1458c
AM
66#define OMAP_RTC_KICK0_REG 0x6c
67#define OMAP_RTC_KICK1_REG 0x70
68
8af750e3
HG
69#define OMAP_RTC_IRQWAKEEN 0x7c
70
db68b189 71/* OMAP_RTC_CTRL_REG bit fields: */
92adb96a
SN
72#define OMAP_RTC_CTRL_SPLIT BIT(7)
73#define OMAP_RTC_CTRL_DISABLE BIT(6)
74#define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5)
75#define OMAP_RTC_CTRL_TEST BIT(4)
76#define OMAP_RTC_CTRL_MODE_12_24 BIT(3)
77#define OMAP_RTC_CTRL_AUTO_COMP BIT(2)
78#define OMAP_RTC_CTRL_ROUND_30S BIT(1)
79#define OMAP_RTC_CTRL_STOP BIT(0)
db68b189
DB
80
81/* OMAP_RTC_STATUS_REG bit fields: */
92adb96a
SN
82#define OMAP_RTC_STATUS_POWER_UP BIT(7)
83#define OMAP_RTC_STATUS_ALARM BIT(6)
84#define OMAP_RTC_STATUS_1D_EVENT BIT(5)
85#define OMAP_RTC_STATUS_1H_EVENT BIT(4)
86#define OMAP_RTC_STATUS_1M_EVENT BIT(3)
87#define OMAP_RTC_STATUS_1S_EVENT BIT(2)
88#define OMAP_RTC_STATUS_RUN BIT(1)
89#define OMAP_RTC_STATUS_BUSY BIT(0)
db68b189
DB
90
91/* OMAP_RTC_INTERRUPTS_REG bit fields: */
92adb96a
SN
92#define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
93#define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
db68b189 94
cd914bba
SN
95/* OMAP_RTC_OSC_REG bit fields: */
96#define OMAP_RTC_OSC_32KCLK_EN BIT(6)
97
8af750e3 98/* OMAP_RTC_IRQWAKEEN bit fields: */
92adb96a 99#define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
8af750e3 100
cab1458c
AM
101/* OMAP_RTC_KICKER values */
102#define KICK0_VALUE 0x83e70b13
103#define KICK1_VALUE 0x95a4f1e0
104
2153f949
JH
105struct omap_rtc_device_type {
106 bool has_32kclk_en;
107 bool has_kicker;
108 bool has_irqwakeen;
9291e340 109 bool has_power_up_reset;
2153f949 110};
cd914bba 111
55ba953a
JH
112struct omap_rtc {
113 struct rtc_device *rtc;
114 void __iomem *base;
115 int irq_alarm;
116 int irq_timer;
117 u8 interrupts_reg;
2153f949 118 const struct omap_rtc_device_type *type;
55ba953a 119};
db68b189 120
55ba953a
JH
121static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
122{
123 return readb(rtc->base + reg);
124}
cab1458c 125
55ba953a
JH
126static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
127{
128 writeb(val, rtc->base + reg);
129}
db68b189 130
55ba953a
JH
131static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
132{
133 writel(val, rtc->base + reg);
134}
db68b189 135
db68b189
DB
136/* we rely on the rtc framework to handle locking (rtc->ops_lock),
137 * so the only other requirement is that register accesses which
138 * require BUSY to be clear are made with IRQs locally disabled
139 */
55ba953a 140static void rtc_wait_not_busy(struct omap_rtc *rtc)
db68b189
DB
141{
142 int count = 0;
143 u8 status;
144
145 /* BUSY may stay active for 1/32768 second (~30 usec) */
146 for (count = 0; count < 50; count++) {
55ba953a 147 status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
db68b189
DB
148 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
149 break;
150 udelay(1);
151 }
152 /* now we have ~15 usec to read/write various registers */
153}
154
55ba953a 155static irqreturn_t rtc_irq(int irq, void *dev_id)
db68b189 156{
55ba953a 157 struct omap_rtc *rtc = dev_id;
db68b189
DB
158 unsigned long events = 0;
159 u8 irq_data;
160
55ba953a 161 irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
db68b189
DB
162
163 /* alarm irq? */
164 if (irq_data & OMAP_RTC_STATUS_ALARM) {
55ba953a 165 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
db68b189
DB
166 events |= RTC_IRQF | RTC_AF;
167 }
168
169 /* 1/sec periodic/update irq? */
170 if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
171 events |= RTC_IRQF | RTC_UF;
172
55ba953a 173 rtc_update_irq(rtc->rtc, 1, events);
db68b189
DB
174
175 return IRQ_HANDLED;
176}
177
16380c15
JS
178static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
179{
55ba953a 180 struct omap_rtc *rtc = dev_get_drvdata(dev);
ab7f580b 181 u8 reg, irqwake_reg = 0;
16380c15
JS
182
183 local_irq_disable();
55ba953a
JH
184 rtc_wait_not_busy(rtc);
185 reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
2153f949 186 if (rtc->type->has_irqwakeen)
55ba953a 187 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
ab7f580b
LV
188
189 if (enabled) {
16380c15 190 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
191 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
192 } else {
16380c15 193 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
194 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
195 }
55ba953a
JH
196 rtc_wait_not_busy(rtc);
197 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
2153f949 198 if (rtc->type->has_irqwakeen)
55ba953a 199 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
16380c15
JS
200 local_irq_enable();
201
202 return 0;
203}
204
db68b189
DB
205/* this hardware doesn't support "don't care" alarm fields */
206static int tm2bcd(struct rtc_time *tm)
207{
208 if (rtc_valid_tm(tm) != 0)
209 return -EINVAL;
210
fe20ba70
AB
211 tm->tm_sec = bin2bcd(tm->tm_sec);
212 tm->tm_min = bin2bcd(tm->tm_min);
213 tm->tm_hour = bin2bcd(tm->tm_hour);
214 tm->tm_mday = bin2bcd(tm->tm_mday);
db68b189 215
fe20ba70 216 tm->tm_mon = bin2bcd(tm->tm_mon + 1);
db68b189
DB
217
218 /* epoch == 1900 */
219 if (tm->tm_year < 100 || tm->tm_year > 199)
220 return -EINVAL;
fe20ba70 221 tm->tm_year = bin2bcd(tm->tm_year - 100);
db68b189
DB
222
223 return 0;
224}
225
226static void bcd2tm(struct rtc_time *tm)
227{
fe20ba70
AB
228 tm->tm_sec = bcd2bin(tm->tm_sec);
229 tm->tm_min = bcd2bin(tm->tm_min);
230 tm->tm_hour = bcd2bin(tm->tm_hour);
231 tm->tm_mday = bcd2bin(tm->tm_mday);
232 tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
db68b189 233 /* epoch == 1900 */
fe20ba70 234 tm->tm_year = bcd2bin(tm->tm_year) + 100;
db68b189
DB
235}
236
237
238static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
239{
55ba953a
JH
240 struct omap_rtc *rtc = dev_get_drvdata(dev);
241
db68b189
DB
242 /* we don't report wday/yday/isdst ... */
243 local_irq_disable();
55ba953a 244 rtc_wait_not_busy(rtc);
db68b189 245
55ba953a
JH
246 tm->tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
247 tm->tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
248 tm->tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
249 tm->tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
250 tm->tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
251 tm->tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
db68b189
DB
252
253 local_irq_enable();
254
255 bcd2tm(tm);
256 return 0;
257}
258
259static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
260{
55ba953a
JH
261 struct omap_rtc *rtc = dev_get_drvdata(dev);
262
db68b189
DB
263 if (tm2bcd(tm) < 0)
264 return -EINVAL;
265 local_irq_disable();
55ba953a 266 rtc_wait_not_busy(rtc);
db68b189 267
55ba953a
JH
268 rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
269 rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
270 rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
271 rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
272 rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
273 rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
db68b189
DB
274
275 local_irq_enable();
276
277 return 0;
278}
279
280static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
281{
55ba953a
JH
282 struct omap_rtc *rtc = dev_get_drvdata(dev);
283
db68b189 284 local_irq_disable();
55ba953a 285 rtc_wait_not_busy(rtc);
db68b189 286
55ba953a
JH
287 alm->time.tm_sec = rtc_read(rtc, OMAP_RTC_ALARM_SECONDS_REG);
288 alm->time.tm_min = rtc_read(rtc, OMAP_RTC_ALARM_MINUTES_REG);
289 alm->time.tm_hour = rtc_read(rtc, OMAP_RTC_ALARM_HOURS_REG);
290 alm->time.tm_mday = rtc_read(rtc, OMAP_RTC_ALARM_DAYS_REG);
291 alm->time.tm_mon = rtc_read(rtc, OMAP_RTC_ALARM_MONTHS_REG);
292 alm->time.tm_year = rtc_read(rtc, OMAP_RTC_ALARM_YEARS_REG);
db68b189
DB
293
294 local_irq_enable();
295
296 bcd2tm(&alm->time);
55ba953a 297 alm->enabled = !!(rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG)
db68b189 298 & OMAP_RTC_INTERRUPTS_IT_ALARM);
db68b189
DB
299
300 return 0;
301}
302
303static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
304{
55ba953a 305 struct omap_rtc *rtc = dev_get_drvdata(dev);
ab7f580b 306 u8 reg, irqwake_reg = 0;
db68b189 307
db68b189
DB
308 if (tm2bcd(&alm->time) < 0)
309 return -EINVAL;
310
311 local_irq_disable();
55ba953a 312 rtc_wait_not_busy(rtc);
db68b189 313
55ba953a
JH
314 rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
315 rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
316 rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
317 rtc_write(rtc, OMAP_RTC_ALARM_HOURS_REG, alm->time.tm_hour);
318 rtc_write(rtc, OMAP_RTC_ALARM_MINUTES_REG, alm->time.tm_min);
319 rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm->time.tm_sec);
db68b189 320
55ba953a 321 reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
2153f949 322 if (rtc->type->has_irqwakeen)
55ba953a 323 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
ab7f580b
LV
324
325 if (alm->enabled) {
db68b189 326 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
327 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
328 } else {
db68b189 329 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
330 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
331 }
55ba953a 332 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
2153f949 333 if (rtc->type->has_irqwakeen)
55ba953a 334 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
db68b189
DB
335
336 local_irq_enable();
337
338 return 0;
339}
340
341static struct rtc_class_ops omap_rtc_ops = {
db68b189
DB
342 .read_time = omap_rtc_read_time,
343 .set_time = omap_rtc_set_time,
344 .read_alarm = omap_rtc_read_alarm,
345 .set_alarm = omap_rtc_set_alarm,
16380c15 346 .alarm_irq_enable = omap_rtc_alarm_irq_enable,
db68b189
DB
347};
348
2153f949 349static const struct omap_rtc_device_type omap_rtc_default_type = {
9291e340 350 .has_power_up_reset = true,
2153f949
JH
351};
352
353static const struct omap_rtc_device_type omap_rtc_am3352_type = {
354 .has_32kclk_en = true,
355 .has_kicker = true,
356 .has_irqwakeen = true,
357};
358
359static const struct omap_rtc_device_type omap_rtc_da830_type = {
360 .has_kicker = true,
361};
9e0344dc 362
2153f949 363static const struct platform_device_id omap_rtc_id_table[] = {
cab1458c 364 {
a430ca22 365 .name = "omap_rtc",
2153f949
JH
366 .driver_data = (kernel_ulong_t)&omap_rtc_default_type,
367 }, {
8af750e3 368 .name = "am3352-rtc",
2153f949
JH
369 .driver_data = (kernel_ulong_t)&omap_rtc_am3352_type,
370 }, {
cab1458c 371 .name = "da830-rtc",
2153f949
JH
372 .driver_data = (kernel_ulong_t)&omap_rtc_da830_type,
373 }, {
374 /* sentinel */
375 }
cab1458c 376};
2153f949 377MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
cab1458c 378
9e0344dc 379static const struct of_device_id omap_rtc_of_match[] = {
2153f949
JH
380 {
381 .compatible = "ti,am3352-rtc",
382 .data = &omap_rtc_am3352_type,
383 }, {
384 .compatible = "ti,da830-rtc",
385 .data = &omap_rtc_da830_type,
386 }, {
387 /* sentinel */
388 }
9e0344dc
AM
389};
390MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
391
71fc8224 392static int __init omap_rtc_probe(struct platform_device *pdev)
db68b189 393{
55ba953a 394 struct omap_rtc *rtc;
3765e8f1 395 struct resource *res;
9291e340 396 u8 reg, mask, new_ctrl;
cab1458c 397 const struct platform_device_id *id_entry;
9e0344dc 398 const struct of_device_id *of_id;
437b37a6 399 int ret;
9e0344dc 400
55ba953a
JH
401 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
402 if (!rtc)
403 return -ENOMEM;
404
9e0344dc 405 of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
2153f949
JH
406 if (of_id) {
407 rtc->type = of_id->data;
408 } else {
409 id_entry = platform_get_device_id(pdev);
410 rtc->type = (void *)id_entry->driver_data;
337b600f
SN
411 }
412
55ba953a
JH
413 rtc->irq_timer = platform_get_irq(pdev, 0);
414 if (rtc->irq_timer <= 0)
db68b189 415 return -ENOENT;
db68b189 416
55ba953a
JH
417 rtc->irq_alarm = platform_get_irq(pdev, 1);
418 if (rtc->irq_alarm <= 0)
db68b189 419 return -ENOENT;
db68b189 420
db68b189 421 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
55ba953a
JH
422 rtc->base = devm_ioremap_resource(&pdev->dev, res);
423 if (IS_ERR(rtc->base))
424 return PTR_ERR(rtc->base);
425
426 platform_set_drvdata(pdev, rtc);
8cfde8c1 427
fc9bd902
VH
428 /* Enable the clock/module so that we can access the registers */
429 pm_runtime_enable(&pdev->dev);
430 pm_runtime_get_sync(&pdev->dev);
431
2153f949 432 if (rtc->type->has_kicker) {
55ba953a
JH
433 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
434 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
cab1458c
AM
435 }
436
1ed8b5d2
JH
437 /*
438 * disable interrupts
439 *
440 * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
db68b189 441 */
55ba953a 442 rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189 443
cd914bba 444 /* enable RTC functional clock */
2153f949 445 if (rtc->type->has_32kclk_en) {
55ba953a
JH
446 reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
447 rtc_writel(rtc, OMAP_RTC_OSC_REG,
448 reg | OMAP_RTC_OSC_32KCLK_EN);
44c63a57 449 }
cd914bba 450
db68b189 451 /* clear old status */
55ba953a 452 reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
9291e340
JH
453
454 mask = OMAP_RTC_STATUS_ALARM;
455
456 if (rtc->type->has_power_up_reset) {
457 mask |= OMAP_RTC_STATUS_POWER_UP;
458 if (reg & OMAP_RTC_STATUS_POWER_UP)
459 dev_info(&pdev->dev, "RTC power up reset detected\n");
db68b189 460 }
9291e340
JH
461
462 if (reg & mask)
463 rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);
db68b189 464
db68b189 465 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
55ba953a 466 reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
db68b189 467 if (reg & (u8) OMAP_RTC_CTRL_STOP)
397b630a 468 dev_info(&pdev->dev, "already running\n");
db68b189
DB
469
470 /* force to 24 hour mode */
12b3e038 471 new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
db68b189
DB
472 new_ctrl |= OMAP_RTC_CTRL_STOP;
473
474 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
475 *
fa5b0782
SN
476 * - Device wake-up capability setting should come through chip
477 * init logic. OMAP1 boards should initialize the "wakeup capable"
478 * flag in the platform device if the board is wired right for
479 * being woken up by RTC alarm. For OMAP-L138, this capability
480 * is built into the SoC by the "Deep Sleep" capability.
db68b189
DB
481 *
482 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
483 * rather than nPWRON_RESET, should forcibly enable split
484 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
485 * is write-only, and always reads as zero...)
486 */
db68b189
DB
487
488 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
397b630a 489 dev_info(&pdev->dev, "split power mode\n");
db68b189
DB
490
491 if (reg != new_ctrl)
55ba953a 492 rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
db68b189 493
4390ce00
JH
494 device_init_wakeup(&pdev->dev, true);
495
55ba953a 496 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
4390ce00 497 &omap_rtc_ops, THIS_MODULE);
55ba953a
JH
498 if (IS_ERR(rtc->rtc)) {
499 ret = PTR_ERR(rtc->rtc);
4390ce00
JH
500 goto err;
501 }
4390ce00
JH
502
503 /* handle periodic and alarm irqs */
55ba953a
JH
504 ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
505 dev_name(&rtc->rtc->dev), rtc);
4390ce00
JH
506 if (ret)
507 goto err;
508
55ba953a
JH
509 if (rtc->irq_timer != rtc->irq_alarm) {
510 ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
511 dev_name(&rtc->rtc->dev), rtc);
4390ce00
JH
512 if (ret)
513 goto err;
514 }
515
db68b189
DB
516 return 0;
517
437b37a6 518err:
7ecd9a3f 519 device_init_wakeup(&pdev->dev, false);
2153f949 520 if (rtc->type->has_kicker)
55ba953a 521 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
fc9bd902
VH
522 pm_runtime_put_sync(&pdev->dev);
523 pm_runtime_disable(&pdev->dev);
437b37a6
JH
524
525 return ret;
db68b189
DB
526}
527
71fc8224 528static int __exit omap_rtc_remove(struct platform_device *pdev)
db68b189 529{
55ba953a 530 struct omap_rtc *rtc = platform_get_drvdata(pdev);
db68b189
DB
531
532 device_init_wakeup(&pdev->dev, 0);
533
534 /* leave rtc running, but disable irqs */
55ba953a 535 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189 536
2153f949 537 if (rtc->type->has_kicker)
55ba953a 538 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
fc9bd902
VH
539
540 /* Disable the clock/module */
541 pm_runtime_put_sync(&pdev->dev);
542 pm_runtime_disable(&pdev->dev);
543
db68b189
DB
544 return 0;
545}
546
04ebc359 547#ifdef CONFIG_PM_SLEEP
04ebc359 548static int omap_rtc_suspend(struct device *dev)
db68b189 549{
55ba953a
JH
550 struct omap_rtc *rtc = dev_get_drvdata(dev);
551
552 rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
db68b189
DB
553
554 /* FIXME the RTC alarm is not currently acting as a wakeup event
8af750e3
HG
555 * source on some platforms, and in fact this enable() call is just
556 * saving a flag that's never used...
db68b189 557 */
ab7f580b 558 if (device_may_wakeup(dev))
55ba953a 559 enable_irq_wake(rtc->irq_alarm);
ab7f580b 560 else
55ba953a 561 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189 562
fc9bd902 563 /* Disable the clock/module */
04ebc359 564 pm_runtime_put_sync(dev);
fc9bd902 565
db68b189
DB
566 return 0;
567}
568
04ebc359 569static int omap_rtc_resume(struct device *dev)
db68b189 570{
55ba953a
JH
571 struct omap_rtc *rtc = dev_get_drvdata(dev);
572
fc9bd902 573 /* Enable the clock/module so that we can access the registers */
04ebc359 574 pm_runtime_get_sync(dev);
fc9bd902 575
ab7f580b 576 if (device_may_wakeup(dev))
55ba953a 577 disable_irq_wake(rtc->irq_alarm);
ab7f580b 578 else
55ba953a 579 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
ab7f580b 580
db68b189
DB
581 return 0;
582}
db68b189
DB
583#endif
584
04ebc359
JH
585static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
586
db68b189
DB
587static void omap_rtc_shutdown(struct platform_device *pdev)
588{
55ba953a
JH
589 struct omap_rtc *rtc = platform_get_drvdata(pdev);
590
591 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189
DB
592}
593
db68b189 594static struct platform_driver omap_rtc_driver = {
71fc8224 595 .remove = __exit_p(omap_rtc_remove),
db68b189
DB
596 .shutdown = omap_rtc_shutdown,
597 .driver = {
a430ca22 598 .name = "omap_rtc",
db68b189 599 .owner = THIS_MODULE,
04ebc359 600 .pm = &omap_rtc_pm_ops,
616b7341 601 .of_match_table = omap_rtc_of_match,
db68b189 602 },
2153f949 603 .id_table = omap_rtc_id_table,
db68b189
DB
604};
605
09c5a36b 606module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
db68b189 607
a430ca22 608MODULE_ALIAS("platform:omap_rtc");
db68b189
DB
609MODULE_AUTHOR("George G. Davis (and others)");
610MODULE_LICENSE("GPL");
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