[deliverable/linux.git] / drivers / rtc / rtc-omap.c

/*
 * TI OMAP1 Real Time Clock interface for Linux
 *
 * Copyright (C) 2003 MontaVista Software, Inc.
 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
 *
 * Copyright (C) 2006 David Brownell (new RTC framework)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pm_runtime.h>

#include <asm/io.h>


/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
 * with century-range alarm matching, driven by the 32kHz clock.
 *
 * The main user-visible ways it differs from PC RTCs are by omitting
 * "don't care" alarm fields and sub-second periodic IRQs, and having
 * an autoadjust mechanism to calibrate to the true oscillator rate.
 *
 * Board-specific wiring options include using split power mode with
 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
 */

#define	DRIVER_NAME			"omap_rtc"

#define OMAP_RTC_BASE			0xfffb4800

/* RTC registers */
#define OMAP_RTC_SECONDS_REG		0x00
#define OMAP_RTC_MINUTES_REG		0x04
#define OMAP_RTC_HOURS_REG		0x08
#define OMAP_RTC_DAYS_REG		0x0C
#define OMAP_RTC_MONTHS_REG		0x10
#define OMAP_RTC_YEARS_REG		0x14
#define OMAP_RTC_WEEKS_REG		0x18

#define OMAP_RTC_ALARM_SECONDS_REG	0x20
#define OMAP_RTC_ALARM_MINUTES_REG	0x24
#define OMAP_RTC_ALARM_HOURS_REG	0x28
#define OMAP_RTC_ALARM_DAYS_REG		0x2c
#define OMAP_RTC_ALARM_MONTHS_REG	0x30
#define OMAP_RTC_ALARM_YEARS_REG	0x34

#define OMAP_RTC_CTRL_REG		0x40
#define OMAP_RTC_STATUS_REG		0x44
#define OMAP_RTC_INTERRUPTS_REG		0x48

#define OMAP_RTC_COMP_LSB_REG		0x4c
#define OMAP_RTC_COMP_MSB_REG		0x50
#define OMAP_RTC_OSC_REG		0x54

#define OMAP_RTC_KICK0_REG		0x6c
#define OMAP_RTC_KICK1_REG		0x70

/* OMAP_RTC_CTRL_REG bit fields: */
#define OMAP_RTC_CTRL_SPLIT		(1<<7)
#define OMAP_RTC_CTRL_DISABLE		(1<<6)
#define OMAP_RTC_CTRL_SET_32_COUNTER	(1<<5)
#define OMAP_RTC_CTRL_TEST		(1<<4)
#define OMAP_RTC_CTRL_MODE_12_24	(1<<3)
#define OMAP_RTC_CTRL_AUTO_COMP		(1<<2)
#define OMAP_RTC_CTRL_ROUND_30S		(1<<1)
#define OMAP_RTC_CTRL_STOP		(1<<0)

/* OMAP_RTC_STATUS_REG bit fields: */
#define OMAP_RTC_STATUS_POWER_UP        (1<<7)
#define OMAP_RTC_STATUS_ALARM           (1<<6)
#define OMAP_RTC_STATUS_1D_EVENT        (1<<5)
#define OMAP_RTC_STATUS_1H_EVENT        (1<<4)
#define OMAP_RTC_STATUS_1M_EVENT        (1<<3)
#define OMAP_RTC_STATUS_1S_EVENT        (1<<2)
#define OMAP_RTC_STATUS_RUN             (1<<1)
#define OMAP_RTC_STATUS_BUSY            (1<<0)

/* OMAP_RTC_INTERRUPTS_REG bit fields: */
#define OMAP_RTC_INTERRUPTS_IT_ALARM    (1<<3)
#define OMAP_RTC_INTERRUPTS_IT_TIMER    (1<<2)

/* OMAP_RTC_KICKER values */
#define	KICK0_VALUE			0x83e70b13
#define	KICK1_VALUE			0x95a4f1e0

#define	OMAP_RTC_HAS_KICKER		0x1

static void __iomem	*rtc_base;

#define rtc_read(addr)		readb(rtc_base + (addr))
#define rtc_write(val, addr)	writeb(val, rtc_base + (addr))

#define rtc_writel(val, addr)	writel(val, rtc_base + (addr))


/* we rely on the rtc framework to handle locking (rtc->ops_lock),
 * so the only other requirement is that register accesses which
 * require BUSY to be clear are made with IRQs locally disabled
 */
static void rtc_wait_not_busy(void)
{
	int	count = 0;
	u8	status;

	/* BUSY may stay active for 1/32768 second (~30 usec) */
	for (count = 0; count < 50; count++) {
		status = rtc_read(OMAP_RTC_STATUS_REG);
		if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
			break;
		udelay(1);
	}
	/* now we have ~15 usec to read/write various registers */
}

static irqreturn_t rtc_irq(int irq, void *rtc)
{
	unsigned long		events = 0;
	u8			irq_data;

	irq_data = rtc_read(OMAP_RTC_STATUS_REG);

	/* alarm irq? */
	if (irq_data & OMAP_RTC_STATUS_ALARM) {
		rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
		events |= RTC_IRQF | RTC_AF;
	}

	/* 1/sec periodic/update irq? */
	if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
		events |= RTC_IRQF | RTC_UF;

	rtc_update_irq(rtc, 1, events);

	return IRQ_HANDLED;
}

static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	u8 reg;

	local_irq_disable();
	rtc_wait_not_busy();
	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	if (enabled)
		reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
	else
		reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
	rtc_wait_not_busy();
	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
	local_irq_enable();

	return 0;
}

/* this hardware doesn't support "don't care" alarm fields */
static int tm2bcd(struct rtc_time *tm)
{
	if (rtc_valid_tm(tm) != 0)
		return -EINVAL;

	tm->tm_sec = bin2bcd(tm->tm_sec);
	tm->tm_min = bin2bcd(tm->tm_min);
	tm->tm_hour = bin2bcd(tm->tm_hour);
	tm->tm_mday = bin2bcd(tm->tm_mday);

	tm->tm_mon = bin2bcd(tm->tm_mon + 1);

	/* epoch == 1900 */
	if (tm->tm_year < 100 || tm->tm_year > 199)
		return -EINVAL;
	tm->tm_year = bin2bcd(tm->tm_year - 100);

	return 0;
}

static void bcd2tm(struct rtc_time *tm)
{
	tm->tm_sec = bcd2bin(tm->tm_sec);
	tm->tm_min = bcd2bin(tm->tm_min);
	tm->tm_hour = bcd2bin(tm->tm_hour);
	tm->tm_mday = bcd2bin(tm->tm_mday);
	tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
	/* epoch == 1900 */
	tm->tm_year = bcd2bin(tm->tm_year) + 100;
}


static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	/* we don't report wday/yday/isdst ... */
	local_irq_disable();
	rtc_wait_not_busy();

	tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
	tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
	tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
	tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
	tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
	tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);

	local_irq_enable();

	bcd2tm(tm);
	return 0;
}

static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	if (tm2bcd(tm) < 0)
		return -EINVAL;
	local_irq_disable();
	rtc_wait_not_busy();

	rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
	rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
	rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
	rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
	rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
	rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);

	local_irq_enable();

	return 0;
}

static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	local_irq_disable();
	rtc_wait_not_busy();

	alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
	alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
	alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
	alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
	alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
	alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);

	local_irq_enable();

	bcd2tm(&alm->time);
	alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
			& OMAP_RTC_INTERRUPTS_IT_ALARM);

	return 0;
}

static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	u8 reg;

	if (tm2bcd(&alm->time) < 0)
		return -EINVAL;

	local_irq_disable();
	rtc_wait_not_busy();

	rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
	rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
	rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
	rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
	rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
	rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);

	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	if (alm->enabled)
		reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
	else
		reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);

	local_irq_enable();

	return 0;
}

static struct rtc_class_ops omap_rtc_ops = {
	.read_time	= omap_rtc_read_time,
	.set_time	= omap_rtc_set_time,
	.read_alarm	= omap_rtc_read_alarm,
	.set_alarm	= omap_rtc_set_alarm,
	.alarm_irq_enable = omap_rtc_alarm_irq_enable,
};

static int omap_rtc_alarm;
static int omap_rtc_timer;

#define	OMAP_RTC_DATA_DA830_IDX	1

static struct platform_device_id omap_rtc_devtype[] = {
	{
		.name	= DRIVER_NAME,
	}, {
		.name	= "da830-rtc",
		.driver_data = OMAP_RTC_HAS_KICKER,
	},
	{},
};
MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);

static const struct of_device_id omap_rtc_of_match[] = {
	{	.compatible	= "ti,da830-rtc",
		.data		= &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
	},
	{},
};
MODULE_DEVICE_TABLE(of, omap_rtc_of_match);

static int __init omap_rtc_probe(struct platform_device *pdev)
{
	struct resource		*res, *mem;
	struct rtc_device	*rtc;
	u8			reg, new_ctrl;
	const struct platform_device_id *id_entry;
	const struct of_device_id *of_id;

	of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
	if (of_id)
		pdev->id_entry = of_id->data;

	omap_rtc_timer = platform_get_irq(pdev, 0);
	if (omap_rtc_timer <= 0) {
		pr_debug("%s: no update irq?\n", pdev->name);
		return -ENOENT;
	}

	omap_rtc_alarm = platform_get_irq(pdev, 1);
	if (omap_rtc_alarm <= 0) {
		pr_debug("%s: no alarm irq?\n", pdev->name);
		return -ENOENT;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		pr_debug("%s: RTC resource data missing\n", pdev->name);
		return -ENOENT;
	}

	mem = request_mem_region(res->start, resource_size(res), pdev->name);
	if (!mem) {
		pr_debug("%s: RTC registers at %08x are not free\n",
			pdev->name, res->start);
		return -EBUSY;
	}

	rtc_base = ioremap(res->start, resource_size(res));
	if (!rtc_base) {
		pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
		goto fail;
	}

	/* Enable the clock/module so that we can access the registers */
	pm_runtime_enable(&pdev->dev);
	pm_runtime_get_sync(&pdev->dev);

	id_entry = platform_get_device_id(pdev);
	if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) {
		rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
		rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
	}

	rtc = rtc_device_register(pdev->name, &pdev->dev,
			&omap_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc)) {
		pr_debug("%s: can't register RTC device, err %ld\n",
			pdev->name, PTR_ERR(rtc));
		goto fail0;
	}
	platform_set_drvdata(pdev, rtc);
	dev_set_drvdata(&rtc->dev, mem);

	/* clear pending irqs, and set 1/second periodic,
	 * which we'll use instead of update irqs
	 */
	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);

	/* clear old status */
	reg = rtc_read(OMAP_RTC_STATUS_REG);
	if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
		pr_info("%s: RTC power up reset detected\n",
			pdev->name);
		rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
	}
	if (reg & (u8) OMAP_RTC_STATUS_ALARM)
		rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);

	/* handle periodic and alarm irqs */
	if (request_irq(omap_rtc_timer, rtc_irq, 0,
			dev_name(&rtc->dev), rtc)) {
		pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
			pdev->name, omap_rtc_timer);
		goto fail1;
	}
	if ((omap_rtc_timer != omap_rtc_alarm) &&
		(request_irq(omap_rtc_alarm, rtc_irq, 0,
			dev_name(&rtc->dev), rtc))) {
		pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
			pdev->name, omap_rtc_alarm);
		goto fail2;
	}

	/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
	reg = rtc_read(OMAP_RTC_CTRL_REG);
	if (reg & (u8) OMAP_RTC_CTRL_STOP)
		pr_info("%s: already running\n", pdev->name);

	/* force to 24 hour mode */
	new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
	new_ctrl |= OMAP_RTC_CTRL_STOP;

	/* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
	 *
	 *  - Device wake-up capability setting should come through chip
	 *    init logic. OMAP1 boards should initialize the "wakeup capable"
	 *    flag in the platform device if the board is wired right for
	 *    being woken up by RTC alarm. For OMAP-L138, this capability
	 *    is built into the SoC by the "Deep Sleep" capability.
	 *
	 *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
	 *    rather than nPWRON_RESET, should forcibly enable split
	 *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
	 *    is write-only, and always reads as zero...)
	 */

	if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
		pr_info("%s: split power mode\n", pdev->name);

	if (reg != new_ctrl)
		rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);

	return 0;

fail2:
	free_irq(omap_rtc_timer, rtc);
fail1:
	rtc_device_unregister(rtc);
fail0:
	if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
		rtc_writel(0, OMAP_RTC_KICK0_REG);
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);
	iounmap(rtc_base);
fail:
	release_mem_region(mem->start, resource_size(mem));
	return -EIO;
}

static int __exit omap_rtc_remove(struct platform_device *pdev)
{
	struct rtc_device	*rtc = platform_get_drvdata(pdev);
	struct resource		*mem = dev_get_drvdata(&rtc->dev);
	const struct platform_device_id *id_entry =
				platform_get_device_id(pdev);

	device_init_wakeup(&pdev->dev, 0);

	/* leave rtc running, but disable irqs */
	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);

	free_irq(omap_rtc_timer, rtc);

	if (omap_rtc_timer != omap_rtc_alarm)
		free_irq(omap_rtc_alarm, rtc);

	rtc_device_unregister(rtc);
	if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
		rtc_writel(0, OMAP_RTC_KICK0_REG);

	/* Disable the clock/module */
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	iounmap(rtc_base);
	release_mem_region(mem->start, resource_size(mem));
	return 0;
}

#ifdef CONFIG_PM

static u8 irqstat;

static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);

	/* FIXME the RTC alarm is not currently acting as a wakeup event
	 * source, and in fact this enable() call is just saving a flag
	 * that's never used...
	 */
	if (device_may_wakeup(&pdev->dev))
		enable_irq_wake(omap_rtc_alarm);
	else
		rtc_write(0, OMAP_RTC_INTERRUPTS_REG);

	/* Disable the clock/module */
	pm_runtime_put_sync(&pdev->dev);

	return 0;
}

static int omap_rtc_resume(struct platform_device *pdev)
{
	/* Enable the clock/module so that we can access the registers */
	pm_runtime_get_sync(&pdev->dev);

	if (device_may_wakeup(&pdev->dev))
		disable_irq_wake(omap_rtc_alarm);
	else
		rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
	return 0;
}

#else
#define omap_rtc_suspend NULL
#define omap_rtc_resume  NULL
#endif

static void omap_rtc_shutdown(struct platform_device *pdev)
{
	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
}

MODULE_ALIAS("platform:omap_rtc");
static struct platform_driver omap_rtc_driver = {
	.remove		= __exit_p(omap_rtc_remove),
	.suspend	= omap_rtc_suspend,
	.resume		= omap_rtc_resume,
	.shutdown	= omap_rtc_shutdown,
	.driver		= {
		.name	= DRIVER_NAME,
		.owner	= THIS_MODULE,
		.of_match_table = of_match_ptr(omap_rtc_of_match),
	},
	.id_table	= omap_rtc_devtype,
};

static int __init rtc_init(void)
{
	return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
}
module_init(rtc_init);

static void __exit rtc_exit(void)
{
	platform_driver_unregister(&omap_rtc_driver);
}
module_exit(rtc_exit);

MODULE_AUTHOR("George G. Davis (and others)");
MODULE_LICENSE("GPL");
Commit	Line	Data
db68b189 DB	1	/*
	2	* TI OMAP1 Real Time Clock interface for Linux
	3	*
	4	* Copyright (C) 2003 MontaVista Software, Inc.
	5	* Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
	6	*
	7	* Copyright (C) 2006 David Brownell (new RTC framework)
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/module.h>
	18	#include <linux/ioport.h>
	19	#include <linux/delay.h>
	20	#include <linux/rtc.h>
	21	#include <linux/bcd.h>
	22	#include <linux/platform_device.h>
9e0344dc AM	23	#include <linux/of.h>
9e0344dc AM	24	#include <linux/of_device.h>
fc9bd902	25	#include <linux/pm_runtime.h>
db68b189 DB	26
db68b189 DB	27	#include <asm/io.h>
db68b189 DB	28
	29
	30	/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
	31	* with century-range alarm matching, driven by the 32kHz clock.
	32	*
	33	* The main user-visible ways it differs from PC RTCs are by omitting
	34	* "don't care" alarm fields and sub-second periodic IRQs, and having
	35	* an autoadjust mechanism to calibrate to the true oscillator rate.
	36	*
	37	* Board-specific wiring options include using split power mode with
	38	* RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
	39	* and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
fa5b0782 SN	40	* low power modes) for OMAP1 boards (OMAP-L138 has this built into
fa5b0782 SN	41	* the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
db68b189 DB	42	*/
db68b189 DB	43
cab1458c AM	44	#define DRIVER_NAME "omap_rtc"
cab1458c AM	45
db68b189 DB	46	#define OMAP_RTC_BASE 0xfffb4800
	47
	48	/* RTC registers */
	49	#define OMAP_RTC_SECONDS_REG 0x00
	50	#define OMAP_RTC_MINUTES_REG 0x04
	51	#define OMAP_RTC_HOURS_REG 0x08
	52	#define OMAP_RTC_DAYS_REG 0x0C
	53	#define OMAP_RTC_MONTHS_REG 0x10
	54	#define OMAP_RTC_YEARS_REG 0x14
	55	#define OMAP_RTC_WEEKS_REG 0x18
	56
	57	#define OMAP_RTC_ALARM_SECONDS_REG 0x20
	58	#define OMAP_RTC_ALARM_MINUTES_REG 0x24
	59	#define OMAP_RTC_ALARM_HOURS_REG 0x28
	60	#define OMAP_RTC_ALARM_DAYS_REG 0x2c
	61	#define OMAP_RTC_ALARM_MONTHS_REG 0x30
	62	#define OMAP_RTC_ALARM_YEARS_REG 0x34
	63
	64	#define OMAP_RTC_CTRL_REG 0x40
	65	#define OMAP_RTC_STATUS_REG 0x44
	66	#define OMAP_RTC_INTERRUPTS_REG 0x48
	67
	68	#define OMAP_RTC_COMP_LSB_REG 0x4c
	69	#define OMAP_RTC_COMP_MSB_REG 0x50
	70	#define OMAP_RTC_OSC_REG 0x54
	71
cab1458c AM	72	#define OMAP_RTC_KICK0_REG 0x6c
	73	#define OMAP_RTC_KICK1_REG 0x70
	74
db68b189 DB	75	/* OMAP_RTC_CTRL_REG bit fields: */
	76	#define OMAP_RTC_CTRL_SPLIT (1<<7)
	77	#define OMAP_RTC_CTRL_DISABLE (1<<6)
	78	#define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
	79	#define OMAP_RTC_CTRL_TEST (1<<4)
	80	#define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
	81	#define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
	82	#define OMAP_RTC_CTRL_ROUND_30S (1<<1)
	83	#define OMAP_RTC_CTRL_STOP (1<<0)
	84
	85	/* OMAP_RTC_STATUS_REG bit fields: */
	86	#define OMAP_RTC_STATUS_POWER_UP (1<<7)
	87	#define OMAP_RTC_STATUS_ALARM (1<<6)
	88	#define OMAP_RTC_STATUS_1D_EVENT (1<<5)
	89	#define OMAP_RTC_STATUS_1H_EVENT (1<<4)
	90	#define OMAP_RTC_STATUS_1M_EVENT (1<<3)
	91	#define OMAP_RTC_STATUS_1S_EVENT (1<<2)
	92	#define OMAP_RTC_STATUS_RUN (1<<1)
	93	#define OMAP_RTC_STATUS_BUSY (1<<0)
	94
	95	/* OMAP_RTC_INTERRUPTS_REG bit fields: */
	96	#define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
	97	#define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
	98
cab1458c AM	99	/* OMAP_RTC_KICKER values */
	100	#define KICK0_VALUE 0x83e70b13
	101	#define KICK1_VALUE 0x95a4f1e0
	102
	103	#define OMAP_RTC_HAS_KICKER 0x1
	104
8cfde8c1	105	static void __iomem *rtc_base;
db68b189	106
cab1458c AM	107	#define rtc_read(addr) readb(rtc_base + (addr))
	108	#define rtc_write(val, addr) writeb(val, rtc_base + (addr))
	109
	110	#define rtc_writel(val, addr) writel(val, rtc_base + (addr))
db68b189 DB	111
db68b189 DB	112
db68b189 DB	113	/* we rely on the rtc framework to handle locking (rtc->ops_lock),
	114	* so the only other requirement is that register accesses which
	115	* require BUSY to be clear are made with IRQs locally disabled
	116	*/
	117	static void rtc_wait_not_busy(void)
	118	{
	119	int count = 0;
	120	u8 status;
	121
	122	/* BUSY may stay active for 1/32768 second (~30 usec) */
	123	for (count = 0; count < 50; count++) {
	124	status = rtc_read(OMAP_RTC_STATUS_REG);
	125	if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
	126	break;
	127	udelay(1);
	128	}
	129	/* now we have ~15 usec to read/write various registers */
	130	}
	131
ab6a2d70	132	static irqreturn_t rtc_irq(int irq, void *rtc)
db68b189 DB	133	{
	134	unsigned long events = 0;
	135	u8 irq_data;
	136
	137	irq_data = rtc_read(OMAP_RTC_STATUS_REG);
	138
	139	/* alarm irq? */
	140	if (irq_data & OMAP_RTC_STATUS_ALARM) {
	141	rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
	142	events \|= RTC_IRQF \| RTC_AF;
	143	}
	144
	145	/* 1/sec periodic/update irq? */
	146	if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
	147	events \|= RTC_IRQF \| RTC_UF;
	148
ab6a2d70	149	rtc_update_irq(rtc, 1, events);
db68b189 DB	150
	151	return IRQ_HANDLED;
	152	}
	153
16380c15 JS	154	static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
	155	{
	156	u8 reg;
	157
	158	local_irq_disable();
	159	rtc_wait_not_busy();
	160	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	161	if (enabled)
	162	reg \|= OMAP_RTC_INTERRUPTS_IT_ALARM;
	163	else
	164	reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
	165	rtc_wait_not_busy();
	166	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
	167	local_irq_enable();
	168
	169	return 0;
	170	}
	171
db68b189 DB	172	/* this hardware doesn't support "don't care" alarm fields */
	173	static int tm2bcd(struct rtc_time *tm)
	174	{
	175	if (rtc_valid_tm(tm) != 0)
	176	return -EINVAL;
	177
fe20ba70 AB	178	tm->tm_sec = bin2bcd(tm->tm_sec);
	179	tm->tm_min = bin2bcd(tm->tm_min);
	180	tm->tm_hour = bin2bcd(tm->tm_hour);
	181	tm->tm_mday = bin2bcd(tm->tm_mday);
db68b189	182
fe20ba70	183	tm->tm_mon = bin2bcd(tm->tm_mon + 1);
db68b189 DB	184
	185	/* epoch == 1900 */
	186	if (tm->tm_year < 100 \|\| tm->tm_year > 199)
	187	return -EINVAL;
fe20ba70	188	tm->tm_year = bin2bcd(tm->tm_year - 100);
db68b189 DB	189
	190	return 0;
	191	}
	192
	193	static void bcd2tm(struct rtc_time *tm)
	194	{
fe20ba70 AB	195	tm->tm_sec = bcd2bin(tm->tm_sec);
	196	tm->tm_min = bcd2bin(tm->tm_min);
	197	tm->tm_hour = bcd2bin(tm->tm_hour);
	198	tm->tm_mday = bcd2bin(tm->tm_mday);
	199	tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
db68b189	200	/* epoch == 1900 */
fe20ba70	201	tm->tm_year = bcd2bin(tm->tm_year) + 100;
db68b189 DB	202	}
	203
	204
	205	static int omap_rtc_read_time(struct device dev, struct rtc_time tm)
	206	{
	207	/* we don't report wday/yday/isdst ... */
	208	local_irq_disable();
	209	rtc_wait_not_busy();
	210
	211	tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
	212	tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
	213	tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
	214	tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
	215	tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
	216	tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
	217
	218	local_irq_enable();
	219
	220	bcd2tm(tm);
	221	return 0;
	222	}
	223
	224	static int omap_rtc_set_time(struct device dev, struct rtc_time tm)
	225	{
	226	if (tm2bcd(tm) < 0)
	227	return -EINVAL;
	228	local_irq_disable();
	229	rtc_wait_not_busy();
	230
	231	rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
	232	rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
	233	rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
	234	rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
	235	rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
	236	rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
	237
	238	local_irq_enable();
	239
	240	return 0;
	241	}
	242
	243	static int omap_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
	244	{
	245	local_irq_disable();
	246	rtc_wait_not_busy();
	247
	248	alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
	249	alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
	250	alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
	251	alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
	252	alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
	253	alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
	254
	255	local_irq_enable();
	256
	257	bcd2tm(&alm->time);
a2db8dfc	258	alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
db68b189	259	& OMAP_RTC_INTERRUPTS_IT_ALARM);
db68b189 DB	260
	261	return 0;
	262	}
	263
	264	static int omap_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
	265	{
	266	u8 reg;
	267
db68b189 DB	268	if (tm2bcd(&alm->time) < 0)
	269	return -EINVAL;
	270
	271	local_irq_disable();
	272	rtc_wait_not_busy();
	273
	274	rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
	275	rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
	276	rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
	277	rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
	278	rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
	279	rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
	280
	281	reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	282	if (alm->enabled)
	283	reg \|= OMAP_RTC_INTERRUPTS_IT_ALARM;
	284	else
	285	reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
	286	rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
	287
	288	local_irq_enable();
	289
	290	return 0;
	291	}
	292
	293	static struct rtc_class_ops omap_rtc_ops = {
db68b189 DB	294	.read_time = omap_rtc_read_time,
	295	.set_time = omap_rtc_set_time,
	296	.read_alarm = omap_rtc_read_alarm,
	297	.set_alarm = omap_rtc_set_alarm,
16380c15	298	.alarm_irq_enable = omap_rtc_alarm_irq_enable,
db68b189 DB	299	};
	300
	301	static int omap_rtc_alarm;
	302	static int omap_rtc_timer;
	303
9e0344dc AM	304	#define OMAP_RTC_DATA_DA830_IDX 1
9e0344dc AM	305
cab1458c AM	306	static struct platform_device_id omap_rtc_devtype[] = {
	307	{
	308	.name = DRIVER_NAME,
	309	}, {
	310	.name = "da830-rtc",
	311	.driver_data = OMAP_RTC_HAS_KICKER,
	312	},
	313	{},
	314	};
	315	MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
	316
9e0344dc AM	317	static const struct of_device_id omap_rtc_of_match[] = {
	318	{ .compatible = "ti,da830-rtc",
	319	.data = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
	320	},
	321	{},
	322	};
	323	MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
	324
71fc8224	325	static int __init omap_rtc_probe(struct platform_device *pdev)
db68b189 DB	326	{
	327	struct resource res, mem;
	328	struct rtc_device *rtc;
	329	u8 reg, new_ctrl;
cab1458c	330	const struct platform_device_id *id_entry;
9e0344dc AM	331	const struct of_device_id *of_id;
	332
	333	of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
	334	if (of_id)
	335	pdev->id_entry = of_id->data;
db68b189 DB	336
	337	omap_rtc_timer = platform_get_irq(pdev, 0);
	338	if (omap_rtc_timer <= 0) {
	339	pr_debug("%s: no update irq?\n", pdev->name);
	340	return -ENOENT;
	341	}
	342
	343	omap_rtc_alarm = platform_get_irq(pdev, 1);
	344	if (omap_rtc_alarm <= 0) {
	345	pr_debug("%s: no alarm irq?\n", pdev->name);
	346	return -ENOENT;
	347	}
	348
db68b189	349	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8cfde8c1 MG	350	if (!res) {
8cfde8c1 MG	351	pr_debug("%s: RTC resource data missing\n", pdev->name);
db68b189 DB	352	return -ENOENT;
	353	}
	354
8cfde8c1	355	mem = request_mem_region(res->start, resource_size(res), pdev->name);
db68b189 DB	356	if (!mem) {
db68b189 DB	357	pr_debug("%s: RTC registers at %08x are not free\n",
8cfde8c1	358	pdev->name, res->start);
db68b189 DB	359	return -EBUSY;
	360	}
	361
8cfde8c1 MG	362	rtc_base = ioremap(res->start, resource_size(res));
	363	if (!rtc_base) {
	364	pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
	365	goto fail;
	366	}
	367
fc9bd902 VH	368	/* Enable the clock/module so that we can access the registers */
	369	pm_runtime_enable(&pdev->dev);
	370	pm_runtime_get_sync(&pdev->dev);
	371
cab1458c AM	372	id_entry = platform_get_device_id(pdev);
	373	if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) {
	374	rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
	375	rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
	376	}
	377
db68b189 DB	378	rtc = rtc_device_register(pdev->name, &pdev->dev,
	379	&omap_rtc_ops, THIS_MODULE);
	380	if (IS_ERR(rtc)) {
	381	pr_debug("%s: can't register RTC device, err %ld\n",
	382	pdev->name, PTR_ERR(rtc));
8cfde8c1	383	goto fail0;
db68b189 DB	384	}
db68b189 DB	385	platform_set_drvdata(pdev, rtc);
558a40f7	386	dev_set_drvdata(&rtc->dev, mem);
db68b189 DB	387
	388	/* clear pending irqs, and set 1/second periodic,
	389	* which we'll use instead of update irqs
	390	*/
	391	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	392
	393	/* clear old status */
	394	reg = rtc_read(OMAP_RTC_STATUS_REG);
	395	if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
	396	pr_info("%s: RTC power up reset detected\n",
	397	pdev->name);
	398	rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
	399	}
	400	if (reg & (u8) OMAP_RTC_STATUS_ALARM)
	401	rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
	402
	403	/* handle periodic and alarm irqs */
2f6e5f94	404	if (request_irq(omap_rtc_timer, rtc_irq, 0,
744bcb13	405	dev_name(&rtc->dev), rtc)) {
db68b189 DB	406	pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
db68b189 DB	407	pdev->name, omap_rtc_timer);
8cfde8c1	408	goto fail1;
db68b189	409	}
8cfde8c1	410	if ((omap_rtc_timer != omap_rtc_alarm) &&
2f6e5f94	411	(request_irq(omap_rtc_alarm, rtc_irq, 0,
8cfde8c1	412	dev_name(&rtc->dev), rtc))) {
db68b189 DB	413	pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
db68b189 DB	414	pdev->name, omap_rtc_alarm);
8cfde8c1	415	goto fail2;
db68b189 DB	416	}
	417
	418	/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
	419	reg = rtc_read(OMAP_RTC_CTRL_REG);
	420	if (reg & (u8) OMAP_RTC_CTRL_STOP)
	421	pr_info("%s: already running\n", pdev->name);
	422
	423	/* force to 24 hour mode */
12b3e038	424	new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT\|OMAP_RTC_CTRL_AUTO_COMP);
db68b189 DB	425	new_ctrl \|= OMAP_RTC_CTRL_STOP;
	426
	427	/* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
	428	*
fa5b0782 SN	429	* - Device wake-up capability setting should come through chip
	430	* init logic. OMAP1 boards should initialize the "wakeup capable"
	431	* flag in the platform device if the board is wired right for
	432	* being woken up by RTC alarm. For OMAP-L138, this capability
	433	* is built into the SoC by the "Deep Sleep" capability.
db68b189 DB	434	*
	435	* - Boards wired so RTC_ON_nOFF is used as the reset signal,
	436	* rather than nPWRON_RESET, should forcibly enable split
	437	* power mode. (Some chip errata report that RTC_CTRL_SPLIT
	438	* is write-only, and always reads as zero...)
	439	*/
db68b189 DB	440
	441	if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
	442	pr_info("%s: split power mode\n", pdev->name);
	443
	444	if (reg != new_ctrl)
	445	rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
	446
	447	return 0;
	448
8cfde8c1	449	fail2:
2dd93c4f	450	free_irq(omap_rtc_timer, rtc);
8cfde8c1	451	fail1:
db68b189	452	rtc_device_unregister(rtc);
8cfde8c1	453	fail0:
cab1458c AM	454	if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
cab1458c AM	455	rtc_writel(0, OMAP_RTC_KICK0_REG);
fc9bd902 VH	456	pm_runtime_put_sync(&pdev->dev);
fc9bd902 VH	457	pm_runtime_disable(&pdev->dev);
8cfde8c1	458	iounmap(rtc_base);
db68b189	459	fail:
19412ce9	460	release_mem_region(mem->start, resource_size(mem));
db68b189 DB	461	return -EIO;
	462	}
	463
71fc8224	464	static int __exit omap_rtc_remove(struct platform_device *pdev)
db68b189	465	{
a419aef8	466	struct rtc_device *rtc = platform_get_drvdata(pdev);
19412ce9	467	struct resource *mem = dev_get_drvdata(&rtc->dev);
cab1458c AM	468	const struct platform_device_id *id_entry =
cab1458c AM	469	platform_get_device_id(pdev);
db68b189 DB	470
	471	device_init_wakeup(&pdev->dev, 0);
	472
	473	/* leave rtc running, but disable irqs */
	474	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	475
	476	free_irq(omap_rtc_timer, rtc);
8cfde8c1 MG	477
	478	if (omap_rtc_timer != omap_rtc_alarm)
	479	free_irq(omap_rtc_alarm, rtc);
db68b189	480
db68b189	481	rtc_device_unregister(rtc);
cab1458c AM	482	if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
cab1458c AM	483	rtc_writel(0, OMAP_RTC_KICK0_REG);
fc9bd902 VH	484
	485	/* Disable the clock/module */
	486	pm_runtime_put_sync(&pdev->dev);
	487	pm_runtime_disable(&pdev->dev);
	488
19412ce9 AL	489	iounmap(rtc_base);
19412ce9 AL	490	release_mem_region(mem->start, resource_size(mem));
db68b189 DB	491	return 0;
	492	}
	493
	494	#ifdef CONFIG_PM
	495
db68b189 DB	496	static u8 irqstat;
	497
	498	static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	499	{
db68b189 DB	500	irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
	501
	502	/* FIXME the RTC alarm is not currently acting as a wakeup event
	503	* source, and in fact this enable() call is just saving a flag
	504	* that's never used...
	505	*/
	506	if (device_may_wakeup(&pdev->dev))
	507	enable_irq_wake(omap_rtc_alarm);
	508	else
	509	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	510
fc9bd902 VH	511	/* Disable the clock/module */
	512	pm_runtime_put_sync(&pdev->dev);
	513
db68b189 DB	514	return 0;
	515	}
	516
	517	static int omap_rtc_resume(struct platform_device *pdev)
	518	{
fc9bd902 VH	519	/* Enable the clock/module so that we can access the registers */
	520	pm_runtime_get_sync(&pdev->dev);
	521
db68b189 DB	522	if (device_may_wakeup(&pdev->dev))
	523	disable_irq_wake(omap_rtc_alarm);
	524	else
	525	rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
	526	return 0;
	527	}
	528
	529	#else
	530	#define omap_rtc_suspend NULL
	531	#define omap_rtc_resume NULL
	532	#endif
	533
	534	static void omap_rtc_shutdown(struct platform_device *pdev)
	535	{
	536	rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
	537	}
	538
ad28a07b	539	MODULE_ALIAS("platform:omap_rtc");
db68b189	540	static struct platform_driver omap_rtc_driver = {
71fc8224	541	.remove = __exit_p(omap_rtc_remove),
db68b189 DB	542	.suspend = omap_rtc_suspend,
	543	.resume = omap_rtc_resume,
	544	.shutdown = omap_rtc_shutdown,
	545	.driver = {
cab1458c	546	.name = DRIVER_NAME,
db68b189	547	.owner = THIS_MODULE,
9e0344dc	548	.of_match_table = of_match_ptr(omap_rtc_of_match),
db68b189	549	},
cab1458c	550	.id_table = omap_rtc_devtype,
db68b189 DB	551	};
	552
	553	static int __init rtc_init(void)
	554	{
71fc8224	555	return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
db68b189 DB	556	}
	557	module_init(rtc_init);
	558
	559	static void __exit rtc_exit(void)
	560	{
	561	platform_driver_unregister(&omap_rtc_driver);
	562	}
	563	module_exit(rtc_exit);
	564
	565	MODULE_AUTHOR("George G. Davis (and others)");
	566	MODULE_LICENSE("GPL");