rtc: omap: add helper to read 32-bit registers
[deliverable/linux.git] / drivers / rtc / rtc-omap.c
CommitLineData
db68b189
DB
1/*
2 * TI OMAP1 Real Time Clock interface for Linux
3 *
4 * Copyright (C) 2003 MontaVista Software, Inc.
5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
6 *
7 * Copyright (C) 2006 David Brownell (new RTC framework)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/ioport.h>
19#include <linux/delay.h>
20#include <linux/rtc.h>
21#include <linux/bcd.h>
22#include <linux/platform_device.h>
9e0344dc
AM
23#include <linux/of.h>
24#include <linux/of_device.h>
fc9bd902 25#include <linux/pm_runtime.h>
4b30c9fc 26#include <linux/io.h>
db68b189
DB
27
28/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
29 * with century-range alarm matching, driven by the 32kHz clock.
30 *
31 * The main user-visible ways it differs from PC RTCs are by omitting
32 * "don't care" alarm fields and sub-second periodic IRQs, and having
33 * an autoadjust mechanism to calibrate to the true oscillator rate.
34 *
35 * Board-specific wiring options include using split power mode with
36 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
37 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
fa5b0782
SN
38 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
39 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
db68b189
DB
40 */
41
db68b189
DB
42/* RTC registers */
43#define OMAP_RTC_SECONDS_REG 0x00
44#define OMAP_RTC_MINUTES_REG 0x04
45#define OMAP_RTC_HOURS_REG 0x08
46#define OMAP_RTC_DAYS_REG 0x0C
47#define OMAP_RTC_MONTHS_REG 0x10
48#define OMAP_RTC_YEARS_REG 0x14
49#define OMAP_RTC_WEEKS_REG 0x18
50
51#define OMAP_RTC_ALARM_SECONDS_REG 0x20
52#define OMAP_RTC_ALARM_MINUTES_REG 0x24
53#define OMAP_RTC_ALARM_HOURS_REG 0x28
54#define OMAP_RTC_ALARM_DAYS_REG 0x2c
55#define OMAP_RTC_ALARM_MONTHS_REG 0x30
56#define OMAP_RTC_ALARM_YEARS_REG 0x34
57
58#define OMAP_RTC_CTRL_REG 0x40
59#define OMAP_RTC_STATUS_REG 0x44
60#define OMAP_RTC_INTERRUPTS_REG 0x48
61
62#define OMAP_RTC_COMP_LSB_REG 0x4c
63#define OMAP_RTC_COMP_MSB_REG 0x50
64#define OMAP_RTC_OSC_REG 0x54
65
cab1458c
AM
66#define OMAP_RTC_KICK0_REG 0x6c
67#define OMAP_RTC_KICK1_REG 0x70
68
8af750e3
HG
69#define OMAP_RTC_IRQWAKEEN 0x7c
70
db68b189 71/* OMAP_RTC_CTRL_REG bit fields: */
92adb96a
SN
72#define OMAP_RTC_CTRL_SPLIT BIT(7)
73#define OMAP_RTC_CTRL_DISABLE BIT(6)
74#define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5)
75#define OMAP_RTC_CTRL_TEST BIT(4)
76#define OMAP_RTC_CTRL_MODE_12_24 BIT(3)
77#define OMAP_RTC_CTRL_AUTO_COMP BIT(2)
78#define OMAP_RTC_CTRL_ROUND_30S BIT(1)
79#define OMAP_RTC_CTRL_STOP BIT(0)
db68b189
DB
80
81/* OMAP_RTC_STATUS_REG bit fields: */
92adb96a
SN
82#define OMAP_RTC_STATUS_POWER_UP BIT(7)
83#define OMAP_RTC_STATUS_ALARM BIT(6)
84#define OMAP_RTC_STATUS_1D_EVENT BIT(5)
85#define OMAP_RTC_STATUS_1H_EVENT BIT(4)
86#define OMAP_RTC_STATUS_1M_EVENT BIT(3)
87#define OMAP_RTC_STATUS_1S_EVENT BIT(2)
88#define OMAP_RTC_STATUS_RUN BIT(1)
89#define OMAP_RTC_STATUS_BUSY BIT(0)
db68b189
DB
90
91/* OMAP_RTC_INTERRUPTS_REG bit fields: */
92adb96a
SN
92#define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
93#define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
db68b189 94
cd914bba
SN
95/* OMAP_RTC_OSC_REG bit fields: */
96#define OMAP_RTC_OSC_32KCLK_EN BIT(6)
97
8af750e3 98/* OMAP_RTC_IRQWAKEEN bit fields: */
92adb96a 99#define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
8af750e3 100
cab1458c
AM
101/* OMAP_RTC_KICKER values */
102#define KICK0_VALUE 0x83e70b13
103#define KICK1_VALUE 0x95a4f1e0
104
2153f949
JH
105struct omap_rtc_device_type {
106 bool has_32kclk_en;
107 bool has_kicker;
108 bool has_irqwakeen;
9291e340 109 bool has_power_up_reset;
2153f949 110};
cd914bba 111
55ba953a
JH
112struct omap_rtc {
113 struct rtc_device *rtc;
114 void __iomem *base;
115 int irq_alarm;
116 int irq_timer;
117 u8 interrupts_reg;
2153f949 118 const struct omap_rtc_device_type *type;
55ba953a 119};
db68b189 120
55ba953a
JH
121static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
122{
123 return readb(rtc->base + reg);
124}
cab1458c 125
c253a896
JH
126static inline u32 rtc_readl(struct omap_rtc *rtc, unsigned int reg)
127{
128 return readl(rtc->base + reg);
129}
130
55ba953a
JH
131static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
132{
133 writeb(val, rtc->base + reg);
134}
db68b189 135
55ba953a
JH
136static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
137{
138 writel(val, rtc->base + reg);
139}
db68b189 140
db68b189
DB
141/* we rely on the rtc framework to handle locking (rtc->ops_lock),
142 * so the only other requirement is that register accesses which
143 * require BUSY to be clear are made with IRQs locally disabled
144 */
55ba953a 145static void rtc_wait_not_busy(struct omap_rtc *rtc)
db68b189
DB
146{
147 int count = 0;
148 u8 status;
149
150 /* BUSY may stay active for 1/32768 second (~30 usec) */
151 for (count = 0; count < 50; count++) {
55ba953a 152 status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
db68b189
DB
153 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
154 break;
155 udelay(1);
156 }
157 /* now we have ~15 usec to read/write various registers */
158}
159
55ba953a 160static irqreturn_t rtc_irq(int irq, void *dev_id)
db68b189 161{
55ba953a 162 struct omap_rtc *rtc = dev_id;
db68b189
DB
163 unsigned long events = 0;
164 u8 irq_data;
165
55ba953a 166 irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
db68b189
DB
167
168 /* alarm irq? */
169 if (irq_data & OMAP_RTC_STATUS_ALARM) {
55ba953a 170 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
db68b189
DB
171 events |= RTC_IRQF | RTC_AF;
172 }
173
174 /* 1/sec periodic/update irq? */
175 if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
176 events |= RTC_IRQF | RTC_UF;
177
55ba953a 178 rtc_update_irq(rtc->rtc, 1, events);
db68b189
DB
179
180 return IRQ_HANDLED;
181}
182
16380c15
JS
183static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
184{
55ba953a 185 struct omap_rtc *rtc = dev_get_drvdata(dev);
ab7f580b 186 u8 reg, irqwake_reg = 0;
16380c15
JS
187
188 local_irq_disable();
55ba953a
JH
189 rtc_wait_not_busy(rtc);
190 reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
2153f949 191 if (rtc->type->has_irqwakeen)
55ba953a 192 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
ab7f580b
LV
193
194 if (enabled) {
16380c15 195 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
196 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
197 } else {
16380c15 198 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
199 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
200 }
55ba953a
JH
201 rtc_wait_not_busy(rtc);
202 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
2153f949 203 if (rtc->type->has_irqwakeen)
55ba953a 204 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
16380c15
JS
205 local_irq_enable();
206
207 return 0;
208}
209
db68b189
DB
210/* this hardware doesn't support "don't care" alarm fields */
211static int tm2bcd(struct rtc_time *tm)
212{
213 if (rtc_valid_tm(tm) != 0)
214 return -EINVAL;
215
fe20ba70
AB
216 tm->tm_sec = bin2bcd(tm->tm_sec);
217 tm->tm_min = bin2bcd(tm->tm_min);
218 tm->tm_hour = bin2bcd(tm->tm_hour);
219 tm->tm_mday = bin2bcd(tm->tm_mday);
db68b189 220
fe20ba70 221 tm->tm_mon = bin2bcd(tm->tm_mon + 1);
db68b189
DB
222
223 /* epoch == 1900 */
224 if (tm->tm_year < 100 || tm->tm_year > 199)
225 return -EINVAL;
fe20ba70 226 tm->tm_year = bin2bcd(tm->tm_year - 100);
db68b189
DB
227
228 return 0;
229}
230
231static void bcd2tm(struct rtc_time *tm)
232{
fe20ba70
AB
233 tm->tm_sec = bcd2bin(tm->tm_sec);
234 tm->tm_min = bcd2bin(tm->tm_min);
235 tm->tm_hour = bcd2bin(tm->tm_hour);
236 tm->tm_mday = bcd2bin(tm->tm_mday);
237 tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
db68b189 238 /* epoch == 1900 */
fe20ba70 239 tm->tm_year = bcd2bin(tm->tm_year) + 100;
db68b189
DB
240}
241
cbbe326f 242static void omap_rtc_read_time_raw(struct omap_rtc *rtc, struct rtc_time *tm)
db68b189 243{
55ba953a
JH
244 tm->tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
245 tm->tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
246 tm->tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
247 tm->tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
248 tm->tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
249 tm->tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
cbbe326f
JH
250}
251
252static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
253{
254 struct omap_rtc *rtc = dev_get_drvdata(dev);
db68b189 255
cbbe326f
JH
256 /* we don't report wday/yday/isdst ... */
257 local_irq_disable();
258 rtc_wait_not_busy(rtc);
259 omap_rtc_read_time_raw(rtc, tm);
db68b189
DB
260 local_irq_enable();
261
262 bcd2tm(tm);
263 return 0;
264}
265
266static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
267{
55ba953a
JH
268 struct omap_rtc *rtc = dev_get_drvdata(dev);
269
db68b189
DB
270 if (tm2bcd(tm) < 0)
271 return -EINVAL;
272 local_irq_disable();
55ba953a 273 rtc_wait_not_busy(rtc);
db68b189 274
55ba953a
JH
275 rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
276 rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
277 rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
278 rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
279 rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
280 rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
db68b189
DB
281
282 local_irq_enable();
283
284 return 0;
285}
286
287static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
288{
55ba953a
JH
289 struct omap_rtc *rtc = dev_get_drvdata(dev);
290
db68b189 291 local_irq_disable();
55ba953a 292 rtc_wait_not_busy(rtc);
db68b189 293
55ba953a
JH
294 alm->time.tm_sec = rtc_read(rtc, OMAP_RTC_ALARM_SECONDS_REG);
295 alm->time.tm_min = rtc_read(rtc, OMAP_RTC_ALARM_MINUTES_REG);
296 alm->time.tm_hour = rtc_read(rtc, OMAP_RTC_ALARM_HOURS_REG);
297 alm->time.tm_mday = rtc_read(rtc, OMAP_RTC_ALARM_DAYS_REG);
298 alm->time.tm_mon = rtc_read(rtc, OMAP_RTC_ALARM_MONTHS_REG);
299 alm->time.tm_year = rtc_read(rtc, OMAP_RTC_ALARM_YEARS_REG);
db68b189
DB
300
301 local_irq_enable();
302
303 bcd2tm(&alm->time);
55ba953a 304 alm->enabled = !!(rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG)
db68b189 305 & OMAP_RTC_INTERRUPTS_IT_ALARM);
db68b189
DB
306
307 return 0;
308}
309
310static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
311{
55ba953a 312 struct omap_rtc *rtc = dev_get_drvdata(dev);
ab7f580b 313 u8 reg, irqwake_reg = 0;
db68b189 314
db68b189
DB
315 if (tm2bcd(&alm->time) < 0)
316 return -EINVAL;
317
318 local_irq_disable();
55ba953a 319 rtc_wait_not_busy(rtc);
db68b189 320
55ba953a
JH
321 rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
322 rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
323 rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
324 rtc_write(rtc, OMAP_RTC_ALARM_HOURS_REG, alm->time.tm_hour);
325 rtc_write(rtc, OMAP_RTC_ALARM_MINUTES_REG, alm->time.tm_min);
326 rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm->time.tm_sec);
db68b189 327
55ba953a 328 reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
2153f949 329 if (rtc->type->has_irqwakeen)
55ba953a 330 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
ab7f580b
LV
331
332 if (alm->enabled) {
db68b189 333 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
334 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
335 } else {
db68b189 336 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
ab7f580b
LV
337 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
338 }
55ba953a 339 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
2153f949 340 if (rtc->type->has_irqwakeen)
55ba953a 341 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
db68b189
DB
342
343 local_irq_enable();
344
345 return 0;
346}
347
348static struct rtc_class_ops omap_rtc_ops = {
db68b189
DB
349 .read_time = omap_rtc_read_time,
350 .set_time = omap_rtc_set_time,
351 .read_alarm = omap_rtc_read_alarm,
352 .set_alarm = omap_rtc_set_alarm,
16380c15 353 .alarm_irq_enable = omap_rtc_alarm_irq_enable,
db68b189
DB
354};
355
2153f949 356static const struct omap_rtc_device_type omap_rtc_default_type = {
9291e340 357 .has_power_up_reset = true,
2153f949
JH
358};
359
360static const struct omap_rtc_device_type omap_rtc_am3352_type = {
361 .has_32kclk_en = true,
362 .has_kicker = true,
363 .has_irqwakeen = true,
364};
365
366static const struct omap_rtc_device_type omap_rtc_da830_type = {
367 .has_kicker = true,
368};
9e0344dc 369
2153f949 370static const struct platform_device_id omap_rtc_id_table[] = {
cab1458c 371 {
a430ca22 372 .name = "omap_rtc",
2153f949
JH
373 .driver_data = (kernel_ulong_t)&omap_rtc_default_type,
374 }, {
8af750e3 375 .name = "am3352-rtc",
2153f949
JH
376 .driver_data = (kernel_ulong_t)&omap_rtc_am3352_type,
377 }, {
cab1458c 378 .name = "da830-rtc",
2153f949
JH
379 .driver_data = (kernel_ulong_t)&omap_rtc_da830_type,
380 }, {
381 /* sentinel */
382 }
cab1458c 383};
2153f949 384MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
cab1458c 385
9e0344dc 386static const struct of_device_id omap_rtc_of_match[] = {
2153f949
JH
387 {
388 .compatible = "ti,am3352-rtc",
389 .data = &omap_rtc_am3352_type,
390 }, {
391 .compatible = "ti,da830-rtc",
392 .data = &omap_rtc_da830_type,
393 }, {
394 /* sentinel */
395 }
9e0344dc
AM
396};
397MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
398
71fc8224 399static int __init omap_rtc_probe(struct platform_device *pdev)
db68b189 400{
55ba953a 401 struct omap_rtc *rtc;
3765e8f1 402 struct resource *res;
9291e340 403 u8 reg, mask, new_ctrl;
cab1458c 404 const struct platform_device_id *id_entry;
9e0344dc 405 const struct of_device_id *of_id;
437b37a6 406 int ret;
9e0344dc 407
55ba953a
JH
408 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
409 if (!rtc)
410 return -ENOMEM;
411
9e0344dc 412 of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
2153f949
JH
413 if (of_id) {
414 rtc->type = of_id->data;
415 } else {
416 id_entry = platform_get_device_id(pdev);
417 rtc->type = (void *)id_entry->driver_data;
337b600f
SN
418 }
419
55ba953a
JH
420 rtc->irq_timer = platform_get_irq(pdev, 0);
421 if (rtc->irq_timer <= 0)
db68b189 422 return -ENOENT;
db68b189 423
55ba953a
JH
424 rtc->irq_alarm = platform_get_irq(pdev, 1);
425 if (rtc->irq_alarm <= 0)
db68b189 426 return -ENOENT;
db68b189 427
db68b189 428 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
55ba953a
JH
429 rtc->base = devm_ioremap_resource(&pdev->dev, res);
430 if (IS_ERR(rtc->base))
431 return PTR_ERR(rtc->base);
432
433 platform_set_drvdata(pdev, rtc);
8cfde8c1 434
fc9bd902
VH
435 /* Enable the clock/module so that we can access the registers */
436 pm_runtime_enable(&pdev->dev);
437 pm_runtime_get_sync(&pdev->dev);
438
2153f949 439 if (rtc->type->has_kicker) {
55ba953a
JH
440 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
441 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
cab1458c
AM
442 }
443
1ed8b5d2
JH
444 /*
445 * disable interrupts
446 *
447 * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
db68b189 448 */
55ba953a 449 rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189 450
cd914bba 451 /* enable RTC functional clock */
2153f949 452 if (rtc->type->has_32kclk_en) {
55ba953a
JH
453 reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
454 rtc_writel(rtc, OMAP_RTC_OSC_REG,
455 reg | OMAP_RTC_OSC_32KCLK_EN);
44c63a57 456 }
cd914bba 457
db68b189 458 /* clear old status */
55ba953a 459 reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
9291e340
JH
460
461 mask = OMAP_RTC_STATUS_ALARM;
462
463 if (rtc->type->has_power_up_reset) {
464 mask |= OMAP_RTC_STATUS_POWER_UP;
465 if (reg & OMAP_RTC_STATUS_POWER_UP)
466 dev_info(&pdev->dev, "RTC power up reset detected\n");
db68b189 467 }
9291e340
JH
468
469 if (reg & mask)
470 rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);
db68b189 471
db68b189 472 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
55ba953a 473 reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
db68b189 474 if (reg & (u8) OMAP_RTC_CTRL_STOP)
397b630a 475 dev_info(&pdev->dev, "already running\n");
db68b189
DB
476
477 /* force to 24 hour mode */
12b3e038 478 new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
db68b189
DB
479 new_ctrl |= OMAP_RTC_CTRL_STOP;
480
481 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
482 *
fa5b0782
SN
483 * - Device wake-up capability setting should come through chip
484 * init logic. OMAP1 boards should initialize the "wakeup capable"
485 * flag in the platform device if the board is wired right for
486 * being woken up by RTC alarm. For OMAP-L138, this capability
487 * is built into the SoC by the "Deep Sleep" capability.
db68b189
DB
488 *
489 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
490 * rather than nPWRON_RESET, should forcibly enable split
491 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
492 * is write-only, and always reads as zero...)
493 */
db68b189
DB
494
495 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
397b630a 496 dev_info(&pdev->dev, "split power mode\n");
db68b189
DB
497
498 if (reg != new_ctrl)
55ba953a 499 rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
db68b189 500
4390ce00
JH
501 device_init_wakeup(&pdev->dev, true);
502
55ba953a 503 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
4390ce00 504 &omap_rtc_ops, THIS_MODULE);
55ba953a
JH
505 if (IS_ERR(rtc->rtc)) {
506 ret = PTR_ERR(rtc->rtc);
4390ce00
JH
507 goto err;
508 }
4390ce00
JH
509
510 /* handle periodic and alarm irqs */
55ba953a
JH
511 ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
512 dev_name(&rtc->rtc->dev), rtc);
4390ce00
JH
513 if (ret)
514 goto err;
515
55ba953a
JH
516 if (rtc->irq_timer != rtc->irq_alarm) {
517 ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
518 dev_name(&rtc->rtc->dev), rtc);
4390ce00
JH
519 if (ret)
520 goto err;
521 }
522
db68b189
DB
523 return 0;
524
437b37a6 525err:
7ecd9a3f 526 device_init_wakeup(&pdev->dev, false);
2153f949 527 if (rtc->type->has_kicker)
55ba953a 528 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
fc9bd902
VH
529 pm_runtime_put_sync(&pdev->dev);
530 pm_runtime_disable(&pdev->dev);
437b37a6
JH
531
532 return ret;
db68b189
DB
533}
534
71fc8224 535static int __exit omap_rtc_remove(struct platform_device *pdev)
db68b189 536{
55ba953a 537 struct omap_rtc *rtc = platform_get_drvdata(pdev);
db68b189
DB
538
539 device_init_wakeup(&pdev->dev, 0);
540
541 /* leave rtc running, but disable irqs */
55ba953a 542 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189 543
2153f949 544 if (rtc->type->has_kicker)
55ba953a 545 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
fc9bd902
VH
546
547 /* Disable the clock/module */
548 pm_runtime_put_sync(&pdev->dev);
549 pm_runtime_disable(&pdev->dev);
550
db68b189
DB
551 return 0;
552}
553
04ebc359 554#ifdef CONFIG_PM_SLEEP
04ebc359 555static int omap_rtc_suspend(struct device *dev)
db68b189 556{
55ba953a
JH
557 struct omap_rtc *rtc = dev_get_drvdata(dev);
558
559 rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
db68b189
DB
560
561 /* FIXME the RTC alarm is not currently acting as a wakeup event
8af750e3
HG
562 * source on some platforms, and in fact this enable() call is just
563 * saving a flag that's never used...
db68b189 564 */
ab7f580b 565 if (device_may_wakeup(dev))
55ba953a 566 enable_irq_wake(rtc->irq_alarm);
ab7f580b 567 else
55ba953a 568 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189 569
fc9bd902 570 /* Disable the clock/module */
04ebc359 571 pm_runtime_put_sync(dev);
fc9bd902 572
db68b189
DB
573 return 0;
574}
575
04ebc359 576static int omap_rtc_resume(struct device *dev)
db68b189 577{
55ba953a
JH
578 struct omap_rtc *rtc = dev_get_drvdata(dev);
579
fc9bd902 580 /* Enable the clock/module so that we can access the registers */
04ebc359 581 pm_runtime_get_sync(dev);
fc9bd902 582
ab7f580b 583 if (device_may_wakeup(dev))
55ba953a 584 disable_irq_wake(rtc->irq_alarm);
ab7f580b 585 else
55ba953a 586 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
ab7f580b 587
db68b189
DB
588 return 0;
589}
db68b189
DB
590#endif
591
04ebc359
JH
592static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
593
db68b189
DB
594static void omap_rtc_shutdown(struct platform_device *pdev)
595{
55ba953a
JH
596 struct omap_rtc *rtc = platform_get_drvdata(pdev);
597
598 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
db68b189
DB
599}
600
db68b189 601static struct platform_driver omap_rtc_driver = {
71fc8224 602 .remove = __exit_p(omap_rtc_remove),
db68b189
DB
603 .shutdown = omap_rtc_shutdown,
604 .driver = {
a430ca22 605 .name = "omap_rtc",
db68b189 606 .owner = THIS_MODULE,
04ebc359 607 .pm = &omap_rtc_pm_ops,
616b7341 608 .of_match_table = omap_rtc_of_match,
db68b189 609 },
2153f949 610 .id_table = omap_rtc_id_table,
db68b189
DB
611};
612
09c5a36b 613module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
db68b189 614
a430ca22 615MODULE_ALIAS("platform:omap_rtc");
db68b189
DB
616MODULE_AUTHOR("George G. Davis (and others)");
617MODULE_LICENSE("GPL");
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