[deliverable/linux.git] / drivers / rtc / rtc-pl031.c

/*
 * drivers/rtc/rtc-pl031.c
 *
 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
 *
 * Author: Deepak Saxena <dsaxena@plexity.net>
 *
 * Copyright 2006 (c) MontaVista Software, Inc.
 *
 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
 * Copyright 2010 (c) ST-Ericsson AB
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#include <linux/module.h>
#include <linux/rtc.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/amba/bus.h>
#include <linux/io.h>
#include <linux/bcd.h>
#include <linux/delay.h>
#include <linux/slab.h>

/*
 * Register definitions
 */
#define	RTC_DR		0x00	/* Data read register */
#define	RTC_MR		0x04	/* Match register */
#define	RTC_LR		0x08	/* Data load register */
#define	RTC_CR		0x0c	/* Control register */
#define	RTC_IMSC	0x10	/* Interrupt mask and set register */
#define	RTC_RIS		0x14	/* Raw interrupt status register */
#define	RTC_MIS		0x18	/* Masked interrupt status register */
#define	RTC_ICR		0x1c	/* Interrupt clear register */
/* ST variants have additional timer functionality */
#define RTC_TDR		0x20	/* Timer data read register */
#define RTC_TLR		0x24	/* Timer data load register */
#define RTC_TCR		0x28	/* Timer control register */
#define RTC_YDR		0x30	/* Year data read register */
#define RTC_YMR		0x34	/* Year match register */
#define RTC_YLR		0x38	/* Year data load register */

#define RTC_CR_CWEN	(1 << 26)	/* Clockwatch enable bit */

#define RTC_TCR_EN	(1 << 1) /* Periodic timer enable bit */

/* Common bit definitions for Interrupt status and control registers */
#define RTC_BIT_AI	(1 << 0) /* Alarm interrupt bit */
#define RTC_BIT_PI	(1 << 1) /* Periodic interrupt bit. ST variants only. */

/* Common bit definations for ST v2 for reading/writing time */
#define RTC_SEC_SHIFT 0
#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
#define RTC_MIN_SHIFT 6
#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
#define RTC_HOUR_SHIFT 12
#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
#define RTC_WDAY_SHIFT 17
#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
#define RTC_MDAY_SHIFT 20
#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
#define RTC_MON_SHIFT 25
#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */

#define RTC_TIMER_FREQ 32768

/**
 * struct pl031_vendor_data - per-vendor variations
 * @ops: the vendor-specific operations used on this silicon version
 * @clockwatch: if this is an ST Microelectronics silicon version with a
 *	clockwatch function
 * @st_weekday: if this is an ST Microelectronics silicon version that need
 *	the weekday fix
 * @irqflags: special IRQ flags per variant
 */
struct pl031_vendor_data {
	struct rtc_class_ops ops;
	bool clockwatch;
	bool st_weekday;
	unsigned long irqflags;
};

struct pl031_local {
	struct pl031_vendor_data *vendor;
	struct rtc_device *rtc;
	void __iomem *base;
};

static int pl031_alarm_irq_enable(struct device *dev,
	unsigned int enabled)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long imsc;

	/* Clear any pending alarm interrupts. */
	writel(RTC_BIT_AI, ldata->base + RTC_ICR);

	imsc = readl(ldata->base + RTC_IMSC);

	if (enabled == 1)
		writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
	else
		writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);

	return 0;
}

/*
 * Convert Gregorian date to ST v2 RTC format.
 */
static int pl031_stv2_tm_to_time(struct device *dev,
				 struct rtc_time *tm, unsigned long *st_time,
	unsigned long *bcd_year)
{
	int year = tm->tm_year + 1900;
	int wday = tm->tm_wday;

	/* wday masking is not working in hardware so wday must be valid */
	if (wday < -1 || wday > 6) {
		dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
		return -EINVAL;
	} else if (wday == -1) {
		/* wday is not provided, calculate it here */
		unsigned long time;
		struct rtc_time calc_tm;

		rtc_tm_to_time(tm, &time);
		rtc_time_to_tm(time, &calc_tm);
		wday = calc_tm.tm_wday;
	}

	*bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);

	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
			|	(tm->tm_mday << RTC_MDAY_SHIFT)
			|	((wday + 1) << RTC_WDAY_SHIFT)
			|	(tm->tm_hour << RTC_HOUR_SHIFT)
			|	(tm->tm_min << RTC_MIN_SHIFT)
			|	(tm->tm_sec << RTC_SEC_SHIFT);

	return 0;
}

/*
 * Convert ST v2 RTC format to Gregorian date.
 */
static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
	struct rtc_time *tm)
{
	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
	tm->tm_mon  = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
	tm->tm_min  = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
	tm->tm_sec  = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);

	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
	tm->tm_year -= 1900;

	return 0;
}

static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
			readl(ldata->base + RTC_YDR), tm);

	return 0;
}

static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	unsigned long bcd_year;
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
	if (ret == 0) {
		writel(bcd_year, ldata->base + RTC_YLR);
		writel(time, ldata->base + RTC_LR);
	}

	return ret;
}

static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
			readl(ldata->base + RTC_YMR), &alarm->time);

	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;

	return ret;
}

static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long time;
	unsigned long bcd_year;
	int ret;

	/* At the moment, we can only deal with non-wildcarded alarm times. */
	ret = rtc_valid_tm(&alarm->time);
	if (ret == 0) {
		ret = pl031_stv2_tm_to_time(dev, &alarm->time,
					    &time, &bcd_year);
		if (ret == 0) {
			writel(bcd_year, ldata->base + RTC_YMR);
			writel(time, ldata->base + RTC_MR);

			pl031_alarm_irq_enable(dev, alarm->enabled);
		}
	}

	return ret;
}

static irqreturn_t pl031_interrupt(int irq, void *dev_id)
{
	struct pl031_local *ldata = dev_id;
	unsigned long rtcmis;
	unsigned long events = 0;

	rtcmis = readl(ldata->base + RTC_MIS);
	if (rtcmis & RTC_BIT_AI) {
		writel(RTC_BIT_AI, ldata->base + RTC_ICR);
		events |= (RTC_AF | RTC_IRQF);
		rtc_update_irq(ldata->rtc, 1, events);

		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static int pl031_read_time(struct device *dev, struct rtc_time *tm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);

	return 0;
}

static int pl031_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = rtc_tm_to_time(tm, &time);

	if (ret == 0)
		writel(time, ldata->base + RTC_LR);

	return ret;
}

static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);

	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;

	return 0;
}

static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long time;
	int ret;

	/* At the moment, we can only deal with non-wildcarded alarm times. */
	ret = rtc_valid_tm(&alarm->time);
	if (ret == 0) {
		ret = rtc_tm_to_time(&alarm->time, &time);
		if (ret == 0) {
			writel(time, ldata->base + RTC_MR);
			pl031_alarm_irq_enable(dev, alarm->enabled);
		}
	}

	return ret;
}

static int pl031_remove(struct amba_device *adev)
{
	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);

	amba_set_drvdata(adev, NULL);
	free_irq(adev->irq[0], ldata->rtc);
	rtc_device_unregister(ldata->rtc);
	iounmap(ldata->base);
	kfree(ldata);
	amba_release_regions(adev);

	return 0;
}

static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
{
	int ret;
	struct pl031_local *ldata;
	struct pl031_vendor_data *vendor = id->data;
	struct rtc_class_ops *ops = &vendor->ops;
	unsigned long time;

	ret = amba_request_regions(adev, NULL);
	if (ret)
		goto err_req;

	ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
	if (!ldata) {
		ret = -ENOMEM;
		goto out;
	}
	ldata->vendor = vendor;

	ldata->base = ioremap(adev->res.start, resource_size(&adev->res));

	if (!ldata->base) {
		ret = -ENOMEM;
		goto out_no_remap;
	}

	amba_set_drvdata(adev, ldata);

	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
	dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));

	/* Enable the clockwatch on ST Variants */
	if (vendor->clockwatch)
		writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
		       ldata->base + RTC_CR);

	/*
	 * On ST PL031 variants, the RTC reset value does not provide correct
	 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
	 */
	if (vendor->st_weekday) {
		if (readl(ldata->base + RTC_YDR) == 0x2000) {
			time = readl(ldata->base + RTC_DR);
			if ((time &
			     (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
			    == 0x02120000) {
				time = time | (0x7 << RTC_WDAY_SHIFT);
				writel(0x2000, ldata->base + RTC_YLR);
				writel(time, ldata->base + RTC_LR);
			}
		}
	}

	ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
					THIS_MODULE);
	if (IS_ERR(ldata->rtc)) {
		ret = PTR_ERR(ldata->rtc);
		goto out_no_rtc;
	}

	if (request_irq(adev->irq[0], pl031_interrupt,
			vendor->irqflags, "rtc-pl031", ldata)) {
		ret = -EIO;
		goto out_no_irq;
	}

	return 0;

out_no_irq:
	rtc_device_unregister(ldata->rtc);
out_no_rtc:
	iounmap(ldata->base);
	amba_set_drvdata(adev, NULL);
out_no_remap:
	kfree(ldata);
out:
	amba_release_regions(adev);
err_req:

	return ret;
}

/* Operations for the original ARM version */
static struct pl031_vendor_data arm_pl031 = {
	.ops = {
		.read_time = pl031_read_time,
		.set_time = pl031_set_time,
		.read_alarm = pl031_read_alarm,
		.set_alarm = pl031_set_alarm,
		.alarm_irq_enable = pl031_alarm_irq_enable,
	},
	.irqflags = IRQF_NO_SUSPEND,
};

/* The First ST derivative */
static struct pl031_vendor_data stv1_pl031 = {
	.ops = {
		.read_time = pl031_read_time,
		.set_time = pl031_set_time,
		.read_alarm = pl031_read_alarm,
		.set_alarm = pl031_set_alarm,
		.alarm_irq_enable = pl031_alarm_irq_enable,
	},
	.clockwatch = true,
	.st_weekday = true,
	.irqflags = IRQF_NO_SUSPEND,
};

/* And the second ST derivative */
static struct pl031_vendor_data stv2_pl031 = {
	.ops = {
		.read_time = pl031_stv2_read_time,
		.set_time = pl031_stv2_set_time,
		.read_alarm = pl031_stv2_read_alarm,
		.set_alarm = pl031_stv2_set_alarm,
		.alarm_irq_enable = pl031_alarm_irq_enable,
	},
	.clockwatch = true,
	.st_weekday = true,
	/*
	 * This variant shares the IRQ with another block and must not
	 * suspend that IRQ line.
	 */
	.irqflags = IRQF_SHARED | IRQF_NO_SUSPEND,
};

static struct amba_id pl031_ids[] = {
	{
		.id = 0x00041031,
		.mask = 0x000fffff,
		.data = &arm_pl031,
	},
	/* ST Micro variants */
	{
		.id = 0x00180031,
		.mask = 0x00ffffff,
		.data = &stv1_pl031,
	},
	{
		.id = 0x00280031,
		.mask = 0x00ffffff,
		.data = &stv2_pl031,
	},
	{0, 0},
};

MODULE_DEVICE_TABLE(amba, pl031_ids);

static struct amba_driver pl031_driver = {
	.drv = {
		.name = "rtc-pl031",
	},
	.id_table = pl031_ids,
	.probe = pl031_probe,
	.remove = pl031_remove,
};

module_amba_driver(pl031_driver);

MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
8ae6e163 DS	1	/*
	2	* drivers/rtc/rtc-pl031.c
	3	*
	4	* Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
	5	*
	6	* Author: Deepak Saxena <dsaxena@plexity.net>
	7	*
	8	* Copyright 2006 (c) MontaVista Software, Inc.
	9	*
c72881e8 LW	10	* Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
	11	* Copyright 2010 (c) ST-Ericsson AB
	12	*
8ae6e163 DS	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License
	15	* as published by the Free Software Foundation; either version
	16	* 2 of the License, or (at your option) any later version.
	17	*/
8ae6e163 DS	18	#include <linux/module.h>
	19	#include <linux/rtc.h>
	20	#include <linux/init.h>
8ae6e163	21	#include <linux/interrupt.h>
8ae6e163	22	#include <linux/amba/bus.h>
2dba8518	23	#include <linux/io.h>
c72881e8 LW	24	#include <linux/bcd.h>
c72881e8 LW	25	#include <linux/delay.h>
5a0e3ad6	26	#include <linux/slab.h>
8ae6e163 DS	27
	28	/*
	29	* Register definitions
	30	*/
	31	#define RTC_DR 0x00 /* Data read register */
	32	#define RTC_MR 0x04 /* Match register */
	33	#define RTC_LR 0x08 /* Data load register */
	34	#define RTC_CR 0x0c /* Control register */
	35	#define RTC_IMSC 0x10 /* Interrupt mask and set register */
	36	#define RTC_RIS 0x14 /* Raw interrupt status register */
	37	#define RTC_MIS 0x18 /* Masked interrupt status register */
	38	#define RTC_ICR 0x1c /* Interrupt clear register */
c72881e8 LW	39	/* ST variants have additional timer functionality */
	40	#define RTC_TDR 0x20 /* Timer data read register */
	41	#define RTC_TLR 0x24 /* Timer data load register */
	42	#define RTC_TCR 0x28 /* Timer control register */
	43	#define RTC_YDR 0x30 /* Year data read register */
	44	#define RTC_YMR 0x34 /* Year match register */
	45	#define RTC_YLR 0x38 /* Year data load register */
	46
	47	#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
	48
	49	#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
	50
	51	/* Common bit definitions for Interrupt status and control registers */
	52	#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
	53	#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
	54
	55	/* Common bit definations for ST v2 for reading/writing time */
	56	#define RTC_SEC_SHIFT 0
	57	#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
	58	#define RTC_MIN_SHIFT 6
	59	#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
	60	#define RTC_HOUR_SHIFT 12
	61	#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
	62	#define RTC_WDAY_SHIFT 17
	63	#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
	64	#define RTC_MDAY_SHIFT 20
	65	#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
	66	#define RTC_MON_SHIFT 25
	67	#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
	68
	69	#define RTC_TIMER_FREQ 32768
8ae6e163	70
aff05ed5 LW	71	/**
	72	* struct pl031_vendor_data - per-vendor variations
	73	* @ops: the vendor-specific operations used on this silicon version
1bb457fc LW	74	* @clockwatch: if this is an ST Microelectronics silicon version with a
	75	* clockwatch function
	76	* @st_weekday: if this is an ST Microelectronics silicon version that need
	77	* the weekday fix
559a6fc0	78	* @irqflags: special IRQ flags per variant
aff05ed5 LW	79	*/
	80	struct pl031_vendor_data {
	81	struct rtc_class_ops ops;
1bb457fc LW	82	bool clockwatch;
1bb457fc LW	83	bool st_weekday;
559a6fc0	84	unsigned long irqflags;
aff05ed5 LW	85	};
aff05ed5 LW	86
8ae6e163	87	struct pl031_local {
aff05ed5	88	struct pl031_vendor_data *vendor;
8ae6e163 DS	89	struct rtc_device *rtc;
	90	void __iomem *base;
	91	};
	92
c72881e8 LW	93	static int pl031_alarm_irq_enable(struct device *dev,
	94	unsigned int enabled)
	95	{
	96	struct pl031_local *ldata = dev_get_drvdata(dev);
	97	unsigned long imsc;
	98
	99	/* Clear any pending alarm interrupts. */
	100	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
	101
	102	imsc = readl(ldata->base + RTC_IMSC);
	103
	104	if (enabled == 1)
	105	writel(imsc \| RTC_BIT_AI, ldata->base + RTC_IMSC);
	106	else
	107	writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
	108
	109	return 0;
	110	}
	111
	112	/*
	113	* Convert Gregorian date to ST v2 RTC format.
	114	*/
	115	static int pl031_stv2_tm_to_time(struct device *dev,
	116	struct rtc_time tm, unsigned long st_time,
	117	unsigned long *bcd_year)
	118	{
	119	int year = tm->tm_year + 1900;
	120	int wday = tm->tm_wday;
	121
	122	/* wday masking is not working in hardware so wday must be valid */
	123	if (wday < -1 \|\| wday > 6) {
	124	dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
	125	return -EINVAL;
	126	} else if (wday == -1) {
	127	/* wday is not provided, calculate it here */
	128	unsigned long time;
	129	struct rtc_time calc_tm;
	130
	131	rtc_tm_to_time(tm, &time);
	132	rtc_time_to_tm(time, &calc_tm);
	133	wday = calc_tm.tm_wday;
	134	}
	135
	136	*bcd_year = (bin2bcd(year % 100) \| bin2bcd(year / 100) << 8);
	137
	138	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
	139	\| (tm->tm_mday << RTC_MDAY_SHIFT)
	140	\| ((wday + 1) << RTC_WDAY_SHIFT)
	141	\| (tm->tm_hour << RTC_HOUR_SHIFT)
	142	\| (tm->tm_min << RTC_MIN_SHIFT)
	143	\| (tm->tm_sec << RTC_SEC_SHIFT);
	144
	145	return 0;
	146	}
	147
	148	/*
	149	* Convert ST v2 RTC format to Gregorian date.
	150	*/
	151	static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
	152	struct rtc_time *tm)
	153	{
	154	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
	155	tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
	156	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
157	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
158	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
159	tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
160	tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
161
162	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
163	tm->tm_year -= 1900;
164
165	return 0;
166	}
167
168	static int pl031_stv2_read_time(struct device dev, struct rtc_time tm)
169	{
170	struct pl031_local *ldata = dev_get_drvdata(dev);
171
172	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
173	readl(ldata->base + RTC_YDR), tm);
174
175	return 0;
176	}
177
178	static int pl031_stv2_set_time(struct device dev, struct rtc_time tm)
179	{
180	unsigned long time;
181	unsigned long bcd_year;
182	struct pl031_local *ldata = dev_get_drvdata(dev);
183	int ret;
184
185	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
186	if (ret == 0) {
187	writel(bcd_year, ldata->base + RTC_YLR);
188	writel(time, ldata->base + RTC_LR);
189	}
190
191	return ret;
192	}
193
194	static int pl031_stv2_read_alarm(struct device dev, struct rtc_wkalrm alarm)
8ae6e163	195	{
c72881e8 LW	196	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 LW	197	int ret;
8ae6e163	198
c72881e8 LW	199	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
c72881e8 LW	200	readl(ldata->base + RTC_YMR), &alarm->time);
8ae6e163	201
c72881e8 LW	202	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	203	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
	204
	205	return ret;
8ae6e163 DS	206	}
8ae6e163 DS	207
c72881e8	208	static int pl031_stv2_set_alarm(struct device dev, struct rtc_wkalrm alarm)
8ae6e163 DS	209	{
8ae6e163 DS	210	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 LW	211	unsigned long time;
	212	unsigned long bcd_year;
	213	int ret;
	214
	215	/* At the moment, we can only deal with non-wildcarded alarm times. */
	216	ret = rtc_valid_tm(&alarm->time);
	217	if (ret == 0) {
	218	ret = pl031_stv2_tm_to_time(dev, &alarm->time,
	219	&time, &bcd_year);
	220	if (ret == 0) {
	221	writel(bcd_year, ldata->base + RTC_YMR);
	222	writel(time, ldata->base + RTC_MR);
	223
	224	pl031_alarm_irq_enable(dev, alarm->enabled);
	225	}
	226	}
	227
	228	return ret;
	229	}
	230
	231	static irqreturn_t pl031_interrupt(int irq, void *dev_id)
	232	{
	233	struct pl031_local *ldata = dev_id;
	234	unsigned long rtcmis;
	235	unsigned long events = 0;
	236
	237	rtcmis = readl(ldata->base + RTC_MIS);
ac2dee59 RK	238	if (rtcmis & RTC_BIT_AI) {
	239	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
	240	events \|= (RTC_AF \| RTC_IRQF);
c72881e8	241	rtc_update_irq(ldata->rtc, 1, events);
8ae6e163	242
c72881e8	243	return IRQ_HANDLED;
8ae6e163 DS	244	}
8ae6e163 DS	245
c72881e8	246	return IRQ_NONE;
8ae6e163 DS	247	}
	248
	249	static int pl031_read_time(struct device dev, struct rtc_time tm)
	250	{
	251	struct pl031_local *ldata = dev_get_drvdata(dev);
	252
2934d6a8	253	rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
8ae6e163 DS	254
	255	return 0;
	256	}
	257
	258	static int pl031_set_time(struct device dev, struct rtc_time tm)
	259	{
	260	unsigned long time;
	261	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8	262	int ret;
8ae6e163	263
c72881e8	264	ret = rtc_tm_to_time(tm, &time);
8ae6e163	265
c72881e8 LW	266	if (ret == 0)
	267	writel(time, ldata->base + RTC_LR);
	268
	269	return ret;
8ae6e163 DS	270	}
	271
	272	static int pl031_read_alarm(struct device dev, struct rtc_wkalrm alarm)
	273	{
	274	struct pl031_local *ldata = dev_get_drvdata(dev);
	275
2934d6a8	276	rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
c72881e8 LW	277
	278	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	279	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
8ae6e163 DS	280
	281	return 0;
	282	}
	283
	284	static int pl031_set_alarm(struct device dev, struct rtc_wkalrm alarm)
	285	{
	286	struct pl031_local *ldata = dev_get_drvdata(dev);
	287	unsigned long time;
c72881e8 LW	288	int ret;
	289
	290	/* At the moment, we can only deal with non-wildcarded alarm times. */
	291	ret = rtc_valid_tm(&alarm->time);
	292	if (ret == 0) {
	293	ret = rtc_tm_to_time(&alarm->time, &time);
	294	if (ret == 0) {
	295	writel(time, ldata->base + RTC_MR);
	296	pl031_alarm_irq_enable(dev, alarm->enabled);
	297	}
	298	}
	299
	300	return ret;
	301	}
	302
8ae6e163 DS	303	static int pl031_remove(struct amba_device *adev)
	304	{
	305	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
	306
2dba8518 RK	307	amba_set_drvdata(adev, NULL);
	308	free_irq(adev->irq[0], ldata->rtc);
	309	rtc_device_unregister(ldata->rtc);
	310	iounmap(ldata->base);
	311	kfree(ldata);
	312	amba_release_regions(adev);
8ae6e163 DS	313
	314	return 0;
	315	}
	316
aa25afad	317	static int pl031_probe(struct amba_device adev, const struct amba_id id)
8ae6e163 DS	318	{
	319	int ret;
	320	struct pl031_local *ldata;
aff05ed5 LW	321	struct pl031_vendor_data *vendor = id->data;
aff05ed5 LW	322	struct rtc_class_ops *ops = &vendor->ops;
c0a5f4a0	323	unsigned long time;
8ae6e163	324
2dba8518 RK	325	ret = amba_request_regions(adev, NULL);
	326	if (ret)
	327	goto err_req;
8ae6e163	328
c72881e8	329	ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
8ae6e163 DS	330	if (!ldata) {
	331	ret = -ENOMEM;
	332	goto out;
	333	}
aff05ed5	334	ldata->vendor = vendor;
8ae6e163	335
dc890c2d	336	ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
c72881e8	337
8ae6e163 DS	338	if (!ldata->base) {
	339	ret = -ENOMEM;
	340	goto out_no_remap;
	341	}
	342
2dba8518 RK	343	amba_set_drvdata(adev, ldata);
2dba8518 RK	344
1bb457fc LW	345	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
1bb457fc LW	346	dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
8ae6e163	347
c72881e8	348	/* Enable the clockwatch on ST Variants */
1bb457fc	349	if (vendor->clockwatch)
c72881e8 LW	350	writel(readl(ldata->base + RTC_CR) \| RTC_CR_CWEN,
	351	ldata->base + RTC_CR);
	352
c0a5f4a0 RK	353	/*
	354	* On ST PL031 variants, the RTC reset value does not provide correct
	355	* weekday for 2000-01-01. Correct the erroneous sunday to saturday.
	356	*/
1bb457fc	357	if (vendor->st_weekday) {
c0a5f4a0 RK	358	if (readl(ldata->base + RTC_YDR) == 0x2000) {
	359	time = readl(ldata->base + RTC_DR);
	360	if ((time &
	361	(RTC_MON_MASK \| RTC_MDAY_MASK \| RTC_WDAY_MASK))
	362	== 0x02120000) {
	363	time = time \| (0x7 << RTC_WDAY_SHIFT);
	364	writel(0x2000, ldata->base + RTC_YLR);
	365	writel(time, ldata->base + RTC_LR);
	366	}
	367	}
	368	}
	369
c72881e8 LW	370	ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
c72881e8 LW	371	THIS_MODULE);
8ae6e163 DS	372	if (IS_ERR(ldata->rtc)) {
	373	ret = PTR_ERR(ldata->rtc);
	374	goto out_no_rtc;
	375	}
	376
c72881e8	377	if (request_irq(adev->irq[0], pl031_interrupt,
559a6fc0	378	vendor->irqflags, "rtc-pl031", ldata)) {
c72881e8 LW	379	ret = -EIO;
	380	goto out_no_irq;
	381	}
	382
8ae6e163 DS	383	return 0;
8ae6e163 DS	384
8ae6e163	385	out_no_irq:
c72881e8 LW	386	rtc_device_unregister(ldata->rtc);
c72881e8 LW	387	out_no_rtc:
8ae6e163	388	iounmap(ldata->base);
2dba8518	389	amba_set_drvdata(adev, NULL);
8ae6e163	390	out_no_remap:
8ae6e163 DS	391	kfree(ldata);
8ae6e163 DS	392	out:
2dba8518 RK	393	amba_release_regions(adev);
2dba8518 RK	394	err_req:
c72881e8	395
8ae6e163 DS	396	return ret;
	397	}
	398
c72881e8	399	/* Operations for the original ARM version */
aff05ed5 LW	400	static struct pl031_vendor_data arm_pl031 = {
	401	.ops = {
	402	.read_time = pl031_read_time,
	403	.set_time = pl031_set_time,
	404	.read_alarm = pl031_read_alarm,
	405	.set_alarm = pl031_set_alarm,
	406	.alarm_irq_enable = pl031_alarm_irq_enable,
	407	},
559a6fc0	408	.irqflags = IRQF_NO_SUSPEND,
c72881e8 LW	409	};
	410
	411	/* The First ST derivative */
aff05ed5 LW	412	static struct pl031_vendor_data stv1_pl031 = {
	413	.ops = {
	414	.read_time = pl031_read_time,
	415	.set_time = pl031_set_time,
	416	.read_alarm = pl031_read_alarm,
	417	.set_alarm = pl031_set_alarm,
	418	.alarm_irq_enable = pl031_alarm_irq_enable,
	419	},
1bb457fc LW	420	.clockwatch = true,
1bb457fc LW	421	.st_weekday = true,
559a6fc0	422	.irqflags = IRQF_NO_SUSPEND,
c72881e8 LW	423	};
	424
	425	/* And the second ST derivative */
aff05ed5 LW	426	static struct pl031_vendor_data stv2_pl031 = {
	427	.ops = {
	428	.read_time = pl031_stv2_read_time,
	429	.set_time = pl031_stv2_set_time,
	430	.read_alarm = pl031_stv2_read_alarm,
	431	.set_alarm = pl031_stv2_set_alarm,
	432	.alarm_irq_enable = pl031_alarm_irq_enable,
	433	},
1bb457fc LW	434	.clockwatch = true,
1bb457fc LW	435	.st_weekday = true,
559a6fc0 MW	436	/*
	437	* This variant shares the IRQ with another block and must not
	438	* suspend that IRQ line.
	439	*/
	440	.irqflags = IRQF_SHARED \| IRQF_NO_SUSPEND,
c72881e8 LW	441	};
c72881e8 LW	442
2c39c9e1	443	static struct amba_id pl031_ids[] = {
8ae6e163	444	{
2934d6a8 LW	445	.id = 0x00041031,
2934d6a8 LW	446	.mask = 0x000fffff,
aff05ed5	447	.data = &arm_pl031,
c72881e8 LW	448	},
	449	/* ST Micro variants */
	450	{
	451	.id = 0x00180031,
	452	.mask = 0x00ffffff,
aff05ed5	453	.data = &stv1_pl031,
c72881e8 LW	454	},
	455	{
	456	.id = 0x00280031,
	457	.mask = 0x00ffffff,
aff05ed5	458	.data = &stv2_pl031,
2934d6a8	459	},
8ae6e163 DS	460	{0, 0},
	461	};
	462
f5feac2a DM	463	MODULE_DEVICE_TABLE(amba, pl031_ids);
f5feac2a DM	464
8ae6e163 DS	465	static struct amba_driver pl031_driver = {
	466	.drv = {
	467	.name = "rtc-pl031",
	468	},
	469	.id_table = pl031_ids,
	470	.probe = pl031_probe,
	471	.remove = pl031_remove,
	472	};
	473
9e5ed094	474	module_amba_driver(pl031_driver);
8ae6e163 DS	475
	476	MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
	477	MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
	478	MODULE_LICENSE("GPL");