Merge tag 'cpumask-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty...
[deliverable/linux.git] / drivers / rtc / rtc-pl031.c
CommitLineData
8ae6e163
DS
1/*
2 * drivers/rtc/rtc-pl031.c
3 *
4 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
5 *
6 * Author: Deepak Saxena <dsaxena@plexity.net>
7 *
8 * Copyright 2006 (c) MontaVista Software, Inc.
9 *
c72881e8
LW
10 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
11 * Copyright 2010 (c) ST-Ericsson AB
12 *
8ae6e163
DS
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
8ae6e163
DS
18#include <linux/module.h>
19#include <linux/rtc.h>
20#include <linux/init.h>
8ae6e163 21#include <linux/interrupt.h>
8ae6e163 22#include <linux/amba/bus.h>
2dba8518 23#include <linux/io.h>
c72881e8
LW
24#include <linux/bcd.h>
25#include <linux/delay.h>
5a0e3ad6 26#include <linux/slab.h>
8ae6e163
DS
27
28/*
29 * Register definitions
30 */
31#define RTC_DR 0x00 /* Data read register */
32#define RTC_MR 0x04 /* Match register */
33#define RTC_LR 0x08 /* Data load register */
34#define RTC_CR 0x0c /* Control register */
35#define RTC_IMSC 0x10 /* Interrupt mask and set register */
36#define RTC_RIS 0x14 /* Raw interrupt status register */
37#define RTC_MIS 0x18 /* Masked interrupt status register */
38#define RTC_ICR 0x1c /* Interrupt clear register */
c72881e8
LW
39/* ST variants have additional timer functionality */
40#define RTC_TDR 0x20 /* Timer data read register */
41#define RTC_TLR 0x24 /* Timer data load register */
42#define RTC_TCR 0x28 /* Timer control register */
43#define RTC_YDR 0x30 /* Year data read register */
44#define RTC_YMR 0x34 /* Year match register */
45#define RTC_YLR 0x38 /* Year data load register */
46
47#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
48
49#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
50
51/* Common bit definitions for Interrupt status and control registers */
52#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
53#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
54
55/* Common bit definations for ST v2 for reading/writing time */
56#define RTC_SEC_SHIFT 0
57#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
58#define RTC_MIN_SHIFT 6
59#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
60#define RTC_HOUR_SHIFT 12
61#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
62#define RTC_WDAY_SHIFT 17
63#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
64#define RTC_MDAY_SHIFT 20
65#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
66#define RTC_MON_SHIFT 25
67#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
68
69#define RTC_TIMER_FREQ 32768
8ae6e163
DS
70
71struct pl031_local {
72 struct rtc_device *rtc;
73 void __iomem *base;
c72881e8
LW
74 u8 hw_designer;
75 u8 hw_revision:4;
8ae6e163
DS
76};
77
c72881e8
LW
78static int pl031_alarm_irq_enable(struct device *dev,
79 unsigned int enabled)
80{
81 struct pl031_local *ldata = dev_get_drvdata(dev);
82 unsigned long imsc;
83
84 /* Clear any pending alarm interrupts. */
85 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
86
87 imsc = readl(ldata->base + RTC_IMSC);
88
89 if (enabled == 1)
90 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
91 else
92 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
93
94 return 0;
95}
96
97/*
98 * Convert Gregorian date to ST v2 RTC format.
99 */
100static int pl031_stv2_tm_to_time(struct device *dev,
101 struct rtc_time *tm, unsigned long *st_time,
102 unsigned long *bcd_year)
103{
104 int year = tm->tm_year + 1900;
105 int wday = tm->tm_wday;
106
107 /* wday masking is not working in hardware so wday must be valid */
108 if (wday < -1 || wday > 6) {
109 dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
110 return -EINVAL;
111 } else if (wday == -1) {
112 /* wday is not provided, calculate it here */
113 unsigned long time;
114 struct rtc_time calc_tm;
115
116 rtc_tm_to_time(tm, &time);
117 rtc_time_to_tm(time, &calc_tm);
118 wday = calc_tm.tm_wday;
119 }
120
121 *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
122
123 *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
124 | (tm->tm_mday << RTC_MDAY_SHIFT)
125 | ((wday + 1) << RTC_WDAY_SHIFT)
126 | (tm->tm_hour << RTC_HOUR_SHIFT)
127 | (tm->tm_min << RTC_MIN_SHIFT)
128 | (tm->tm_sec << RTC_SEC_SHIFT);
129
130 return 0;
131}
132
133/*
134 * Convert ST v2 RTC format to Gregorian date.
135 */
136static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
137 struct rtc_time *tm)
138{
139 tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
140 tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
141 tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
142 tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
143 tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
144 tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
145 tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
146
147 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
148 tm->tm_year -= 1900;
149
150 return 0;
151}
152
153static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
154{
155 struct pl031_local *ldata = dev_get_drvdata(dev);
156
157 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
158 readl(ldata->base + RTC_YDR), tm);
159
160 return 0;
161}
162
163static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
164{
165 unsigned long time;
166 unsigned long bcd_year;
167 struct pl031_local *ldata = dev_get_drvdata(dev);
168 int ret;
169
170 ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
171 if (ret == 0) {
172 writel(bcd_year, ldata->base + RTC_YLR);
173 writel(time, ldata->base + RTC_LR);
174 }
175
176 return ret;
177}
178
179static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
8ae6e163 180{
c72881e8
LW
181 struct pl031_local *ldata = dev_get_drvdata(dev);
182 int ret;
8ae6e163 183
c72881e8
LW
184 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
185 readl(ldata->base + RTC_YMR), &alarm->time);
8ae6e163 186
c72881e8
LW
187 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
188 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
189
190 return ret;
8ae6e163
DS
191}
192
c72881e8 193static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
8ae6e163
DS
194{
195 struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8
LW
196 unsigned long time;
197 unsigned long bcd_year;
198 int ret;
199
200 /* At the moment, we can only deal with non-wildcarded alarm times. */
201 ret = rtc_valid_tm(&alarm->time);
202 if (ret == 0) {
203 ret = pl031_stv2_tm_to_time(dev, &alarm->time,
204 &time, &bcd_year);
205 if (ret == 0) {
206 writel(bcd_year, ldata->base + RTC_YMR);
207 writel(time, ldata->base + RTC_MR);
208
209 pl031_alarm_irq_enable(dev, alarm->enabled);
210 }
211 }
212
213 return ret;
214}
215
216static irqreturn_t pl031_interrupt(int irq, void *dev_id)
217{
218 struct pl031_local *ldata = dev_id;
219 unsigned long rtcmis;
220 unsigned long events = 0;
221
222 rtcmis = readl(ldata->base + RTC_MIS);
ac2dee59
RK
223 if (rtcmis & RTC_BIT_AI) {
224 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
225 events |= (RTC_AF | RTC_IRQF);
c72881e8 226 rtc_update_irq(ldata->rtc, 1, events);
8ae6e163 227
c72881e8 228 return IRQ_HANDLED;
8ae6e163
DS
229 }
230
c72881e8 231 return IRQ_NONE;
8ae6e163
DS
232}
233
234static int pl031_read_time(struct device *dev, struct rtc_time *tm)
235{
236 struct pl031_local *ldata = dev_get_drvdata(dev);
237
2934d6a8 238 rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
8ae6e163
DS
239
240 return 0;
241}
242
243static int pl031_set_time(struct device *dev, struct rtc_time *tm)
244{
245 unsigned long time;
246 struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 247 int ret;
8ae6e163 248
c72881e8 249 ret = rtc_tm_to_time(tm, &time);
8ae6e163 250
c72881e8
LW
251 if (ret == 0)
252 writel(time, ldata->base + RTC_LR);
253
254 return ret;
8ae6e163
DS
255}
256
257static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
258{
259 struct pl031_local *ldata = dev_get_drvdata(dev);
260
2934d6a8 261 rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
c72881e8
LW
262
263 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
264 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
8ae6e163
DS
265
266 return 0;
267}
268
269static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
270{
271 struct pl031_local *ldata = dev_get_drvdata(dev);
272 unsigned long time;
c72881e8
LW
273 int ret;
274
275 /* At the moment, we can only deal with non-wildcarded alarm times. */
276 ret = rtc_valid_tm(&alarm->time);
277 if (ret == 0) {
278 ret = rtc_tm_to_time(&alarm->time, &time);
279 if (ret == 0) {
280 writel(time, ldata->base + RTC_MR);
281 pl031_alarm_irq_enable(dev, alarm->enabled);
282 }
283 }
284
285 return ret;
286}
287
8ae6e163
DS
288static int pl031_remove(struct amba_device *adev)
289{
290 struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
291
2dba8518
RK
292 amba_set_drvdata(adev, NULL);
293 free_irq(adev->irq[0], ldata->rtc);
294 rtc_device_unregister(ldata->rtc);
295 iounmap(ldata->base);
296 kfree(ldata);
297 amba_release_regions(adev);
8ae6e163
DS
298
299 return 0;
300}
301
aa25afad 302static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
8ae6e163
DS
303{
304 int ret;
305 struct pl031_local *ldata;
c72881e8 306 struct rtc_class_ops *ops = id->data;
c0a5f4a0 307 unsigned long time;
8ae6e163 308
2dba8518
RK
309 ret = amba_request_regions(adev, NULL);
310 if (ret)
311 goto err_req;
8ae6e163 312
c72881e8 313 ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
8ae6e163
DS
314 if (!ldata) {
315 ret = -ENOMEM;
316 goto out;
317 }
8ae6e163 318
dc890c2d 319 ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
c72881e8 320
8ae6e163
DS
321 if (!ldata->base) {
322 ret = -ENOMEM;
323 goto out_no_remap;
324 }
325
2dba8518
RK
326 amba_set_drvdata(adev, ldata);
327
c72881e8
LW
328 ldata->hw_designer = amba_manf(adev);
329 ldata->hw_revision = amba_rev(adev);
330
331 dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer);
332 dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision);
8ae6e163 333
c72881e8 334 /* Enable the clockwatch on ST Variants */
2f397216 335 if (ldata->hw_designer == AMBA_VENDOR_ST)
c72881e8
LW
336 writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
337 ldata->base + RTC_CR);
338
c0a5f4a0
RK
339 /*
340 * On ST PL031 variants, the RTC reset value does not provide correct
341 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
342 */
343 if (ldata->hw_designer == AMBA_VENDOR_ST) {
344 if (readl(ldata->base + RTC_YDR) == 0x2000) {
345 time = readl(ldata->base + RTC_DR);
346 if ((time &
347 (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
348 == 0x02120000) {
349 time = time | (0x7 << RTC_WDAY_SHIFT);
350 writel(0x2000, ldata->base + RTC_YLR);
351 writel(time, ldata->base + RTC_LR);
352 }
353 }
354 }
355
c72881e8
LW
356 ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
357 THIS_MODULE);
8ae6e163
DS
358 if (IS_ERR(ldata->rtc)) {
359 ret = PTR_ERR(ldata->rtc);
360 goto out_no_rtc;
361 }
362
c72881e8 363 if (request_irq(adev->irq[0], pl031_interrupt,
2f6e5f94 364 0, "rtc-pl031", ldata)) {
c72881e8
LW
365 ret = -EIO;
366 goto out_no_irq;
367 }
368
8ae6e163
DS
369 return 0;
370
8ae6e163 371out_no_irq:
c72881e8
LW
372 rtc_device_unregister(ldata->rtc);
373out_no_rtc:
8ae6e163 374 iounmap(ldata->base);
2dba8518 375 amba_set_drvdata(adev, NULL);
8ae6e163 376out_no_remap:
8ae6e163
DS
377 kfree(ldata);
378out:
2dba8518
RK
379 amba_release_regions(adev);
380err_req:
c72881e8 381
8ae6e163
DS
382 return ret;
383}
384
c72881e8
LW
385/* Operations for the original ARM version */
386static struct rtc_class_ops arm_pl031_ops = {
387 .read_time = pl031_read_time,
388 .set_time = pl031_set_time,
389 .read_alarm = pl031_read_alarm,
390 .set_alarm = pl031_set_alarm,
391 .alarm_irq_enable = pl031_alarm_irq_enable,
392};
393
394/* The First ST derivative */
395static struct rtc_class_ops stv1_pl031_ops = {
396 .read_time = pl031_read_time,
397 .set_time = pl031_set_time,
398 .read_alarm = pl031_read_alarm,
399 .set_alarm = pl031_set_alarm,
400 .alarm_irq_enable = pl031_alarm_irq_enable,
c72881e8
LW
401};
402
403/* And the second ST derivative */
404static struct rtc_class_ops stv2_pl031_ops = {
405 .read_time = pl031_stv2_read_time,
406 .set_time = pl031_stv2_set_time,
407 .read_alarm = pl031_stv2_read_alarm,
408 .set_alarm = pl031_stv2_set_alarm,
409 .alarm_irq_enable = pl031_alarm_irq_enable,
c72881e8
LW
410};
411
2c39c9e1 412static struct amba_id pl031_ids[] = {
8ae6e163 413 {
2934d6a8
LW
414 .id = 0x00041031,
415 .mask = 0x000fffff,
c72881e8
LW
416 .data = &arm_pl031_ops,
417 },
418 /* ST Micro variants */
419 {
420 .id = 0x00180031,
421 .mask = 0x00ffffff,
422 .data = &stv1_pl031_ops,
423 },
424 {
425 .id = 0x00280031,
426 .mask = 0x00ffffff,
427 .data = &stv2_pl031_ops,
2934d6a8 428 },
8ae6e163
DS
429 {0, 0},
430};
431
f5feac2a
DM
432MODULE_DEVICE_TABLE(amba, pl031_ids);
433
8ae6e163
DS
434static struct amba_driver pl031_driver = {
435 .drv = {
436 .name = "rtc-pl031",
437 },
438 .id_table = pl031_ids,
439 .probe = pl031_probe,
440 .remove = pl031_remove,
441};
442
9e5ed094 443module_amba_driver(pl031_driver);
8ae6e163
DS
444
445MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
446MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
447MODULE_LICENSE("GPL");
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