Commit | Line | Data |
---|---|---|
7520b94d | 1 | /* |
37fc5e2c | 2 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
7520b94d AZ |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> | |
5 | * Copyright (C) 2006 Tower Technologies | |
0053dc0d | 6 | * Copyright (C) 2008 Paul Mundt |
7520b94d AZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/i2c.h> | |
14 | #include <linux/rtc.h> | |
15 | #include <linux/bcd.h> | |
5a0e3ad6 | 16 | #include <linux/slab.h> |
2113852b | 17 | #include <linux/module.h> |
7520b94d | 18 | |
0053dc0d | 19 | #define DRV_VERSION "0.6" |
7520b94d | 20 | |
cb26b572 DB |
21 | |
22 | /* | |
23 | * Ricoh has a family of I2C based RTCs, which differ only slightly from | |
24 | * each other. Differences center on pinout (e.g. how many interrupts, | |
25 | * output clock, etc) and how the control registers are used. The '372 | |
26 | * is significant only because that's the one this driver first supported. | |
27 | */ | |
7520b94d AZ |
28 | #define RS5C372_REG_SECS 0 |
29 | #define RS5C372_REG_MINS 1 | |
30 | #define RS5C372_REG_HOURS 2 | |
31 | #define RS5C372_REG_WDAY 3 | |
32 | #define RS5C372_REG_DAY 4 | |
33 | #define RS5C372_REG_MONTH 5 | |
34 | #define RS5C372_REG_YEAR 6 | |
35 | #define RS5C372_REG_TRIM 7 | |
cb26b572 DB |
36 | # define RS5C372_TRIM_XSL 0x80 |
37 | # define RS5C372_TRIM_MASK 0x7F | |
38 | ||
39 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ | |
40 | #define RS5C_REG_ALARM_A_HOURS 9 | |
41 | #define RS5C_REG_ALARM_A_WDAY 10 | |
42 | ||
43 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ | |
44 | #define RS5C_REG_ALARM_B_HOURS 12 | |
45 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ | |
46 | ||
47 | #define RS5C_REG_CTRL1 14 | |
48 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ | |
49 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ | |
50 | # define RV5C387_CTRL1_24 (1 << 5) | |
51 | # define RS5C372A_CTRL1_SL1 (1 << 5) | |
52 | # define RS5C_CTRL1_CT_MASK (7 << 0) | |
53 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ | |
54 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ | |
55 | #define RS5C_REG_CTRL2 15 | |
56 | # define RS5C372_CTRL2_24 (1 << 5) | |
37fc5e2c PM |
57 | # define R2025_CTRL2_XST (1 << 5) |
58 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ | |
cb26b572 DB |
59 | # define RS5C_CTRL2_CTFG (1 << 2) |
60 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ | |
61 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ | |
62 | ||
63 | ||
64 | /* to read (style 1) or write registers starting at R */ | |
65 | #define RS5C_ADDR(R) (((R) << 4) | 0) | |
66 | ||
67 | ||
68 | enum rtc_type { | |
69 | rtc_undef = 0, | |
37fc5e2c | 70 | rtc_r2025sd, |
cb26b572 DB |
71 | rtc_rs5c372a, |
72 | rtc_rs5c372b, | |
73 | rtc_rv5c386, | |
74 | rtc_rv5c387a, | |
75 | }; | |
7520b94d | 76 | |
3760f736 | 77 | static const struct i2c_device_id rs5c372_id[] = { |
37fc5e2c | 78 | { "r2025sd", rtc_r2025sd }, |
3760f736 JD |
79 | { "rs5c372a", rtc_rs5c372a }, |
80 | { "rs5c372b", rtc_rs5c372b }, | |
81 | { "rv5c386", rtc_rv5c386 }, | |
82 | { "rv5c387a", rtc_rv5c387a }, | |
83 | { } | |
84 | }; | |
85 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); | |
86 | ||
cb26b572 DB |
87 | /* REVISIT: this assumes that: |
88 | * - we're in the 21st century, so it's safe to ignore the century | |
89 | * bit for rv5c38[67] (REG_MONTH bit 7); | |
90 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) | |
91 | */ | |
92 | struct rs5c372 { | |
93 | struct i2c_client *client; | |
94 | struct rtc_device *rtc; | |
95 | enum rtc_type type; | |
96 | unsigned time24:1; | |
97 | unsigned has_irq:1; | |
0053dc0d | 98 | unsigned smbus:1; |
cb26b572 DB |
99 | char buf[17]; |
100 | char *regs; | |
cb26b572 | 101 | }; |
7520b94d | 102 | |
cb26b572 DB |
103 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
104 | { | |
105 | struct i2c_client *client = rs5c->client; | |
106 | struct i2c_msg msgs[] = { | |
a606757f S |
107 | { |
108 | .addr = client->addr, | |
109 | .flags = I2C_M_RD, | |
110 | .len = sizeof(rs5c->buf), | |
111 | .buf = rs5c->buf | |
112 | }, | |
cb26b572 DB |
113 | }; |
114 | ||
115 | /* This implements the third reading method from the datasheet, using | |
116 | * an internal address that's reset after each transaction (by STOP) | |
117 | * to 0x0f ... so we read extra registers, and skip the first one. | |
118 | * | |
119 | * The first method doesn't work with the iop3xx adapter driver, on at | |
120 | * least 80219 chips; this works around that bug. | |
0053dc0d PM |
121 | * |
122 | * The third method on the other hand doesn't work for the SMBus-only | |
123 | * configurations, so we use the the first method there, stripping off | |
124 | * the extra register in the process. | |
cb26b572 | 125 | */ |
0053dc0d PM |
126 | if (rs5c->smbus) { |
127 | int addr = RS5C_ADDR(RS5C372_REG_SECS); | |
128 | int size = sizeof(rs5c->buf) - 1; | |
129 | ||
130 | if (i2c_smbus_read_i2c_block_data(client, addr, size, | |
131 | rs5c->buf + 1) != size) { | |
132 | dev_warn(&client->dev, "can't read registers\n"); | |
133 | return -EIO; | |
134 | } | |
135 | } else { | |
136 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { | |
137 | dev_warn(&client->dev, "can't read registers\n"); | |
138 | return -EIO; | |
139 | } | |
cb26b572 | 140 | } |
7520b94d | 141 | |
cb26b572 DB |
142 | dev_dbg(&client->dev, |
143 | "%02x %02x %02x (%02x) %02x %02x %02x (%02x), " | |
144 | "%02x %02x %02x, %02x %02x %02x; %02x %02x\n", | |
145 | rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3], | |
146 | rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7], | |
147 | rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11], | |
148 | rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]); | |
7520b94d | 149 | |
cb26b572 DB |
150 | return 0; |
151 | } | |
c6f24f99 | 152 | |
cb26b572 DB |
153 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
154 | { | |
155 | unsigned hour; | |
7520b94d | 156 | |
cb26b572 | 157 | if (rs5c->time24) |
fe20ba70 | 158 | return bcd2bin(reg & 0x3f); |
cb26b572 | 159 | |
fe20ba70 | 160 | hour = bcd2bin(reg & 0x1f); |
cb26b572 DB |
161 | if (hour == 12) |
162 | hour = 0; | |
163 | if (reg & 0x20) | |
164 | hour += 12; | |
165 | return hour; | |
166 | } | |
167 | ||
168 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) | |
7520b94d | 169 | { |
cb26b572 | 170 | if (rs5c->time24) |
fe20ba70 | 171 | return bin2bcd(hour); |
cb26b572 DB |
172 | |
173 | if (hour > 12) | |
fe20ba70 | 174 | return 0x20 | bin2bcd(hour - 12); |
cb26b572 | 175 | if (hour == 12) |
fe20ba70 | 176 | return 0x20 | bin2bcd(12); |
cb26b572 | 177 | if (hour == 0) |
fe20ba70 AB |
178 | return bin2bcd(12); |
179 | return bin2bcd(hour); | |
cb26b572 | 180 | } |
7520b94d | 181 | |
cb26b572 DB |
182 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
183 | { | |
184 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
185 | int status = rs5c_get_regs(rs5c); | |
c6f24f99 | 186 | |
cb26b572 DB |
187 | if (status < 0) |
188 | return status; | |
7520b94d | 189 | |
fe20ba70 AB |
190 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
191 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); | |
cb26b572 | 192 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
7520b94d | 193 | |
fe20ba70 AB |
194 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
195 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); | |
7520b94d AZ |
196 | |
197 | /* tm->tm_mon is zero-based */ | |
fe20ba70 | 198 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
7520b94d AZ |
199 | |
200 | /* year is 1900 + tm->tm_year */ | |
fe20ba70 | 201 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
7520b94d AZ |
202 | |
203 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | |
204 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
2a4e2b87 | 205 | __func__, |
7520b94d AZ |
206 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
207 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | |
208 | ||
cb26b572 DB |
209 | /* rtc might need initialization */ |
210 | return rtc_valid_tm(tm); | |
7520b94d AZ |
211 | } |
212 | ||
213 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
214 | { | |
cb26b572 | 215 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
11836494 | 216 | unsigned char buf[7]; |
0053dc0d | 217 | int addr; |
7520b94d | 218 | |
cb26b572 | 219 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
7520b94d | 220 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 221 | __func__, |
cb26b572 | 222 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
7520b94d AZ |
223 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
224 | ||
0053dc0d | 225 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
fe20ba70 AB |
226 | buf[0] = bin2bcd(tm->tm_sec); |
227 | buf[1] = bin2bcd(tm->tm_min); | |
0053dc0d | 228 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
fe20ba70 AB |
229 | buf[3] = bin2bcd(tm->tm_wday); |
230 | buf[4] = bin2bcd(tm->tm_mday); | |
231 | buf[5] = bin2bcd(tm->tm_mon + 1); | |
232 | buf[6] = bin2bcd(tm->tm_year - 100); | |
7520b94d | 233 | |
0053dc0d | 234 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
2a4e2b87 | 235 | dev_err(&client->dev, "%s: write error\n", __func__); |
7520b94d AZ |
236 | return -EIO; |
237 | } | |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
cb26b572 DB |
242 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
243 | #define NEED_TRIM | |
244 | #endif | |
245 | ||
246 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | |
247 | #define NEED_TRIM | |
248 | #endif | |
249 | ||
250 | #ifdef NEED_TRIM | |
7520b94d AZ |
251 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
252 | { | |
c6f24f99 | 253 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
cb26b572 | 254 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
7520b94d | 255 | |
7520b94d | 256 | if (osc) |
c6f24f99 | 257 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
7520b94d | 258 | |
17ad78e5 | 259 | if (trim) { |
2a4e2b87 | 260 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
cb26b572 DB |
261 | tmp &= RS5C372_TRIM_MASK; |
262 | if (tmp & 0x3e) { | |
263 | int t = tmp & 0x3f; | |
264 | ||
265 | if (tmp & 0x40) | |
266 | t = (~t | (s8)0xc0) + 1; | |
267 | else | |
268 | t = t - 1; | |
269 | ||
270 | tmp = t * 2; | |
271 | } else | |
272 | tmp = 0; | |
273 | *trim = tmp; | |
17ad78e5 | 274 | } |
7520b94d AZ |
275 | |
276 | return 0; | |
277 | } | |
cb26b572 | 278 | #endif |
7520b94d AZ |
279 | |
280 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
281 | { | |
282 | return rs5c372_get_datetime(to_i2c_client(dev), tm); | |
283 | } | |
284 | ||
285 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
286 | { | |
287 | return rs5c372_set_datetime(to_i2c_client(dev), tm); | |
288 | } | |
289 | ||
cb26b572 | 290 | |
16380c15 JS |
291 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
292 | { | |
293 | struct i2c_client *client = to_i2c_client(dev); | |
294 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
295 | unsigned char buf; | |
296 | int status, addr; | |
297 | ||
298 | buf = rs5c->regs[RS5C_REG_CTRL1]; | |
299 | ||
300 | if (!rs5c->has_irq) | |
301 | return -EINVAL; | |
302 | ||
303 | status = rs5c_get_regs(rs5c); | |
304 | if (status < 0) | |
305 | return status; | |
306 | ||
307 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
308 | if (enabled) | |
309 | buf |= RS5C_CTRL1_AALE; | |
310 | else | |
311 | buf &= ~RS5C_CTRL1_AALE; | |
312 | ||
313 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { | |
0c6516ea | 314 | dev_warn(dev, "can't update alarm\n"); |
16380c15 JS |
315 | status = -EIO; |
316 | } else | |
317 | rs5c->regs[RS5C_REG_CTRL1] = buf; | |
318 | ||
319 | return status; | |
320 | } | |
321 | ||
322 | ||
cb26b572 DB |
323 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
324 | * which only exposes a polled programming interface; and since | |
325 | * these calls map directly to those EFI requests; we don't demand | |
326 | * we have an IRQ for this chip when we go through this API. | |
327 | * | |
328 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs | |
329 | * though, managed through RTC_AIE_{ON,OFF} requests. | |
330 | */ | |
331 | ||
332 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
333 | { | |
334 | struct i2c_client *client = to_i2c_client(dev); | |
335 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
336 | int status; | |
337 | ||
338 | status = rs5c_get_regs(rs5c); | |
339 | if (status < 0) | |
340 | return status; | |
341 | ||
342 | /* report alarm time */ | |
343 | t->time.tm_sec = 0; | |
fe20ba70 | 344 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
cb26b572 DB |
345 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
346 | t->time.tm_mday = -1; | |
347 | t->time.tm_mon = -1; | |
348 | t->time.tm_year = -1; | |
349 | t->time.tm_wday = -1; | |
350 | t->time.tm_yday = -1; | |
351 | t->time.tm_isdst = -1; | |
352 | ||
353 | /* ... and status */ | |
354 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); | |
355 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
360 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
361 | { | |
362 | struct i2c_client *client = to_i2c_client(dev); | |
363 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
0053dc0d PM |
364 | int status, addr, i; |
365 | unsigned char buf[3]; | |
cb26b572 DB |
366 | |
367 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ | |
368 | if (t->time.tm_mday != -1 | |
369 | || t->time.tm_mon != -1 | |
370 | || t->time.tm_year != -1) | |
371 | return -EINVAL; | |
372 | ||
373 | /* REVISIT: round up tm_sec */ | |
374 | ||
375 | /* if needed, disable irq (clears pending status) */ | |
376 | status = rs5c_get_regs(rs5c); | |
377 | if (status < 0) | |
378 | return status; | |
379 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { | |
0053dc0d PM |
380 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
381 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; | |
382 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { | |
0c6516ea | 383 | dev_dbg(dev, "can't disable alarm\n"); |
cb26b572 DB |
384 | return -EIO; |
385 | } | |
0053dc0d | 386 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
387 | } |
388 | ||
389 | /* set alarm */ | |
fe20ba70 | 390 | buf[0] = bin2bcd(t->time.tm_min); |
0053dc0d PM |
391 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
392 | buf[2] = 0x7f; /* any/all days */ | |
393 | ||
394 | for (i = 0; i < sizeof(buf); i++) { | |
395 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); | |
396 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { | |
0c6516ea | 397 | dev_dbg(dev, "can't set alarm time\n"); |
0053dc0d PM |
398 | return -EIO; |
399 | } | |
cb26b572 DB |
400 | } |
401 | ||
402 | /* ... and maybe enable its irq */ | |
403 | if (t->enabled) { | |
0053dc0d PM |
404 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
405 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; | |
406 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) | |
0c6516ea | 407 | dev_warn(dev, "can't enable alarm\n"); |
0053dc0d | 408 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
409 | } |
410 | ||
411 | return 0; | |
412 | } | |
413 | ||
414 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
415 | ||
7520b94d AZ |
416 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
417 | { | |
418 | int err, osc, trim; | |
419 | ||
adfb4341 AZ |
420 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
421 | if (err == 0) { | |
cb26b572 DB |
422 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
423 | osc / 1000, osc % 1000); | |
424 | seq_printf(seq, "trim\t\t: %d\n", trim); | |
7520b94d AZ |
425 | } |
426 | ||
427 | return 0; | |
428 | } | |
429 | ||
cb26b572 DB |
430 | #else |
431 | #define rs5c372_rtc_proc NULL | |
432 | #endif | |
433 | ||
ff8371ac | 434 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
7520b94d AZ |
435 | .proc = rs5c372_rtc_proc, |
436 | .read_time = rs5c372_rtc_read_time, | |
437 | .set_time = rs5c372_rtc_set_time, | |
cb26b572 DB |
438 | .read_alarm = rs5c_read_alarm, |
439 | .set_alarm = rs5c_set_alarm, | |
16380c15 | 440 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, |
7520b94d AZ |
441 | }; |
442 | ||
cb26b572 DB |
443 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
444 | ||
7520b94d AZ |
445 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
446 | struct device_attribute *attr, char *buf) | |
447 | { | |
82896072 | 448 | int err, trim; |
7520b94d | 449 | |
82896072 AZ |
450 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
451 | if (err) | |
452 | return err; | |
7520b94d | 453 | |
cb26b572 | 454 | return sprintf(buf, "%d\n", trim); |
7520b94d AZ |
455 | } |
456 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); | |
457 | ||
458 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, | |
459 | struct device_attribute *attr, char *buf) | |
460 | { | |
82896072 | 461 | int err, osc; |
7520b94d | 462 | |
82896072 AZ |
463 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
464 | if (err) | |
465 | return err; | |
7520b94d | 466 | |
82896072 | 467 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
7520b94d AZ |
468 | } |
469 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); | |
470 | ||
cb26b572 | 471 | static int rs5c_sysfs_register(struct device *dev) |
7520b94d | 472 | { |
cb26b572 DB |
473 | int err; |
474 | ||
475 | err = device_create_file(dev, &dev_attr_trim); | |
476 | if (err) | |
477 | return err; | |
478 | err = device_create_file(dev, &dev_attr_osc); | |
479 | if (err) | |
480 | device_remove_file(dev, &dev_attr_trim); | |
481 | ||
482 | return err; | |
483 | } | |
484 | ||
d815461c DB |
485 | static void rs5c_sysfs_unregister(struct device *dev) |
486 | { | |
487 | device_remove_file(dev, &dev_attr_trim); | |
488 | device_remove_file(dev, &dev_attr_osc); | |
489 | } | |
490 | ||
cb26b572 DB |
491 | #else |
492 | static int rs5c_sysfs_register(struct device *dev) | |
493 | { | |
494 | return 0; | |
7520b94d | 495 | } |
d815461c DB |
496 | |
497 | static void rs5c_sysfs_unregister(struct device *dev) | |
498 | { | |
499 | /* nothing */ | |
500 | } | |
cb26b572 DB |
501 | #endif /* SYSFS */ |
502 | ||
503 | static struct i2c_driver rs5c372_driver; | |
7520b94d | 504 | |
0053dc0d PM |
505 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
506 | { | |
507 | unsigned char buf[2]; | |
508 | int addr, i, ret = 0; | |
509 | ||
37fc5e2c PM |
510 | if (rs5c372->type == rtc_r2025sd) { |
511 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)) | |
512 | return ret; | |
513 | rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST; | |
514 | } else { | |
515 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) | |
516 | return ret; | |
517 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; | |
518 | } | |
0053dc0d PM |
519 | |
520 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
521 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; | |
522 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; | |
523 | ||
524 | /* use 24hr mode */ | |
525 | switch (rs5c372->type) { | |
526 | case rtc_rs5c372a: | |
527 | case rtc_rs5c372b: | |
528 | buf[1] |= RS5C372_CTRL2_24; | |
529 | rs5c372->time24 = 1; | |
530 | break; | |
37fc5e2c | 531 | case rtc_r2025sd: |
0053dc0d PM |
532 | case rtc_rv5c386: |
533 | case rtc_rv5c387a: | |
534 | buf[0] |= RV5C387_CTRL1_24; | |
535 | rs5c372->time24 = 1; | |
536 | break; | |
537 | default: | |
538 | /* impossible */ | |
539 | break; | |
540 | } | |
541 | ||
542 | for (i = 0; i < sizeof(buf); i++) { | |
543 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); | |
544 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); | |
545 | if (unlikely(ret < 0)) | |
546 | return ret; | |
547 | } | |
548 | ||
549 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; | |
550 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; | |
551 | ||
552 | return 0; | |
553 | } | |
554 | ||
d2653e92 JD |
555 | static int rs5c372_probe(struct i2c_client *client, |
556 | const struct i2c_device_id *id) | |
7520b94d AZ |
557 | { |
558 | int err = 0; | |
0053dc0d | 559 | int smbus_mode = 0; |
c6f24f99 | 560 | struct rs5c372 *rs5c372; |
cb26b572 | 561 | struct rtc_time tm; |
7520b94d | 562 | |
2a4e2b87 | 563 | dev_dbg(&client->dev, "%s\n", __func__); |
7520b94d | 564 | |
0053dc0d PM |
565 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
566 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { | |
567 | /* | |
568 | * If we don't have any master mode adapter, try breaking | |
569 | * it down in to the barest of capabilities. | |
570 | */ | |
571 | if (i2c_check_functionality(client->adapter, | |
572 | I2C_FUNC_SMBUS_BYTE_DATA | | |
573 | I2C_FUNC_SMBUS_I2C_BLOCK)) | |
574 | smbus_mode = 1; | |
575 | else { | |
576 | /* Still no good, give up */ | |
577 | err = -ENODEV; | |
578 | goto exit; | |
579 | } | |
7520b94d AZ |
580 | } |
581 | ||
c6f24f99 | 582 | if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { |
7520b94d AZ |
583 | err = -ENOMEM; |
584 | goto exit; | |
585 | } | |
cb26b572 | 586 | |
cb26b572 | 587 | rs5c372->client = client; |
c6f24f99 | 588 | i2c_set_clientdata(client, rs5c372); |
3760f736 | 589 | rs5c372->type = id->driver_data; |
c6f24f99 | 590 | |
e2bfe342 PM |
591 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
592 | rs5c372->regs = &rs5c372->buf[1]; | |
0053dc0d | 593 | rs5c372->smbus = smbus_mode; |
e2bfe342 | 594 | |
cb26b572 DB |
595 | err = rs5c_get_regs(rs5c372); |
596 | if (err < 0) | |
d815461c | 597 | goto exit_kfree; |
cb26b572 | 598 | |
cb26b572 DB |
599 | /* clock may be set for am/pm or 24 hr time */ |
600 | switch (rs5c372->type) { | |
601 | case rtc_rs5c372a: | |
602 | case rtc_rs5c372b: | |
603 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. | |
604 | * so does periodic irq, except some 327a modes. | |
605 | */ | |
606 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) | |
607 | rs5c372->time24 = 1; | |
608 | break; | |
37fc5e2c | 609 | case rtc_r2025sd: |
cb26b572 DB |
610 | case rtc_rv5c386: |
611 | case rtc_rv5c387a: | |
612 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) | |
613 | rs5c372->time24 = 1; | |
614 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic | |
615 | * irq, on both 386 and 387 | |
616 | */ | |
617 | break; | |
618 | default: | |
619 | dev_err(&client->dev, "unknown RTC type\n"); | |
d815461c | 620 | goto exit_kfree; |
cb26b572 DB |
621 | } |
622 | ||
623 | /* if the oscillator lost power and no other software (like | |
624 | * the bootloader) set it up, do it here. | |
37fc5e2c PM |
625 | * |
626 | * The R2025S/D does this a little differently than the other | |
627 | * parts, so we special case that.. | |
cb26b572 | 628 | */ |
0053dc0d PM |
629 | err = rs5c_oscillator_setup(rs5c372); |
630 | if (unlikely(err < 0)) { | |
631 | dev_err(&client->dev, "setup error\n"); | |
632 | goto exit_kfree; | |
cb26b572 DB |
633 | } |
634 | ||
635 | if (rs5c372_get_datetime(client, &tm) < 0) | |
636 | dev_warn(&client->dev, "clock needs to be set\n"); | |
637 | ||
638 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", | |
639 | ({ char *s; switch (rs5c372->type) { | |
37fc5e2c | 640 | case rtc_r2025sd: s = "r2025sd"; break; |
cb26b572 DB |
641 | case rtc_rs5c372a: s = "rs5c372a"; break; |
642 | case rtc_rs5c372b: s = "rs5c372b"; break; | |
643 | case rtc_rv5c386: s = "rv5c386"; break; | |
644 | case rtc_rv5c387a: s = "rv5c387a"; break; | |
645 | default: s = "chip"; break; | |
646 | }; s;}), | |
647 | rs5c372->time24 ? "24hr" : "am/pm" | |
648 | ); | |
649 | ||
d815461c | 650 | /* REVISIT use client->irq to register alarm irq ... */ |
7520b94d | 651 | |
c6f24f99 RV |
652 | rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name, |
653 | &client->dev, &rs5c372_rtc_ops, THIS_MODULE); | |
7520b94d | 654 | |
c6f24f99 RV |
655 | if (IS_ERR(rs5c372->rtc)) { |
656 | err = PTR_ERR(rs5c372->rtc); | |
d815461c | 657 | goto exit_kfree; |
7520b94d AZ |
658 | } |
659 | ||
cb26b572 | 660 | err = rs5c_sysfs_register(&client->dev); |
c6f24f99 RV |
661 | if (err) |
662 | goto exit_devreg; | |
7520b94d AZ |
663 | |
664 | return 0; | |
665 | ||
91046a8a | 666 | exit_devreg: |
c6f24f99 | 667 | rtc_device_unregister(rs5c372->rtc); |
91046a8a | 668 | |
7520b94d | 669 | exit_kfree: |
c6f24f99 | 670 | kfree(rs5c372); |
7520b94d AZ |
671 | |
672 | exit: | |
673 | return err; | |
674 | } | |
675 | ||
d815461c | 676 | static int rs5c372_remove(struct i2c_client *client) |
cb26b572 | 677 | { |
c6f24f99 | 678 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
7520b94d | 679 | |
d815461c DB |
680 | rtc_device_unregister(rs5c372->rtc); |
681 | rs5c_sysfs_unregister(&client->dev); | |
c6f24f99 | 682 | kfree(rs5c372); |
7520b94d AZ |
683 | return 0; |
684 | } | |
685 | ||
cb26b572 DB |
686 | static struct i2c_driver rs5c372_driver = { |
687 | .driver = { | |
688 | .name = "rtc-rs5c372", | |
689 | }, | |
d815461c DB |
690 | .probe = rs5c372_probe, |
691 | .remove = rs5c372_remove, | |
3760f736 | 692 | .id_table = rs5c372_id, |
cb26b572 DB |
693 | }; |
694 | ||
0abc9201 | 695 | module_i2c_driver(rs5c372_driver); |
7520b94d AZ |
696 | |
697 | MODULE_AUTHOR( | |
698 | "Pavel Mironchik <pmironchik@optifacio.net>, " | |
0053dc0d PM |
699 | "Alessandro Zummo <a.zummo@towertech.it>, " |
700 | "Paul Mundt <lethal@linux-sh.org>"); | |
7520b94d AZ |
701 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
702 | MODULE_LICENSE("GPL"); | |
703 | MODULE_VERSION(DRV_VERSION); |