Commit | Line | Data |
---|---|---|
7520b94d | 1 | /* |
37fc5e2c | 2 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
7520b94d AZ |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> | |
5 | * Copyright (C) 2006 Tower Technologies | |
0053dc0d | 6 | * Copyright (C) 2008 Paul Mundt |
7520b94d AZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/i2c.h> | |
14 | #include <linux/rtc.h> | |
15 | #include <linux/bcd.h> | |
5a0e3ad6 | 16 | #include <linux/slab.h> |
2113852b | 17 | #include <linux/module.h> |
7520b94d | 18 | |
0053dc0d | 19 | #define DRV_VERSION "0.6" |
7520b94d | 20 | |
cb26b572 DB |
21 | |
22 | /* | |
23 | * Ricoh has a family of I2C based RTCs, which differ only slightly from | |
24 | * each other. Differences center on pinout (e.g. how many interrupts, | |
25 | * output clock, etc) and how the control registers are used. The '372 | |
26 | * is significant only because that's the one this driver first supported. | |
27 | */ | |
7520b94d AZ |
28 | #define RS5C372_REG_SECS 0 |
29 | #define RS5C372_REG_MINS 1 | |
30 | #define RS5C372_REG_HOURS 2 | |
31 | #define RS5C372_REG_WDAY 3 | |
32 | #define RS5C372_REG_DAY 4 | |
33 | #define RS5C372_REG_MONTH 5 | |
34 | #define RS5C372_REG_YEAR 6 | |
35 | #define RS5C372_REG_TRIM 7 | |
cb26b572 DB |
36 | # define RS5C372_TRIM_XSL 0x80 |
37 | # define RS5C372_TRIM_MASK 0x7F | |
38 | ||
39 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ | |
40 | #define RS5C_REG_ALARM_A_HOURS 9 | |
41 | #define RS5C_REG_ALARM_A_WDAY 10 | |
42 | ||
43 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ | |
44 | #define RS5C_REG_ALARM_B_HOURS 12 | |
45 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ | |
46 | ||
47 | #define RS5C_REG_CTRL1 14 | |
48 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ | |
49 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ | |
50 | # define RV5C387_CTRL1_24 (1 << 5) | |
51 | # define RS5C372A_CTRL1_SL1 (1 << 5) | |
52 | # define RS5C_CTRL1_CT_MASK (7 << 0) | |
53 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ | |
54 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ | |
55 | #define RS5C_REG_CTRL2 15 | |
56 | # define RS5C372_CTRL2_24 (1 << 5) | |
37fc5e2c PM |
57 | # define R2025_CTRL2_XST (1 << 5) |
58 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ | |
cb26b572 DB |
59 | # define RS5C_CTRL2_CTFG (1 << 2) |
60 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ | |
61 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ | |
62 | ||
63 | ||
64 | /* to read (style 1) or write registers starting at R */ | |
65 | #define RS5C_ADDR(R) (((R) << 4) | 0) | |
66 | ||
67 | ||
68 | enum rtc_type { | |
69 | rtc_undef = 0, | |
37fc5e2c | 70 | rtc_r2025sd, |
cb26b572 DB |
71 | rtc_rs5c372a, |
72 | rtc_rs5c372b, | |
73 | rtc_rv5c386, | |
74 | rtc_rv5c387a, | |
75 | }; | |
7520b94d | 76 | |
3760f736 | 77 | static const struct i2c_device_id rs5c372_id[] = { |
37fc5e2c | 78 | { "r2025sd", rtc_r2025sd }, |
3760f736 JD |
79 | { "rs5c372a", rtc_rs5c372a }, |
80 | { "rs5c372b", rtc_rs5c372b }, | |
81 | { "rv5c386", rtc_rv5c386 }, | |
82 | { "rv5c387a", rtc_rv5c387a }, | |
83 | { } | |
84 | }; | |
85 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); | |
86 | ||
cb26b572 DB |
87 | /* REVISIT: this assumes that: |
88 | * - we're in the 21st century, so it's safe to ignore the century | |
89 | * bit for rv5c38[67] (REG_MONTH bit 7); | |
90 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) | |
91 | */ | |
92 | struct rs5c372 { | |
93 | struct i2c_client *client; | |
94 | struct rtc_device *rtc; | |
95 | enum rtc_type type; | |
96 | unsigned time24:1; | |
97 | unsigned has_irq:1; | |
0053dc0d | 98 | unsigned smbus:1; |
cb26b572 DB |
99 | char buf[17]; |
100 | char *regs; | |
cb26b572 | 101 | }; |
7520b94d | 102 | |
cb26b572 DB |
103 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
104 | { | |
105 | struct i2c_client *client = rs5c->client; | |
106 | struct i2c_msg msgs[] = { | |
107 | { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf }, | |
108 | }; | |
109 | ||
110 | /* This implements the third reading method from the datasheet, using | |
111 | * an internal address that's reset after each transaction (by STOP) | |
112 | * to 0x0f ... so we read extra registers, and skip the first one. | |
113 | * | |
114 | * The first method doesn't work with the iop3xx adapter driver, on at | |
115 | * least 80219 chips; this works around that bug. | |
0053dc0d PM |
116 | * |
117 | * The third method on the other hand doesn't work for the SMBus-only | |
118 | * configurations, so we use the the first method there, stripping off | |
119 | * the extra register in the process. | |
cb26b572 | 120 | */ |
0053dc0d PM |
121 | if (rs5c->smbus) { |
122 | int addr = RS5C_ADDR(RS5C372_REG_SECS); | |
123 | int size = sizeof(rs5c->buf) - 1; | |
124 | ||
125 | if (i2c_smbus_read_i2c_block_data(client, addr, size, | |
126 | rs5c->buf + 1) != size) { | |
127 | dev_warn(&client->dev, "can't read registers\n"); | |
128 | return -EIO; | |
129 | } | |
130 | } else { | |
131 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { | |
132 | dev_warn(&client->dev, "can't read registers\n"); | |
133 | return -EIO; | |
134 | } | |
cb26b572 | 135 | } |
7520b94d | 136 | |
cb26b572 DB |
137 | dev_dbg(&client->dev, |
138 | "%02x %02x %02x (%02x) %02x %02x %02x (%02x), " | |
139 | "%02x %02x %02x, %02x %02x %02x; %02x %02x\n", | |
140 | rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3], | |
141 | rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7], | |
142 | rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11], | |
143 | rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]); | |
7520b94d | 144 | |
cb26b572 DB |
145 | return 0; |
146 | } | |
c6f24f99 | 147 | |
cb26b572 DB |
148 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
149 | { | |
150 | unsigned hour; | |
7520b94d | 151 | |
cb26b572 | 152 | if (rs5c->time24) |
fe20ba70 | 153 | return bcd2bin(reg & 0x3f); |
cb26b572 | 154 | |
fe20ba70 | 155 | hour = bcd2bin(reg & 0x1f); |
cb26b572 DB |
156 | if (hour == 12) |
157 | hour = 0; | |
158 | if (reg & 0x20) | |
159 | hour += 12; | |
160 | return hour; | |
161 | } | |
162 | ||
163 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) | |
7520b94d | 164 | { |
cb26b572 | 165 | if (rs5c->time24) |
fe20ba70 | 166 | return bin2bcd(hour); |
cb26b572 DB |
167 | |
168 | if (hour > 12) | |
fe20ba70 | 169 | return 0x20 | bin2bcd(hour - 12); |
cb26b572 | 170 | if (hour == 12) |
fe20ba70 | 171 | return 0x20 | bin2bcd(12); |
cb26b572 | 172 | if (hour == 0) |
fe20ba70 AB |
173 | return bin2bcd(12); |
174 | return bin2bcd(hour); | |
cb26b572 | 175 | } |
7520b94d | 176 | |
cb26b572 DB |
177 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
178 | { | |
179 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
180 | int status = rs5c_get_regs(rs5c); | |
c6f24f99 | 181 | |
cb26b572 DB |
182 | if (status < 0) |
183 | return status; | |
7520b94d | 184 | |
fe20ba70 AB |
185 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
186 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); | |
cb26b572 | 187 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
7520b94d | 188 | |
fe20ba70 AB |
189 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
190 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); | |
7520b94d AZ |
191 | |
192 | /* tm->tm_mon is zero-based */ | |
fe20ba70 | 193 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
7520b94d AZ |
194 | |
195 | /* year is 1900 + tm->tm_year */ | |
fe20ba70 | 196 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
7520b94d AZ |
197 | |
198 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | |
199 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
2a4e2b87 | 200 | __func__, |
7520b94d AZ |
201 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
202 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | |
203 | ||
cb26b572 DB |
204 | /* rtc might need initialization */ |
205 | return rtc_valid_tm(tm); | |
7520b94d AZ |
206 | } |
207 | ||
208 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
209 | { | |
cb26b572 | 210 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
11836494 | 211 | unsigned char buf[7]; |
0053dc0d | 212 | int addr; |
7520b94d | 213 | |
cb26b572 | 214 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
7520b94d | 215 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 216 | __func__, |
cb26b572 | 217 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
7520b94d AZ |
218 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
219 | ||
0053dc0d | 220 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
fe20ba70 AB |
221 | buf[0] = bin2bcd(tm->tm_sec); |
222 | buf[1] = bin2bcd(tm->tm_min); | |
0053dc0d | 223 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
fe20ba70 AB |
224 | buf[3] = bin2bcd(tm->tm_wday); |
225 | buf[4] = bin2bcd(tm->tm_mday); | |
226 | buf[5] = bin2bcd(tm->tm_mon + 1); | |
227 | buf[6] = bin2bcd(tm->tm_year - 100); | |
7520b94d | 228 | |
0053dc0d | 229 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
2a4e2b87 | 230 | dev_err(&client->dev, "%s: write error\n", __func__); |
7520b94d AZ |
231 | return -EIO; |
232 | } | |
233 | ||
234 | return 0; | |
235 | } | |
236 | ||
cb26b572 DB |
237 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
238 | #define NEED_TRIM | |
239 | #endif | |
240 | ||
241 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | |
242 | #define NEED_TRIM | |
243 | #endif | |
244 | ||
245 | #ifdef NEED_TRIM | |
7520b94d AZ |
246 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
247 | { | |
c6f24f99 | 248 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
cb26b572 | 249 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
7520b94d | 250 | |
7520b94d | 251 | if (osc) |
c6f24f99 | 252 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
7520b94d | 253 | |
17ad78e5 | 254 | if (trim) { |
2a4e2b87 | 255 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
cb26b572 DB |
256 | tmp &= RS5C372_TRIM_MASK; |
257 | if (tmp & 0x3e) { | |
258 | int t = tmp & 0x3f; | |
259 | ||
260 | if (tmp & 0x40) | |
261 | t = (~t | (s8)0xc0) + 1; | |
262 | else | |
263 | t = t - 1; | |
264 | ||
265 | tmp = t * 2; | |
266 | } else | |
267 | tmp = 0; | |
268 | *trim = tmp; | |
17ad78e5 | 269 | } |
7520b94d AZ |
270 | |
271 | return 0; | |
272 | } | |
cb26b572 | 273 | #endif |
7520b94d AZ |
274 | |
275 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
276 | { | |
277 | return rs5c372_get_datetime(to_i2c_client(dev), tm); | |
278 | } | |
279 | ||
280 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
281 | { | |
282 | return rs5c372_set_datetime(to_i2c_client(dev), tm); | |
283 | } | |
284 | ||
cb26b572 | 285 | |
16380c15 JS |
286 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
287 | { | |
288 | struct i2c_client *client = to_i2c_client(dev); | |
289 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
290 | unsigned char buf; | |
291 | int status, addr; | |
292 | ||
293 | buf = rs5c->regs[RS5C_REG_CTRL1]; | |
294 | ||
295 | if (!rs5c->has_irq) | |
296 | return -EINVAL; | |
297 | ||
298 | status = rs5c_get_regs(rs5c); | |
299 | if (status < 0) | |
300 | return status; | |
301 | ||
302 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
303 | if (enabled) | |
304 | buf |= RS5C_CTRL1_AALE; | |
305 | else | |
306 | buf &= ~RS5C_CTRL1_AALE; | |
307 | ||
308 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { | |
309 | printk(KERN_WARNING "%s: can't update alarm\n", | |
310 | rs5c->rtc->name); | |
311 | status = -EIO; | |
312 | } else | |
313 | rs5c->regs[RS5C_REG_CTRL1] = buf; | |
314 | ||
315 | return status; | |
316 | } | |
317 | ||
318 | ||
cb26b572 DB |
319 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
320 | * which only exposes a polled programming interface; and since | |
321 | * these calls map directly to those EFI requests; we don't demand | |
322 | * we have an IRQ for this chip when we go through this API. | |
323 | * | |
324 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs | |
325 | * though, managed through RTC_AIE_{ON,OFF} requests. | |
326 | */ | |
327 | ||
328 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
329 | { | |
330 | struct i2c_client *client = to_i2c_client(dev); | |
331 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
332 | int status; | |
333 | ||
334 | status = rs5c_get_regs(rs5c); | |
335 | if (status < 0) | |
336 | return status; | |
337 | ||
338 | /* report alarm time */ | |
339 | t->time.tm_sec = 0; | |
fe20ba70 | 340 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
cb26b572 DB |
341 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
342 | t->time.tm_mday = -1; | |
343 | t->time.tm_mon = -1; | |
344 | t->time.tm_year = -1; | |
345 | t->time.tm_wday = -1; | |
346 | t->time.tm_yday = -1; | |
347 | t->time.tm_isdst = -1; | |
348 | ||
349 | /* ... and status */ | |
350 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); | |
351 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
356 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
357 | { | |
358 | struct i2c_client *client = to_i2c_client(dev); | |
359 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
0053dc0d PM |
360 | int status, addr, i; |
361 | unsigned char buf[3]; | |
cb26b572 DB |
362 | |
363 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ | |
364 | if (t->time.tm_mday != -1 | |
365 | || t->time.tm_mon != -1 | |
366 | || t->time.tm_year != -1) | |
367 | return -EINVAL; | |
368 | ||
369 | /* REVISIT: round up tm_sec */ | |
370 | ||
371 | /* if needed, disable irq (clears pending status) */ | |
372 | status = rs5c_get_regs(rs5c); | |
373 | if (status < 0) | |
374 | return status; | |
375 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { | |
0053dc0d PM |
376 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
377 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; | |
378 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { | |
cb26b572 DB |
379 | pr_debug("%s: can't disable alarm\n", rs5c->rtc->name); |
380 | return -EIO; | |
381 | } | |
0053dc0d | 382 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
383 | } |
384 | ||
385 | /* set alarm */ | |
fe20ba70 | 386 | buf[0] = bin2bcd(t->time.tm_min); |
0053dc0d PM |
387 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
388 | buf[2] = 0x7f; /* any/all days */ | |
389 | ||
390 | for (i = 0; i < sizeof(buf); i++) { | |
391 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); | |
392 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { | |
393 | pr_debug("%s: can't set alarm time\n", rs5c->rtc->name); | |
394 | return -EIO; | |
395 | } | |
cb26b572 DB |
396 | } |
397 | ||
398 | /* ... and maybe enable its irq */ | |
399 | if (t->enabled) { | |
0053dc0d PM |
400 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
401 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; | |
402 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) | |
cb26b572 DB |
403 | printk(KERN_WARNING "%s: can't enable alarm\n", |
404 | rs5c->rtc->name); | |
0053dc0d | 405 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
406 | } |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
411 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
412 | ||
7520b94d AZ |
413 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
414 | { | |
415 | int err, osc, trim; | |
416 | ||
adfb4341 AZ |
417 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
418 | if (err == 0) { | |
cb26b572 DB |
419 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
420 | osc / 1000, osc % 1000); | |
421 | seq_printf(seq, "trim\t\t: %d\n", trim); | |
7520b94d AZ |
422 | } |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
cb26b572 DB |
427 | #else |
428 | #define rs5c372_rtc_proc NULL | |
429 | #endif | |
430 | ||
ff8371ac | 431 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
7520b94d AZ |
432 | .proc = rs5c372_rtc_proc, |
433 | .read_time = rs5c372_rtc_read_time, | |
434 | .set_time = rs5c372_rtc_set_time, | |
cb26b572 DB |
435 | .read_alarm = rs5c_read_alarm, |
436 | .set_alarm = rs5c_set_alarm, | |
16380c15 | 437 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, |
7520b94d AZ |
438 | }; |
439 | ||
cb26b572 DB |
440 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
441 | ||
7520b94d AZ |
442 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
443 | struct device_attribute *attr, char *buf) | |
444 | { | |
82896072 | 445 | int err, trim; |
7520b94d | 446 | |
82896072 AZ |
447 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
448 | if (err) | |
449 | return err; | |
7520b94d | 450 | |
cb26b572 | 451 | return sprintf(buf, "%d\n", trim); |
7520b94d AZ |
452 | } |
453 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); | |
454 | ||
455 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, | |
456 | struct device_attribute *attr, char *buf) | |
457 | { | |
82896072 | 458 | int err, osc; |
7520b94d | 459 | |
82896072 AZ |
460 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
461 | if (err) | |
462 | return err; | |
7520b94d | 463 | |
82896072 | 464 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
7520b94d AZ |
465 | } |
466 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); | |
467 | ||
cb26b572 | 468 | static int rs5c_sysfs_register(struct device *dev) |
7520b94d | 469 | { |
cb26b572 DB |
470 | int err; |
471 | ||
472 | err = device_create_file(dev, &dev_attr_trim); | |
473 | if (err) | |
474 | return err; | |
475 | err = device_create_file(dev, &dev_attr_osc); | |
476 | if (err) | |
477 | device_remove_file(dev, &dev_attr_trim); | |
478 | ||
479 | return err; | |
480 | } | |
481 | ||
d815461c DB |
482 | static void rs5c_sysfs_unregister(struct device *dev) |
483 | { | |
484 | device_remove_file(dev, &dev_attr_trim); | |
485 | device_remove_file(dev, &dev_attr_osc); | |
486 | } | |
487 | ||
cb26b572 DB |
488 | #else |
489 | static int rs5c_sysfs_register(struct device *dev) | |
490 | { | |
491 | return 0; | |
7520b94d | 492 | } |
d815461c DB |
493 | |
494 | static void rs5c_sysfs_unregister(struct device *dev) | |
495 | { | |
496 | /* nothing */ | |
497 | } | |
cb26b572 DB |
498 | #endif /* SYSFS */ |
499 | ||
500 | static struct i2c_driver rs5c372_driver; | |
7520b94d | 501 | |
0053dc0d PM |
502 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
503 | { | |
504 | unsigned char buf[2]; | |
505 | int addr, i, ret = 0; | |
506 | ||
37fc5e2c PM |
507 | if (rs5c372->type == rtc_r2025sd) { |
508 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)) | |
509 | return ret; | |
510 | rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST; | |
511 | } else { | |
512 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) | |
513 | return ret; | |
514 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; | |
515 | } | |
0053dc0d PM |
516 | |
517 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
518 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; | |
519 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; | |
520 | ||
521 | /* use 24hr mode */ | |
522 | switch (rs5c372->type) { | |
523 | case rtc_rs5c372a: | |
524 | case rtc_rs5c372b: | |
525 | buf[1] |= RS5C372_CTRL2_24; | |
526 | rs5c372->time24 = 1; | |
527 | break; | |
37fc5e2c | 528 | case rtc_r2025sd: |
0053dc0d PM |
529 | case rtc_rv5c386: |
530 | case rtc_rv5c387a: | |
531 | buf[0] |= RV5C387_CTRL1_24; | |
532 | rs5c372->time24 = 1; | |
533 | break; | |
534 | default: | |
535 | /* impossible */ | |
536 | break; | |
537 | } | |
538 | ||
539 | for (i = 0; i < sizeof(buf); i++) { | |
540 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); | |
541 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); | |
542 | if (unlikely(ret < 0)) | |
543 | return ret; | |
544 | } | |
545 | ||
546 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; | |
547 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; | |
548 | ||
549 | return 0; | |
550 | } | |
551 | ||
d2653e92 JD |
552 | static int rs5c372_probe(struct i2c_client *client, |
553 | const struct i2c_device_id *id) | |
7520b94d AZ |
554 | { |
555 | int err = 0; | |
0053dc0d | 556 | int smbus_mode = 0; |
c6f24f99 | 557 | struct rs5c372 *rs5c372; |
cb26b572 | 558 | struct rtc_time tm; |
7520b94d | 559 | |
2a4e2b87 | 560 | dev_dbg(&client->dev, "%s\n", __func__); |
7520b94d | 561 | |
0053dc0d PM |
562 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
563 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { | |
564 | /* | |
565 | * If we don't have any master mode adapter, try breaking | |
566 | * it down in to the barest of capabilities. | |
567 | */ | |
568 | if (i2c_check_functionality(client->adapter, | |
569 | I2C_FUNC_SMBUS_BYTE_DATA | | |
570 | I2C_FUNC_SMBUS_I2C_BLOCK)) | |
571 | smbus_mode = 1; | |
572 | else { | |
573 | /* Still no good, give up */ | |
574 | err = -ENODEV; | |
575 | goto exit; | |
576 | } | |
7520b94d AZ |
577 | } |
578 | ||
c6f24f99 | 579 | if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { |
7520b94d AZ |
580 | err = -ENOMEM; |
581 | goto exit; | |
582 | } | |
cb26b572 | 583 | |
cb26b572 | 584 | rs5c372->client = client; |
c6f24f99 | 585 | i2c_set_clientdata(client, rs5c372); |
3760f736 | 586 | rs5c372->type = id->driver_data; |
c6f24f99 | 587 | |
e2bfe342 PM |
588 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
589 | rs5c372->regs = &rs5c372->buf[1]; | |
0053dc0d | 590 | rs5c372->smbus = smbus_mode; |
e2bfe342 | 591 | |
cb26b572 DB |
592 | err = rs5c_get_regs(rs5c372); |
593 | if (err < 0) | |
d815461c | 594 | goto exit_kfree; |
cb26b572 | 595 | |
cb26b572 DB |
596 | /* clock may be set for am/pm or 24 hr time */ |
597 | switch (rs5c372->type) { | |
598 | case rtc_rs5c372a: | |
599 | case rtc_rs5c372b: | |
600 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. | |
601 | * so does periodic irq, except some 327a modes. | |
602 | */ | |
603 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) | |
604 | rs5c372->time24 = 1; | |
605 | break; | |
37fc5e2c | 606 | case rtc_r2025sd: |
cb26b572 DB |
607 | case rtc_rv5c386: |
608 | case rtc_rv5c387a: | |
609 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) | |
610 | rs5c372->time24 = 1; | |
611 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic | |
612 | * irq, on both 386 and 387 | |
613 | */ | |
614 | break; | |
615 | default: | |
616 | dev_err(&client->dev, "unknown RTC type\n"); | |
d815461c | 617 | goto exit_kfree; |
cb26b572 DB |
618 | } |
619 | ||
620 | /* if the oscillator lost power and no other software (like | |
621 | * the bootloader) set it up, do it here. | |
37fc5e2c PM |
622 | * |
623 | * The R2025S/D does this a little differently than the other | |
624 | * parts, so we special case that.. | |
cb26b572 | 625 | */ |
0053dc0d PM |
626 | err = rs5c_oscillator_setup(rs5c372); |
627 | if (unlikely(err < 0)) { | |
628 | dev_err(&client->dev, "setup error\n"); | |
629 | goto exit_kfree; | |
cb26b572 DB |
630 | } |
631 | ||
632 | if (rs5c372_get_datetime(client, &tm) < 0) | |
633 | dev_warn(&client->dev, "clock needs to be set\n"); | |
634 | ||
635 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", | |
636 | ({ char *s; switch (rs5c372->type) { | |
37fc5e2c | 637 | case rtc_r2025sd: s = "r2025sd"; break; |
cb26b572 DB |
638 | case rtc_rs5c372a: s = "rs5c372a"; break; |
639 | case rtc_rs5c372b: s = "rs5c372b"; break; | |
640 | case rtc_rv5c386: s = "rv5c386"; break; | |
641 | case rtc_rv5c387a: s = "rv5c387a"; break; | |
642 | default: s = "chip"; break; | |
643 | }; s;}), | |
644 | rs5c372->time24 ? "24hr" : "am/pm" | |
645 | ); | |
646 | ||
d815461c | 647 | /* REVISIT use client->irq to register alarm irq ... */ |
7520b94d | 648 | |
c6f24f99 RV |
649 | rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name, |
650 | &client->dev, &rs5c372_rtc_ops, THIS_MODULE); | |
7520b94d | 651 | |
c6f24f99 RV |
652 | if (IS_ERR(rs5c372->rtc)) { |
653 | err = PTR_ERR(rs5c372->rtc); | |
d815461c | 654 | goto exit_kfree; |
7520b94d AZ |
655 | } |
656 | ||
cb26b572 | 657 | err = rs5c_sysfs_register(&client->dev); |
c6f24f99 RV |
658 | if (err) |
659 | goto exit_devreg; | |
7520b94d AZ |
660 | |
661 | return 0; | |
662 | ||
91046a8a | 663 | exit_devreg: |
c6f24f99 | 664 | rtc_device_unregister(rs5c372->rtc); |
91046a8a | 665 | |
7520b94d | 666 | exit_kfree: |
c6f24f99 | 667 | kfree(rs5c372); |
7520b94d AZ |
668 | |
669 | exit: | |
670 | return err; | |
671 | } | |
672 | ||
d815461c | 673 | static int rs5c372_remove(struct i2c_client *client) |
cb26b572 | 674 | { |
c6f24f99 | 675 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
7520b94d | 676 | |
d815461c DB |
677 | rtc_device_unregister(rs5c372->rtc); |
678 | rs5c_sysfs_unregister(&client->dev); | |
c6f24f99 | 679 | kfree(rs5c372); |
7520b94d AZ |
680 | return 0; |
681 | } | |
682 | ||
cb26b572 DB |
683 | static struct i2c_driver rs5c372_driver = { |
684 | .driver = { | |
685 | .name = "rtc-rs5c372", | |
686 | }, | |
d815461c DB |
687 | .probe = rs5c372_probe, |
688 | .remove = rs5c372_remove, | |
3760f736 | 689 | .id_table = rs5c372_id, |
cb26b572 DB |
690 | }; |
691 | ||
0abc9201 | 692 | module_i2c_driver(rs5c372_driver); |
7520b94d AZ |
693 | |
694 | MODULE_AUTHOR( | |
695 | "Pavel Mironchik <pmironchik@optifacio.net>, " | |
0053dc0d PM |
696 | "Alessandro Zummo <a.zummo@towertech.it>, " |
697 | "Paul Mundt <lethal@linux-sh.org>"); | |
7520b94d AZ |
698 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
699 | MODULE_LICENSE("GPL"); | |
700 | MODULE_VERSION(DRV_VERSION); |