Commit | Line | Data |
---|---|---|
7520b94d | 1 | /* |
cb26b572 | 2 | * An I2C driver for Ricoh RS5C372 and RV5C38[67] RTCs |
7520b94d AZ |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> | |
5 | * Copyright (C) 2006 Tower Technologies | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/i2c.h> | |
13 | #include <linux/rtc.h> | |
14 | #include <linux/bcd.h> | |
15 | ||
d815461c | 16 | #define DRV_VERSION "0.5" |
7520b94d | 17 | |
cb26b572 DB |
18 | |
19 | /* | |
20 | * Ricoh has a family of I2C based RTCs, which differ only slightly from | |
21 | * each other. Differences center on pinout (e.g. how many interrupts, | |
22 | * output clock, etc) and how the control registers are used. The '372 | |
23 | * is significant only because that's the one this driver first supported. | |
24 | */ | |
7520b94d AZ |
25 | #define RS5C372_REG_SECS 0 |
26 | #define RS5C372_REG_MINS 1 | |
27 | #define RS5C372_REG_HOURS 2 | |
28 | #define RS5C372_REG_WDAY 3 | |
29 | #define RS5C372_REG_DAY 4 | |
30 | #define RS5C372_REG_MONTH 5 | |
31 | #define RS5C372_REG_YEAR 6 | |
32 | #define RS5C372_REG_TRIM 7 | |
cb26b572 DB |
33 | # define RS5C372_TRIM_XSL 0x80 |
34 | # define RS5C372_TRIM_MASK 0x7F | |
35 | ||
36 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ | |
37 | #define RS5C_REG_ALARM_A_HOURS 9 | |
38 | #define RS5C_REG_ALARM_A_WDAY 10 | |
39 | ||
40 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ | |
41 | #define RS5C_REG_ALARM_B_HOURS 12 | |
42 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ | |
43 | ||
44 | #define RS5C_REG_CTRL1 14 | |
45 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ | |
46 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ | |
47 | # define RV5C387_CTRL1_24 (1 << 5) | |
48 | # define RS5C372A_CTRL1_SL1 (1 << 5) | |
49 | # define RS5C_CTRL1_CT_MASK (7 << 0) | |
50 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ | |
51 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ | |
52 | #define RS5C_REG_CTRL2 15 | |
53 | # define RS5C372_CTRL2_24 (1 << 5) | |
54 | # define RS5C_CTRL2_XSTP (1 << 4) | |
55 | # define RS5C_CTRL2_CTFG (1 << 2) | |
56 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ | |
57 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ | |
58 | ||
59 | ||
60 | /* to read (style 1) or write registers starting at R */ | |
61 | #define RS5C_ADDR(R) (((R) << 4) | 0) | |
62 | ||
63 | ||
64 | enum rtc_type { | |
65 | rtc_undef = 0, | |
66 | rtc_rs5c372a, | |
67 | rtc_rs5c372b, | |
68 | rtc_rv5c386, | |
69 | rtc_rv5c387a, | |
70 | }; | |
7520b94d | 71 | |
3760f736 JD |
72 | static const struct i2c_device_id rs5c372_id[] = { |
73 | { "rs5c372a", rtc_rs5c372a }, | |
74 | { "rs5c372b", rtc_rs5c372b }, | |
75 | { "rv5c386", rtc_rv5c386 }, | |
76 | { "rv5c387a", rtc_rv5c387a }, | |
77 | { } | |
78 | }; | |
79 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); | |
80 | ||
cb26b572 DB |
81 | /* REVISIT: this assumes that: |
82 | * - we're in the 21st century, so it's safe to ignore the century | |
83 | * bit for rv5c38[67] (REG_MONTH bit 7); | |
84 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) | |
85 | */ | |
86 | struct rs5c372 { | |
87 | struct i2c_client *client; | |
88 | struct rtc_device *rtc; | |
89 | enum rtc_type type; | |
90 | unsigned time24:1; | |
91 | unsigned has_irq:1; | |
92 | char buf[17]; | |
93 | char *regs; | |
cb26b572 | 94 | }; |
7520b94d | 95 | |
cb26b572 DB |
96 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
97 | { | |
98 | struct i2c_client *client = rs5c->client; | |
99 | struct i2c_msg msgs[] = { | |
100 | { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf }, | |
101 | }; | |
102 | ||
103 | /* This implements the third reading method from the datasheet, using | |
104 | * an internal address that's reset after each transaction (by STOP) | |
105 | * to 0x0f ... so we read extra registers, and skip the first one. | |
106 | * | |
107 | * The first method doesn't work with the iop3xx adapter driver, on at | |
108 | * least 80219 chips; this works around that bug. | |
109 | */ | |
110 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { | |
e2bfe342 | 111 | dev_warn(&client->dev, "can't read registers\n"); |
cb26b572 DB |
112 | return -EIO; |
113 | } | |
7520b94d | 114 | |
cb26b572 DB |
115 | dev_dbg(&client->dev, |
116 | "%02x %02x %02x (%02x) %02x %02x %02x (%02x), " | |
117 | "%02x %02x %02x, %02x %02x %02x; %02x %02x\n", | |
118 | rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3], | |
119 | rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7], | |
120 | rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11], | |
121 | rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]); | |
7520b94d | 122 | |
cb26b572 DB |
123 | return 0; |
124 | } | |
c6f24f99 | 125 | |
cb26b572 DB |
126 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
127 | { | |
128 | unsigned hour; | |
7520b94d | 129 | |
cb26b572 DB |
130 | if (rs5c->time24) |
131 | return BCD2BIN(reg & 0x3f); | |
132 | ||
133 | hour = BCD2BIN(reg & 0x1f); | |
134 | if (hour == 12) | |
135 | hour = 0; | |
136 | if (reg & 0x20) | |
137 | hour += 12; | |
138 | return hour; | |
139 | } | |
140 | ||
141 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) | |
7520b94d | 142 | { |
cb26b572 DB |
143 | if (rs5c->time24) |
144 | return BIN2BCD(hour); | |
145 | ||
146 | if (hour > 12) | |
147 | return 0x20 | BIN2BCD(hour - 12); | |
148 | if (hour == 12) | |
149 | return 0x20 | BIN2BCD(12); | |
150 | if (hour == 0) | |
151 | return BIN2BCD(12); | |
152 | return BIN2BCD(hour); | |
153 | } | |
7520b94d | 154 | |
cb26b572 DB |
155 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
156 | { | |
157 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
158 | int status = rs5c_get_regs(rs5c); | |
c6f24f99 | 159 | |
cb26b572 DB |
160 | if (status < 0) |
161 | return status; | |
7520b94d | 162 | |
cb26b572 DB |
163 | tm->tm_sec = BCD2BIN(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
164 | tm->tm_min = BCD2BIN(rs5c->regs[RS5C372_REG_MINS] & 0x7f); | |
165 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); | |
7520b94d | 166 | |
cb26b572 DB |
167 | tm->tm_wday = BCD2BIN(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
168 | tm->tm_mday = BCD2BIN(rs5c->regs[RS5C372_REG_DAY] & 0x3f); | |
7520b94d AZ |
169 | |
170 | /* tm->tm_mon is zero-based */ | |
cb26b572 | 171 | tm->tm_mon = BCD2BIN(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
7520b94d AZ |
172 | |
173 | /* year is 1900 + tm->tm_year */ | |
cb26b572 | 174 | tm->tm_year = BCD2BIN(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
7520b94d AZ |
175 | |
176 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | |
177 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
2a4e2b87 | 178 | __func__, |
7520b94d AZ |
179 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
180 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | |
181 | ||
cb26b572 DB |
182 | /* rtc might need initialization */ |
183 | return rtc_valid_tm(tm); | |
7520b94d AZ |
184 | } |
185 | ||
186 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
187 | { | |
cb26b572 DB |
188 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
189 | unsigned char buf[8]; | |
7520b94d | 190 | |
cb26b572 | 191 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
7520b94d | 192 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 193 | __func__, |
cb26b572 | 194 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
7520b94d AZ |
195 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
196 | ||
cb26b572 | 197 | buf[0] = RS5C_ADDR(RS5C372_REG_SECS); |
7520b94d AZ |
198 | buf[1] = BIN2BCD(tm->tm_sec); |
199 | buf[2] = BIN2BCD(tm->tm_min); | |
cb26b572 | 200 | buf[3] = rs5c_hr2reg(rs5c, tm->tm_hour); |
7520b94d AZ |
201 | buf[4] = BIN2BCD(tm->tm_wday); |
202 | buf[5] = BIN2BCD(tm->tm_mday); | |
203 | buf[6] = BIN2BCD(tm->tm_mon + 1); | |
204 | buf[7] = BIN2BCD(tm->tm_year - 100); | |
205 | ||
206 | if ((i2c_master_send(client, buf, 8)) != 8) { | |
2a4e2b87 | 207 | dev_err(&client->dev, "%s: write error\n", __func__); |
7520b94d AZ |
208 | return -EIO; |
209 | } | |
210 | ||
211 | return 0; | |
212 | } | |
213 | ||
cb26b572 DB |
214 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
215 | #define NEED_TRIM | |
216 | #endif | |
217 | ||
218 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | |
219 | #define NEED_TRIM | |
220 | #endif | |
221 | ||
222 | #ifdef NEED_TRIM | |
7520b94d AZ |
223 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
224 | { | |
c6f24f99 | 225 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
cb26b572 | 226 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
7520b94d | 227 | |
7520b94d | 228 | if (osc) |
c6f24f99 | 229 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
7520b94d | 230 | |
17ad78e5 | 231 | if (trim) { |
2a4e2b87 | 232 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
cb26b572 DB |
233 | tmp &= RS5C372_TRIM_MASK; |
234 | if (tmp & 0x3e) { | |
235 | int t = tmp & 0x3f; | |
236 | ||
237 | if (tmp & 0x40) | |
238 | t = (~t | (s8)0xc0) + 1; | |
239 | else | |
240 | t = t - 1; | |
241 | ||
242 | tmp = t * 2; | |
243 | } else | |
244 | tmp = 0; | |
245 | *trim = tmp; | |
17ad78e5 | 246 | } |
7520b94d AZ |
247 | |
248 | return 0; | |
249 | } | |
cb26b572 | 250 | #endif |
7520b94d AZ |
251 | |
252 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
253 | { | |
254 | return rs5c372_get_datetime(to_i2c_client(dev), tm); | |
255 | } | |
256 | ||
257 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
258 | { | |
259 | return rs5c372_set_datetime(to_i2c_client(dev), tm); | |
260 | } | |
261 | ||
cb26b572 DB |
262 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) |
263 | ||
264 | static int | |
265 | rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
266 | { | |
267 | struct i2c_client *client = to_i2c_client(dev); | |
268 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
269 | unsigned char buf[2]; | |
270 | int status; | |
271 | ||
272 | buf[1] = rs5c->regs[RS5C_REG_CTRL1]; | |
273 | switch (cmd) { | |
274 | case RTC_UIE_OFF: | |
275 | case RTC_UIE_ON: | |
276 | /* some 327a modes use a different IRQ pin for 1Hz irqs */ | |
277 | if (rs5c->type == rtc_rs5c372a | |
278 | && (buf[1] & RS5C372A_CTRL1_SL1)) | |
279 | return -ENOIOCTLCMD; | |
280 | case RTC_AIE_OFF: | |
281 | case RTC_AIE_ON: | |
282 | /* these irq management calls only make sense for chips | |
283 | * which are wired up to an IRQ. | |
284 | */ | |
285 | if (!rs5c->has_irq) | |
286 | return -ENOIOCTLCMD; | |
287 | break; | |
288 | default: | |
289 | return -ENOIOCTLCMD; | |
290 | } | |
291 | ||
292 | status = rs5c_get_regs(rs5c); | |
293 | if (status < 0) | |
294 | return status; | |
295 | ||
296 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
297 | switch (cmd) { | |
298 | case RTC_AIE_OFF: /* alarm off */ | |
299 | buf[1] &= ~RS5C_CTRL1_AALE; | |
300 | break; | |
301 | case RTC_AIE_ON: /* alarm on */ | |
302 | buf[1] |= RS5C_CTRL1_AALE; | |
303 | break; | |
304 | case RTC_UIE_OFF: /* update off */ | |
305 | buf[1] &= ~RS5C_CTRL1_CT_MASK; | |
306 | break; | |
307 | case RTC_UIE_ON: /* update on */ | |
308 | buf[1] &= ~RS5C_CTRL1_CT_MASK; | |
309 | buf[1] |= RS5C_CTRL1_CT4; | |
310 | break; | |
311 | } | |
312 | if ((i2c_master_send(client, buf, 2)) != 2) { | |
313 | printk(KERN_WARNING "%s: can't update alarm\n", | |
314 | rs5c->rtc->name); | |
315 | status = -EIO; | |
316 | } else | |
317 | rs5c->regs[RS5C_REG_CTRL1] = buf[1]; | |
318 | return status; | |
319 | } | |
320 | ||
321 | #else | |
322 | #define rs5c_rtc_ioctl NULL | |
323 | #endif | |
324 | ||
325 | ||
326 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, | |
327 | * which only exposes a polled programming interface; and since | |
328 | * these calls map directly to those EFI requests; we don't demand | |
329 | * we have an IRQ for this chip when we go through this API. | |
330 | * | |
331 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs | |
332 | * though, managed through RTC_AIE_{ON,OFF} requests. | |
333 | */ | |
334 | ||
335 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
336 | { | |
337 | struct i2c_client *client = to_i2c_client(dev); | |
338 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
339 | int status; | |
340 | ||
341 | status = rs5c_get_regs(rs5c); | |
342 | if (status < 0) | |
343 | return status; | |
344 | ||
345 | /* report alarm time */ | |
346 | t->time.tm_sec = 0; | |
347 | t->time.tm_min = BCD2BIN(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); | |
348 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); | |
349 | t->time.tm_mday = -1; | |
350 | t->time.tm_mon = -1; | |
351 | t->time.tm_year = -1; | |
352 | t->time.tm_wday = -1; | |
353 | t->time.tm_yday = -1; | |
354 | t->time.tm_isdst = -1; | |
355 | ||
356 | /* ... and status */ | |
357 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); | |
358 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); | |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
363 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
364 | { | |
365 | struct i2c_client *client = to_i2c_client(dev); | |
366 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
367 | int status; | |
368 | unsigned char buf[4]; | |
369 | ||
370 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ | |
371 | if (t->time.tm_mday != -1 | |
372 | || t->time.tm_mon != -1 | |
373 | || t->time.tm_year != -1) | |
374 | return -EINVAL; | |
375 | ||
376 | /* REVISIT: round up tm_sec */ | |
377 | ||
378 | /* if needed, disable irq (clears pending status) */ | |
379 | status = rs5c_get_regs(rs5c); | |
380 | if (status < 0) | |
381 | return status; | |
382 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { | |
383 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
384 | buf[1] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; | |
385 | if (i2c_master_send(client, buf, 2) != 2) { | |
386 | pr_debug("%s: can't disable alarm\n", rs5c->rtc->name); | |
387 | return -EIO; | |
388 | } | |
389 | rs5c->regs[RS5C_REG_CTRL1] = buf[1]; | |
390 | } | |
391 | ||
392 | /* set alarm */ | |
393 | buf[0] = RS5C_ADDR(RS5C_REG_ALARM_A_MIN); | |
394 | buf[1] = BIN2BCD(t->time.tm_min); | |
395 | buf[2] = rs5c_hr2reg(rs5c, t->time.tm_hour); | |
396 | buf[3] = 0x7f; /* any/all days */ | |
397 | if ((i2c_master_send(client, buf, 4)) != 4) { | |
398 | pr_debug("%s: can't set alarm time\n", rs5c->rtc->name); | |
399 | return -EIO; | |
400 | } | |
401 | ||
402 | /* ... and maybe enable its irq */ | |
403 | if (t->enabled) { | |
404 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
405 | buf[1] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; | |
406 | if ((i2c_master_send(client, buf, 2)) != 2) | |
407 | printk(KERN_WARNING "%s: can't enable alarm\n", | |
408 | rs5c->rtc->name); | |
409 | rs5c->regs[RS5C_REG_CTRL1] = buf[1]; | |
410 | } | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
415 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
416 | ||
7520b94d AZ |
417 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
418 | { | |
419 | int err, osc, trim; | |
420 | ||
adfb4341 AZ |
421 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
422 | if (err == 0) { | |
cb26b572 DB |
423 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
424 | osc / 1000, osc % 1000); | |
425 | seq_printf(seq, "trim\t\t: %d\n", trim); | |
7520b94d AZ |
426 | } |
427 | ||
428 | return 0; | |
429 | } | |
430 | ||
cb26b572 DB |
431 | #else |
432 | #define rs5c372_rtc_proc NULL | |
433 | #endif | |
434 | ||
ff8371ac | 435 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
7520b94d | 436 | .proc = rs5c372_rtc_proc, |
cb26b572 | 437 | .ioctl = rs5c_rtc_ioctl, |
7520b94d AZ |
438 | .read_time = rs5c372_rtc_read_time, |
439 | .set_time = rs5c372_rtc_set_time, | |
cb26b572 DB |
440 | .read_alarm = rs5c_read_alarm, |
441 | .set_alarm = rs5c_set_alarm, | |
7520b94d AZ |
442 | }; |
443 | ||
cb26b572 DB |
444 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
445 | ||
7520b94d AZ |
446 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
447 | struct device_attribute *attr, char *buf) | |
448 | { | |
82896072 | 449 | int err, trim; |
7520b94d | 450 | |
82896072 AZ |
451 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
452 | if (err) | |
453 | return err; | |
7520b94d | 454 | |
cb26b572 | 455 | return sprintf(buf, "%d\n", trim); |
7520b94d AZ |
456 | } |
457 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); | |
458 | ||
459 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, | |
460 | struct device_attribute *attr, char *buf) | |
461 | { | |
82896072 | 462 | int err, osc; |
7520b94d | 463 | |
82896072 AZ |
464 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
465 | if (err) | |
466 | return err; | |
7520b94d | 467 | |
82896072 | 468 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
7520b94d AZ |
469 | } |
470 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); | |
471 | ||
cb26b572 | 472 | static int rs5c_sysfs_register(struct device *dev) |
7520b94d | 473 | { |
cb26b572 DB |
474 | int err; |
475 | ||
476 | err = device_create_file(dev, &dev_attr_trim); | |
477 | if (err) | |
478 | return err; | |
479 | err = device_create_file(dev, &dev_attr_osc); | |
480 | if (err) | |
481 | device_remove_file(dev, &dev_attr_trim); | |
482 | ||
483 | return err; | |
484 | } | |
485 | ||
d815461c DB |
486 | static void rs5c_sysfs_unregister(struct device *dev) |
487 | { | |
488 | device_remove_file(dev, &dev_attr_trim); | |
489 | device_remove_file(dev, &dev_attr_osc); | |
490 | } | |
491 | ||
cb26b572 DB |
492 | #else |
493 | static int rs5c_sysfs_register(struct device *dev) | |
494 | { | |
495 | return 0; | |
7520b94d | 496 | } |
d815461c DB |
497 | |
498 | static void rs5c_sysfs_unregister(struct device *dev) | |
499 | { | |
500 | /* nothing */ | |
501 | } | |
cb26b572 DB |
502 | #endif /* SYSFS */ |
503 | ||
504 | static struct i2c_driver rs5c372_driver; | |
7520b94d | 505 | |
d2653e92 JD |
506 | static int rs5c372_probe(struct i2c_client *client, |
507 | const struct i2c_device_id *id) | |
7520b94d AZ |
508 | { |
509 | int err = 0; | |
c6f24f99 | 510 | struct rs5c372 *rs5c372; |
cb26b572 | 511 | struct rtc_time tm; |
7520b94d | 512 | |
2a4e2b87 | 513 | dev_dbg(&client->dev, "%s\n", __func__); |
7520b94d | 514 | |
d815461c | 515 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { |
7520b94d AZ |
516 | err = -ENODEV; |
517 | goto exit; | |
518 | } | |
519 | ||
c6f24f99 | 520 | if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { |
7520b94d AZ |
521 | err = -ENOMEM; |
522 | goto exit; | |
523 | } | |
cb26b572 | 524 | |
cb26b572 | 525 | rs5c372->client = client; |
c6f24f99 | 526 | i2c_set_clientdata(client, rs5c372); |
3760f736 | 527 | rs5c372->type = id->driver_data; |
c6f24f99 | 528 | |
e2bfe342 PM |
529 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
530 | rs5c372->regs = &rs5c372->buf[1]; | |
531 | ||
cb26b572 DB |
532 | err = rs5c_get_regs(rs5c372); |
533 | if (err < 0) | |
d815461c | 534 | goto exit_kfree; |
cb26b572 | 535 | |
cb26b572 DB |
536 | /* clock may be set for am/pm or 24 hr time */ |
537 | switch (rs5c372->type) { | |
538 | case rtc_rs5c372a: | |
539 | case rtc_rs5c372b: | |
540 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. | |
541 | * so does periodic irq, except some 327a modes. | |
542 | */ | |
543 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) | |
544 | rs5c372->time24 = 1; | |
545 | break; | |
546 | case rtc_rv5c386: | |
547 | case rtc_rv5c387a: | |
548 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) | |
549 | rs5c372->time24 = 1; | |
550 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic | |
551 | * irq, on both 386 and 387 | |
552 | */ | |
553 | break; | |
554 | default: | |
555 | dev_err(&client->dev, "unknown RTC type\n"); | |
d815461c | 556 | goto exit_kfree; |
cb26b572 DB |
557 | } |
558 | ||
559 | /* if the oscillator lost power and no other software (like | |
560 | * the bootloader) set it up, do it here. | |
561 | */ | |
562 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP) { | |
563 | unsigned char buf[3]; | |
564 | ||
565 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; | |
566 | ||
567 | buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); | |
568 | buf[1] = rs5c372->regs[RS5C_REG_CTRL1]; | |
569 | buf[2] = rs5c372->regs[RS5C_REG_CTRL2]; | |
570 | ||
571 | /* use 24hr mode */ | |
572 | switch (rs5c372->type) { | |
573 | case rtc_rs5c372a: | |
574 | case rtc_rs5c372b: | |
575 | buf[2] |= RS5C372_CTRL2_24; | |
576 | rs5c372->time24 = 1; | |
577 | break; | |
578 | case rtc_rv5c386: | |
579 | case rtc_rv5c387a: | |
580 | buf[1] |= RV5C387_CTRL1_24; | |
581 | rs5c372->time24 = 1; | |
582 | break; | |
583 | default: | |
584 | /* impossible */ | |
585 | break; | |
586 | } | |
587 | ||
588 | if ((i2c_master_send(client, buf, 3)) != 3) { | |
589 | dev_err(&client->dev, "setup error\n"); | |
d815461c | 590 | goto exit_kfree; |
cb26b572 DB |
591 | } |
592 | rs5c372->regs[RS5C_REG_CTRL1] = buf[1]; | |
593 | rs5c372->regs[RS5C_REG_CTRL2] = buf[2]; | |
594 | } | |
595 | ||
596 | if (rs5c372_get_datetime(client, &tm) < 0) | |
597 | dev_warn(&client->dev, "clock needs to be set\n"); | |
598 | ||
599 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", | |
600 | ({ char *s; switch (rs5c372->type) { | |
601 | case rtc_rs5c372a: s = "rs5c372a"; break; | |
602 | case rtc_rs5c372b: s = "rs5c372b"; break; | |
603 | case rtc_rv5c386: s = "rv5c386"; break; | |
604 | case rtc_rv5c387a: s = "rv5c387a"; break; | |
605 | default: s = "chip"; break; | |
606 | }; s;}), | |
607 | rs5c372->time24 ? "24hr" : "am/pm" | |
608 | ); | |
609 | ||
d815461c | 610 | /* REVISIT use client->irq to register alarm irq ... */ |
7520b94d | 611 | |
c6f24f99 RV |
612 | rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name, |
613 | &client->dev, &rs5c372_rtc_ops, THIS_MODULE); | |
7520b94d | 614 | |
c6f24f99 RV |
615 | if (IS_ERR(rs5c372->rtc)) { |
616 | err = PTR_ERR(rs5c372->rtc); | |
d815461c | 617 | goto exit_kfree; |
7520b94d AZ |
618 | } |
619 | ||
cb26b572 | 620 | err = rs5c_sysfs_register(&client->dev); |
c6f24f99 RV |
621 | if (err) |
622 | goto exit_devreg; | |
7520b94d AZ |
623 | |
624 | return 0; | |
625 | ||
91046a8a | 626 | exit_devreg: |
c6f24f99 | 627 | rtc_device_unregister(rs5c372->rtc); |
91046a8a | 628 | |
7520b94d | 629 | exit_kfree: |
c6f24f99 | 630 | kfree(rs5c372); |
7520b94d AZ |
631 | |
632 | exit: | |
633 | return err; | |
634 | } | |
635 | ||
d815461c | 636 | static int rs5c372_remove(struct i2c_client *client) |
cb26b572 | 637 | { |
c6f24f99 | 638 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
7520b94d | 639 | |
d815461c DB |
640 | rtc_device_unregister(rs5c372->rtc); |
641 | rs5c_sysfs_unregister(&client->dev); | |
c6f24f99 | 642 | kfree(rs5c372); |
7520b94d AZ |
643 | return 0; |
644 | } | |
645 | ||
cb26b572 DB |
646 | static struct i2c_driver rs5c372_driver = { |
647 | .driver = { | |
648 | .name = "rtc-rs5c372", | |
649 | }, | |
d815461c DB |
650 | .probe = rs5c372_probe, |
651 | .remove = rs5c372_remove, | |
3760f736 | 652 | .id_table = rs5c372_id, |
cb26b572 DB |
653 | }; |
654 | ||
7520b94d AZ |
655 | static __init int rs5c372_init(void) |
656 | { | |
657 | return i2c_add_driver(&rs5c372_driver); | |
658 | } | |
659 | ||
660 | static __exit void rs5c372_exit(void) | |
661 | { | |
662 | i2c_del_driver(&rs5c372_driver); | |
663 | } | |
664 | ||
665 | module_init(rs5c372_init); | |
666 | module_exit(rs5c372_exit); | |
667 | ||
668 | MODULE_AUTHOR( | |
669 | "Pavel Mironchik <pmironchik@optifacio.net>, " | |
670 | "Alessandro Zummo <a.zummo@towertech.it>"); | |
671 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); | |
672 | MODULE_LICENSE("GPL"); | |
673 | MODULE_VERSION(DRV_VERSION); |