Commit | Line | Data |
---|---|---|
7520b94d | 1 | /* |
37fc5e2c | 2 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
7520b94d AZ |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> | |
5 | * Copyright (C) 2006 Tower Technologies | |
0053dc0d | 6 | * Copyright (C) 2008 Paul Mundt |
7520b94d AZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/i2c.h> | |
14 | #include <linux/rtc.h> | |
15 | #include <linux/bcd.h> | |
5a0e3ad6 | 16 | #include <linux/slab.h> |
7520b94d | 17 | |
0053dc0d | 18 | #define DRV_VERSION "0.6" |
7520b94d | 19 | |
cb26b572 DB |
20 | |
21 | /* | |
22 | * Ricoh has a family of I2C based RTCs, which differ only slightly from | |
23 | * each other. Differences center on pinout (e.g. how many interrupts, | |
24 | * output clock, etc) and how the control registers are used. The '372 | |
25 | * is significant only because that's the one this driver first supported. | |
26 | */ | |
7520b94d AZ |
27 | #define RS5C372_REG_SECS 0 |
28 | #define RS5C372_REG_MINS 1 | |
29 | #define RS5C372_REG_HOURS 2 | |
30 | #define RS5C372_REG_WDAY 3 | |
31 | #define RS5C372_REG_DAY 4 | |
32 | #define RS5C372_REG_MONTH 5 | |
33 | #define RS5C372_REG_YEAR 6 | |
34 | #define RS5C372_REG_TRIM 7 | |
cb26b572 DB |
35 | # define RS5C372_TRIM_XSL 0x80 |
36 | # define RS5C372_TRIM_MASK 0x7F | |
37 | ||
38 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ | |
39 | #define RS5C_REG_ALARM_A_HOURS 9 | |
40 | #define RS5C_REG_ALARM_A_WDAY 10 | |
41 | ||
42 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ | |
43 | #define RS5C_REG_ALARM_B_HOURS 12 | |
44 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ | |
45 | ||
46 | #define RS5C_REG_CTRL1 14 | |
47 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ | |
48 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ | |
49 | # define RV5C387_CTRL1_24 (1 << 5) | |
50 | # define RS5C372A_CTRL1_SL1 (1 << 5) | |
51 | # define RS5C_CTRL1_CT_MASK (7 << 0) | |
52 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ | |
53 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ | |
54 | #define RS5C_REG_CTRL2 15 | |
55 | # define RS5C372_CTRL2_24 (1 << 5) | |
37fc5e2c PM |
56 | # define R2025_CTRL2_XST (1 << 5) |
57 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ | |
cb26b572 DB |
58 | # define RS5C_CTRL2_CTFG (1 << 2) |
59 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ | |
60 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ | |
61 | ||
62 | ||
63 | /* to read (style 1) or write registers starting at R */ | |
64 | #define RS5C_ADDR(R) (((R) << 4) | 0) | |
65 | ||
66 | ||
67 | enum rtc_type { | |
68 | rtc_undef = 0, | |
37fc5e2c | 69 | rtc_r2025sd, |
cb26b572 DB |
70 | rtc_rs5c372a, |
71 | rtc_rs5c372b, | |
72 | rtc_rv5c386, | |
73 | rtc_rv5c387a, | |
74 | }; | |
7520b94d | 75 | |
3760f736 | 76 | static const struct i2c_device_id rs5c372_id[] = { |
37fc5e2c | 77 | { "r2025sd", rtc_r2025sd }, |
3760f736 JD |
78 | { "rs5c372a", rtc_rs5c372a }, |
79 | { "rs5c372b", rtc_rs5c372b }, | |
80 | { "rv5c386", rtc_rv5c386 }, | |
81 | { "rv5c387a", rtc_rv5c387a }, | |
82 | { } | |
83 | }; | |
84 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); | |
85 | ||
cb26b572 DB |
86 | /* REVISIT: this assumes that: |
87 | * - we're in the 21st century, so it's safe to ignore the century | |
88 | * bit for rv5c38[67] (REG_MONTH bit 7); | |
89 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) | |
90 | */ | |
91 | struct rs5c372 { | |
92 | struct i2c_client *client; | |
93 | struct rtc_device *rtc; | |
94 | enum rtc_type type; | |
95 | unsigned time24:1; | |
96 | unsigned has_irq:1; | |
0053dc0d | 97 | unsigned smbus:1; |
cb26b572 DB |
98 | char buf[17]; |
99 | char *regs; | |
cb26b572 | 100 | }; |
7520b94d | 101 | |
cb26b572 DB |
102 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
103 | { | |
104 | struct i2c_client *client = rs5c->client; | |
105 | struct i2c_msg msgs[] = { | |
106 | { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf }, | |
107 | }; | |
108 | ||
109 | /* This implements the third reading method from the datasheet, using | |
110 | * an internal address that's reset after each transaction (by STOP) | |
111 | * to 0x0f ... so we read extra registers, and skip the first one. | |
112 | * | |
113 | * The first method doesn't work with the iop3xx adapter driver, on at | |
114 | * least 80219 chips; this works around that bug. | |
0053dc0d PM |
115 | * |
116 | * The third method on the other hand doesn't work for the SMBus-only | |
117 | * configurations, so we use the the first method there, stripping off | |
118 | * the extra register in the process. | |
cb26b572 | 119 | */ |
0053dc0d PM |
120 | if (rs5c->smbus) { |
121 | int addr = RS5C_ADDR(RS5C372_REG_SECS); | |
122 | int size = sizeof(rs5c->buf) - 1; | |
123 | ||
124 | if (i2c_smbus_read_i2c_block_data(client, addr, size, | |
125 | rs5c->buf + 1) != size) { | |
126 | dev_warn(&client->dev, "can't read registers\n"); | |
127 | return -EIO; | |
128 | } | |
129 | } else { | |
130 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { | |
131 | dev_warn(&client->dev, "can't read registers\n"); | |
132 | return -EIO; | |
133 | } | |
cb26b572 | 134 | } |
7520b94d | 135 | |
cb26b572 DB |
136 | dev_dbg(&client->dev, |
137 | "%02x %02x %02x (%02x) %02x %02x %02x (%02x), " | |
138 | "%02x %02x %02x, %02x %02x %02x; %02x %02x\n", | |
139 | rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3], | |
140 | rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7], | |
141 | rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11], | |
142 | rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]); | |
7520b94d | 143 | |
cb26b572 DB |
144 | return 0; |
145 | } | |
c6f24f99 | 146 | |
cb26b572 DB |
147 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
148 | { | |
149 | unsigned hour; | |
7520b94d | 150 | |
cb26b572 | 151 | if (rs5c->time24) |
fe20ba70 | 152 | return bcd2bin(reg & 0x3f); |
cb26b572 | 153 | |
fe20ba70 | 154 | hour = bcd2bin(reg & 0x1f); |
cb26b572 DB |
155 | if (hour == 12) |
156 | hour = 0; | |
157 | if (reg & 0x20) | |
158 | hour += 12; | |
159 | return hour; | |
160 | } | |
161 | ||
162 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) | |
7520b94d | 163 | { |
cb26b572 | 164 | if (rs5c->time24) |
fe20ba70 | 165 | return bin2bcd(hour); |
cb26b572 DB |
166 | |
167 | if (hour > 12) | |
fe20ba70 | 168 | return 0x20 | bin2bcd(hour - 12); |
cb26b572 | 169 | if (hour == 12) |
fe20ba70 | 170 | return 0x20 | bin2bcd(12); |
cb26b572 | 171 | if (hour == 0) |
fe20ba70 AB |
172 | return bin2bcd(12); |
173 | return bin2bcd(hour); | |
cb26b572 | 174 | } |
7520b94d | 175 | |
cb26b572 DB |
176 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
177 | { | |
178 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
179 | int status = rs5c_get_regs(rs5c); | |
c6f24f99 | 180 | |
cb26b572 DB |
181 | if (status < 0) |
182 | return status; | |
7520b94d | 183 | |
fe20ba70 AB |
184 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
185 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); | |
cb26b572 | 186 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
7520b94d | 187 | |
fe20ba70 AB |
188 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
189 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); | |
7520b94d AZ |
190 | |
191 | /* tm->tm_mon is zero-based */ | |
fe20ba70 | 192 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
7520b94d AZ |
193 | |
194 | /* year is 1900 + tm->tm_year */ | |
fe20ba70 | 195 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
7520b94d AZ |
196 | |
197 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | |
198 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
2a4e2b87 | 199 | __func__, |
7520b94d AZ |
200 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
201 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | |
202 | ||
cb26b572 DB |
203 | /* rtc might need initialization */ |
204 | return rtc_valid_tm(tm); | |
7520b94d AZ |
205 | } |
206 | ||
207 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
208 | { | |
cb26b572 | 209 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
11836494 | 210 | unsigned char buf[7]; |
0053dc0d | 211 | int addr; |
7520b94d | 212 | |
cb26b572 | 213 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
7520b94d | 214 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 215 | __func__, |
cb26b572 | 216 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
7520b94d AZ |
217 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
218 | ||
0053dc0d | 219 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
fe20ba70 AB |
220 | buf[0] = bin2bcd(tm->tm_sec); |
221 | buf[1] = bin2bcd(tm->tm_min); | |
0053dc0d | 222 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
fe20ba70 AB |
223 | buf[3] = bin2bcd(tm->tm_wday); |
224 | buf[4] = bin2bcd(tm->tm_mday); | |
225 | buf[5] = bin2bcd(tm->tm_mon + 1); | |
226 | buf[6] = bin2bcd(tm->tm_year - 100); | |
7520b94d | 227 | |
0053dc0d | 228 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
2a4e2b87 | 229 | dev_err(&client->dev, "%s: write error\n", __func__); |
7520b94d AZ |
230 | return -EIO; |
231 | } | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
cb26b572 DB |
236 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
237 | #define NEED_TRIM | |
238 | #endif | |
239 | ||
240 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | |
241 | #define NEED_TRIM | |
242 | #endif | |
243 | ||
244 | #ifdef NEED_TRIM | |
7520b94d AZ |
245 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
246 | { | |
c6f24f99 | 247 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
cb26b572 | 248 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
7520b94d | 249 | |
7520b94d | 250 | if (osc) |
c6f24f99 | 251 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
7520b94d | 252 | |
17ad78e5 | 253 | if (trim) { |
2a4e2b87 | 254 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
cb26b572 DB |
255 | tmp &= RS5C372_TRIM_MASK; |
256 | if (tmp & 0x3e) { | |
257 | int t = tmp & 0x3f; | |
258 | ||
259 | if (tmp & 0x40) | |
260 | t = (~t | (s8)0xc0) + 1; | |
261 | else | |
262 | t = t - 1; | |
263 | ||
264 | tmp = t * 2; | |
265 | } else | |
266 | tmp = 0; | |
267 | *trim = tmp; | |
17ad78e5 | 268 | } |
7520b94d AZ |
269 | |
270 | return 0; | |
271 | } | |
cb26b572 | 272 | #endif |
7520b94d AZ |
273 | |
274 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
275 | { | |
276 | return rs5c372_get_datetime(to_i2c_client(dev), tm); | |
277 | } | |
278 | ||
279 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
280 | { | |
281 | return rs5c372_set_datetime(to_i2c_client(dev), tm); | |
282 | } | |
283 | ||
cb26b572 DB |
284 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) |
285 | ||
286 | static int | |
287 | rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
288 | { | |
289 | struct i2c_client *client = to_i2c_client(dev); | |
290 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
0053dc0d PM |
291 | unsigned char buf; |
292 | int status, addr; | |
cb26b572 | 293 | |
0053dc0d | 294 | buf = rs5c->regs[RS5C_REG_CTRL1]; |
cb26b572 DB |
295 | switch (cmd) { |
296 | case RTC_UIE_OFF: | |
297 | case RTC_UIE_ON: | |
298 | /* some 327a modes use a different IRQ pin for 1Hz irqs */ | |
299 | if (rs5c->type == rtc_rs5c372a | |
0053dc0d | 300 | && (buf & RS5C372A_CTRL1_SL1)) |
cb26b572 | 301 | return -ENOIOCTLCMD; |
cb26b572 DB |
302 | default: |
303 | return -ENOIOCTLCMD; | |
304 | } | |
305 | ||
306 | status = rs5c_get_regs(rs5c); | |
307 | if (status < 0) | |
308 | return status; | |
309 | ||
0053dc0d | 310 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
cb26b572 | 311 | switch (cmd) { |
cb26b572 | 312 | case RTC_UIE_OFF: /* update off */ |
0053dc0d | 313 | buf &= ~RS5C_CTRL1_CT_MASK; |
cb26b572 DB |
314 | break; |
315 | case RTC_UIE_ON: /* update on */ | |
0053dc0d PM |
316 | buf &= ~RS5C_CTRL1_CT_MASK; |
317 | buf |= RS5C_CTRL1_CT4; | |
cb26b572 DB |
318 | break; |
319 | } | |
0053dc0d PM |
320 | |
321 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { | |
cb26b572 DB |
322 | printk(KERN_WARNING "%s: can't update alarm\n", |
323 | rs5c->rtc->name); | |
324 | status = -EIO; | |
325 | } else | |
0053dc0d PM |
326 | rs5c->regs[RS5C_REG_CTRL1] = buf; |
327 | ||
cb26b572 DB |
328 | return status; |
329 | } | |
330 | ||
331 | #else | |
332 | #define rs5c_rtc_ioctl NULL | |
333 | #endif | |
334 | ||
335 | ||
16380c15 JS |
336 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
337 | { | |
338 | struct i2c_client *client = to_i2c_client(dev); | |
339 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
340 | unsigned char buf; | |
341 | int status, addr; | |
342 | ||
343 | buf = rs5c->regs[RS5C_REG_CTRL1]; | |
344 | ||
345 | if (!rs5c->has_irq) | |
346 | return -EINVAL; | |
347 | ||
348 | status = rs5c_get_regs(rs5c); | |
349 | if (status < 0) | |
350 | return status; | |
351 | ||
352 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
353 | if (enabled) | |
354 | buf |= RS5C_CTRL1_AALE; | |
355 | else | |
356 | buf &= ~RS5C_CTRL1_AALE; | |
357 | ||
358 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { | |
359 | printk(KERN_WARNING "%s: can't update alarm\n", | |
360 | rs5c->rtc->name); | |
361 | status = -EIO; | |
362 | } else | |
363 | rs5c->regs[RS5C_REG_CTRL1] = buf; | |
364 | ||
365 | return status; | |
366 | } | |
367 | ||
368 | ||
cb26b572 DB |
369 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
370 | * which only exposes a polled programming interface; and since | |
371 | * these calls map directly to those EFI requests; we don't demand | |
372 | * we have an IRQ for this chip when we go through this API. | |
373 | * | |
374 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs | |
375 | * though, managed through RTC_AIE_{ON,OFF} requests. | |
376 | */ | |
377 | ||
378 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
379 | { | |
380 | struct i2c_client *client = to_i2c_client(dev); | |
381 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
382 | int status; | |
383 | ||
384 | status = rs5c_get_regs(rs5c); | |
385 | if (status < 0) | |
386 | return status; | |
387 | ||
388 | /* report alarm time */ | |
389 | t->time.tm_sec = 0; | |
fe20ba70 | 390 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
cb26b572 DB |
391 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
392 | t->time.tm_mday = -1; | |
393 | t->time.tm_mon = -1; | |
394 | t->time.tm_year = -1; | |
395 | t->time.tm_wday = -1; | |
396 | t->time.tm_yday = -1; | |
397 | t->time.tm_isdst = -1; | |
398 | ||
399 | /* ... and status */ | |
400 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); | |
401 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
406 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
407 | { | |
408 | struct i2c_client *client = to_i2c_client(dev); | |
409 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
0053dc0d PM |
410 | int status, addr, i; |
411 | unsigned char buf[3]; | |
cb26b572 DB |
412 | |
413 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ | |
414 | if (t->time.tm_mday != -1 | |
415 | || t->time.tm_mon != -1 | |
416 | || t->time.tm_year != -1) | |
417 | return -EINVAL; | |
418 | ||
419 | /* REVISIT: round up tm_sec */ | |
420 | ||
421 | /* if needed, disable irq (clears pending status) */ | |
422 | status = rs5c_get_regs(rs5c); | |
423 | if (status < 0) | |
424 | return status; | |
425 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { | |
0053dc0d PM |
426 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
427 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; | |
428 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { | |
cb26b572 DB |
429 | pr_debug("%s: can't disable alarm\n", rs5c->rtc->name); |
430 | return -EIO; | |
431 | } | |
0053dc0d | 432 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
433 | } |
434 | ||
435 | /* set alarm */ | |
fe20ba70 | 436 | buf[0] = bin2bcd(t->time.tm_min); |
0053dc0d PM |
437 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
438 | buf[2] = 0x7f; /* any/all days */ | |
439 | ||
440 | for (i = 0; i < sizeof(buf); i++) { | |
441 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); | |
442 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { | |
443 | pr_debug("%s: can't set alarm time\n", rs5c->rtc->name); | |
444 | return -EIO; | |
445 | } | |
cb26b572 DB |
446 | } |
447 | ||
448 | /* ... and maybe enable its irq */ | |
449 | if (t->enabled) { | |
0053dc0d PM |
450 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
451 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; | |
452 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) | |
cb26b572 DB |
453 | printk(KERN_WARNING "%s: can't enable alarm\n", |
454 | rs5c->rtc->name); | |
0053dc0d | 455 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
456 | } |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
461 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
462 | ||
7520b94d AZ |
463 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
464 | { | |
465 | int err, osc, trim; | |
466 | ||
adfb4341 AZ |
467 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
468 | if (err == 0) { | |
cb26b572 DB |
469 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
470 | osc / 1000, osc % 1000); | |
471 | seq_printf(seq, "trim\t\t: %d\n", trim); | |
7520b94d AZ |
472 | } |
473 | ||
474 | return 0; | |
475 | } | |
476 | ||
cb26b572 DB |
477 | #else |
478 | #define rs5c372_rtc_proc NULL | |
479 | #endif | |
480 | ||
ff8371ac | 481 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
7520b94d | 482 | .proc = rs5c372_rtc_proc, |
cb26b572 | 483 | .ioctl = rs5c_rtc_ioctl, |
7520b94d AZ |
484 | .read_time = rs5c372_rtc_read_time, |
485 | .set_time = rs5c372_rtc_set_time, | |
cb26b572 DB |
486 | .read_alarm = rs5c_read_alarm, |
487 | .set_alarm = rs5c_set_alarm, | |
16380c15 | 488 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, |
7520b94d AZ |
489 | }; |
490 | ||
cb26b572 DB |
491 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
492 | ||
7520b94d AZ |
493 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
494 | struct device_attribute *attr, char *buf) | |
495 | { | |
82896072 | 496 | int err, trim; |
7520b94d | 497 | |
82896072 AZ |
498 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
499 | if (err) | |
500 | return err; | |
7520b94d | 501 | |
cb26b572 | 502 | return sprintf(buf, "%d\n", trim); |
7520b94d AZ |
503 | } |
504 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); | |
505 | ||
506 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, | |
507 | struct device_attribute *attr, char *buf) | |
508 | { | |
82896072 | 509 | int err, osc; |
7520b94d | 510 | |
82896072 AZ |
511 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
512 | if (err) | |
513 | return err; | |
7520b94d | 514 | |
82896072 | 515 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
7520b94d AZ |
516 | } |
517 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); | |
518 | ||
cb26b572 | 519 | static int rs5c_sysfs_register(struct device *dev) |
7520b94d | 520 | { |
cb26b572 DB |
521 | int err; |
522 | ||
523 | err = device_create_file(dev, &dev_attr_trim); | |
524 | if (err) | |
525 | return err; | |
526 | err = device_create_file(dev, &dev_attr_osc); | |
527 | if (err) | |
528 | device_remove_file(dev, &dev_attr_trim); | |
529 | ||
530 | return err; | |
531 | } | |
532 | ||
d815461c DB |
533 | static void rs5c_sysfs_unregister(struct device *dev) |
534 | { | |
535 | device_remove_file(dev, &dev_attr_trim); | |
536 | device_remove_file(dev, &dev_attr_osc); | |
537 | } | |
538 | ||
cb26b572 DB |
539 | #else |
540 | static int rs5c_sysfs_register(struct device *dev) | |
541 | { | |
542 | return 0; | |
7520b94d | 543 | } |
d815461c DB |
544 | |
545 | static void rs5c_sysfs_unregister(struct device *dev) | |
546 | { | |
547 | /* nothing */ | |
548 | } | |
cb26b572 DB |
549 | #endif /* SYSFS */ |
550 | ||
551 | static struct i2c_driver rs5c372_driver; | |
7520b94d | 552 | |
0053dc0d PM |
553 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
554 | { | |
555 | unsigned char buf[2]; | |
556 | int addr, i, ret = 0; | |
557 | ||
37fc5e2c PM |
558 | if (rs5c372->type == rtc_r2025sd) { |
559 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)) | |
560 | return ret; | |
561 | rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST; | |
562 | } else { | |
563 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) | |
564 | return ret; | |
565 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; | |
566 | } | |
0053dc0d PM |
567 | |
568 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
569 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; | |
570 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; | |
571 | ||
572 | /* use 24hr mode */ | |
573 | switch (rs5c372->type) { | |
574 | case rtc_rs5c372a: | |
575 | case rtc_rs5c372b: | |
576 | buf[1] |= RS5C372_CTRL2_24; | |
577 | rs5c372->time24 = 1; | |
578 | break; | |
37fc5e2c | 579 | case rtc_r2025sd: |
0053dc0d PM |
580 | case rtc_rv5c386: |
581 | case rtc_rv5c387a: | |
582 | buf[0] |= RV5C387_CTRL1_24; | |
583 | rs5c372->time24 = 1; | |
584 | break; | |
585 | default: | |
586 | /* impossible */ | |
587 | break; | |
588 | } | |
589 | ||
590 | for (i = 0; i < sizeof(buf); i++) { | |
591 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); | |
592 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); | |
593 | if (unlikely(ret < 0)) | |
594 | return ret; | |
595 | } | |
596 | ||
597 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; | |
598 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; | |
599 | ||
600 | return 0; | |
601 | } | |
602 | ||
d2653e92 JD |
603 | static int rs5c372_probe(struct i2c_client *client, |
604 | const struct i2c_device_id *id) | |
7520b94d AZ |
605 | { |
606 | int err = 0; | |
0053dc0d | 607 | int smbus_mode = 0; |
c6f24f99 | 608 | struct rs5c372 *rs5c372; |
cb26b572 | 609 | struct rtc_time tm; |
7520b94d | 610 | |
2a4e2b87 | 611 | dev_dbg(&client->dev, "%s\n", __func__); |
7520b94d | 612 | |
0053dc0d PM |
613 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
614 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { | |
615 | /* | |
616 | * If we don't have any master mode adapter, try breaking | |
617 | * it down in to the barest of capabilities. | |
618 | */ | |
619 | if (i2c_check_functionality(client->adapter, | |
620 | I2C_FUNC_SMBUS_BYTE_DATA | | |
621 | I2C_FUNC_SMBUS_I2C_BLOCK)) | |
622 | smbus_mode = 1; | |
623 | else { | |
624 | /* Still no good, give up */ | |
625 | err = -ENODEV; | |
626 | goto exit; | |
627 | } | |
7520b94d AZ |
628 | } |
629 | ||
c6f24f99 | 630 | if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { |
7520b94d AZ |
631 | err = -ENOMEM; |
632 | goto exit; | |
633 | } | |
cb26b572 | 634 | |
cb26b572 | 635 | rs5c372->client = client; |
c6f24f99 | 636 | i2c_set_clientdata(client, rs5c372); |
3760f736 | 637 | rs5c372->type = id->driver_data; |
c6f24f99 | 638 | |
e2bfe342 PM |
639 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
640 | rs5c372->regs = &rs5c372->buf[1]; | |
0053dc0d | 641 | rs5c372->smbus = smbus_mode; |
e2bfe342 | 642 | |
cb26b572 DB |
643 | err = rs5c_get_regs(rs5c372); |
644 | if (err < 0) | |
d815461c | 645 | goto exit_kfree; |
cb26b572 | 646 | |
cb26b572 DB |
647 | /* clock may be set for am/pm or 24 hr time */ |
648 | switch (rs5c372->type) { | |
649 | case rtc_rs5c372a: | |
650 | case rtc_rs5c372b: | |
651 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. | |
652 | * so does periodic irq, except some 327a modes. | |
653 | */ | |
654 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) | |
655 | rs5c372->time24 = 1; | |
656 | break; | |
37fc5e2c | 657 | case rtc_r2025sd: |
cb26b572 DB |
658 | case rtc_rv5c386: |
659 | case rtc_rv5c387a: | |
660 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) | |
661 | rs5c372->time24 = 1; | |
662 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic | |
663 | * irq, on both 386 and 387 | |
664 | */ | |
665 | break; | |
666 | default: | |
667 | dev_err(&client->dev, "unknown RTC type\n"); | |
d815461c | 668 | goto exit_kfree; |
cb26b572 DB |
669 | } |
670 | ||
671 | /* if the oscillator lost power and no other software (like | |
672 | * the bootloader) set it up, do it here. | |
37fc5e2c PM |
673 | * |
674 | * The R2025S/D does this a little differently than the other | |
675 | * parts, so we special case that.. | |
cb26b572 | 676 | */ |
0053dc0d PM |
677 | err = rs5c_oscillator_setup(rs5c372); |
678 | if (unlikely(err < 0)) { | |
679 | dev_err(&client->dev, "setup error\n"); | |
680 | goto exit_kfree; | |
cb26b572 DB |
681 | } |
682 | ||
683 | if (rs5c372_get_datetime(client, &tm) < 0) | |
684 | dev_warn(&client->dev, "clock needs to be set\n"); | |
685 | ||
686 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", | |
687 | ({ char *s; switch (rs5c372->type) { | |
37fc5e2c | 688 | case rtc_r2025sd: s = "r2025sd"; break; |
cb26b572 DB |
689 | case rtc_rs5c372a: s = "rs5c372a"; break; |
690 | case rtc_rs5c372b: s = "rs5c372b"; break; | |
691 | case rtc_rv5c386: s = "rv5c386"; break; | |
692 | case rtc_rv5c387a: s = "rv5c387a"; break; | |
693 | default: s = "chip"; break; | |
694 | }; s;}), | |
695 | rs5c372->time24 ? "24hr" : "am/pm" | |
696 | ); | |
697 | ||
d815461c | 698 | /* REVISIT use client->irq to register alarm irq ... */ |
7520b94d | 699 | |
c6f24f99 RV |
700 | rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name, |
701 | &client->dev, &rs5c372_rtc_ops, THIS_MODULE); | |
7520b94d | 702 | |
c6f24f99 RV |
703 | if (IS_ERR(rs5c372->rtc)) { |
704 | err = PTR_ERR(rs5c372->rtc); | |
d815461c | 705 | goto exit_kfree; |
7520b94d AZ |
706 | } |
707 | ||
cb26b572 | 708 | err = rs5c_sysfs_register(&client->dev); |
c6f24f99 RV |
709 | if (err) |
710 | goto exit_devreg; | |
7520b94d AZ |
711 | |
712 | return 0; | |
713 | ||
91046a8a | 714 | exit_devreg: |
c6f24f99 | 715 | rtc_device_unregister(rs5c372->rtc); |
91046a8a | 716 | |
7520b94d | 717 | exit_kfree: |
c6f24f99 | 718 | kfree(rs5c372); |
7520b94d AZ |
719 | |
720 | exit: | |
721 | return err; | |
722 | } | |
723 | ||
d815461c | 724 | static int rs5c372_remove(struct i2c_client *client) |
cb26b572 | 725 | { |
c6f24f99 | 726 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
7520b94d | 727 | |
d815461c DB |
728 | rtc_device_unregister(rs5c372->rtc); |
729 | rs5c_sysfs_unregister(&client->dev); | |
c6f24f99 | 730 | kfree(rs5c372); |
7520b94d AZ |
731 | return 0; |
732 | } | |
733 | ||
cb26b572 DB |
734 | static struct i2c_driver rs5c372_driver = { |
735 | .driver = { | |
736 | .name = "rtc-rs5c372", | |
737 | }, | |
d815461c DB |
738 | .probe = rs5c372_probe, |
739 | .remove = rs5c372_remove, | |
3760f736 | 740 | .id_table = rs5c372_id, |
cb26b572 DB |
741 | }; |
742 | ||
7520b94d AZ |
743 | static __init int rs5c372_init(void) |
744 | { | |
745 | return i2c_add_driver(&rs5c372_driver); | |
746 | } | |
747 | ||
748 | static __exit void rs5c372_exit(void) | |
749 | { | |
750 | i2c_del_driver(&rs5c372_driver); | |
751 | } | |
752 | ||
753 | module_init(rs5c372_init); | |
754 | module_exit(rs5c372_exit); | |
755 | ||
756 | MODULE_AUTHOR( | |
757 | "Pavel Mironchik <pmironchik@optifacio.net>, " | |
0053dc0d PM |
758 | "Alessandro Zummo <a.zummo@towertech.it>, " |
759 | "Paul Mundt <lethal@linux-sh.org>"); | |
7520b94d AZ |
760 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
761 | MODULE_LICENSE("GPL"); | |
762 | MODULE_VERSION(DRV_VERSION); |