Commit | Line | Data |
---|---|---|
7520b94d | 1 | /* |
37fc5e2c | 2 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
7520b94d AZ |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> | |
5 | * Copyright (C) 2006 Tower Technologies | |
0053dc0d | 6 | * Copyright (C) 2008 Paul Mundt |
7520b94d AZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/i2c.h> | |
14 | #include <linux/rtc.h> | |
15 | #include <linux/bcd.h> | |
5a0e3ad6 | 16 | #include <linux/slab.h> |
2113852b | 17 | #include <linux/module.h> |
7520b94d | 18 | |
0053dc0d | 19 | #define DRV_VERSION "0.6" |
7520b94d | 20 | |
cb26b572 DB |
21 | |
22 | /* | |
23 | * Ricoh has a family of I2C based RTCs, which differ only slightly from | |
24 | * each other. Differences center on pinout (e.g. how many interrupts, | |
25 | * output clock, etc) and how the control registers are used. The '372 | |
26 | * is significant only because that's the one this driver first supported. | |
27 | */ | |
7520b94d AZ |
28 | #define RS5C372_REG_SECS 0 |
29 | #define RS5C372_REG_MINS 1 | |
30 | #define RS5C372_REG_HOURS 2 | |
31 | #define RS5C372_REG_WDAY 3 | |
32 | #define RS5C372_REG_DAY 4 | |
33 | #define RS5C372_REG_MONTH 5 | |
34 | #define RS5C372_REG_YEAR 6 | |
35 | #define RS5C372_REG_TRIM 7 | |
cb26b572 DB |
36 | # define RS5C372_TRIM_XSL 0x80 |
37 | # define RS5C372_TRIM_MASK 0x7F | |
38 | ||
39 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ | |
40 | #define RS5C_REG_ALARM_A_HOURS 9 | |
41 | #define RS5C_REG_ALARM_A_WDAY 10 | |
42 | ||
43 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ | |
44 | #define RS5C_REG_ALARM_B_HOURS 12 | |
45 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ | |
46 | ||
47 | #define RS5C_REG_CTRL1 14 | |
48 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ | |
49 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ | |
50 | # define RV5C387_CTRL1_24 (1 << 5) | |
51 | # define RS5C372A_CTRL1_SL1 (1 << 5) | |
52 | # define RS5C_CTRL1_CT_MASK (7 << 0) | |
53 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ | |
54 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ | |
55 | #define RS5C_REG_CTRL2 15 | |
56 | # define RS5C372_CTRL2_24 (1 << 5) | |
37fc5e2c PM |
57 | # define R2025_CTRL2_XST (1 << 5) |
58 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ | |
cb26b572 DB |
59 | # define RS5C_CTRL2_CTFG (1 << 2) |
60 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ | |
61 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ | |
62 | ||
63 | ||
64 | /* to read (style 1) or write registers starting at R */ | |
65 | #define RS5C_ADDR(R) (((R) << 4) | 0) | |
66 | ||
67 | ||
68 | enum rtc_type { | |
69 | rtc_undef = 0, | |
37fc5e2c | 70 | rtc_r2025sd, |
550fcb8f | 71 | rtc_r2221tl, |
cb26b572 DB |
72 | rtc_rs5c372a, |
73 | rtc_rs5c372b, | |
74 | rtc_rv5c386, | |
75 | rtc_rv5c387a, | |
76 | }; | |
7520b94d | 77 | |
3760f736 | 78 | static const struct i2c_device_id rs5c372_id[] = { |
37fc5e2c | 79 | { "r2025sd", rtc_r2025sd }, |
550fcb8f | 80 | { "r2221tl", rtc_r2221tl }, |
3760f736 JD |
81 | { "rs5c372a", rtc_rs5c372a }, |
82 | { "rs5c372b", rtc_rs5c372b }, | |
83 | { "rv5c386", rtc_rv5c386 }, | |
84 | { "rv5c387a", rtc_rv5c387a }, | |
85 | { } | |
86 | }; | |
87 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); | |
88 | ||
cb26b572 DB |
89 | /* REVISIT: this assumes that: |
90 | * - we're in the 21st century, so it's safe to ignore the century | |
91 | * bit for rv5c38[67] (REG_MONTH bit 7); | |
92 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) | |
93 | */ | |
94 | struct rs5c372 { | |
95 | struct i2c_client *client; | |
96 | struct rtc_device *rtc; | |
97 | enum rtc_type type; | |
98 | unsigned time24:1; | |
99 | unsigned has_irq:1; | |
0053dc0d | 100 | unsigned smbus:1; |
cb26b572 DB |
101 | char buf[17]; |
102 | char *regs; | |
cb26b572 | 103 | }; |
7520b94d | 104 | |
cb26b572 DB |
105 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
106 | { | |
107 | struct i2c_client *client = rs5c->client; | |
108 | struct i2c_msg msgs[] = { | |
a606757f S |
109 | { |
110 | .addr = client->addr, | |
111 | .flags = I2C_M_RD, | |
112 | .len = sizeof(rs5c->buf), | |
113 | .buf = rs5c->buf | |
114 | }, | |
cb26b572 DB |
115 | }; |
116 | ||
117 | /* This implements the third reading method from the datasheet, using | |
118 | * an internal address that's reset after each transaction (by STOP) | |
119 | * to 0x0f ... so we read extra registers, and skip the first one. | |
120 | * | |
121 | * The first method doesn't work with the iop3xx adapter driver, on at | |
122 | * least 80219 chips; this works around that bug. | |
0053dc0d PM |
123 | * |
124 | * The third method on the other hand doesn't work for the SMBus-only | |
125 | * configurations, so we use the the first method there, stripping off | |
126 | * the extra register in the process. | |
cb26b572 | 127 | */ |
0053dc0d PM |
128 | if (rs5c->smbus) { |
129 | int addr = RS5C_ADDR(RS5C372_REG_SECS); | |
130 | int size = sizeof(rs5c->buf) - 1; | |
131 | ||
132 | if (i2c_smbus_read_i2c_block_data(client, addr, size, | |
133 | rs5c->buf + 1) != size) { | |
134 | dev_warn(&client->dev, "can't read registers\n"); | |
135 | return -EIO; | |
136 | } | |
137 | } else { | |
138 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { | |
139 | dev_warn(&client->dev, "can't read registers\n"); | |
140 | return -EIO; | |
141 | } | |
cb26b572 | 142 | } |
7520b94d | 143 | |
cb26b572 | 144 | dev_dbg(&client->dev, |
b513e522 AS |
145 | "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n", |
146 | rs5c->regs + 0, rs5c->regs[3], | |
147 | rs5c->regs + 4, rs5c->regs[7], | |
148 | rs5c->regs + 8, rs5c->regs + 11, | |
149 | rs5c->regs[14], rs5c->regs[15]); | |
7520b94d | 150 | |
cb26b572 DB |
151 | return 0; |
152 | } | |
c6f24f99 | 153 | |
cb26b572 DB |
154 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
155 | { | |
156 | unsigned hour; | |
7520b94d | 157 | |
cb26b572 | 158 | if (rs5c->time24) |
fe20ba70 | 159 | return bcd2bin(reg & 0x3f); |
cb26b572 | 160 | |
fe20ba70 | 161 | hour = bcd2bin(reg & 0x1f); |
cb26b572 DB |
162 | if (hour == 12) |
163 | hour = 0; | |
164 | if (reg & 0x20) | |
165 | hour += 12; | |
166 | return hour; | |
167 | } | |
168 | ||
169 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) | |
7520b94d | 170 | { |
cb26b572 | 171 | if (rs5c->time24) |
fe20ba70 | 172 | return bin2bcd(hour); |
cb26b572 DB |
173 | |
174 | if (hour > 12) | |
fe20ba70 | 175 | return 0x20 | bin2bcd(hour - 12); |
cb26b572 | 176 | if (hour == 12) |
fe20ba70 | 177 | return 0x20 | bin2bcd(12); |
cb26b572 | 178 | if (hour == 0) |
fe20ba70 AB |
179 | return bin2bcd(12); |
180 | return bin2bcd(hour); | |
cb26b572 | 181 | } |
7520b94d | 182 | |
cb26b572 DB |
183 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
184 | { | |
185 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
186 | int status = rs5c_get_regs(rs5c); | |
c6f24f99 | 187 | |
cb26b572 DB |
188 | if (status < 0) |
189 | return status; | |
7520b94d | 190 | |
fe20ba70 AB |
191 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
192 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); | |
cb26b572 | 193 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
7520b94d | 194 | |
fe20ba70 AB |
195 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
196 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); | |
7520b94d AZ |
197 | |
198 | /* tm->tm_mon is zero-based */ | |
fe20ba70 | 199 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
7520b94d AZ |
200 | |
201 | /* year is 1900 + tm->tm_year */ | |
fe20ba70 | 202 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
7520b94d AZ |
203 | |
204 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | |
205 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
2a4e2b87 | 206 | __func__, |
7520b94d AZ |
207 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
208 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | |
209 | ||
cb26b572 DB |
210 | /* rtc might need initialization */ |
211 | return rtc_valid_tm(tm); | |
7520b94d AZ |
212 | } |
213 | ||
214 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
215 | { | |
cb26b572 | 216 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
11836494 | 217 | unsigned char buf[7]; |
0053dc0d | 218 | int addr; |
7520b94d | 219 | |
cb26b572 | 220 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
7520b94d | 221 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 222 | __func__, |
cb26b572 | 223 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
7520b94d AZ |
224 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
225 | ||
0053dc0d | 226 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
fe20ba70 AB |
227 | buf[0] = bin2bcd(tm->tm_sec); |
228 | buf[1] = bin2bcd(tm->tm_min); | |
0053dc0d | 229 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
fe20ba70 AB |
230 | buf[3] = bin2bcd(tm->tm_wday); |
231 | buf[4] = bin2bcd(tm->tm_mday); | |
232 | buf[5] = bin2bcd(tm->tm_mon + 1); | |
233 | buf[6] = bin2bcd(tm->tm_year - 100); | |
7520b94d | 234 | |
0053dc0d | 235 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
2a4e2b87 | 236 | dev_err(&client->dev, "%s: write error\n", __func__); |
7520b94d AZ |
237 | return -EIO; |
238 | } | |
239 | ||
240 | return 0; | |
241 | } | |
242 | ||
cb26b572 DB |
243 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
244 | #define NEED_TRIM | |
245 | #endif | |
246 | ||
247 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | |
248 | #define NEED_TRIM | |
249 | #endif | |
250 | ||
251 | #ifdef NEED_TRIM | |
7520b94d AZ |
252 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
253 | { | |
c6f24f99 | 254 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
cb26b572 | 255 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
7520b94d | 256 | |
7520b94d | 257 | if (osc) |
c6f24f99 | 258 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
7520b94d | 259 | |
17ad78e5 | 260 | if (trim) { |
2a4e2b87 | 261 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
cb26b572 DB |
262 | tmp &= RS5C372_TRIM_MASK; |
263 | if (tmp & 0x3e) { | |
264 | int t = tmp & 0x3f; | |
265 | ||
266 | if (tmp & 0x40) | |
267 | t = (~t | (s8)0xc0) + 1; | |
268 | else | |
269 | t = t - 1; | |
270 | ||
271 | tmp = t * 2; | |
272 | } else | |
273 | tmp = 0; | |
274 | *trim = tmp; | |
17ad78e5 | 275 | } |
7520b94d AZ |
276 | |
277 | return 0; | |
278 | } | |
cb26b572 | 279 | #endif |
7520b94d AZ |
280 | |
281 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
282 | { | |
283 | return rs5c372_get_datetime(to_i2c_client(dev), tm); | |
284 | } | |
285 | ||
286 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
287 | { | |
288 | return rs5c372_set_datetime(to_i2c_client(dev), tm); | |
289 | } | |
290 | ||
cb26b572 | 291 | |
16380c15 JS |
292 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
293 | { | |
294 | struct i2c_client *client = to_i2c_client(dev); | |
295 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
296 | unsigned char buf; | |
297 | int status, addr; | |
298 | ||
299 | buf = rs5c->regs[RS5C_REG_CTRL1]; | |
300 | ||
301 | if (!rs5c->has_irq) | |
302 | return -EINVAL; | |
303 | ||
304 | status = rs5c_get_regs(rs5c); | |
305 | if (status < 0) | |
306 | return status; | |
307 | ||
308 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
309 | if (enabled) | |
310 | buf |= RS5C_CTRL1_AALE; | |
311 | else | |
312 | buf &= ~RS5C_CTRL1_AALE; | |
313 | ||
314 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { | |
0c6516ea | 315 | dev_warn(dev, "can't update alarm\n"); |
16380c15 JS |
316 | status = -EIO; |
317 | } else | |
318 | rs5c->regs[RS5C_REG_CTRL1] = buf; | |
319 | ||
320 | return status; | |
321 | } | |
322 | ||
323 | ||
cb26b572 DB |
324 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
325 | * which only exposes a polled programming interface; and since | |
326 | * these calls map directly to those EFI requests; we don't demand | |
327 | * we have an IRQ for this chip when we go through this API. | |
328 | * | |
329 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs | |
330 | * though, managed through RTC_AIE_{ON,OFF} requests. | |
331 | */ | |
332 | ||
333 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
334 | { | |
335 | struct i2c_client *client = to_i2c_client(dev); | |
336 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
337 | int status; | |
338 | ||
339 | status = rs5c_get_regs(rs5c); | |
340 | if (status < 0) | |
341 | return status; | |
342 | ||
343 | /* report alarm time */ | |
344 | t->time.tm_sec = 0; | |
fe20ba70 | 345 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
cb26b572 DB |
346 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
347 | t->time.tm_mday = -1; | |
348 | t->time.tm_mon = -1; | |
349 | t->time.tm_year = -1; | |
350 | t->time.tm_wday = -1; | |
351 | t->time.tm_yday = -1; | |
352 | t->time.tm_isdst = -1; | |
353 | ||
354 | /* ... and status */ | |
355 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); | |
356 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); | |
357 | ||
358 | return 0; | |
359 | } | |
360 | ||
361 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
362 | { | |
363 | struct i2c_client *client = to_i2c_client(dev); | |
364 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
0053dc0d PM |
365 | int status, addr, i; |
366 | unsigned char buf[3]; | |
cb26b572 DB |
367 | |
368 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ | |
369 | if (t->time.tm_mday != -1 | |
370 | || t->time.tm_mon != -1 | |
371 | || t->time.tm_year != -1) | |
372 | return -EINVAL; | |
373 | ||
374 | /* REVISIT: round up tm_sec */ | |
375 | ||
376 | /* if needed, disable irq (clears pending status) */ | |
377 | status = rs5c_get_regs(rs5c); | |
378 | if (status < 0) | |
379 | return status; | |
380 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { | |
0053dc0d PM |
381 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
382 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; | |
383 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { | |
0c6516ea | 384 | dev_dbg(dev, "can't disable alarm\n"); |
cb26b572 DB |
385 | return -EIO; |
386 | } | |
0053dc0d | 387 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
388 | } |
389 | ||
390 | /* set alarm */ | |
fe20ba70 | 391 | buf[0] = bin2bcd(t->time.tm_min); |
0053dc0d PM |
392 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
393 | buf[2] = 0x7f; /* any/all days */ | |
394 | ||
395 | for (i = 0; i < sizeof(buf); i++) { | |
396 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); | |
397 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { | |
0c6516ea | 398 | dev_dbg(dev, "can't set alarm time\n"); |
0053dc0d PM |
399 | return -EIO; |
400 | } | |
cb26b572 DB |
401 | } |
402 | ||
403 | /* ... and maybe enable its irq */ | |
404 | if (t->enabled) { | |
0053dc0d PM |
405 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
406 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; | |
407 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) | |
0c6516ea | 408 | dev_warn(dev, "can't enable alarm\n"); |
0053dc0d | 409 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
410 | } |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
415 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
416 | ||
7520b94d AZ |
417 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
418 | { | |
419 | int err, osc, trim; | |
420 | ||
adfb4341 AZ |
421 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
422 | if (err == 0) { | |
cb26b572 DB |
423 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
424 | osc / 1000, osc % 1000); | |
425 | seq_printf(seq, "trim\t\t: %d\n", trim); | |
7520b94d AZ |
426 | } |
427 | ||
428 | return 0; | |
429 | } | |
430 | ||
cb26b572 DB |
431 | #else |
432 | #define rs5c372_rtc_proc NULL | |
433 | #endif | |
434 | ||
ff8371ac | 435 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
7520b94d AZ |
436 | .proc = rs5c372_rtc_proc, |
437 | .read_time = rs5c372_rtc_read_time, | |
438 | .set_time = rs5c372_rtc_set_time, | |
cb26b572 DB |
439 | .read_alarm = rs5c_read_alarm, |
440 | .set_alarm = rs5c_set_alarm, | |
16380c15 | 441 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, |
7520b94d AZ |
442 | }; |
443 | ||
cb26b572 DB |
444 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
445 | ||
7520b94d AZ |
446 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
447 | struct device_attribute *attr, char *buf) | |
448 | { | |
82896072 | 449 | int err, trim; |
7520b94d | 450 | |
82896072 AZ |
451 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
452 | if (err) | |
453 | return err; | |
7520b94d | 454 | |
cb26b572 | 455 | return sprintf(buf, "%d\n", trim); |
7520b94d AZ |
456 | } |
457 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); | |
458 | ||
459 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, | |
460 | struct device_attribute *attr, char *buf) | |
461 | { | |
82896072 | 462 | int err, osc; |
7520b94d | 463 | |
82896072 AZ |
464 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
465 | if (err) | |
466 | return err; | |
7520b94d | 467 | |
82896072 | 468 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
7520b94d AZ |
469 | } |
470 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); | |
471 | ||
cb26b572 | 472 | static int rs5c_sysfs_register(struct device *dev) |
7520b94d | 473 | { |
cb26b572 DB |
474 | int err; |
475 | ||
476 | err = device_create_file(dev, &dev_attr_trim); | |
477 | if (err) | |
478 | return err; | |
479 | err = device_create_file(dev, &dev_attr_osc); | |
480 | if (err) | |
481 | device_remove_file(dev, &dev_attr_trim); | |
482 | ||
483 | return err; | |
484 | } | |
485 | ||
d815461c DB |
486 | static void rs5c_sysfs_unregister(struct device *dev) |
487 | { | |
488 | device_remove_file(dev, &dev_attr_trim); | |
489 | device_remove_file(dev, &dev_attr_osc); | |
490 | } | |
491 | ||
cb26b572 DB |
492 | #else |
493 | static int rs5c_sysfs_register(struct device *dev) | |
494 | { | |
495 | return 0; | |
7520b94d | 496 | } |
d815461c DB |
497 | |
498 | static void rs5c_sysfs_unregister(struct device *dev) | |
499 | { | |
500 | /* nothing */ | |
501 | } | |
cb26b572 DB |
502 | #endif /* SYSFS */ |
503 | ||
504 | static struct i2c_driver rs5c372_driver; | |
7520b94d | 505 | |
0053dc0d PM |
506 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
507 | { | |
508 | unsigned char buf[2]; | |
509 | int addr, i, ret = 0; | |
510 | ||
37fc5e2c PM |
511 | if (rs5c372->type == rtc_r2025sd) { |
512 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)) | |
513 | return ret; | |
514 | rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST; | |
515 | } else { | |
516 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) | |
517 | return ret; | |
518 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; | |
519 | } | |
0053dc0d PM |
520 | |
521 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
522 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; | |
523 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; | |
524 | ||
525 | /* use 24hr mode */ | |
526 | switch (rs5c372->type) { | |
527 | case rtc_rs5c372a: | |
528 | case rtc_rs5c372b: | |
529 | buf[1] |= RS5C372_CTRL2_24; | |
530 | rs5c372->time24 = 1; | |
531 | break; | |
37fc5e2c | 532 | case rtc_r2025sd: |
550fcb8f | 533 | case rtc_r2221tl: |
0053dc0d PM |
534 | case rtc_rv5c386: |
535 | case rtc_rv5c387a: | |
536 | buf[0] |= RV5C387_CTRL1_24; | |
537 | rs5c372->time24 = 1; | |
538 | break; | |
539 | default: | |
540 | /* impossible */ | |
541 | break; | |
542 | } | |
543 | ||
544 | for (i = 0; i < sizeof(buf); i++) { | |
545 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); | |
546 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); | |
547 | if (unlikely(ret < 0)) | |
548 | return ret; | |
549 | } | |
550 | ||
551 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; | |
552 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; | |
553 | ||
554 | return 0; | |
555 | } | |
556 | ||
d2653e92 JD |
557 | static int rs5c372_probe(struct i2c_client *client, |
558 | const struct i2c_device_id *id) | |
7520b94d AZ |
559 | { |
560 | int err = 0; | |
0053dc0d | 561 | int smbus_mode = 0; |
c6f24f99 | 562 | struct rs5c372 *rs5c372; |
cb26b572 | 563 | struct rtc_time tm; |
7520b94d | 564 | |
2a4e2b87 | 565 | dev_dbg(&client->dev, "%s\n", __func__); |
7520b94d | 566 | |
0053dc0d PM |
567 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
568 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { | |
569 | /* | |
570 | * If we don't have any master mode adapter, try breaking | |
571 | * it down in to the barest of capabilities. | |
572 | */ | |
573 | if (i2c_check_functionality(client->adapter, | |
574 | I2C_FUNC_SMBUS_BYTE_DATA | | |
575 | I2C_FUNC_SMBUS_I2C_BLOCK)) | |
576 | smbus_mode = 1; | |
577 | else { | |
578 | /* Still no good, give up */ | |
579 | err = -ENODEV; | |
580 | goto exit; | |
581 | } | |
7520b94d AZ |
582 | } |
583 | ||
b8a4b4e2 JH |
584 | rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372), |
585 | GFP_KERNEL); | |
586 | if (!rs5c372) { | |
7520b94d AZ |
587 | err = -ENOMEM; |
588 | goto exit; | |
589 | } | |
cb26b572 | 590 | |
cb26b572 | 591 | rs5c372->client = client; |
c6f24f99 | 592 | i2c_set_clientdata(client, rs5c372); |
3760f736 | 593 | rs5c372->type = id->driver_data; |
c6f24f99 | 594 | |
e2bfe342 PM |
595 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
596 | rs5c372->regs = &rs5c372->buf[1]; | |
0053dc0d | 597 | rs5c372->smbus = smbus_mode; |
e2bfe342 | 598 | |
cb26b572 DB |
599 | err = rs5c_get_regs(rs5c372); |
600 | if (err < 0) | |
b8a4b4e2 | 601 | goto exit; |
cb26b572 | 602 | |
cb26b572 DB |
603 | /* clock may be set for am/pm or 24 hr time */ |
604 | switch (rs5c372->type) { | |
605 | case rtc_rs5c372a: | |
606 | case rtc_rs5c372b: | |
607 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. | |
608 | * so does periodic irq, except some 327a modes. | |
609 | */ | |
610 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) | |
611 | rs5c372->time24 = 1; | |
612 | break; | |
37fc5e2c | 613 | case rtc_r2025sd: |
550fcb8f | 614 | case rtc_r2221tl: |
cb26b572 DB |
615 | case rtc_rv5c386: |
616 | case rtc_rv5c387a: | |
617 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) | |
618 | rs5c372->time24 = 1; | |
619 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic | |
620 | * irq, on both 386 and 387 | |
621 | */ | |
622 | break; | |
623 | default: | |
624 | dev_err(&client->dev, "unknown RTC type\n"); | |
b8a4b4e2 | 625 | goto exit; |
cb26b572 DB |
626 | } |
627 | ||
628 | /* if the oscillator lost power and no other software (like | |
629 | * the bootloader) set it up, do it here. | |
37fc5e2c PM |
630 | * |
631 | * The R2025S/D does this a little differently than the other | |
632 | * parts, so we special case that.. | |
cb26b572 | 633 | */ |
0053dc0d PM |
634 | err = rs5c_oscillator_setup(rs5c372); |
635 | if (unlikely(err < 0)) { | |
636 | dev_err(&client->dev, "setup error\n"); | |
b8a4b4e2 | 637 | goto exit; |
cb26b572 DB |
638 | } |
639 | ||
640 | if (rs5c372_get_datetime(client, &tm) < 0) | |
641 | dev_warn(&client->dev, "clock needs to be set\n"); | |
642 | ||
643 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", | |
644 | ({ char *s; switch (rs5c372->type) { | |
37fc5e2c | 645 | case rtc_r2025sd: s = "r2025sd"; break; |
550fcb8f | 646 | case rtc_r2221tl: s = "r2221tl"; break; |
cb26b572 DB |
647 | case rtc_rs5c372a: s = "rs5c372a"; break; |
648 | case rtc_rs5c372b: s = "rs5c372b"; break; | |
649 | case rtc_rv5c386: s = "rv5c386"; break; | |
650 | case rtc_rv5c387a: s = "rv5c387a"; break; | |
651 | default: s = "chip"; break; | |
652 | }; s;}), | |
653 | rs5c372->time24 ? "24hr" : "am/pm" | |
654 | ); | |
655 | ||
d815461c | 656 | /* REVISIT use client->irq to register alarm irq ... */ |
b8a4b4e2 JH |
657 | rs5c372->rtc = devm_rtc_device_register(&client->dev, |
658 | rs5c372_driver.driver.name, | |
659 | &rs5c372_rtc_ops, THIS_MODULE); | |
7520b94d | 660 | |
c6f24f99 RV |
661 | if (IS_ERR(rs5c372->rtc)) { |
662 | err = PTR_ERR(rs5c372->rtc); | |
b8a4b4e2 | 663 | goto exit; |
7520b94d AZ |
664 | } |
665 | ||
cb26b572 | 666 | err = rs5c_sysfs_register(&client->dev); |
c6f24f99 | 667 | if (err) |
b8a4b4e2 | 668 | goto exit; |
7520b94d AZ |
669 | |
670 | return 0; | |
671 | ||
7520b94d AZ |
672 | exit: |
673 | return err; | |
674 | } | |
675 | ||
d815461c | 676 | static int rs5c372_remove(struct i2c_client *client) |
cb26b572 | 677 | { |
d815461c | 678 | rs5c_sysfs_unregister(&client->dev); |
7520b94d AZ |
679 | return 0; |
680 | } | |
681 | ||
cb26b572 DB |
682 | static struct i2c_driver rs5c372_driver = { |
683 | .driver = { | |
684 | .name = "rtc-rs5c372", | |
685 | }, | |
d815461c DB |
686 | .probe = rs5c372_probe, |
687 | .remove = rs5c372_remove, | |
3760f736 | 688 | .id_table = rs5c372_id, |
cb26b572 DB |
689 | }; |
690 | ||
0abc9201 | 691 | module_i2c_driver(rs5c372_driver); |
7520b94d AZ |
692 | |
693 | MODULE_AUTHOR( | |
694 | "Pavel Mironchik <pmironchik@optifacio.net>, " | |
0053dc0d PM |
695 | "Alessandro Zummo <a.zummo@towertech.it>, " |
696 | "Paul Mundt <lethal@linux-sh.org>"); | |
7520b94d AZ |
697 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
698 | MODULE_LICENSE("GPL"); | |
699 | MODULE_VERSION(DRV_VERSION); |