Commit | Line | Data |
---|---|---|
52365230 | 1 | /* |
c2a1c145 | 2 | * Micro Crystal RV-3029 / RV-3049 rtc class driver |
52365230 HS |
3 | * |
4 | * Author: Gregory Hermant <gregory.hermant@calao-systems.com> | |
2dca3d9e | 5 | * Michael Buesch <m@bues.ch> |
52365230 HS |
6 | * |
7 | * based on previously existing rtc class drivers | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
52365230 HS |
13 | */ |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/i2c.h> | |
c2a1c145 | 17 | #include <linux/spi/spi.h> |
52365230 HS |
18 | #include <linux/bcd.h> |
19 | #include <linux/rtc.h> | |
a7f6e287 MB |
20 | #include <linux/delay.h> |
21 | #include <linux/of.h> | |
a696b31e MB |
22 | #include <linux/hwmon.h> |
23 | #include <linux/hwmon-sysfs.h> | |
e6e38082 | 24 | #include <linux/regmap.h> |
52365230 HS |
25 | |
26 | /* Register map */ | |
27 | /* control section */ | |
aba39d27 | 28 | #define RV3029_ONOFF_CTRL 0x00 |
7697de35 MB |
29 | #define RV3029_ONOFF_CTRL_WE BIT(0) |
30 | #define RV3029_ONOFF_CTRL_TE BIT(1) | |
31 | #define RV3029_ONOFF_CTRL_TAR BIT(2) | |
32 | #define RV3029_ONOFF_CTRL_EERE BIT(3) | |
33 | #define RV3029_ONOFF_CTRL_SRON BIT(4) | |
34 | #define RV3029_ONOFF_CTRL_TD0 BIT(5) | |
35 | #define RV3029_ONOFF_CTRL_TD1 BIT(6) | |
36 | #define RV3029_ONOFF_CTRL_CLKINT BIT(7) | |
aba39d27 | 37 | #define RV3029_IRQ_CTRL 0x01 |
7697de35 MB |
38 | #define RV3029_IRQ_CTRL_AIE BIT(0) |
39 | #define RV3029_IRQ_CTRL_TIE BIT(1) | |
40 | #define RV3029_IRQ_CTRL_V1IE BIT(2) | |
41 | #define RV3029_IRQ_CTRL_V2IE BIT(3) | |
42 | #define RV3029_IRQ_CTRL_SRIE BIT(4) | |
aba39d27 | 43 | #define RV3029_IRQ_FLAGS 0x02 |
7697de35 MB |
44 | #define RV3029_IRQ_FLAGS_AF BIT(0) |
45 | #define RV3029_IRQ_FLAGS_TF BIT(1) | |
46 | #define RV3029_IRQ_FLAGS_V1IF BIT(2) | |
47 | #define RV3029_IRQ_FLAGS_V2IF BIT(3) | |
48 | #define RV3029_IRQ_FLAGS_SRF BIT(4) | |
aba39d27 | 49 | #define RV3029_STATUS 0x03 |
7697de35 MB |
50 | #define RV3029_STATUS_VLOW1 BIT(2) |
51 | #define RV3029_STATUS_VLOW2 BIT(3) | |
52 | #define RV3029_STATUS_SR BIT(4) | |
53 | #define RV3029_STATUS_PON BIT(5) | |
54 | #define RV3029_STATUS_EEBUSY BIT(7) | |
aba39d27 | 55 | #define RV3029_RST_CTRL 0x04 |
7697de35 | 56 | #define RV3029_RST_CTRL_SYSR BIT(4) |
aba39d27 | 57 | #define RV3029_CONTROL_SECTION_LEN 0x05 |
52365230 HS |
58 | |
59 | /* watch section */ | |
aba39d27 MB |
60 | #define RV3029_W_SEC 0x08 |
61 | #define RV3029_W_MINUTES 0x09 | |
62 | #define RV3029_W_HOURS 0x0A | |
7697de35 MB |
63 | #define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */ |
64 | #define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */ | |
aba39d27 MB |
65 | #define RV3029_W_DATE 0x0B |
66 | #define RV3029_W_DAYS 0x0C | |
67 | #define RV3029_W_MONTHS 0x0D | |
68 | #define RV3029_W_YEARS 0x0E | |
69 | #define RV3029_WATCH_SECTION_LEN 0x07 | |
52365230 HS |
70 | |
71 | /* alarm section */ | |
aba39d27 MB |
72 | #define RV3029_A_SC 0x10 |
73 | #define RV3029_A_MN 0x11 | |
74 | #define RV3029_A_HR 0x12 | |
75 | #define RV3029_A_DT 0x13 | |
76 | #define RV3029_A_DW 0x14 | |
77 | #define RV3029_A_MO 0x15 | |
78 | #define RV3029_A_YR 0x16 | |
79 | #define RV3029_ALARM_SECTION_LEN 0x07 | |
52365230 HS |
80 | |
81 | /* timer section */ | |
aba39d27 MB |
82 | #define RV3029_TIMER_LOW 0x18 |
83 | #define RV3029_TIMER_HIGH 0x19 | |
52365230 HS |
84 | |
85 | /* temperature section */ | |
aba39d27 | 86 | #define RV3029_TEMP_PAGE 0x20 |
52365230 HS |
87 | |
88 | /* eeprom data section */ | |
aba39d27 MB |
89 | #define RV3029_E2P_EEDATA1 0x28 |
90 | #define RV3029_E2P_EEDATA2 0x29 | |
7697de35 | 91 | #define RV3029_E2PDATA_SECTION_LEN 0x02 |
52365230 HS |
92 | |
93 | /* eeprom control section */ | |
aba39d27 | 94 | #define RV3029_CONTROL_E2P_EECTRL 0x30 |
7697de35 MB |
95 | #define RV3029_EECTRL_THP BIT(0) /* temp scan interval */ |
96 | #define RV3029_EECTRL_THE BIT(1) /* thermometer enable */ | |
97 | #define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */ | |
98 | #define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */ | |
99 | #define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */ | |
100 | #define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */ | |
101 | #define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */ | |
102 | #define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */ | |
103 | #define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\ | |
104 | RV3029_TRICKLE_5K |\ | |
105 | RV3029_TRICKLE_20K |\ | |
106 | RV3029_TRICKLE_80K) | |
107 | #define RV3029_TRICKLE_SHIFT 4 | |
108 | #define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */ | |
109 | #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */ | |
110 | #define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */ | |
111 | #define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */ | |
112 | #define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */ | |
52365230 HS |
113 | |
114 | /* user ram section */ | |
aba39d27 MB |
115 | #define RV3029_USR1_RAM_PAGE 0x38 |
116 | #define RV3029_USR1_SECTION_LEN 0x04 | |
117 | #define RV3029_USR2_RAM_PAGE 0x3C | |
118 | #define RV3029_USR2_SECTION_LEN 0x04 | |
52365230 | 119 | |
e6e38082 MJ |
120 | struct rv3029_data { |
121 | struct device *dev; | |
122 | struct rtc_device *rtc; | |
123 | struct regmap *regmap; | |
124 | int irq; | |
125 | }; | |
126 | ||
127 | static int rv3029_read_regs(struct device *dev, u8 reg, u8 *buf, | |
abe2f551 | 128 | unsigned int len) |
52365230 | 129 | { |
e6e38082 | 130 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 131 | |
aba39d27 | 132 | if ((reg > RV3029_USR1_RAM_PAGE + 7) || |
abe2f551 | 133 | (reg + len > RV3029_USR1_RAM_PAGE + 8)) |
52365230 HS |
134 | return -EINVAL; |
135 | ||
e6e38082 | 136 | return regmap_bulk_read(rv3029->regmap, reg, buf, len); |
52365230 HS |
137 | } |
138 | ||
e6e38082 | 139 | static int rv3029_write_regs(struct device *dev, u8 reg, u8 const buf[], |
abe2f551 | 140 | unsigned int len) |
52365230 | 141 | { |
e6e38082 MJ |
142 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
143 | ||
aba39d27 | 144 | if ((reg > RV3029_USR1_RAM_PAGE + 7) || |
abe2f551 | 145 | (reg + len > RV3029_USR1_RAM_PAGE + 8)) |
52365230 HS |
146 | return -EINVAL; |
147 | ||
e6e38082 | 148 | return regmap_bulk_write(rv3029->regmap, reg, buf, len); |
52365230 HS |
149 | } |
150 | ||
e6e38082 | 151 | static int rv3029_update_bits(struct device *dev, u8 reg, u8 mask, u8 set) |
2dca3d9e MB |
152 | { |
153 | u8 buf; | |
154 | int ret; | |
155 | ||
e6e38082 | 156 | ret = rv3029_read_regs(dev, reg, &buf, 1); |
2dca3d9e MB |
157 | if (ret < 0) |
158 | return ret; | |
159 | buf &= ~mask; | |
160 | buf |= set & mask; | |
e6e38082 | 161 | ret = rv3029_write_regs(dev, reg, &buf, 1); |
2dca3d9e MB |
162 | if (ret < 0) |
163 | return ret; | |
164 | ||
165 | return 0; | |
166 | } | |
167 | ||
e6e38082 | 168 | static int rv3029_get_sr(struct device *dev, u8 *buf) |
52365230 | 169 | { |
e6e38082 | 170 | int ret = rv3029_read_regs(dev, RV3029_STATUS, buf, 1); |
52365230 HS |
171 | |
172 | if (ret < 0) | |
173 | return -EIO; | |
e6e38082 | 174 | dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]); |
52365230 HS |
175 | return 0; |
176 | } | |
177 | ||
e6e38082 | 178 | static int rv3029_set_sr(struct device *dev, u8 val) |
52365230 HS |
179 | { |
180 | u8 buf[1]; | |
181 | int sr; | |
182 | ||
183 | buf[0] = val; | |
e6e38082 MJ |
184 | sr = rv3029_write_regs(dev, RV3029_STATUS, buf, 1); |
185 | dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]); | |
52365230 HS |
186 | if (sr < 0) |
187 | return -EIO; | |
188 | return 0; | |
189 | } | |
190 | ||
e6e38082 | 191 | static int rv3029_eeprom_busywait(struct device *dev) |
a7f6e287 MB |
192 | { |
193 | int i, ret; | |
194 | u8 sr; | |
195 | ||
196 | for (i = 100; i > 0; i--) { | |
e6e38082 | 197 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
198 | if (ret < 0) |
199 | break; | |
200 | if (!(sr & RV3029_STATUS_EEBUSY)) | |
201 | break; | |
202 | usleep_range(1000, 10000); | |
203 | } | |
204 | if (i <= 0) { | |
e6e38082 | 205 | dev_err(dev, "EEPROM busy wait timeout.\n"); |
a7f6e287 MB |
206 | return -ETIMEDOUT; |
207 | } | |
208 | ||
209 | return ret; | |
210 | } | |
211 | ||
e6e38082 | 212 | static int rv3029_eeprom_exit(struct device *dev) |
a7f6e287 MB |
213 | { |
214 | /* Re-enable eeprom refresh */ | |
e6e38082 | 215 | return rv3029_update_bits(dev, RV3029_ONOFF_CTRL, |
4e7f1a60 MJ |
216 | RV3029_ONOFF_CTRL_EERE, |
217 | RV3029_ONOFF_CTRL_EERE); | |
a7f6e287 MB |
218 | } |
219 | ||
e6e38082 | 220 | static int rv3029_eeprom_enter(struct device *dev) |
a7f6e287 MB |
221 | { |
222 | int ret; | |
223 | u8 sr; | |
224 | ||
225 | /* Check whether we are in the allowed voltage range. */ | |
e6e38082 | 226 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
227 | if (ret < 0) |
228 | return ret; | |
229 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
230 | /* We clear the bits and retry once just in case | |
231 | * we had a brown out in early startup. | |
232 | */ | |
233 | sr &= ~RV3029_STATUS_VLOW1; | |
234 | sr &= ~RV3029_STATUS_VLOW2; | |
e6e38082 | 235 | ret = rv3029_set_sr(dev, sr); |
a7f6e287 MB |
236 | if (ret < 0) |
237 | return ret; | |
238 | usleep_range(1000, 10000); | |
e6e38082 | 239 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
240 | if (ret < 0) |
241 | return ret; | |
242 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
e6e38082 | 243 | dev_err(dev, |
a7f6e287 MB |
244 | "Supply voltage is too low to safely access the EEPROM.\n"); |
245 | return -ENODEV; | |
246 | } | |
247 | } | |
248 | ||
249 | /* Disable eeprom refresh. */ | |
e6e38082 MJ |
250 | ret = rv3029_update_bits(dev, RV3029_ONOFF_CTRL, RV3029_ONOFF_CTRL_EERE, |
251 | 0); | |
a7f6e287 MB |
252 | if (ret < 0) |
253 | return ret; | |
254 | ||
255 | /* Wait for any previous eeprom accesses to finish. */ | |
e6e38082 | 256 | ret = rv3029_eeprom_busywait(dev); |
a7f6e287 | 257 | if (ret < 0) |
e6e38082 | 258 | rv3029_eeprom_exit(dev); |
a7f6e287 MB |
259 | |
260 | return ret; | |
261 | } | |
262 | ||
e6e38082 | 263 | static int rv3029_eeprom_read(struct device *dev, u8 reg, |
a7f6e287 MB |
264 | u8 buf[], size_t len) |
265 | { | |
266 | int ret, err; | |
267 | ||
e6e38082 | 268 | err = rv3029_eeprom_enter(dev); |
a7f6e287 MB |
269 | if (err < 0) |
270 | return err; | |
271 | ||
e6e38082 | 272 | ret = rv3029_read_regs(dev, reg, buf, len); |
a7f6e287 | 273 | |
e6e38082 | 274 | err = rv3029_eeprom_exit(dev); |
a7f6e287 MB |
275 | if (err < 0) |
276 | return err; | |
277 | ||
278 | return ret; | |
279 | } | |
280 | ||
e6e38082 | 281 | static int rv3029_eeprom_write(struct device *dev, u8 reg, |
a7f6e287 MB |
282 | u8 const buf[], size_t len) |
283 | { | |
284 | int ret, err; | |
285 | size_t i; | |
286 | u8 tmp; | |
287 | ||
e6e38082 | 288 | err = rv3029_eeprom_enter(dev); |
a7f6e287 MB |
289 | if (err < 0) |
290 | return err; | |
291 | ||
292 | for (i = 0; i < len; i++, reg++) { | |
e6e38082 | 293 | ret = rv3029_read_regs(dev, reg, &tmp, 1); |
a7f6e287 MB |
294 | if (ret < 0) |
295 | break; | |
296 | if (tmp != buf[i]) { | |
e6e38082 | 297 | ret = rv3029_write_regs(dev, reg, &buf[i], 1); |
a7f6e287 MB |
298 | if (ret < 0) |
299 | break; | |
300 | } | |
e6e38082 | 301 | ret = rv3029_eeprom_busywait(dev); |
a7f6e287 MB |
302 | if (ret < 0) |
303 | break; | |
304 | } | |
305 | ||
e6e38082 | 306 | err = rv3029_eeprom_exit(dev); |
a7f6e287 MB |
307 | if (err < 0) |
308 | return err; | |
309 | ||
310 | return ret; | |
311 | } | |
312 | ||
e6e38082 | 313 | static int rv3029_eeprom_update_bits(struct device *dev, |
39387dc2 MB |
314 | u8 reg, u8 mask, u8 set) |
315 | { | |
316 | u8 buf; | |
317 | int ret; | |
318 | ||
e6e38082 | 319 | ret = rv3029_eeprom_read(dev, reg, &buf, 1); |
39387dc2 MB |
320 | if (ret < 0) |
321 | return ret; | |
322 | buf &= ~mask; | |
323 | buf |= set & mask; | |
e6e38082 | 324 | ret = rv3029_eeprom_write(dev, reg, &buf, 1); |
39387dc2 MB |
325 | if (ret < 0) |
326 | return ret; | |
327 | ||
328 | return 0; | |
329 | } | |
330 | ||
e6e38082 | 331 | static int rv3029_read_time(struct device *dev, struct rtc_time *tm) |
52365230 HS |
332 | { |
333 | u8 buf[1]; | |
334 | int ret; | |
aba39d27 | 335 | u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, }; |
52365230 | 336 | |
e6e38082 | 337 | ret = rv3029_get_sr(dev, buf); |
52365230 | 338 | if (ret < 0) { |
e6e38082 | 339 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
340 | return -EIO; |
341 | } | |
342 | ||
e6e38082 | 343 | ret = rv3029_read_regs(dev, RV3029_W_SEC, regs, |
4e7f1a60 | 344 | RV3029_WATCH_SECTION_LEN); |
52365230 | 345 | if (ret < 0) { |
e6e38082 | 346 | dev_err(dev, "%s: reading RTC section failed\n", __func__); |
52365230 HS |
347 | return ret; |
348 | } | |
349 | ||
abe2f551 MJ |
350 | tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]); |
351 | tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]); | |
52365230 HS |
352 | |
353 | /* HR field has a more complex interpretation */ | |
354 | { | |
abe2f551 | 355 | const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC]; |
aba39d27 MB |
356 | |
357 | if (_hr & RV3029_REG_HR_12_24) { | |
52365230 HS |
358 | /* 12h format */ |
359 | tm->tm_hour = bcd2bin(_hr & 0x1f); | |
aba39d27 | 360 | if (_hr & RV3029_REG_HR_PM) /* PM flag set */ |
52365230 HS |
361 | tm->tm_hour += 12; |
362 | } else /* 24h format */ | |
363 | tm->tm_hour = bcd2bin(_hr & 0x3f); | |
364 | } | |
365 | ||
abe2f551 MJ |
366 | tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]); |
367 | tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1; | |
368 | tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100; | |
369 | tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1; | |
52365230 HS |
370 | |
371 | return 0; | |
372 | } | |
373 | ||
e6e38082 | 374 | static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 HS |
375 | { |
376 | struct rtc_time *const tm = &alarm->time; | |
377 | int ret; | |
378 | u8 regs[8]; | |
379 | ||
e6e38082 | 380 | ret = rv3029_get_sr(dev, regs); |
52365230 | 381 | if (ret < 0) { |
e6e38082 | 382 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
383 | return -EIO; |
384 | } | |
385 | ||
e6e38082 | 386 | ret = rv3029_read_regs(dev, RV3029_A_SC, regs, |
4e7f1a60 | 387 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
388 | |
389 | if (ret < 0) { | |
e6e38082 | 390 | dev_err(dev, "%s: reading alarm section failed\n", __func__); |
52365230 HS |
391 | return ret; |
392 | } | |
393 | ||
abe2f551 MJ |
394 | tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f); |
395 | tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f); | |
396 | tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f); | |
397 | tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f); | |
398 | tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1; | |
399 | tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100; | |
400 | tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1; | |
52365230 HS |
401 | |
402 | return 0; | |
403 | } | |
404 | ||
e6e38082 | 405 | static int rv3029_rtc_alarm_set_irq(struct device *dev, int enable) |
52365230 HS |
406 | { |
407 | int ret; | |
52365230 | 408 | |
2dca3d9e | 409 | /* enable/disable AIE irq */ |
e6e38082 | 410 | ret = rv3029_update_bits(dev, RV3029_IRQ_CTRL, RV3029_IRQ_CTRL_AIE, |
4e7f1a60 | 411 | (enable ? RV3029_IRQ_CTRL_AIE : 0)); |
52365230 | 412 | if (ret < 0) { |
e6e38082 | 413 | dev_err(dev, "can't update INT reg\n"); |
52365230 HS |
414 | return ret; |
415 | } | |
416 | ||
417 | return 0; | |
418 | } | |
419 | ||
e6e38082 | 420 | static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 HS |
421 | { |
422 | struct rtc_time *const tm = &alarm->time; | |
423 | int ret; | |
424 | u8 regs[8]; | |
425 | ||
426 | /* | |
427 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
428 | * for the year. tm_year is an offset from 1900 and we are interested | |
429 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
430 | */ | |
431 | if (tm->tm_year < 100) | |
432 | return -EINVAL; | |
433 | ||
e6e38082 | 434 | ret = rv3029_get_sr(dev, regs); |
52365230 | 435 | if (ret < 0) { |
e6e38082 | 436 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
437 | return -EIO; |
438 | } | |
abe2f551 MJ |
439 | regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec & 0x7f); |
440 | regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min & 0x7f); | |
441 | regs[RV3029_A_HR - RV3029_A_SC] = bin2bcd(tm->tm_hour & 0x3f); | |
442 | regs[RV3029_A_DT - RV3029_A_SC] = bin2bcd(tm->tm_mday & 0x3f); | |
443 | regs[RV3029_A_MO - RV3029_A_SC] = bin2bcd((tm->tm_mon & 0x1f) - 1); | |
444 | regs[RV3029_A_DW - RV3029_A_SC] = bin2bcd((tm->tm_wday & 7) - 1); | |
445 | regs[RV3029_A_YR - RV3029_A_SC] = bin2bcd((tm->tm_year & 0x7f) - 100); | |
aba39d27 | 446 | |
e6e38082 | 447 | ret = rv3029_write_regs(dev, RV3029_A_SC, regs, |
4e7f1a60 | 448 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
449 | if (ret < 0) |
450 | return ret; | |
451 | ||
452 | if (alarm->enabled) { | |
52365230 | 453 | /* clear AF flag */ |
e6e38082 | 454 | ret = rv3029_update_bits(dev, RV3029_IRQ_FLAGS, |
4e7f1a60 | 455 | RV3029_IRQ_FLAGS_AF, 0); |
52365230 | 456 | if (ret < 0) { |
e6e38082 | 457 | dev_err(dev, "can't clear alarm flag\n"); |
52365230 HS |
458 | return ret; |
459 | } | |
460 | /* enable AIE irq */ | |
e6e38082 | 461 | ret = rv3029_rtc_alarm_set_irq(dev, 1); |
52365230 HS |
462 | if (ret) |
463 | return ret; | |
464 | ||
e6e38082 | 465 | dev_dbg(dev, "alarm IRQ armed\n"); |
52365230 HS |
466 | } else { |
467 | /* disable AIE irq */ | |
e6e38082 | 468 | ret = rv3029_rtc_alarm_set_irq(dev, 0); |
52365230 HS |
469 | if (ret) |
470 | return ret; | |
471 | ||
e6e38082 | 472 | dev_dbg(dev, "alarm IRQ disabled\n"); |
52365230 HS |
473 | } |
474 | ||
475 | return 0; | |
476 | } | |
477 | ||
e6e38082 | 478 | static int rv3029_set_time(struct device *dev, struct rtc_time *tm) |
52365230 HS |
479 | { |
480 | u8 regs[8]; | |
481 | int ret; | |
482 | ||
483 | /* | |
484 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
485 | * for the year. tm_year is an offset from 1900 and we are interested | |
486 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
487 | */ | |
488 | if (tm->tm_year < 100) | |
489 | return -EINVAL; | |
490 | ||
abe2f551 MJ |
491 | regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec); |
492 | regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min); | |
493 | regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour); | |
494 | regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday); | |
495 | regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1); | |
496 | regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd((tm->tm_wday & 7) + 1); | |
497 | regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100); | |
52365230 | 498 | |
e6e38082 | 499 | ret = rv3029_write_regs(dev, RV3029_W_SEC, regs, |
4e7f1a60 | 500 | RV3029_WATCH_SECTION_LEN); |
52365230 HS |
501 | if (ret < 0) |
502 | return ret; | |
503 | ||
e6e38082 | 504 | ret = rv3029_get_sr(dev, regs); |
52365230 | 505 | if (ret < 0) { |
e6e38082 | 506 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
507 | return ret; |
508 | } | |
509 | /* clear PON bit */ | |
e6e38082 | 510 | ret = rv3029_set_sr(dev, (regs[0] & ~RV3029_STATUS_PON)); |
52365230 | 511 | if (ret < 0) { |
e6e38082 | 512 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
513 | return ret; |
514 | } | |
515 | ||
516 | return 0; | |
517 | } | |
abe2f551 | 518 | |
e27e2160 MB |
519 | static const struct rv3029_trickle_tab_elem { |
520 | u32 r; /* resistance in ohms */ | |
521 | u8 conf; /* trickle config bits */ | |
522 | } rv3029_trickle_tab[] = { | |
523 | { | |
524 | .r = 1076, | |
525 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
526 | RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
527 | }, { | |
528 | .r = 1091, | |
529 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
530 | RV3029_TRICKLE_20K, | |
531 | }, { | |
532 | .r = 1137, | |
533 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
534 | RV3029_TRICKLE_80K, | |
535 | }, { | |
536 | .r = 1154, | |
537 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K, | |
538 | }, { | |
539 | .r = 1371, | |
540 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K | | |
541 | RV3029_TRICKLE_80K, | |
542 | }, { | |
543 | .r = 1395, | |
544 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K, | |
545 | }, { | |
546 | .r = 1472, | |
547 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K, | |
548 | }, { | |
549 | .r = 1500, | |
550 | .conf = RV3029_TRICKLE_1K, | |
551 | }, { | |
552 | .r = 3810, | |
553 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K | | |
554 | RV3029_TRICKLE_80K, | |
555 | }, { | |
556 | .r = 4000, | |
557 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K, | |
558 | }, { | |
559 | .r = 4706, | |
560 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K, | |
561 | }, { | |
562 | .r = 5000, | |
563 | .conf = RV3029_TRICKLE_5K, | |
564 | }, { | |
565 | .r = 16000, | |
566 | .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
567 | }, { | |
568 | .r = 20000, | |
569 | .conf = RV3029_TRICKLE_20K, | |
570 | }, { | |
571 | .r = 80000, | |
572 | .conf = RV3029_TRICKLE_80K, | |
573 | }, | |
574 | }; | |
575 | ||
e6e38082 | 576 | static void rv3029_trickle_config(struct device *dev) |
e27e2160 | 577 | { |
e6e38082 | 578 | struct device_node *of_node = dev->of_node; |
e27e2160 MB |
579 | const struct rv3029_trickle_tab_elem *elem; |
580 | int i, err; | |
581 | u32 ohms; | |
39387dc2 | 582 | u8 trickle_set_bits; |
e27e2160 MB |
583 | |
584 | if (!of_node) | |
585 | return; | |
586 | ||
587 | /* Configure the trickle charger. */ | |
e27e2160 MB |
588 | err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms); |
589 | if (err) { | |
590 | /* Disable trickle charger. */ | |
39387dc2 | 591 | trickle_set_bits = 0; |
e27e2160 MB |
592 | } else { |
593 | /* Enable trickle charger. */ | |
594 | for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) { | |
595 | elem = &rv3029_trickle_tab[i]; | |
596 | if (elem->r >= ohms) | |
597 | break; | |
598 | } | |
39387dc2 | 599 | trickle_set_bits = elem->conf; |
e6e38082 | 600 | dev_info(dev, |
e27e2160 MB |
601 | "Trickle charger enabled at %d ohms resistance.\n", |
602 | elem->r); | |
603 | } | |
e6e38082 | 604 | err = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL, |
39387dc2 MB |
605 | RV3029_TRICKLE_MASK, |
606 | trickle_set_bits); | |
abe2f551 | 607 | if (err < 0) |
e6e38082 | 608 | dev_err(dev, "Failed to update trickle charger config\n"); |
e27e2160 MB |
609 | } |
610 | ||
a696b31e MB |
611 | #ifdef CONFIG_RTC_DRV_RV3029_HWMON |
612 | ||
e6e38082 | 613 | static int rv3029_read_temp(struct device *dev, int *temp_mC) |
a696b31e MB |
614 | { |
615 | int ret; | |
616 | u8 temp; | |
617 | ||
e6e38082 | 618 | ret = rv3029_read_regs(dev, RV3029_TEMP_PAGE, &temp, 1); |
a696b31e MB |
619 | if (ret < 0) |
620 | return ret; | |
621 | ||
622 | *temp_mC = ((int)temp - 60) * 1000; | |
623 | ||
624 | return 0; | |
625 | } | |
626 | ||
627 | static ssize_t rv3029_hwmon_show_temp(struct device *dev, | |
628 | struct device_attribute *attr, | |
629 | char *buf) | |
630 | { | |
a696b31e MB |
631 | int ret, temp_mC; |
632 | ||
e6e38082 | 633 | ret = rv3029_read_temp(dev, &temp_mC); |
a696b31e MB |
634 | if (ret < 0) |
635 | return ret; | |
636 | ||
637 | return sprintf(buf, "%d\n", temp_mC); | |
638 | } | |
639 | ||
640 | static ssize_t rv3029_hwmon_set_update_interval(struct device *dev, | |
641 | struct device_attribute *attr, | |
642 | const char *buf, | |
643 | size_t count) | |
644 | { | |
a696b31e MB |
645 | unsigned long interval_ms; |
646 | int ret; | |
647 | u8 th_set_bits = 0; | |
648 | ||
649 | ret = kstrtoul(buf, 10, &interval_ms); | |
650 | if (ret < 0) | |
651 | return ret; | |
652 | ||
653 | if (interval_ms != 0) { | |
654 | th_set_bits |= RV3029_EECTRL_THE; | |
655 | if (interval_ms >= 16000) | |
656 | th_set_bits |= RV3029_EECTRL_THP; | |
657 | } | |
e6e38082 | 658 | ret = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
659 | RV3029_EECTRL_THE | RV3029_EECTRL_THP, |
660 | th_set_bits); | |
661 | if (ret < 0) | |
662 | return ret; | |
663 | ||
664 | return count; | |
665 | } | |
666 | ||
667 | static ssize_t rv3029_hwmon_show_update_interval(struct device *dev, | |
668 | struct device_attribute *attr, | |
669 | char *buf) | |
670 | { | |
a696b31e MB |
671 | int ret, interval_ms; |
672 | u8 eectrl; | |
673 | ||
e6e38082 | 674 | ret = rv3029_eeprom_read(dev, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
675 | &eectrl, 1); |
676 | if (ret < 0) | |
677 | return ret; | |
678 | ||
679 | if (eectrl & RV3029_EECTRL_THE) { | |
680 | if (eectrl & RV3029_EECTRL_THP) | |
681 | interval_ms = 16000; | |
682 | else | |
683 | interval_ms = 1000; | |
684 | } else { | |
685 | interval_ms = 0; | |
686 | } | |
687 | ||
688 | return sprintf(buf, "%d\n", interval_ms); | |
689 | } | |
690 | ||
691 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp, | |
692 | NULL, 0); | |
693 | static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO, | |
694 | rv3029_hwmon_show_update_interval, | |
695 | rv3029_hwmon_set_update_interval, 0); | |
696 | ||
697 | static struct attribute *rv3029_hwmon_attrs[] = { | |
698 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
699 | &sensor_dev_attr_update_interval.dev_attr.attr, | |
700 | NULL, | |
701 | }; | |
702 | ATTRIBUTE_GROUPS(rv3029_hwmon); | |
703 | ||
e6e38082 | 704 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e | 705 | { |
e6e38082 | 706 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
707 | struct device *hwmon_dev; |
708 | ||
e6e38082 MJ |
709 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029, |
710 | rv3029_hwmon_groups); | |
a696b31e | 711 | if (IS_ERR(hwmon_dev)) { |
e6e38082 | 712 | dev_warn(dev, "unable to register hwmon device %ld\n", |
4e7f1a60 | 713 | PTR_ERR(hwmon_dev)); |
a696b31e MB |
714 | } |
715 | } | |
716 | ||
717 | #else /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
718 | ||
e6e38082 | 719 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e MB |
720 | { |
721 | } | |
722 | ||
723 | #endif /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
724 | ||
aba39d27 | 725 | static const struct rtc_class_ops rv3029_rtc_ops = { |
e6e38082 MJ |
726 | .read_time = rv3029_read_time, |
727 | .set_time = rv3029_set_time, | |
728 | .read_alarm = rv3029_read_alarm, | |
729 | .set_alarm = rv3029_set_alarm, | |
52365230 HS |
730 | }; |
731 | ||
aba39d27 | 732 | static struct i2c_device_id rv3029_id[] = { |
baba623f | 733 | { "rv3029", 0 }, |
52365230 HS |
734 | { "rv3029c2", 0 }, |
735 | { } | |
736 | }; | |
aba39d27 | 737 | MODULE_DEVICE_TABLE(i2c, rv3029_id); |
52365230 | 738 | |
e6e38082 MJ |
739 | static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq, |
740 | const char *name) | |
52365230 | 741 | { |
e6e38082 | 742 | struct rv3029_data *rv3029; |
52365230 HS |
743 | int rc = 0; |
744 | u8 buf[1]; | |
745 | ||
e6e38082 MJ |
746 | rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL); |
747 | if (!rv3029) | |
748 | return -ENOMEM; | |
749 | ||
750 | rv3029->regmap = regmap; | |
751 | rv3029->irq = irq; | |
752 | rv3029->dev = dev; | |
753 | dev_set_drvdata(dev, rv3029); | |
52365230 | 754 | |
e6e38082 | 755 | rc = rv3029_get_sr(dev, buf); |
67ab2440 | 756 | if (rc < 0) { |
e6e38082 | 757 | dev_err(dev, "reading status failed\n"); |
67ab2440 GH |
758 | return rc; |
759 | } | |
760 | ||
e6e38082 MJ |
761 | rv3029_trickle_config(dev); |
762 | rv3029_hwmon_register(dev, name); | |
763 | ||
764 | rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops, | |
765 | THIS_MODULE); | |
e27e2160 | 766 | |
e6e38082 MJ |
767 | return PTR_ERR_OR_ZERO(rv3029->rtc); |
768 | } | |
52365230 | 769 | |
c2a1c145 MJ |
770 | #if IS_ENABLED(CONFIG_I2C) |
771 | ||
e6e38082 MJ |
772 | static int rv3029_i2c_probe(struct i2c_client *client, |
773 | const struct i2c_device_id *id) | |
774 | { | |
775 | struct regmap *regmap; | |
776 | static const struct regmap_config config = { | |
777 | .reg_bits = 8, | |
778 | .val_bits = 8, | |
779 | }; | |
780 | ||
781 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | | |
782 | I2C_FUNC_SMBUS_BYTE)) { | |
783 | dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n"); | |
784 | return -ENODEV; | |
785 | } | |
52365230 | 786 | |
e6e38082 MJ |
787 | regmap = devm_regmap_init_i2c(client, &config); |
788 | if (IS_ERR(regmap)) { | |
789 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
790 | __func__, PTR_ERR(regmap)); | |
791 | return PTR_ERR(regmap); | |
792 | } | |
52365230 | 793 | |
e6e38082 | 794 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); |
52365230 HS |
795 | } |
796 | ||
aba39d27 | 797 | static struct i2c_driver rv3029_driver = { |
52365230 HS |
798 | .driver = { |
799 | .name = "rtc-rv3029c2", | |
800 | }, | |
e6e38082 | 801 | .probe = rv3029_i2c_probe, |
aba39d27 | 802 | .id_table = rv3029_id, |
52365230 HS |
803 | }; |
804 | ||
c2a1c145 MJ |
805 | static int rv3029_register_driver(void) |
806 | { | |
807 | return i2c_add_driver(&rv3029_driver); | |
808 | } | |
809 | ||
810 | static void rv3029_unregister_driver(void) | |
811 | { | |
812 | i2c_del_driver(&rv3029_driver); | |
813 | } | |
814 | ||
815 | #else | |
816 | ||
817 | static int rv3029_register_driver(void) | |
818 | { | |
819 | return 0; | |
820 | } | |
821 | ||
822 | static void rv3029_unregister_driver(void) | |
823 | { | |
824 | } | |
825 | ||
826 | #endif | |
827 | ||
828 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
829 | ||
830 | static int rv3049_probe(struct spi_device *spi) | |
831 | { | |
832 | static const struct regmap_config config = { | |
833 | .reg_bits = 8, | |
834 | .val_bits = 8, | |
835 | }; | |
836 | struct regmap *regmap; | |
837 | ||
838 | regmap = devm_regmap_init_spi(spi, &config); | |
839 | if (IS_ERR(regmap)) { | |
840 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
841 | __func__, PTR_ERR(regmap)); | |
842 | return PTR_ERR(regmap); | |
843 | } | |
844 | ||
845 | return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049"); | |
846 | } | |
847 | ||
848 | static struct spi_driver rv3049_driver = { | |
849 | .driver = { | |
850 | .name = "rv3049", | |
851 | }, | |
852 | .probe = rv3049_probe, | |
853 | }; | |
854 | ||
855 | static int rv3049_register_driver(void) | |
856 | { | |
857 | return spi_register_driver(&rv3049_driver); | |
858 | } | |
859 | ||
860 | static void rv3049_unregister_driver(void) | |
861 | { | |
862 | spi_unregister_driver(&rv3049_driver); | |
863 | } | |
864 | ||
865 | #else | |
866 | ||
867 | static int rv3049_register_driver(void) | |
868 | { | |
869 | return 0; | |
870 | } | |
871 | ||
872 | static void rv3049_unregister_driver(void) | |
873 | { | |
874 | } | |
875 | ||
876 | #endif | |
877 | ||
878 | static int __init rv30x9_init(void) | |
879 | { | |
880 | int ret; | |
881 | ||
882 | ret = rv3029_register_driver(); | |
883 | if (ret) { | |
884 | pr_err("Failed to register rv3029 driver: %d\n", ret); | |
885 | return ret; | |
886 | } | |
887 | ||
888 | ret = rv3049_register_driver(); | |
889 | if (ret) { | |
890 | pr_err("Failed to register rv3049 driver: %d\n", ret); | |
891 | rv3029_unregister_driver(); | |
892 | } | |
893 | ||
894 | return ret; | |
895 | } | |
896 | module_init(rv30x9_init) | |
897 | ||
898 | static void __exit rv30x9_exit(void) | |
899 | { | |
900 | rv3049_unregister_driver(); | |
901 | rv3029_unregister_driver(); | |
902 | } | |
903 | module_exit(rv30x9_exit) | |
52365230 HS |
904 | |
905 | MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>"); | |
2dca3d9e | 906 | MODULE_AUTHOR("Michael Buesch <m@bues.ch>"); |
c2a1c145 | 907 | MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver"); |
52365230 | 908 | MODULE_LICENSE("GPL"); |
c2a1c145 | 909 | MODULE_ALIAS("spi:rv3049"); |