[deliverable/linux.git] / drivers / rtc / rtc-s3c.c

/* drivers/rtc/rtc-s3c.c
 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com/
 *
 * Copyright (c) 2004,2006 Simtec Electronics
 *	Ben Dooks, <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
*/

#include <linux/module.h>
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/clk.h>
#include <linux/log2.h>
#include <linux/slab.h>

#include <mach/hardware.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <plat/regs-rtc.h>

enum s3c_cpu_type {
	TYPE_S3C2410,
	TYPE_S3C64XX,
};

/* I have yet to find an S3C implementation with more than one
 * of these rtc blocks in */

static struct resource *s3c_rtc_mem;

static struct clk *rtc_clk;
static void __iomem *s3c_rtc_base;
static int s3c_rtc_alarmno = NO_IRQ;
static int s3c_rtc_tickno  = NO_IRQ;
static enum s3c_cpu_type s3c_rtc_cpu_type;

static DEFINE_SPINLOCK(s3c_rtc_pie_lock);

/* IRQ Handlers */

static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
{
	struct rtc_device *rdev = id;

	rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
	return IRQ_HANDLED;
}

static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
{
	struct rtc_device *rdev = id;

	rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
	return IRQ_HANDLED;
}

/* Update control registers */
static void s3c_rtc_setaie(int to)
{
	unsigned int tmp;

	pr_debug("%s: aie=%d\n", __func__, to);

	tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;

	if (to)
		tmp |= S3C2410_RTCALM_ALMEN;

	writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
}

static int s3c_rtc_setpie(struct device *dev, int enabled)
{
	unsigned int tmp;

	pr_debug("%s: pie=%d\n", __func__, enabled);

	spin_lock_irq(&s3c_rtc_pie_lock);

	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
		tmp &= ~S3C64XX_RTCCON_TICEN;

		if (enabled)
			tmp |= S3C64XX_RTCCON_TICEN;

		writeb(tmp, s3c_rtc_base + S3C2410_RTCCON);
	} else {
		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
		tmp &= ~S3C2410_TICNT_ENABLE;

		if (enabled)
			tmp |= S3C2410_TICNT_ENABLE;

		writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
	}

	spin_unlock_irq(&s3c_rtc_pie_lock);

	return 0;
}

static int s3c_rtc_setfreq(struct device *dev, int freq)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	unsigned int tmp = 0;

	if (!is_power_of_2(freq))
		return -EINVAL;

	spin_lock_irq(&s3c_rtc_pie_lock);

	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
		tmp &= S3C2410_TICNT_ENABLE;
	}

	tmp |= (rtc_dev->max_user_freq / freq)-1;

	writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
	spin_unlock_irq(&s3c_rtc_pie_lock);

	return 0;
}

/* Time read/write */

static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
{
	unsigned int have_retried = 0;
	void __iomem *base = s3c_rtc_base;

 retry_get_time:
	rtc_tm->tm_min  = readb(base + S3C2410_RTCMIN);
	rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
	rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
	rtc_tm->tm_mon  = readb(base + S3C2410_RTCMON);
	rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
	rtc_tm->tm_sec  = readb(base + S3C2410_RTCSEC);

	/* the only way to work out wether the system was mid-update
	 * when we read it is to check the second counter, and if it
	 * is zero, then we re-try the entire read
	 */

	if (rtc_tm->tm_sec == 0 && !have_retried) {
		have_retried = 1;
		goto retry_get_time;
	}

	pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
		 rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
		 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);

	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);

	rtc_tm->tm_year += 100;
	rtc_tm->tm_mon -= 1;

	return 0;
}

static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
{
	void __iomem *base = s3c_rtc_base;
	int year = tm->tm_year - 100;

	pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
		 tm->tm_year, tm->tm_mon, tm->tm_mday,
		 tm->tm_hour, tm->tm_min, tm->tm_sec);

	/* we get around y2k by simply not supporting it */

	if (year < 0 || year >= 100) {
		dev_err(dev, "rtc only supports 100 years\n");
		return -EINVAL;
	}

	writeb(bin2bcd(tm->tm_sec),  base + S3C2410_RTCSEC);
	writeb(bin2bcd(tm->tm_min),  base + S3C2410_RTCMIN);
	writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
	writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
	writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
	writeb(bin2bcd(year), base + S3C2410_RTCYEAR);

	return 0;
}

static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *alm_tm = &alrm->time;
	void __iomem *base = s3c_rtc_base;
	unsigned int alm_en;

	alm_tm->tm_sec  = readb(base + S3C2410_ALMSEC);
	alm_tm->tm_min  = readb(base + S3C2410_ALMMIN);
	alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
	alm_tm->tm_mon  = readb(base + S3C2410_ALMMON);
	alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
	alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);

	alm_en = readb(base + S3C2410_RTCALM);

	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;

	pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
		 alm_en,
		 alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
		 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);


	/* decode the alarm enable field */

	if (alm_en & S3C2410_RTCALM_SECEN)
		alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
	else
		alm_tm->tm_sec = 0xff;

	if (alm_en & S3C2410_RTCALM_MINEN)
		alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
	else
		alm_tm->tm_min = 0xff;

	if (alm_en & S3C2410_RTCALM_HOUREN)
		alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
	else
		alm_tm->tm_hour = 0xff;

	if (alm_en & S3C2410_RTCALM_DAYEN)
		alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
	else
		alm_tm->tm_mday = 0xff;

	if (alm_en & S3C2410_RTCALM_MONEN) {
		alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
		alm_tm->tm_mon -= 1;
	} else {
		alm_tm->tm_mon = 0xff;
	}

	if (alm_en & S3C2410_RTCALM_YEAREN)
		alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
	else
		alm_tm->tm_year = 0xffff;

	return 0;
}

static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *tm = &alrm->time;
	void __iomem *base = s3c_rtc_base;
	unsigned int alrm_en;

	pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
		 alrm->enabled,
		 tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
		 tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);


	alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
	writeb(0x00, base + S3C2410_RTCALM);

	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
		alrm_en |= S3C2410_RTCALM_SECEN;
		writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
	}

	if (tm->tm_min < 60 && tm->tm_min >= 0) {
		alrm_en |= S3C2410_RTCALM_MINEN;
		writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
	}

	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
		alrm_en |= S3C2410_RTCALM_HOUREN;
		writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
	}

	pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);

	writeb(alrm_en, base + S3C2410_RTCALM);

	s3c_rtc_setaie(alrm->enabled);

	if (alrm->enabled)
		enable_irq_wake(s3c_rtc_alarmno);
	else
		disable_irq_wake(s3c_rtc_alarmno);

	return 0;
}

static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
{
	unsigned int ticnt;

	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		ticnt = readb(s3c_rtc_base + S3C2410_RTCCON);
		ticnt &= S3C64XX_RTCCON_TICEN;
	} else {
		ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
		ticnt &= S3C2410_TICNT_ENABLE;
	}

	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt  ? "yes" : "no");
	return 0;
}

static int s3c_rtc_open(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	int ret;

	ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
			  IRQF_DISABLED,  "s3c2410-rtc alarm", rtc_dev);

	if (ret) {
		dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
		return ret;
	}

	ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
			  IRQF_DISABLED,  "s3c2410-rtc tick", rtc_dev);

	if (ret) {
		dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
		goto tick_err;
	}

	return ret;

 tick_err:
	free_irq(s3c_rtc_alarmno, rtc_dev);
	return ret;
}

static void s3c_rtc_release(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);

	/* do not clear AIE here, it may be needed for wake */

	s3c_rtc_setpie(dev, 0);
	free_irq(s3c_rtc_alarmno, rtc_dev);
	free_irq(s3c_rtc_tickno, rtc_dev);
}

static const struct rtc_class_ops s3c_rtcops = {
	.open		= s3c_rtc_open,
	.release	= s3c_rtc_release,
	.read_time	= s3c_rtc_gettime,
	.set_time	= s3c_rtc_settime,
	.read_alarm	= s3c_rtc_getalarm,
	.set_alarm	= s3c_rtc_setalarm,
	.irq_set_freq	= s3c_rtc_setfreq,
	.irq_set_state	= s3c_rtc_setpie,
	.proc	        = s3c_rtc_proc,
};

static void s3c_rtc_enable(struct platform_device *pdev, int en)
{
	void __iomem *base = s3c_rtc_base;
	unsigned int tmp;

	if (s3c_rtc_base == NULL)
		return;

	if (!en) {
		tmp = readb(base + S3C2410_RTCCON);
		if (s3c_rtc_cpu_type == TYPE_S3C64XX)
			tmp &= ~S3C64XX_RTCCON_TICEN;
		tmp &= ~S3C2410_RTCCON_RTCEN;
		writeb(tmp, base + S3C2410_RTCCON);

		if (s3c_rtc_cpu_type == TYPE_S3C2410) {
			tmp = readb(base + S3C2410_TICNT);
			tmp &= ~S3C2410_TICNT_ENABLE;
			writeb(tmp, base + S3C2410_TICNT);
		}
	} else {
		/* re-enable the device, and check it is ok */

		if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){
			dev_info(&pdev->dev, "rtc disabled, re-enabling\n");

			tmp = readb(base + S3C2410_RTCCON);
			writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON);
		}

		if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){
			dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");

			tmp = readb(base + S3C2410_RTCCON);
			writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON);
		}

		if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){
			dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");

			tmp = readb(base + S3C2410_RTCCON);
			writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON);
		}
	}
}

static int __devexit s3c_rtc_remove(struct platform_device *dev)
{
	struct rtc_device *rtc = platform_get_drvdata(dev);

	platform_set_drvdata(dev, NULL);
	rtc_device_unregister(rtc);

	s3c_rtc_setpie(&dev->dev, 0);
	s3c_rtc_setaie(0);

	clk_disable(rtc_clk);
	clk_put(rtc_clk);
	rtc_clk = NULL;

	iounmap(s3c_rtc_base);
	release_resource(s3c_rtc_mem);
	kfree(s3c_rtc_mem);

	return 0;
}

static int __devinit s3c_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct resource *res;
	int ret;

	pr_debug("%s: probe=%p\n", __func__, pdev);

	/* find the IRQs */

	s3c_rtc_tickno = platform_get_irq(pdev, 1);
	if (s3c_rtc_tickno < 0) {
		dev_err(&pdev->dev, "no irq for rtc tick\n");
		return -ENOENT;
	}

	s3c_rtc_alarmno = platform_get_irq(pdev, 0);
	if (s3c_rtc_alarmno < 0) {
		dev_err(&pdev->dev, "no irq for alarm\n");
		return -ENOENT;
	}

	pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
		 s3c_rtc_tickno, s3c_rtc_alarmno);

	/* get the memory region */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL) {
		dev_err(&pdev->dev, "failed to get memory region resource\n");
		return -ENOENT;
	}

	s3c_rtc_mem = request_mem_region(res->start,
					 res->end-res->start+1,
					 pdev->name);

	if (s3c_rtc_mem == NULL) {
		dev_err(&pdev->dev, "failed to reserve memory region\n");
		ret = -ENOENT;
		goto err_nores;
	}

	s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
	if (s3c_rtc_base == NULL) {
		dev_err(&pdev->dev, "failed ioremap()\n");
		ret = -EINVAL;
		goto err_nomap;
	}

	rtc_clk = clk_get(&pdev->dev, "rtc");
	if (IS_ERR(rtc_clk)) {
		dev_err(&pdev->dev, "failed to find rtc clock source\n");
		ret = PTR_ERR(rtc_clk);
		rtc_clk = NULL;
		goto err_clk;
	}

	clk_enable(rtc_clk);

	/* check to see if everything is setup correctly */

	s3c_rtc_enable(pdev, 1);

 	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
		 readb(s3c_rtc_base + S3C2410_RTCCON));

	device_init_wakeup(&pdev->dev, 1);

	/* register RTC and exit */

	rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
				  THIS_MODULE);

	if (IS_ERR(rtc)) {
		dev_err(&pdev->dev, "cannot attach rtc\n");
		ret = PTR_ERR(rtc);
		goto err_nortc;
	}

	s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;

	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
		rtc->max_user_freq = 32768;
	else
		rtc->max_user_freq = 128;

	platform_set_drvdata(pdev, rtc);

	s3c_rtc_setfreq(&pdev->dev, 1);

	return 0;

 err_nortc:
	s3c_rtc_enable(pdev, 0);
	clk_disable(rtc_clk);
	clk_put(rtc_clk);

 err_clk:
	iounmap(s3c_rtc_base);

 err_nomap:
	release_resource(s3c_rtc_mem);

 err_nores:
	return ret;
}

#ifdef CONFIG_PM

/* RTC Power management control */

static int ticnt_save, ticnt_en_save;

static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	/* save TICNT for anyone using periodic interrupts */
	ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		ticnt_en_save = readb(s3c_rtc_base + S3C2410_RTCCON);
		ticnt_en_save &= S3C64XX_RTCCON_TICEN;
	}
	s3c_rtc_enable(pdev, 0);
	return 0;
}

static int s3c_rtc_resume(struct platform_device *pdev)
{
	unsigned int tmp;

	s3c_rtc_enable(pdev, 1);
	writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
	if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
		tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
		writeb(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
	}
	return 0;
}
#else
#define s3c_rtc_suspend NULL
#define s3c_rtc_resume  NULL
#endif

static struct platform_device_id s3c_rtc_driver_ids[] = {
	{
		.name		= "s3c2410-rtc",
		.driver_data	= TYPE_S3C2410,
	}, {
		.name		= "s3c64xx-rtc",
		.driver_data	= TYPE_S3C64XX,
	},
	{ }
};

MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);

static struct platform_driver s3c_rtc_driver = {
	.probe		= s3c_rtc_probe,
	.remove		= __devexit_p(s3c_rtc_remove),
	.suspend	= s3c_rtc_suspend,
	.resume		= s3c_rtc_resume,
	.id_table	= s3c_rtc_driver_ids,
	.driver		= {
		.name	= "s3c-rtc",
		.owner	= THIS_MODULE,
	},
};

static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";

static int __init s3c_rtc_init(void)
{
	printk(banner);
	return platform_driver_register(&s3c_rtc_driver);
}

static void __exit s3c_rtc_exit(void)
{
	platform_driver_unregister(&s3c_rtc_driver);
}

module_init(s3c_rtc_init);
module_exit(s3c_rtc_exit);

MODULE_DESCRIPTION("Samsung S3C RTC Driver");
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:s3c2410-rtc");
Commit	Line	Data
1add6781	1	/* drivers/rtc/rtc-s3c.c
e48add8c AD	2	*
	3	* Copyright (c) 2010 Samsung Electronics Co., Ltd.
	4	* http://www.samsung.com/
1add6781 BD	5	*
	6	* Copyright (c) 2004,2006 Simtec Electronics
	7	* Ben Dooks, <ben@simtec.co.uk>
	8	* http://armlinux.simtec.co.uk/
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* S3C2410/S3C2440/S3C24XX Internal RTC Driver
	15	*/
	16
	17	#include <linux/module.h>
	18	#include <linux/fs.h>
	19	#include <linux/string.h>
	20	#include <linux/init.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/rtc.h>
	24	#include <linux/bcd.h>
	25	#include <linux/clk.h>
9974b6ea	26	#include <linux/log2.h>
5a0e3ad6	27	#include <linux/slab.h>
1add6781	28
a09e64fb	29	#include <mach/hardware.h>
1add6781 BD	30	#include <asm/uaccess.h>
	31	#include <asm/io.h>
	32	#include <asm/irq.h>
e2cd00cf	33	#include <plat/regs-rtc.h>
1add6781	34
9f4123b7 MC	35	enum s3c_cpu_type {
	36	TYPE_S3C2410,
	37	TYPE_S3C64XX,
	38	};
	39
1add6781 BD	40	/* I have yet to find an S3C implementation with more than one
	41	* of these rtc blocks in */
	42
	43	static struct resource *s3c_rtc_mem;
	44
e48add8c	45	static struct clk *rtc_clk;
1add6781 BD	46	static void __iomem *s3c_rtc_base;
	47	static int s3c_rtc_alarmno = NO_IRQ;
	48	static int s3c_rtc_tickno = NO_IRQ;
9f4123b7	49	static enum s3c_cpu_type s3c_rtc_cpu_type;
1add6781 BD	50
1add6781 BD	51	static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
1add6781 BD	52
	53	/* IRQ Handlers */
	54
7d12e780	55	static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 BD	56	{
	57	struct rtc_device *rdev = id;
	58
ab6a2d70	59	rtc_update_irq(rdev, 1, RTC_AF \| RTC_IRQF);
1add6781 BD	60	return IRQ_HANDLED;
	61	}
	62
7d12e780	63	static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 BD	64	{
	65	struct rtc_device *rdev = id;
	66
773be7ee	67	rtc_update_irq(rdev, 1, RTC_PF \| RTC_IRQF);
1add6781 BD	68	return IRQ_HANDLED;
	69	}
	70
	71	/* Update control registers */
	72	static void s3c_rtc_setaie(int to)
	73	{
	74	unsigned int tmp;
	75
2a4e2b87	76	pr_debug("%s: aie=%d\n", __func__, to);
1add6781	77
9a654518	78	tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 BD	79
	80	if (to)
	81	tmp \|= S3C2410_RTCALM_ALMEN;
	82
9a654518	83	writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
1add6781 BD	84	}
1add6781 BD	85
773be7ee	86	static int s3c_rtc_setpie(struct device *dev, int enabled)
1add6781 BD	87	{
	88	unsigned int tmp;
	89
773be7ee	90	pr_debug("%s: pie=%d\n", __func__, enabled);
1add6781 BD	91
1add6781 BD	92	spin_lock_irq(&s3c_rtc_pie_lock);
1add6781	93
9f4123b7 MC	94	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
	95	tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
	96	tmp &= ~S3C64XX_RTCCON_TICEN;
	97
	98	if (enabled)
	99	tmp \|= S3C64XX_RTCCON_TICEN;
	100
	101	writeb(tmp, s3c_rtc_base + S3C2410_RTCCON);
	102	} else {
	103	tmp = readb(s3c_rtc_base + S3C2410_TICNT);
	104	tmp &= ~S3C2410_TICNT_ENABLE;
	105
	106	if (enabled)
	107	tmp \|= S3C2410_TICNT_ENABLE;
	108
	109	writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
	110	}
1add6781	111
1add6781	112	spin_unlock_irq(&s3c_rtc_pie_lock);
773be7ee BD	113
773be7ee BD	114	return 0;
1add6781 BD	115	}
1add6781 BD	116
773be7ee	117	static int s3c_rtc_setfreq(struct device *dev, int freq)
1add6781	118	{
9f4123b7 MC	119	struct platform_device *pdev = to_platform_device(dev);
	120	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	121	unsigned int tmp = 0;
1add6781	122
5d2a5037 JC	123	if (!is_power_of_2(freq))
	124	return -EINVAL;
	125
1add6781	126	spin_lock_irq(&s3c_rtc_pie_lock);
1add6781	127
9f4123b7 MC	128	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
	129	tmp = readb(s3c_rtc_base + S3C2410_TICNT);
	130	tmp &= S3C2410_TICNT_ENABLE;
	131	}
	132
	133	tmp \|= (rtc_dev->max_user_freq / freq)-1;
1add6781	134
9a654518	135	writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
1add6781	136	spin_unlock_irq(&s3c_rtc_pie_lock);
773be7ee BD	137
773be7ee BD	138	return 0;
1add6781 BD	139	}
	140
	141	/* Time read/write */
	142
	143	static int s3c_rtc_gettime(struct device dev, struct rtc_time rtc_tm)
	144	{
	145	unsigned int have_retried = 0;
9a654518	146	void __iomem *base = s3c_rtc_base;
1add6781 BD	147
1add6781 BD	148	retry_get_time:
9a654518 BD	149	rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
	150	rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
	151	rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
	152	rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
	153	rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
	154	rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
1add6781 BD	155
	156	/* the only way to work out wether the system was mid-update
	157	* when we read it is to check the second counter, and if it
	158	* is zero, then we re-try the entire read
	159	*/
	160
	161	if (rtc_tm->tm_sec == 0 && !have_retried) {
	162	have_retried = 1;
	163	goto retry_get_time;
	164	}
	165
	166	pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
	167	rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
	168	rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
	169
fe20ba70 AB	170	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	171	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	172	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	173	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	174	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	175	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781 BD	176
	177	rtc_tm->tm_year += 100;
	178	rtc_tm->tm_mon -= 1;
	179
	180	return 0;
	181	}
	182
	183	static int s3c_rtc_settime(struct device dev, struct rtc_time tm)
	184	{
9a654518	185	void __iomem *base = s3c_rtc_base;
641741e0	186	int year = tm->tm_year - 100;
9a654518	187
641741e0 BD	188	pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
	189	tm->tm_year, tm->tm_mon, tm->tm_mday,
	190	tm->tm_hour, tm->tm_min, tm->tm_sec);
	191
	192	/* we get around y2k by simply not supporting it */
1add6781	193
641741e0	194	if (year < 0 \|\| year >= 100) {
9a654518	195	dev_err(dev, "rtc only supports 100 years\n");
1add6781	196	return -EINVAL;
9a654518 BD	197	}
9a654518 BD	198
fe20ba70 AB	199	writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
	200	writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
	201	writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
	202	writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
	203	writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
	204	writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
1add6781 BD	205
	206	return 0;
	207	}
	208
	209	static int s3c_rtc_getalarm(struct device dev, struct rtc_wkalrm alrm)
	210	{
	211	struct rtc_time *alm_tm = &alrm->time;
9a654518	212	void __iomem *base = s3c_rtc_base;
1add6781 BD	213	unsigned int alm_en;
1add6781 BD	214
9a654518 BD	215	alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
	216	alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
	217	alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
	218	alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
	219	alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
	220	alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
1add6781	221
9a654518	222	alm_en = readb(base + S3C2410_RTCALM);
1add6781	223
a2db8dfc DB	224	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
a2db8dfc DB	225
1add6781 BD	226	pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
	227	alm_en,
	228	alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
	229	alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
	230
	231
	232	/* decode the alarm enable field */
	233
	234	if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70	235	alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781 BD	236	else
	237	alm_tm->tm_sec = 0xff;
	238
	239	if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70	240	alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781 BD	241	else
	242	alm_tm->tm_min = 0xff;
	243
	244	if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70	245	alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781 BD	246	else
	247	alm_tm->tm_hour = 0xff;
	248
	249	if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70	250	alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781 BD	251	else
	252	alm_tm->tm_mday = 0xff;
	253
	254	if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70	255	alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781 BD	256	alm_tm->tm_mon -= 1;
	257	} else {
	258	alm_tm->tm_mon = 0xff;
	259	}
	260
	261	if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70	262	alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781 BD	263	else
	264	alm_tm->tm_year = 0xffff;
	265
	266	return 0;
	267	}
	268
	269	static int s3c_rtc_setalarm(struct device dev, struct rtc_wkalrm alrm)
	270	{
	271	struct rtc_time *tm = &alrm->time;
9a654518	272	void __iomem *base = s3c_rtc_base;
1add6781 BD	273	unsigned int alrm_en;
	274
	275	pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
	276	alrm->enabled,
	277	tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
	278	tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
	279
	280
9a654518 BD	281	alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
9a654518 BD	282	writeb(0x00, base + S3C2410_RTCALM);
1add6781 BD	283
	284	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
	285	alrm_en \|= S3C2410_RTCALM_SECEN;
fe20ba70	286	writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
1add6781 BD	287	}
	288
	289	if (tm->tm_min < 60 && tm->tm_min >= 0) {
	290	alrm_en \|= S3C2410_RTCALM_MINEN;
fe20ba70	291	writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
1add6781 BD	292	}
	293
	294	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
	295	alrm_en \|= S3C2410_RTCALM_HOUREN;
fe20ba70	296	writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
1add6781 BD	297	}
	298
	299	pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
	300
9a654518	301	writeb(alrm_en, base + S3C2410_RTCALM);
1add6781	302
773be7ee	303	s3c_rtc_setaie(alrm->enabled);
1add6781 BD	304
	305	if (alrm->enabled)
	306	enable_irq_wake(s3c_rtc_alarmno);
	307	else
	308	disable_irq_wake(s3c_rtc_alarmno);
	309
	310	return 0;
	311	}
	312
1add6781 BD	313	static int s3c_rtc_proc(struct device dev, struct seq_file seq)
1add6781 BD	314	{
9f4123b7	315	unsigned int ticnt;
1add6781	316
9f4123b7 MC	317	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
	318	ticnt = readb(s3c_rtc_base + S3C2410_RTCCON);
	319	ticnt &= S3C64XX_RTCCON_TICEN;
	320	} else {
	321	ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
	322	ticnt &= S3C2410_TICNT_ENABLE;
	323	}
	324
	325	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
1add6781 BD	326	return 0;
	327	}
	328
	329	static int s3c_rtc_open(struct device *dev)
	330	{
	331	struct platform_device *pdev = to_platform_device(dev);
	332	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	333	int ret;
	334
	335	ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
38515e90	336	IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
1add6781 BD	337
	338	if (ret) {
	339	dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
	340	return ret;
	341	}
	342
	343	ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
38515e90	344	IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
1add6781 BD	345
	346	if (ret) {
	347	dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
	348	goto tick_err;
	349	}
	350
	351	return ret;
	352
	353	tick_err:
	354	free_irq(s3c_rtc_alarmno, rtc_dev);
	355	return ret;
	356	}
	357
	358	static void s3c_rtc_release(struct device *dev)
	359	{
	360	struct platform_device *pdev = to_platform_device(dev);
	361	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	362
	363	/* do not clear AIE here, it may be needed for wake */
	364
773be7ee	365	s3c_rtc_setpie(dev, 0);
1add6781 BD	366	free_irq(s3c_rtc_alarmno, rtc_dev);
	367	free_irq(s3c_rtc_tickno, rtc_dev);
	368	}
	369
ff8371ac	370	static const struct rtc_class_ops s3c_rtcops = {
1add6781 BD	371	.open = s3c_rtc_open,
1add6781 BD	372	.release = s3c_rtc_release,
1add6781 BD	373	.read_time = s3c_rtc_gettime,
	374	.set_time = s3c_rtc_settime,
	375	.read_alarm = s3c_rtc_getalarm,
	376	.set_alarm = s3c_rtc_setalarm,
773be7ee BD	377	.irq_set_freq = s3c_rtc_setfreq,
773be7ee BD	378	.irq_set_state = s3c_rtc_setpie,
1add6781 BD	379	.proc = s3c_rtc_proc,
	380	};
	381
	382	static void s3c_rtc_enable(struct platform_device *pdev, int en)
	383	{
9a654518	384	void __iomem *base = s3c_rtc_base;
1add6781 BD	385	unsigned int tmp;
	386
	387	if (s3c_rtc_base == NULL)
	388	return;
	389
	390	if (!en) {
9a654518	391	tmp = readb(base + S3C2410_RTCCON);
9f4123b7 MC	392	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	393	tmp &= ~S3C64XX_RTCCON_TICEN;
	394	tmp &= ~S3C2410_RTCCON_RTCEN;
	395	writeb(tmp, base + S3C2410_RTCCON);
	396
	397	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
	398	tmp = readb(base + S3C2410_TICNT);
	399	tmp &= ~S3C2410_TICNT_ENABLE;
	400	writeb(tmp, base + S3C2410_TICNT);
	401	}
1add6781 BD	402	} else {
	403	/* re-enable the device, and check it is ok */
	404
9a654518	405	if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){
1add6781 BD	406	dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
1add6781 BD	407
9a654518 BD	408	tmp = readb(base + S3C2410_RTCCON);
9a654518 BD	409	writeb(tmp\|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON);
1add6781 BD	410	}
1add6781 BD	411
9a654518	412	if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){
1add6781 BD	413	dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
1add6781 BD	414
9a654518 BD	415	tmp = readb(base + S3C2410_RTCCON);
9a654518 BD	416	writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON);
1add6781 BD	417	}
1add6781 BD	418
9a654518	419	if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){
1add6781 BD	420	dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
1add6781 BD	421
9a654518 BD	422	tmp = readb(base + S3C2410_RTCCON);
9a654518 BD	423	writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON);
1add6781 BD	424	}
	425	}
	426	}
	427
4cd0c5c4	428	static int __devexit s3c_rtc_remove(struct platform_device *dev)
1add6781 BD	429	{
	430	struct rtc_device *rtc = platform_get_drvdata(dev);
	431
	432	platform_set_drvdata(dev, NULL);
	433	rtc_device_unregister(rtc);
	434
773be7ee	435	s3c_rtc_setpie(&dev->dev, 0);
1add6781 BD	436	s3c_rtc_setaie(0);
1add6781 BD	437
e48add8c AD	438	clk_disable(rtc_clk);
	439	clk_put(rtc_clk);
	440	rtc_clk = NULL;
	441
1add6781 BD	442	iounmap(s3c_rtc_base);
	443	release_resource(s3c_rtc_mem);
	444	kfree(s3c_rtc_mem);
	445
	446	return 0;
	447	}
	448
4cd0c5c4	449	static int __devinit s3c_rtc_probe(struct platform_device *pdev)
1add6781 BD	450	{
	451	struct rtc_device *rtc;
	452	struct resource *res;
	453	int ret;
	454
2a4e2b87	455	pr_debug("%s: probe=%p\n", __func__, pdev);
1add6781 BD	456
	457	/* find the IRQs */
	458
	459	s3c_rtc_tickno = platform_get_irq(pdev, 1);
	460	if (s3c_rtc_tickno < 0) {
	461	dev_err(&pdev->dev, "no irq for rtc tick\n");
	462	return -ENOENT;
	463	}
	464
	465	s3c_rtc_alarmno = platform_get_irq(pdev, 0);
	466	if (s3c_rtc_alarmno < 0) {
	467	dev_err(&pdev->dev, "no irq for alarm\n");
	468	return -ENOENT;
	469	}
	470
	471	pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
	472	s3c_rtc_tickno, s3c_rtc_alarmno);
	473
	474	/* get the memory region */
	475
	476	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	477	if (res == NULL) {
	478	dev_err(&pdev->dev, "failed to get memory region resource\n");
	479	return -ENOENT;
	480	}
	481
	482	s3c_rtc_mem = request_mem_region(res->start,
9a654518 BD	483	res->end-res->start+1,
9a654518 BD	484	pdev->name);
1add6781 BD	485
	486	if (s3c_rtc_mem == NULL) {
	487	dev_err(&pdev->dev, "failed to reserve memory region\n");
	488	ret = -ENOENT;
	489	goto err_nores;
	490	}
	491
	492	s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
	493	if (s3c_rtc_base == NULL) {
	494	dev_err(&pdev->dev, "failed ioremap()\n");
	495	ret = -EINVAL;
	496	goto err_nomap;
	497	}
	498
e48add8c AD	499	rtc_clk = clk_get(&pdev->dev, "rtc");
	500	if (IS_ERR(rtc_clk)) {
	501	dev_err(&pdev->dev, "failed to find rtc clock source\n");
	502	ret = PTR_ERR(rtc_clk);
	503	rtc_clk = NULL;
	504	goto err_clk;
	505	}
	506
	507	clk_enable(rtc_clk);
	508
1add6781 BD	509	/* check to see if everything is setup correctly */
	510
	511	s3c_rtc_enable(pdev, 1);
	512
9a654518 BD	513	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
9a654518 BD	514	readb(s3c_rtc_base + S3C2410_RTCCON));
1add6781	515
51b7616e YK	516	device_init_wakeup(&pdev->dev, 1);
51b7616e YK	517
1add6781 BD	518	/* register RTC and exit */
	519
	520	rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
	521	THIS_MODULE);
	522
	523	if (IS_ERR(rtc)) {
	524	dev_err(&pdev->dev, "cannot attach rtc\n");
	525	ret = PTR_ERR(rtc);
	526	goto err_nortc;
	527	}
	528
eaa6e4dd MC	529	s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
eaa6e4dd MC	530
9f4123b7 MC	531	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	532	rtc->max_user_freq = 32768;
	533	else
	534	rtc->max_user_freq = 128;
	535
1add6781	536	platform_set_drvdata(pdev, rtc);
e893de59 MC	537
	538	s3c_rtc_setfreq(&pdev->dev, 1);
	539
1add6781 BD	540	return 0;
	541
	542	err_nortc:
	543	s3c_rtc_enable(pdev, 0);
e48add8c AD	544	clk_disable(rtc_clk);
	545	clk_put(rtc_clk);
	546
	547	err_clk:
1add6781 BD	548	iounmap(s3c_rtc_base);
	549
	550	err_nomap:
	551	release_resource(s3c_rtc_mem);
	552
	553	err_nores:
	554	return ret;
	555	}
	556
	557	#ifdef CONFIG_PM
	558
	559	/* RTC Power management control */
	560
9f4123b7	561	static int ticnt_save, ticnt_en_save;
1add6781 BD	562
	563	static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	564	{
1add6781	565	/* save TICNT for anyone using periodic interrupts */
9a654518	566	ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
9f4123b7 MC	567	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
	568	ticnt_en_save = readb(s3c_rtc_base + S3C2410_RTCCON);
	569	ticnt_en_save &= S3C64XX_RTCCON_TICEN;
	570	}
1add6781	571	s3c_rtc_enable(pdev, 0);
1add6781 BD	572	return 0;
	573	}
	574
	575	static int s3c_rtc_resume(struct platform_device *pdev)
	576	{
9f4123b7 MC	577	unsigned int tmp;
9f4123b7 MC	578
1add6781	579	s3c_rtc_enable(pdev, 1);
9a654518	580	writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
9f4123b7 MC	581	if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
	582	tmp = readb(s3c_rtc_base + S3C2410_RTCCON);
	583	writeb(tmp \| ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
	584	}
1add6781 BD	585	return 0;
	586	}
	587	#else
	588	#define s3c_rtc_suspend NULL
	589	#define s3c_rtc_resume NULL
	590	#endif
	591
9f4123b7 MC	592	static struct platform_device_id s3c_rtc_driver_ids[] = {
	593	{
	594	.name = "s3c2410-rtc",
	595	.driver_data = TYPE_S3C2410,
	596	}, {
	597	.name = "s3c64xx-rtc",
	598	.driver_data = TYPE_S3C64XX,
	599	},
	600	{ }
	601	};
	602
	603	MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
	604
	605	static struct platform_driver s3c_rtc_driver = {
1add6781	606	.probe = s3c_rtc_probe,
4cd0c5c4	607	.remove = __devexit_p(s3c_rtc_remove),
1add6781 BD	608	.suspend = s3c_rtc_suspend,
1add6781 BD	609	.resume = s3c_rtc_resume,
9f4123b7	610	.id_table = s3c_rtc_driver_ids,
1add6781	611	.driver = {
9f4123b7	612	.name = "s3c-rtc",
1add6781 BD	613	.owner = THIS_MODULE,
	614	},
	615	};
	616
	617	static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
	618
	619	static int __init s3c_rtc_init(void)
	620	{
	621	printk(banner);
9f4123b7	622	return platform_driver_register(&s3c_rtc_driver);
1add6781 BD	623	}
	624
	625	static void __exit s3c_rtc_exit(void)
	626	{
9f4123b7	627	platform_driver_unregister(&s3c_rtc_driver);
1add6781 BD	628	}
	629
	630	module_init(s3c_rtc_init);
	631	module_exit(s3c_rtc_exit);
	632
	633	MODULE_DESCRIPTION("Samsung S3C RTC Driver");
	634	MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
	635	MODULE_LICENSE("GPL");
ad28a07b	636	MODULE_ALIAS("platform:s3c2410-rtc");