kernel/kmod: fix use-after-free of the sub_info structure
[deliverable/linux.git] / drivers / rtc / rtc-s3c.c
CommitLineData
1add6781 1/* drivers/rtc/rtc-s3c.c
e48add8c
AD
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
1add6781
BD
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
9974b6ea 26#include <linux/log2.h>
5a0e3ad6 27#include <linux/slab.h>
39ce4084 28#include <linux/of.h>
dbd9acbe
SK
29#include <linux/uaccess.h>
30#include <linux/io.h>
1add6781 31
1add6781 32#include <asm/irq.h>
b9d7c5d3 33#include "rtc-s3c.h"
1add6781 34
19be09f5
CC
35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
df9e26d0 41 struct clk *rtc_src_clk;
19be09f5
CC
42 bool enabled;
43
ae05c950 44 struct s3c_rtc_data *data;
1add6781 45
19be09f5
CC
46 int irq_alarm;
47 int irq_tick;
1add6781 48
19be09f5
CC
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
1add6781 51
19be09f5
CC
52 int ticnt_save, ticnt_en_save;
53 bool wake_en;
54};
55
ae05c950
CC
56struct s3c_rtc_data {
57 int max_user_freq;
df9e26d0 58 bool needs_src_clk;
ae05c950
CC
59
60 void (*irq_handler) (struct s3c_rtc *info, int mask);
61 void (*set_freq) (struct s3c_rtc *info, int freq);
62 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
63 void (*select_tick_clk) (struct s3c_rtc *info);
64 void (*save_tick_cnt) (struct s3c_rtc *info);
65 void (*restore_tick_cnt) (struct s3c_rtc *info);
66 void (*enable) (struct s3c_rtc *info);
67 void (*disable) (struct s3c_rtc *info);
68};
69
19be09f5 70static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info, bool enable)
88cee8fd 71{
88cee8fd
DK
72 unsigned long irq_flags;
73
19be09f5 74 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
88cee8fd 75 if (enable) {
19be09f5
CC
76 if (!info->enabled) {
77 clk_enable(info->rtc_clk);
df9e26d0
CC
78 if (info->data->needs_src_clk)
79 clk_enable(info->rtc_src_clk);
19be09f5 80 info->enabled = true;
88cee8fd
DK
81 }
82 } else {
19be09f5 83 if (info->enabled) {
df9e26d0
CC
84 if (info->data->needs_src_clk)
85 clk_disable(info->rtc_src_clk);
19be09f5
CC
86 clk_disable(info->rtc_clk);
87 info->enabled = false;
88cee8fd
DK
88 }
89 }
19be09f5 90 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
88cee8fd
DK
91}
92
1add6781 93/* IRQ Handlers */
ae05c950 94static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 95{
19be09f5 96 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 97
ae05c950
CC
98 if (info->data->irq_handler)
99 info->data->irq_handler(info, S3C2410_INTP_TIC);
88cee8fd 100
1add6781
BD
101 return IRQ_HANDLED;
102}
103
ae05c950 104static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 105{
19be09f5 106 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 107
ae05c950
CC
108 if (info->data->irq_handler)
109 info->data->irq_handler(info, S3C2410_INTP_ALM);
2f3478f6 110
1add6781
BD
111 return IRQ_HANDLED;
112}
113
114/* Update control registers */
2ec38a03 115static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781 116{
19be09f5 117 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
118 unsigned int tmp;
119
19be09f5 120 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
1add6781 121
19be09f5 122 clk_enable(info->rtc_clk);
df9e26d0
CC
123 if (info->data->needs_src_clk)
124 clk_enable(info->rtc_src_clk);
19be09f5 125 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 126
2ec38a03 127 if (enabled)
1add6781
BD
128 tmp |= S3C2410_RTCALM_ALMEN;
129
19be09f5 130 writeb(tmp, info->base + S3C2410_RTCALM);
df9e26d0
CC
131 if (info->data->needs_src_clk)
132 clk_disable(info->rtc_src_clk);
19be09f5 133 clk_disable(info->rtc_clk);
2ec38a03 134
19be09f5 135 s3c_rtc_alarm_clk_enable(info, enabled);
88cee8fd 136
2ec38a03 137 return 0;
1add6781
BD
138}
139
ae05c950 140/* Set RTC frequency */
19be09f5 141static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
1add6781 142{
5d2a5037
JC
143 if (!is_power_of_2(freq))
144 return -EINVAL;
145
19be09f5 146 clk_enable(info->rtc_clk);
df9e26d0
CC
147 if (info->data->needs_src_clk)
148 clk_enable(info->rtc_src_clk);
19be09f5 149 spin_lock_irq(&info->pie_lock);
1add6781 150
ae05c950
CC
151 if (info->data->set_freq)
152 info->data->set_freq(info, freq);
25c1a246 153
19be09f5 154 spin_unlock_irq(&info->pie_lock);
df9e26d0
CC
155 if (info->data->needs_src_clk)
156 clk_disable(info->rtc_src_clk);
19be09f5 157 clk_disable(info->rtc_clk);
773be7ee
BD
158
159 return 0;
1add6781
BD
160}
161
162/* Time read/write */
1add6781
BD
163static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
164{
19be09f5 165 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
166 unsigned int have_retried = 0;
167
19be09f5 168 clk_enable(info->rtc_clk);
df9e26d0
CC
169 if (info->data->needs_src_clk)
170 clk_enable(info->rtc_src_clk);
171
1add6781 172 retry_get_time:
19be09f5
CC
173 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
174 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
175 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
176 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
177 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
178 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
1add6781 179
48fc7f7e 180 /* the only way to work out whether the system was mid-update
1add6781
BD
181 * when we read it is to check the second counter, and if it
182 * is zero, then we re-try the entire read
183 */
184
185 if (rtc_tm->tm_sec == 0 && !have_retried) {
186 have_retried = 1;
187 goto retry_get_time;
188 }
189
fe20ba70
AB
190 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
191 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
192 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
193 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
194 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
195 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781
BD
196
197 rtc_tm->tm_year += 100;
4e8896cd 198
d4a48c2a 199 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
4e8896cd
MH
200 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
201 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
202
1add6781
BD
203 rtc_tm->tm_mon -= 1;
204
df9e26d0
CC
205 if (info->data->needs_src_clk)
206 clk_disable(info->rtc_src_clk);
19be09f5
CC
207 clk_disable(info->rtc_clk);
208
5b3ffddd 209 return rtc_valid_tm(rtc_tm);
1add6781
BD
210}
211
212static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
213{
19be09f5 214 struct s3c_rtc *info = dev_get_drvdata(dev);
641741e0 215 int year = tm->tm_year - 100;
9a654518 216
d4a48c2a 217 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
30ffc40c 218 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0
BD
219 tm->tm_hour, tm->tm_min, tm->tm_sec);
220
221 /* we get around y2k by simply not supporting it */
1add6781 222
641741e0 223 if (year < 0 || year >= 100) {
9a654518 224 dev_err(dev, "rtc only supports 100 years\n");
1add6781 225 return -EINVAL;
9a654518
BD
226 }
227
19be09f5 228 clk_enable(info->rtc_clk);
df9e26d0
CC
229 if (info->data->needs_src_clk)
230 clk_enable(info->rtc_src_clk);
19be09f5
CC
231
232 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
233 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
234 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
235 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
236 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
237 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
238
df9e26d0
CC
239 if (info->data->needs_src_clk)
240 clk_disable(info->rtc_src_clk);
19be09f5 241 clk_disable(info->rtc_clk);
1add6781
BD
242
243 return 0;
244}
245
246static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
247{
19be09f5 248 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
249 struct rtc_time *alm_tm = &alrm->time;
250 unsigned int alm_en;
251
19be09f5 252 clk_enable(info->rtc_clk);
df9e26d0
CC
253 if (info->data->needs_src_clk)
254 clk_enable(info->rtc_src_clk);
255
19be09f5
CC
256 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
257 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
258 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
259 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
260 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
261 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
1add6781 262
19be09f5 263 alm_en = readb(info->base + S3C2410_RTCALM);
1add6781 264
a2db8dfc
DB
265 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
266
d4a48c2a 267 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 268 alm_en,
30ffc40c 269 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781
BD
270 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
271
272
273 /* decode the alarm enable field */
274
275 if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70 276 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781 277 else
dd061d1a 278 alm_tm->tm_sec = -1;
1add6781
BD
279
280 if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70 281 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781 282 else
dd061d1a 283 alm_tm->tm_min = -1;
1add6781
BD
284
285 if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70 286 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781 287 else
dd061d1a 288 alm_tm->tm_hour = -1;
1add6781
BD
289
290 if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70 291 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781 292 else
dd061d1a 293 alm_tm->tm_mday = -1;
1add6781
BD
294
295 if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70 296 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781
BD
297 alm_tm->tm_mon -= 1;
298 } else {
dd061d1a 299 alm_tm->tm_mon = -1;
1add6781
BD
300 }
301
302 if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70 303 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781 304 else
dd061d1a 305 alm_tm->tm_year = -1;
1add6781 306
df9e26d0
CC
307 if (info->data->needs_src_clk)
308 clk_disable(info->rtc_src_clk);
19be09f5 309 clk_disable(info->rtc_clk);
df9e26d0 310
1add6781
BD
311 return 0;
312}
313
314static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
315{
19be09f5 316 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
317 struct rtc_time *tm = &alrm->time;
318 unsigned int alrm_en;
319
19be09f5 320 clk_enable(info->rtc_clk);
df9e26d0
CC
321 if (info->data->needs_src_clk)
322 clk_enable(info->rtc_src_clk);
323
d4a48c2a 324 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 325 alrm->enabled,
4e8896cd 326 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
30ffc40c 327 tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781 328
19be09f5
CC
329 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
330 writeb(0x00, info->base + S3C2410_RTCALM);
1add6781
BD
331
332 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
333 alrm_en |= S3C2410_RTCALM_SECEN;
19be09f5 334 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
1add6781
BD
335 }
336
337 if (tm->tm_min < 60 && tm->tm_min >= 0) {
338 alrm_en |= S3C2410_RTCALM_MINEN;
19be09f5 339 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
1add6781
BD
340 }
341
342 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
343 alrm_en |= S3C2410_RTCALM_HOUREN;
19be09f5 344 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
1add6781
BD
345 }
346
d4a48c2a 347 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
1add6781 348
19be09f5 349 writeb(alrm_en, info->base + S3C2410_RTCALM);
1add6781 350
2ec38a03 351 s3c_rtc_setaie(dev, alrm->enabled);
1add6781 352
df9e26d0
CC
353 if (info->data->needs_src_clk)
354 clk_disable(info->rtc_src_clk);
19be09f5
CC
355 clk_disable(info->rtc_clk);
356
1add6781
BD
357 return 0;
358}
359
1add6781
BD
360static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
361{
19be09f5 362 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781 363
19be09f5 364 clk_enable(info->rtc_clk);
df9e26d0
CC
365 if (info->data->needs_src_clk)
366 clk_enable(info->rtc_src_clk);
9f4123b7 367
ae05c950
CC
368 if (info->data->enable_tick)
369 info->data->enable_tick(info, seq);
370
df9e26d0
CC
371 if (info->data->needs_src_clk)
372 clk_disable(info->rtc_src_clk);
19be09f5 373 clk_disable(info->rtc_clk);
ae05c950 374
1add6781
BD
375 return 0;
376}
377
ff8371ac 378static const struct rtc_class_ops s3c_rtcops = {
1add6781
BD
379 .read_time = s3c_rtc_gettime,
380 .set_time = s3c_rtc_settime,
381 .read_alarm = s3c_rtc_getalarm,
382 .set_alarm = s3c_rtc_setalarm,
e6eb524e
CY
383 .proc = s3c_rtc_proc,
384 .alarm_irq_enable = s3c_rtc_setaie,
1add6781
BD
385};
386
ae05c950 387static void s3c24xx_rtc_enable(struct s3c_rtc *info)
1add6781 388{
d67288da 389 unsigned int con, tmp;
1add6781 390
19be09f5 391 clk_enable(info->rtc_clk);
df9e26d0
CC
392 if (info->data->needs_src_clk)
393 clk_enable(info->rtc_src_clk);
d67288da
CC
394
395 con = readw(info->base + S3C2410_RTCCON);
ae05c950
CC
396 /* re-enable the device, and check it is ok */
397 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
398 dev_info(info->dev, "rtc disabled, re-enabling\n");
1add6781 399
ae05c950
CC
400 tmp = readw(info->base + S3C2410_RTCCON);
401 writew(tmp | S3C2410_RTCCON_RTCEN,
402 info->base + S3C2410_RTCCON);
403 }
1add6781 404
ae05c950
CC
405 if (con & S3C2410_RTCCON_CNTSEL) {
406 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
1add6781 407
ae05c950
CC
408 tmp = readw(info->base + S3C2410_RTCCON);
409 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
410 info->base + S3C2410_RTCCON);
411 }
1add6781 412
ae05c950
CC
413 if (con & S3C2410_RTCCON_CLKRST) {
414 dev_info(info->dev, "removing RTCCON_CLKRST\n");
1add6781 415
ae05c950
CC
416 tmp = readw(info->base + S3C2410_RTCCON);
417 writew(tmp & ~S3C2410_RTCCON_CLKRST,
418 info->base + S3C2410_RTCCON);
1add6781 419 }
ae05c950 420
df9e26d0
CC
421 if (info->data->needs_src_clk)
422 clk_disable(info->rtc_src_clk);
ae05c950
CC
423 clk_disable(info->rtc_clk);
424}
425
426static void s3c24xx_rtc_disable(struct s3c_rtc *info)
427{
428 unsigned int con;
429
430 clk_enable(info->rtc_clk);
df9e26d0
CC
431 if (info->data->needs_src_clk)
432 clk_enable(info->rtc_src_clk);
ae05c950
CC
433
434 con = readw(info->base + S3C2410_RTCCON);
435 con &= ~S3C2410_RTCCON_RTCEN;
436 writew(con, info->base + S3C2410_RTCCON);
437
438 con = readb(info->base + S3C2410_TICNT);
439 con &= ~S3C2410_TICNT_ENABLE;
440 writeb(con, info->base + S3C2410_TICNT);
441
df9e26d0
CC
442 if (info->data->needs_src_clk)
443 clk_disable(info->rtc_src_clk);
ae05c950
CC
444 clk_disable(info->rtc_clk);
445}
446
447static void s3c6410_rtc_disable(struct s3c_rtc *info)
448{
449 unsigned int con;
450
451 clk_enable(info->rtc_clk);
df9e26d0
CC
452 if (info->data->needs_src_clk)
453 clk_enable(info->rtc_src_clk);
ae05c950
CC
454
455 con = readw(info->base + S3C2410_RTCCON);
456 con &= ~S3C64XX_RTCCON_TICEN;
457 con &= ~S3C2410_RTCCON_RTCEN;
458 writew(con, info->base + S3C2410_RTCCON);
459
df9e26d0
CC
460 if (info->data->needs_src_clk)
461 clk_disable(info->rtc_src_clk);
19be09f5 462 clk_disable(info->rtc_clk);
1add6781
BD
463}
464
19be09f5 465static int s3c_rtc_remove(struct platform_device *pdev)
1add6781 466{
19be09f5
CC
467 struct s3c_rtc *info = platform_get_drvdata(pdev);
468
469 s3c_rtc_setaie(info->dev, 0);
1add6781 470
19be09f5
CC
471 clk_unprepare(info->rtc_clk);
472 info->rtc_clk = NULL;
e48add8c 473
1add6781
BD
474 return 0;
475}
476
d2524caa
HS
477static const struct of_device_id s3c_rtc_dt_match[];
478
ae05c950 479static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
d2524caa 480{
ae05c950 481 const struct of_device_id *match;
d67288da 482
ae05c950
CC
483 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
484 return (struct s3c_rtc_data *)match->data;
d2524caa
HS
485}
486
5a167f45 487static int s3c_rtc_probe(struct platform_device *pdev)
1add6781 488{
19be09f5 489 struct s3c_rtc *info = NULL;
e1df962e 490 struct rtc_time rtc_tm;
1add6781
BD
491 struct resource *res;
492 int ret;
493
19be09f5
CC
494 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
495 if (!info)
496 return -ENOMEM;
1add6781
BD
497
498 /* find the IRQs */
19be09f5
CC
499 info->irq_tick = platform_get_irq(pdev, 1);
500 if (info->irq_tick < 0) {
1add6781 501 dev_err(&pdev->dev, "no irq for rtc tick\n");
19be09f5 502 return info->irq_tick;
1add6781
BD
503 }
504
19be09f5 505 info->dev = &pdev->dev;
ae05c950
CC
506 info->data = s3c_rtc_get_data(pdev);
507 if (!info->data) {
508 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
509 return -EINVAL;
510 }
19be09f5
CC
511 spin_lock_init(&info->pie_lock);
512 spin_lock_init(&info->alarm_clk_lock);
513
514 platform_set_drvdata(pdev, info);
515
516 info->irq_alarm = platform_get_irq(pdev, 0);
517 if (info->irq_alarm < 0) {
1add6781 518 dev_err(&pdev->dev, "no irq for alarm\n");
19be09f5 519 return info->irq_alarm;
1add6781
BD
520 }
521
d4a48c2a 522 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
19be09f5 523 info->irq_tick, info->irq_alarm);
1add6781
BD
524
525 /* get the memory region */
1add6781 526 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
19be09f5
CC
527 info->base = devm_ioremap_resource(&pdev->dev, res);
528 if (IS_ERR(info->base))
529 return PTR_ERR(info->base);
1add6781 530
19be09f5
CC
531 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
532 if (IS_ERR(info->rtc_clk)) {
df9e26d0 533 dev_err(&pdev->dev, "failed to find rtc clock\n");
19be09f5 534 return PTR_ERR(info->rtc_clk);
e48add8c 535 }
19be09f5 536 clk_prepare_enable(info->rtc_clk);
e48add8c 537
df9e26d0
CC
538 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
539 if (IS_ERR(info->rtc_src_clk)) {
540 dev_err(&pdev->dev, "failed to find rtc source clock\n");
541 return PTR_ERR(info->rtc_src_clk);
542 }
543 clk_prepare_enable(info->rtc_src_clk);
544
545
1add6781 546 /* check to see if everything is setup correctly */
ae05c950
CC
547 if (info->data->enable)
548 info->data->enable(info);
1add6781 549
d4a48c2a 550 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
19be09f5 551 readw(info->base + S3C2410_RTCCON));
1add6781 552
51b7616e
YK
553 device_init_wakeup(&pdev->dev, 1);
554
1add6781 555 /* register RTC and exit */
19be09f5 556 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
1add6781 557 THIS_MODULE);
19be09f5 558 if (IS_ERR(info->rtc)) {
1add6781 559 dev_err(&pdev->dev, "cannot attach rtc\n");
19be09f5 560 ret = PTR_ERR(info->rtc);
1add6781
BD
561 goto err_nortc;
562 }
563
19be09f5
CC
564 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
565 0, "s3c2410-rtc alarm", info);
566 if (ret) {
567 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
568 goto err_nortc;
569 }
eaa6e4dd 570
19be09f5
CC
571 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
572 0, "s3c2410-rtc tick", info);
573 if (ret) {
574 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
575 goto err_nortc;
576 }
051fe54e 577
19be09f5
CC
578 /* Check RTC Time */
579 s3c_rtc_gettime(&pdev->dev, &rtc_tm);
051fe54e 580
e1df962e
CY
581 if (rtc_valid_tm(&rtc_tm)) {
582 rtc_tm.tm_year = 100;
583 rtc_tm.tm_mon = 0;
584 rtc_tm.tm_mday = 1;
585 rtc_tm.tm_hour = 0;
586 rtc_tm.tm_min = 0;
587 rtc_tm.tm_sec = 0;
588
19be09f5 589 s3c_rtc_settime(&pdev->dev, &rtc_tm);
e1df962e
CY
590
591 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
051fe54e
TK
592 }
593
ae05c950
CC
594 if (info->data->select_tick_clk)
595 info->data->select_tick_clk(info);
62d17601 596
19be09f5 597 s3c_rtc_setfreq(info, 1);
62d17601 598
df9e26d0
CC
599 if (info->data->needs_src_clk)
600 clk_disable(info->rtc_src_clk);
19be09f5 601 clk_disable(info->rtc_clk);
cefe4fbb 602
1add6781
BD
603 return 0;
604
605 err_nortc:
ae05c950
CC
606 if (info->data->disable)
607 info->data->disable(info);
19be09f5 608 clk_disable_unprepare(info->rtc_clk);
1add6781 609
1add6781
BD
610 return ret;
611}
612
32e445aa 613#ifdef CONFIG_PM_SLEEP
1add6781 614
32e445aa 615static int s3c_rtc_suspend(struct device *dev)
1add6781 616{
19be09f5 617 struct s3c_rtc *info = dev_get_drvdata(dev);
32e445aa 618
19be09f5 619 clk_enable(info->rtc_clk);
df9e26d0
CC
620 if (info->data->needs_src_clk)
621 clk_enable(info->rtc_src_clk);
ae05c950 622
1add6781 623 /* save TICNT for anyone using periodic interrupts */
ae05c950
CC
624 if (info->data->save_tick_cnt)
625 info->data->save_tick_cnt(info);
626
627 if (info->data->disable)
628 info->data->disable(info);
f501ed52 629
19be09f5
CC
630 if (device_may_wakeup(dev) && !info->wake_en) {
631 if (enable_irq_wake(info->irq_alarm) == 0)
632 info->wake_en = true;
52cd4e5c 633 else
32e445aa 634 dev_err(dev, "enable_irq_wake failed\n");
52cd4e5c 635 }
ae05c950 636
df9e26d0
CC
637 if (info->data->needs_src_clk)
638 clk_disable(info->rtc_src_clk);
19be09f5 639 clk_disable(info->rtc_clk);
f501ed52 640
1add6781
BD
641 return 0;
642}
643
32e445aa 644static int s3c_rtc_resume(struct device *dev)
1add6781 645{
19be09f5 646 struct s3c_rtc *info = dev_get_drvdata(dev);
9f4123b7 647
19be09f5 648 clk_enable(info->rtc_clk);
df9e26d0
CC
649 if (info->data->needs_src_clk)
650 clk_enable(info->rtc_src_clk);
ae05c950
CC
651
652 if (info->data->enable)
653 info->data->enable(info);
654
655 if (info->data->restore_tick_cnt)
656 info->data->restore_tick_cnt(info);
f501ed52 657
19be09f5
CC
658 if (device_may_wakeup(dev) && info->wake_en) {
659 disable_irq_wake(info->irq_alarm);
660 info->wake_en = false;
52cd4e5c 661 }
ae05c950 662
df9e26d0
CC
663 if (info->data->needs_src_clk)
664 clk_disable(info->rtc_src_clk);
19be09f5 665 clk_disable(info->rtc_clk);
f501ed52 666
1add6781
BD
667 return 0;
668}
1add6781 669#endif
32e445aa
JH
670static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
671
ae05c950
CC
672static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
673{
674 clk_enable(info->rtc_clk);
df9e26d0
CC
675 if (info->data->needs_src_clk)
676 clk_enable(info->rtc_src_clk);
ae05c950 677 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
df9e26d0
CC
678 if (info->data->needs_src_clk)
679 clk_disable(info->rtc_src_clk);
ae05c950
CC
680 clk_disable(info->rtc_clk);
681
682 s3c_rtc_alarm_clk_enable(info, false);
683}
684
685static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
686{
687 clk_enable(info->rtc_clk);
df9e26d0
CC
688 if (info->data->needs_src_clk)
689 clk_enable(info->rtc_src_clk);
ae05c950
CC
690 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
691 writeb(mask, info->base + S3C2410_INTP);
df9e26d0
CC
692 if (info->data->needs_src_clk)
693 clk_disable(info->rtc_src_clk);
ae05c950
CC
694 clk_disable(info->rtc_clk);
695
696 s3c_rtc_alarm_clk_enable(info, false);
697}
698
699static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
700{
701 unsigned int tmp = 0;
702 int val;
703
704 tmp = readb(info->base + S3C2410_TICNT);
705 tmp &= S3C2410_TICNT_ENABLE;
706
707 val = (info->rtc->max_user_freq / freq) - 1;
708 tmp |= val;
709
710 writel(tmp, info->base + S3C2410_TICNT);
711}
712
713static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
714{
715 unsigned int tmp = 0;
716 int val;
717
718 tmp = readb(info->base + S3C2410_TICNT);
719 tmp &= S3C2410_TICNT_ENABLE;
720
721 val = (info->rtc->max_user_freq / freq) - 1;
722
723 tmp |= S3C2443_TICNT_PART(val);
724 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
725
726 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
727
728 writel(tmp, info->base + S3C2410_TICNT);
729}
730
731static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
732{
733 unsigned int tmp = 0;
734 int val;
735
736 tmp = readb(info->base + S3C2410_TICNT);
737 tmp &= S3C2410_TICNT_ENABLE;
738
739 val = (info->rtc->max_user_freq / freq) - 1;
740
741 tmp |= S3C2443_TICNT_PART(val);
742 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
743
744 writel(tmp, info->base + S3C2410_TICNT);
745}
746
747static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
748{
749 int val;
750
751 val = (info->rtc->max_user_freq / freq) - 1;
752 writel(val, info->base + S3C2410_TICNT);
753}
754
755static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
756{
757 unsigned int ticnt;
758
759 ticnt = readb(info->base + S3C2410_TICNT);
760 ticnt &= S3C2410_TICNT_ENABLE;
761
762 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
763}
764
765static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
766{
767 unsigned int con;
768
769 con = readw(info->base + S3C2410_RTCCON);
770 con |= S3C2443_RTCCON_TICSEL;
771 writew(con, info->base + S3C2410_RTCCON);
772}
773
774static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
775{
776 unsigned int ticnt;
777
778 ticnt = readw(info->base + S3C2410_RTCCON);
779 ticnt &= S3C64XX_RTCCON_TICEN;
780
781 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
782}
783
784static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
785{
786 info->ticnt_save = readb(info->base + S3C2410_TICNT);
787}
788
789static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
790{
791 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
792}
793
794static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
795{
796 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
797 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
798 info->ticnt_save = readl(info->base + S3C2410_TICNT);
799}
800
801static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
802{
803 unsigned int con;
804
805 writel(info->ticnt_save, info->base + S3C2410_TICNT);
806 if (info->ticnt_en_save) {
807 con = readw(info->base + S3C2410_RTCCON);
808 writew(con | info->ticnt_en_save,
809 info->base + S3C2410_RTCCON);
810 }
811}
812
813static struct s3c_rtc_data const s3c2410_rtc_data = {
814 .max_user_freq = 128,
815 .irq_handler = s3c24xx_rtc_irq,
816 .set_freq = s3c2410_rtc_setfreq,
817 .enable_tick = s3c24xx_rtc_enable_tick,
818 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
819 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
820 .enable = s3c24xx_rtc_enable,
821 .disable = s3c24xx_rtc_disable,
822};
823
824static struct s3c_rtc_data const s3c2416_rtc_data = {
825 .max_user_freq = 32768,
826 .irq_handler = s3c24xx_rtc_irq,
827 .set_freq = s3c2416_rtc_setfreq,
828 .enable_tick = s3c24xx_rtc_enable_tick,
829 .select_tick_clk = s3c2416_rtc_select_tick_clk,
830 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
831 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
832 .enable = s3c24xx_rtc_enable,
833 .disable = s3c24xx_rtc_disable,
834};
835
836static struct s3c_rtc_data const s3c2443_rtc_data = {
837 .max_user_freq = 32768,
838 .irq_handler = s3c24xx_rtc_irq,
839 .set_freq = s3c2443_rtc_setfreq,
840 .enable_tick = s3c24xx_rtc_enable_tick,
841 .select_tick_clk = s3c2416_rtc_select_tick_clk,
842 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
843 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
844 .enable = s3c24xx_rtc_enable,
845 .disable = s3c24xx_rtc_disable,
846};
847
848static struct s3c_rtc_data const s3c6410_rtc_data = {
849 .max_user_freq = 32768,
850 .irq_handler = s3c6410_rtc_irq,
851 .set_freq = s3c6410_rtc_setfreq,
852 .enable_tick = s3c6410_rtc_enable_tick,
853 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
854 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
855 .enable = s3c24xx_rtc_enable,
856 .disable = s3c6410_rtc_disable,
c3cba928
TB
857};
858
df9e26d0
CC
859static struct s3c_rtc_data const exynos3250_rtc_data = {
860 .max_user_freq = 32768,
861 .needs_src_clk = true,
862 .irq_handler = s3c6410_rtc_irq,
863 .set_freq = s3c6410_rtc_setfreq,
864 .enable_tick = s3c6410_rtc_enable_tick,
865 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
866 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
867 .enable = s3c24xx_rtc_enable,
868 .disable = s3c6410_rtc_disable,
869};
870
39ce4084 871static const struct of_device_id s3c_rtc_dt_match[] = {
d2524caa 872 {
cd1e6f9e 873 .compatible = "samsung,s3c2410-rtc",
ae05c950 874 .data = (void *)&s3c2410_rtc_data,
25c1a246 875 }, {
cd1e6f9e 876 .compatible = "samsung,s3c2416-rtc",
ae05c950 877 .data = (void *)&s3c2416_rtc_data,
25c1a246 878 }, {
cd1e6f9e 879 .compatible = "samsung,s3c2443-rtc",
ae05c950 880 .data = (void *)&s3c2443_rtc_data,
d2524caa 881 }, {
cd1e6f9e 882 .compatible = "samsung,s3c6410-rtc",
ae05c950 883 .data = (void *)&s3c6410_rtc_data,
df9e26d0
CC
884 }, {
885 .compatible = "samsung,exynos3250-rtc",
886 .data = (void *)&exynos3250_rtc_data,
d2524caa 887 },
ae05c950 888 { /* sentinel */ },
39ce4084
TA
889};
890MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
9f4123b7
MC
891
892static struct platform_driver s3c_rtc_driver = {
1add6781 893 .probe = s3c_rtc_probe,
5a167f45 894 .remove = s3c_rtc_remove,
1add6781 895 .driver = {
9f4123b7 896 .name = "s3c-rtc",
1add6781 897 .owner = THIS_MODULE,
32e445aa 898 .pm = &s3c_rtc_pm_ops,
04a373fd 899 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
1add6781
BD
900 },
901};
0c4eae66 902module_platform_driver(s3c_rtc_driver);
1add6781
BD
903
904MODULE_DESCRIPTION("Samsung S3C RTC Driver");
905MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
906MODULE_LICENSE("GPL");
ad28a07b 907MODULE_ALIAS("platform:s3c2410-rtc");
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