drivers/rtc/rtc-wm831x.c: convert to devm_kzalloc()
[deliverable/linux.git] / drivers / rtc / rtc-s3c.c
CommitLineData
1add6781 1/* drivers/rtc/rtc-s3c.c
e48add8c
AD
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
1add6781
BD
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
9974b6ea 26#include <linux/log2.h>
5a0e3ad6 27#include <linux/slab.h>
39ce4084 28#include <linux/of.h>
1add6781 29
a09e64fb 30#include <mach/hardware.h>
1add6781
BD
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/irq.h>
e2cd00cf 34#include <plat/regs-rtc.h>
1add6781 35
9f4123b7
MC
36enum s3c_cpu_type {
37 TYPE_S3C2410,
38 TYPE_S3C64XX,
39};
40
1add6781
BD
41/* I have yet to find an S3C implementation with more than one
42 * of these rtc blocks in */
43
44static struct resource *s3c_rtc_mem;
45
e48add8c 46static struct clk *rtc_clk;
1add6781
BD
47static void __iomem *s3c_rtc_base;
48static int s3c_rtc_alarmno = NO_IRQ;
49static int s3c_rtc_tickno = NO_IRQ;
52cd4e5c 50static bool wake_en;
9f4123b7 51static enum s3c_cpu_type s3c_rtc_cpu_type;
1add6781
BD
52
53static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
1add6781 54
88cee8fd
DK
55static void s3c_rtc_alarm_clk_enable(bool enable)
56{
57 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
58 static bool alarm_clk_enabled;
59 unsigned long irq_flags;
60
61 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
62 if (enable) {
63 if (!alarm_clk_enabled) {
64 clk_enable(rtc_clk);
65 alarm_clk_enabled = true;
66 }
67 } else {
68 if (alarm_clk_enabled) {
69 clk_disable(rtc_clk);
70 alarm_clk_enabled = false;
71 }
72 }
73 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
74}
75
1add6781
BD
76/* IRQ Handlers */
77
7d12e780 78static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781
BD
79{
80 struct rtc_device *rdev = id;
81
cefe4fbb 82 clk_enable(rtc_clk);
ab6a2d70 83 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
2f3478f6
AD
84
85 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
86 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
87
cefe4fbb 88 clk_disable(rtc_clk);
88cee8fd
DK
89
90 s3c_rtc_alarm_clk_enable(false);
91
1add6781
BD
92 return IRQ_HANDLED;
93}
94
7d12e780 95static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781
BD
96{
97 struct rtc_device *rdev = id;
98
cefe4fbb 99 clk_enable(rtc_clk);
773be7ee 100 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
2f3478f6
AD
101
102 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
103 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
104
cefe4fbb 105 clk_disable(rtc_clk);
1add6781
BD
106 return IRQ_HANDLED;
107}
108
109/* Update control registers */
2ec38a03 110static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781
BD
111{
112 unsigned int tmp;
113
2ec38a03 114 pr_debug("%s: aie=%d\n", __func__, enabled);
1add6781 115
cefe4fbb 116 clk_enable(rtc_clk);
9a654518 117 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 118
2ec38a03 119 if (enabled)
1add6781
BD
120 tmp |= S3C2410_RTCALM_ALMEN;
121
9a654518 122 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
cefe4fbb 123 clk_disable(rtc_clk);
2ec38a03 124
88cee8fd
DK
125 s3c_rtc_alarm_clk_enable(enabled);
126
2ec38a03 127 return 0;
1add6781
BD
128}
129
773be7ee 130static int s3c_rtc_setfreq(struct device *dev, int freq)
1add6781 131{
9f4123b7
MC
132 struct platform_device *pdev = to_platform_device(dev);
133 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
134 unsigned int tmp = 0;
1add6781 135
5d2a5037
JC
136 if (!is_power_of_2(freq))
137 return -EINVAL;
138
cefe4fbb 139 clk_enable(rtc_clk);
1add6781 140 spin_lock_irq(&s3c_rtc_pie_lock);
1add6781 141
9f4123b7
MC
142 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
143 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
144 tmp &= S3C2410_TICNT_ENABLE;
145 }
146
147 tmp |= (rtc_dev->max_user_freq / freq)-1;
1add6781 148
2f3478f6 149 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
1add6781 150 spin_unlock_irq(&s3c_rtc_pie_lock);
cefe4fbb 151 clk_disable(rtc_clk);
773be7ee
BD
152
153 return 0;
1add6781
BD
154}
155
156/* Time read/write */
157
158static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
159{
160 unsigned int have_retried = 0;
9a654518 161 void __iomem *base = s3c_rtc_base;
1add6781 162
cefe4fbb 163 clk_enable(rtc_clk);
1add6781 164 retry_get_time:
9a654518
BD
165 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
166 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
167 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
168 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
169 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
170 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
1add6781
BD
171
172 /* the only way to work out wether the system was mid-update
173 * when we read it is to check the second counter, and if it
174 * is zero, then we re-try the entire read
175 */
176
177 if (rtc_tm->tm_sec == 0 && !have_retried) {
178 have_retried = 1;
179 goto retry_get_time;
180 }
181
fe20ba70
AB
182 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
183 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
184 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
185 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
186 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
187 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781
BD
188
189 rtc_tm->tm_year += 100;
4e8896cd
MH
190
191 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
192 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
193 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
194
1add6781
BD
195 rtc_tm->tm_mon -= 1;
196
cefe4fbb 197 clk_disable(rtc_clk);
5b3ffddd 198 return rtc_valid_tm(rtc_tm);
1add6781
BD
199}
200
201static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
202{
9a654518 203 void __iomem *base = s3c_rtc_base;
641741e0 204 int year = tm->tm_year - 100;
9a654518 205
30ffc40c
KK
206 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
207 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0
BD
208 tm->tm_hour, tm->tm_min, tm->tm_sec);
209
210 /* we get around y2k by simply not supporting it */
1add6781 211
641741e0 212 if (year < 0 || year >= 100) {
9a654518 213 dev_err(dev, "rtc only supports 100 years\n");
1add6781 214 return -EINVAL;
9a654518
BD
215 }
216
2dbcd05f 217 clk_enable(rtc_clk);
fe20ba70
AB
218 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
219 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
220 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
221 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
222 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
223 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
cefe4fbb 224 clk_disable(rtc_clk);
1add6781
BD
225
226 return 0;
227}
228
229static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
230{
231 struct rtc_time *alm_tm = &alrm->time;
9a654518 232 void __iomem *base = s3c_rtc_base;
1add6781
BD
233 unsigned int alm_en;
234
cefe4fbb 235 clk_enable(rtc_clk);
9a654518
BD
236 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
237 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
238 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
239 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
240 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
241 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
1add6781 242
9a654518 243 alm_en = readb(base + S3C2410_RTCALM);
1add6781 244
a2db8dfc
DB
245 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
246
30ffc40c 247 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 248 alm_en,
30ffc40c 249 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781
BD
250 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
251
252
253 /* decode the alarm enable field */
254
255 if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70 256 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781 257 else
dd061d1a 258 alm_tm->tm_sec = -1;
1add6781
BD
259
260 if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70 261 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781 262 else
dd061d1a 263 alm_tm->tm_min = -1;
1add6781
BD
264
265 if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70 266 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781 267 else
dd061d1a 268 alm_tm->tm_hour = -1;
1add6781
BD
269
270 if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70 271 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781 272 else
dd061d1a 273 alm_tm->tm_mday = -1;
1add6781
BD
274
275 if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70 276 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781
BD
277 alm_tm->tm_mon -= 1;
278 } else {
dd061d1a 279 alm_tm->tm_mon = -1;
1add6781
BD
280 }
281
282 if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70 283 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781 284 else
dd061d1a 285 alm_tm->tm_year = -1;
1add6781 286
cefe4fbb 287 clk_disable(rtc_clk);
1add6781
BD
288 return 0;
289}
290
291static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
292{
293 struct rtc_time *tm = &alrm->time;
9a654518 294 void __iomem *base = s3c_rtc_base;
1add6781
BD
295 unsigned int alrm_en;
296
cefe4fbb 297 clk_enable(rtc_clk);
30ffc40c 298 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 299 alrm->enabled,
4e8896cd 300 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
30ffc40c 301 tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781 302
9a654518
BD
303 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
304 writeb(0x00, base + S3C2410_RTCALM);
1add6781
BD
305
306 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
307 alrm_en |= S3C2410_RTCALM_SECEN;
fe20ba70 308 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
1add6781
BD
309 }
310
311 if (tm->tm_min < 60 && tm->tm_min >= 0) {
312 alrm_en |= S3C2410_RTCALM_MINEN;
fe20ba70 313 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
1add6781
BD
314 }
315
316 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
317 alrm_en |= S3C2410_RTCALM_HOUREN;
fe20ba70 318 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
1add6781
BD
319 }
320
321 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
322
9a654518 323 writeb(alrm_en, base + S3C2410_RTCALM);
1add6781 324
2ec38a03 325 s3c_rtc_setaie(dev, alrm->enabled);
1add6781 326
cefe4fbb 327 clk_disable(rtc_clk);
1add6781
BD
328 return 0;
329}
330
1add6781
BD
331static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
332{
9f4123b7 333 unsigned int ticnt;
1add6781 334
cefe4fbb 335 clk_enable(rtc_clk);
9f4123b7 336 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671 337 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7
MC
338 ticnt &= S3C64XX_RTCCON_TICEN;
339 } else {
340 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
341 ticnt &= S3C2410_TICNT_ENABLE;
342 }
343
344 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
cefe4fbb 345 clk_disable(rtc_clk);
1add6781
BD
346 return 0;
347}
348
ff8371ac 349static const struct rtc_class_ops s3c_rtcops = {
1add6781
BD
350 .read_time = s3c_rtc_gettime,
351 .set_time = s3c_rtc_settime,
352 .read_alarm = s3c_rtc_getalarm,
353 .set_alarm = s3c_rtc_setalarm,
e6eb524e
CY
354 .proc = s3c_rtc_proc,
355 .alarm_irq_enable = s3c_rtc_setaie,
1add6781
BD
356};
357
358static void s3c_rtc_enable(struct platform_device *pdev, int en)
359{
9a654518 360 void __iomem *base = s3c_rtc_base;
1add6781
BD
361 unsigned int tmp;
362
363 if (s3c_rtc_base == NULL)
364 return;
365
cefe4fbb 366 clk_enable(rtc_clk);
1add6781 367 if (!en) {
f61ae671 368 tmp = readw(base + S3C2410_RTCCON);
9f4123b7
MC
369 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
370 tmp &= ~S3C64XX_RTCCON_TICEN;
371 tmp &= ~S3C2410_RTCCON_RTCEN;
f61ae671 372 writew(tmp, base + S3C2410_RTCCON);
9f4123b7
MC
373
374 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
375 tmp = readb(base + S3C2410_TICNT);
376 tmp &= ~S3C2410_TICNT_ENABLE;
377 writeb(tmp, base + S3C2410_TICNT);
378 }
1add6781
BD
379 } else {
380 /* re-enable the device, and check it is ok */
381
f61ae671 382 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
1add6781
BD
383 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
384
f61ae671
CY
385 tmp = readw(base + S3C2410_RTCCON);
386 writew(tmp | S3C2410_RTCCON_RTCEN,
387 base + S3C2410_RTCCON);
1add6781
BD
388 }
389
f61ae671 390 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
1add6781
BD
391 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
392
f61ae671
CY
393 tmp = readw(base + S3C2410_RTCCON);
394 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
395 base + S3C2410_RTCCON);
1add6781
BD
396 }
397
f61ae671 398 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
1add6781
BD
399 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
400
f61ae671
CY
401 tmp = readw(base + S3C2410_RTCCON);
402 writew(tmp & ~S3C2410_RTCCON_CLKRST,
403 base + S3C2410_RTCCON);
1add6781
BD
404 }
405 }
cefe4fbb 406 clk_disable(rtc_clk);
1add6781
BD
407}
408
4cd0c5c4 409static int __devexit s3c_rtc_remove(struct platform_device *dev)
1add6781
BD
410{
411 struct rtc_device *rtc = platform_get_drvdata(dev);
412
62d17601
MH
413 free_irq(s3c_rtc_alarmno, rtc);
414 free_irq(s3c_rtc_tickno, rtc);
415
1add6781
BD
416 platform_set_drvdata(dev, NULL);
417 rtc_device_unregister(rtc);
418
2ec38a03 419 s3c_rtc_setaie(&dev->dev, 0);
1add6781 420
e48add8c
AD
421 clk_put(rtc_clk);
422 rtc_clk = NULL;
423
1add6781
BD
424 iounmap(s3c_rtc_base);
425 release_resource(s3c_rtc_mem);
426 kfree(s3c_rtc_mem);
427
428 return 0;
429}
430
4cd0c5c4 431static int __devinit s3c_rtc_probe(struct platform_device *pdev)
1add6781
BD
432{
433 struct rtc_device *rtc;
e1df962e 434 struct rtc_time rtc_tm;
1add6781
BD
435 struct resource *res;
436 int ret;
437
2a4e2b87 438 pr_debug("%s: probe=%p\n", __func__, pdev);
1add6781
BD
439
440 /* find the IRQs */
441
442 s3c_rtc_tickno = platform_get_irq(pdev, 1);
443 if (s3c_rtc_tickno < 0) {
444 dev_err(&pdev->dev, "no irq for rtc tick\n");
445 return -ENOENT;
446 }
447
448 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
449 if (s3c_rtc_alarmno < 0) {
450 dev_err(&pdev->dev, "no irq for alarm\n");
451 return -ENOENT;
452 }
453
454 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
455 s3c_rtc_tickno, s3c_rtc_alarmno);
456
457 /* get the memory region */
458
459 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
460 if (res == NULL) {
461 dev_err(&pdev->dev, "failed to get memory region resource\n");
462 return -ENOENT;
463 }
464
28f65c11 465 s3c_rtc_mem = request_mem_region(res->start, resource_size(res),
9a654518 466 pdev->name);
1add6781
BD
467
468 if (s3c_rtc_mem == NULL) {
469 dev_err(&pdev->dev, "failed to reserve memory region\n");
470 ret = -ENOENT;
471 goto err_nores;
472 }
473
28f65c11 474 s3c_rtc_base = ioremap(res->start, resource_size(res));
1add6781
BD
475 if (s3c_rtc_base == NULL) {
476 dev_err(&pdev->dev, "failed ioremap()\n");
477 ret = -EINVAL;
478 goto err_nomap;
479 }
480
e48add8c
AD
481 rtc_clk = clk_get(&pdev->dev, "rtc");
482 if (IS_ERR(rtc_clk)) {
483 dev_err(&pdev->dev, "failed to find rtc clock source\n");
484 ret = PTR_ERR(rtc_clk);
485 rtc_clk = NULL;
486 goto err_clk;
487 }
488
489 clk_enable(rtc_clk);
490
1add6781
BD
491 /* check to see if everything is setup correctly */
492
493 s3c_rtc_enable(pdev, 1);
494
f61ae671
CY
495 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
496 readw(s3c_rtc_base + S3C2410_RTCCON));
1add6781 497
51b7616e
YK
498 device_init_wakeup(&pdev->dev, 1);
499
1add6781
BD
500 /* register RTC and exit */
501
502 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
503 THIS_MODULE);
504
505 if (IS_ERR(rtc)) {
506 dev_err(&pdev->dev, "cannot attach rtc\n");
507 ret = PTR_ERR(rtc);
508 goto err_nortc;
509 }
510
39ce4084
TA
511#ifdef CONFIG_OF
512 if (pdev->dev.of_node)
513 s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
514 "samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
515 else
516#endif
517 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
eaa6e4dd 518
051fe54e
TK
519 /* Check RTC Time */
520
e1df962e 521 s3c_rtc_gettime(NULL, &rtc_tm);
051fe54e 522
e1df962e
CY
523 if (rtc_valid_tm(&rtc_tm)) {
524 rtc_tm.tm_year = 100;
525 rtc_tm.tm_mon = 0;
526 rtc_tm.tm_mday = 1;
527 rtc_tm.tm_hour = 0;
528 rtc_tm.tm_min = 0;
529 rtc_tm.tm_sec = 0;
530
531 s3c_rtc_settime(NULL, &rtc_tm);
532
533 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
051fe54e
TK
534 }
535
9f4123b7
MC
536 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
537 rtc->max_user_freq = 32768;
538 else
539 rtc->max_user_freq = 128;
540
1add6781 541 platform_set_drvdata(pdev, rtc);
e893de59
MC
542
543 s3c_rtc_setfreq(&pdev->dev, 1);
544
62d17601
MH
545 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
546 IRQF_DISABLED, "s3c2410-rtc alarm", rtc);
547 if (ret) {
548 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
549 goto err_alarm_irq;
550 }
551
552 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
553 IRQF_DISABLED, "s3c2410-rtc tick", rtc);
554 if (ret) {
555 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
556 free_irq(s3c_rtc_alarmno, rtc);
557 goto err_tick_irq;
558 }
559
cefe4fbb
DK
560 clk_disable(rtc_clk);
561
1add6781
BD
562 return 0;
563
62d17601
MH
564 err_tick_irq:
565 free_irq(s3c_rtc_alarmno, rtc);
566
567 err_alarm_irq:
568 platform_set_drvdata(pdev, NULL);
569 rtc_device_unregister(rtc);
570
1add6781
BD
571 err_nortc:
572 s3c_rtc_enable(pdev, 0);
e48add8c
AD
573 clk_disable(rtc_clk);
574 clk_put(rtc_clk);
575
576 err_clk:
1add6781
BD
577 iounmap(s3c_rtc_base);
578
579 err_nomap:
580 release_resource(s3c_rtc_mem);
581
582 err_nores:
583 return ret;
584}
585
586#ifdef CONFIG_PM
587
588/* RTC Power management control */
589
9f4123b7 590static int ticnt_save, ticnt_en_save;
1add6781
BD
591
592static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
593{
cefe4fbb 594 clk_enable(rtc_clk);
1add6781 595 /* save TICNT for anyone using periodic interrupts */
9a654518 596 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
9f4123b7 597 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671 598 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7
MC
599 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
600 }
1add6781 601 s3c_rtc_enable(pdev, 0);
f501ed52 602
52cd4e5c
BD
603 if (device_may_wakeup(&pdev->dev) && !wake_en) {
604 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
605 wake_en = true;
606 else
607 dev_err(&pdev->dev, "enable_irq_wake failed\n");
608 }
cefe4fbb 609 clk_disable(rtc_clk);
f501ed52 610
1add6781
BD
611 return 0;
612}
613
614static int s3c_rtc_resume(struct platform_device *pdev)
615{
9f4123b7
MC
616 unsigned int tmp;
617
cefe4fbb 618 clk_enable(rtc_clk);
1add6781 619 s3c_rtc_enable(pdev, 1);
9a654518 620 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
9f4123b7 621 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
f61ae671
CY
622 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
623 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 624 }
f501ed52 625
52cd4e5c 626 if (device_may_wakeup(&pdev->dev) && wake_en) {
f501ed52 627 disable_irq_wake(s3c_rtc_alarmno);
52cd4e5c
BD
628 wake_en = false;
629 }
cefe4fbb 630 clk_disable(rtc_clk);
f501ed52 631
1add6781
BD
632 return 0;
633}
634#else
635#define s3c_rtc_suspend NULL
636#define s3c_rtc_resume NULL
637#endif
638
39ce4084
TA
639#ifdef CONFIG_OF
640static const struct of_device_id s3c_rtc_dt_match[] = {
641 { .compatible = "samsung,s3c2410-rtc" },
642 { .compatible = "samsung,s3c6410-rtc" },
643 {},
644};
645MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
646#else
647#define s3c_rtc_dt_match NULL
648#endif
649
9f4123b7
MC
650static struct platform_device_id s3c_rtc_driver_ids[] = {
651 {
652 .name = "s3c2410-rtc",
653 .driver_data = TYPE_S3C2410,
654 }, {
655 .name = "s3c64xx-rtc",
656 .driver_data = TYPE_S3C64XX,
657 },
658 { }
659};
660
661MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
662
663static struct platform_driver s3c_rtc_driver = {
1add6781 664 .probe = s3c_rtc_probe,
4cd0c5c4 665 .remove = __devexit_p(s3c_rtc_remove),
1add6781
BD
666 .suspend = s3c_rtc_suspend,
667 .resume = s3c_rtc_resume,
9f4123b7 668 .id_table = s3c_rtc_driver_ids,
1add6781 669 .driver = {
9f4123b7 670 .name = "s3c-rtc",
1add6781 671 .owner = THIS_MODULE,
39ce4084 672 .of_match_table = s3c_rtc_dt_match,
1add6781
BD
673 },
674};
675
676static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
677
678static int __init s3c_rtc_init(void)
679{
680 printk(banner);
9f4123b7 681 return platform_driver_register(&s3c_rtc_driver);
1add6781
BD
682}
683
684static void __exit s3c_rtc_exit(void)
685{
9f4123b7 686 platform_driver_unregister(&s3c_rtc_driver);
1add6781
BD
687}
688
689module_init(s3c_rtc_init);
690module_exit(s3c_rtc_exit);
691
692MODULE_DESCRIPTION("Samsung S3C RTC Driver");
693MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
694MODULE_LICENSE("GPL");
ad28a07b 695MODULE_ALIAS("platform:s3c2410-rtc");
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