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rtc: ds1307: Fix alarm programming for mcp794xx
[deliverable/linux.git] / drivers / rtc / rtc-s3c.c
CommitLineData
1add6781 1/* drivers/rtc/rtc-s3c.c
e48add8c
AD		 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
1add6781
BD		 5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
9974b6ea 26#include <linux/log2.h>
5a0e3ad6 27#include <linux/slab.h>
39ce4084 28#include <linux/of.h>
dbd9acbe
SK		 29#include <linux/uaccess.h>
30#include <linux/io.h>
1add6781 31
1add6781 32#include <asm/irq.h>
b9d7c5d3 33#include "rtc-s3c.h"
1add6781 34
19be09f5
CC		 35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
df9e26d0 41 struct clk *rtc_src_clk;
1fb1c35f 42 bool clk_disabled;
19be09f5 43
ae05c950 44 struct s3c_rtc_data *data;
1add6781 45
19be09f5
CC		 46 int irq_alarm;
47 int irq_tick;
1add6781 48
19be09f5
CC		 49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
1add6781 51
19be09f5
CC		 52 int ticnt_save, ticnt_en_save;
53 bool wake_en;
54};
55
ae05c950
CC		 56struct s3c_rtc_data {
57 int max_user_freq;
df9e26d0 58 bool needs_src_clk;
ae05c950
CC		 59
60 void (*irq_handler) (struct s3c_rtc *info, int mask);
61 void (*set_freq) (struct s3c_rtc *info, int freq);
62 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
63 void (*select_tick_clk) (struct s3c_rtc *info);
64 void (*save_tick_cnt) (struct s3c_rtc *info);
65 void (*restore_tick_cnt) (struct s3c_rtc *info);
66 void (*enable) (struct s3c_rtc *info);
67 void (*disable) (struct s3c_rtc *info);
68};
69
24e14554 70static void s3c_rtc_enable_clk(struct s3c_rtc *info)
88cee8fd 71{
88cee8fd
DK		 72 unsigned long irq_flags;
73
19be09f5 74 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
1fb1c35f
JS		 75 if (info->clk_disabled) {
76 clk_enable(info->rtc_clk);
77 if (info->data->needs_src_clk)
78 clk_enable(info->rtc_src_clk);
79 info->clk_disabled = false;
80 }
24e14554
CC		 81 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
82}
83
84static void s3c_rtc_disable_clk(struct s3c_rtc *info)
85{
86 unsigned long irq_flags;
87
88 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
1fb1c35f
JS		 89 if (!info->clk_disabled) {
90 if (info->data->needs_src_clk)
91 clk_disable(info->rtc_src_clk);
92 clk_disable(info->rtc_clk);
93 info->clk_disabled = true;
94 }
19be09f5 95 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
88cee8fd
DK		 96}
97
1add6781 98/* IRQ Handlers */
ae05c950 99static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 100{
19be09f5 101 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 102
ae05c950
CC		 103 if (info->data->irq_handler)
104 info->data->irq_handler(info, S3C2410_INTP_TIC);
88cee8fd 105
1add6781
BD		 106 return IRQ_HANDLED;
107}
108
ae05c950 109static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 110{
19be09f5 111 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 112
ae05c950
CC		 113 if (info->data->irq_handler)
114 info->data->irq_handler(info, S3C2410_INTP_ALM);
2f3478f6 115
1add6781
BD		 116 return IRQ_HANDLED;
117}
118
119/* Update control registers */
2ec38a03 120static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781 121{
19be09f5 122 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 123 unsigned int tmp;
124
19be09f5 125 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
1add6781 126
24e14554
CC		 127 s3c_rtc_enable_clk(info);
128
19be09f5 129 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 130
2ec38a03 131 if (enabled)
1add6781
BD		 132 tmp |= S3C2410_RTCALM_ALMEN;
133
19be09f5 134 writeb(tmp, info->base + S3C2410_RTCALM);
2ec38a03 135
24e14554 136 s3c_rtc_disable_clk(info);
88cee8fd 137
1fb1c35f
JS		 138 if (enabled)
139 s3c_rtc_enable_clk(info);
140 else
141 s3c_rtc_disable_clk(info);
142
2ec38a03 143 return 0;
1add6781
BD		 144}
145
ae05c950 146/* Set RTC frequency */
19be09f5 147static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
1add6781 148{
5d2a5037
JC		 149 if (!is_power_of_2(freq))
150 return -EINVAL;
151
19be09f5 152 spin_lock_irq(&info->pie_lock);
1add6781 153
ae05c950
CC		 154 if (info->data->set_freq)
155 info->data->set_freq(info, freq);
25c1a246 156
19be09f5 157 spin_unlock_irq(&info->pie_lock);
773be7ee
BD		 158
159 return 0;
1add6781
BD		 160}
161
162/* Time read/write */
1add6781
BD		 163static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
164{
19be09f5 165 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 166 unsigned int have_retried = 0;
167
24e14554 168 s3c_rtc_enable_clk(info);
df9e26d0 169
1add6781 170 retry_get_time:
19be09f5
CC		 171 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
172 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
173 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
174 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
175 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
176 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
1add6781 177
48fc7f7e 178 /* the only way to work out whether the system was mid-update
1add6781
BD		 179 * when we read it is to check the second counter, and if it
180 * is zero, then we re-try the entire read
181 */
182
183 if (rtc_tm->tm_sec == 0 && !have_retried) {
184 have_retried = 1;
185 goto retry_get_time;
186 }
187
fe20ba70
AB		 188 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
189 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
190 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
191 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
192 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
193 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781 194
24e14554
CC		 195 s3c_rtc_disable_clk(info);
196
1add6781 197 rtc_tm->tm_year += 100;
4e8896cd 198
d4a48c2a 199 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
4e8896cd
MH		 200 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
201 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
202
1add6781
BD		 203 rtc_tm->tm_mon -= 1;
204
5b3ffddd 205 return rtc_valid_tm(rtc_tm);
1add6781
BD		 206}
207
208static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
209{
19be09f5 210 struct s3c_rtc *info = dev_get_drvdata(dev);
641741e0 211 int year = tm->tm_year - 100;
9a654518 212
d4a48c2a 213 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
30ffc40c 214 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0
BD		 215 tm->tm_hour, tm->tm_min, tm->tm_sec);
216
217 /* we get around y2k by simply not supporting it */
1add6781 218
641741e0 219 if (year < 0 || year >= 100) {
9a654518 220 dev_err(dev, "rtc only supports 100 years\n");
1add6781 221 return -EINVAL;
9a654518
BD		 222 }
223
24e14554 224 s3c_rtc_enable_clk(info);
19be09f5
CC		 225
226 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
227 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
228 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
229 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
230 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
231 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
232
24e14554 233 s3c_rtc_disable_clk(info);
1add6781
BD		 234
235 return 0;
236}
237
238static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
239{
19be09f5 240 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 241 struct rtc_time *alm_tm = &alrm->time;
242 unsigned int alm_en;
243
24e14554 244 s3c_rtc_enable_clk(info);
df9e26d0 245
19be09f5
CC		 246 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
247 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
248 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
249 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
250 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
251 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
1add6781 252
19be09f5 253 alm_en = readb(info->base + S3C2410_RTCALM);
1add6781 254
24e14554
CC		 255 s3c_rtc_disable_clk(info);
256
a2db8dfc
DB		 257 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
258
d4a48c2a 259 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 260 alm_en,
30ffc40c 261 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781
BD		 262 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
263
1add6781 264 /* decode the alarm enable field */
1add6781 265 if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70 266 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781 267 else
dd061d1a 268 alm_tm->tm_sec = -1;
1add6781
BD		 269
270 if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70 271 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781 272 else
dd061d1a 273 alm_tm->tm_min = -1;
1add6781
BD		 274
275 if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70 276 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781 277 else
dd061d1a 278 alm_tm->tm_hour = -1;
1add6781
BD		 279
280 if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70 281 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781 282 else
dd061d1a 283 alm_tm->tm_mday = -1;
1add6781
BD		 284
285 if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70 286 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781
BD		 287 alm_tm->tm_mon -= 1;
288 } else {
dd061d1a 289 alm_tm->tm_mon = -1;
1add6781
BD		 290 }
291
292 if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70 293 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781 294 else
dd061d1a 295 alm_tm->tm_year = -1;
1add6781
BD		 296
297 return 0;
298}
299
300static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
301{
19be09f5 302 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 303 struct rtc_time *tm = &alrm->time;
304 unsigned int alrm_en;
305
d4a48c2a 306 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 307 alrm->enabled,
4e8896cd 308 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
30ffc40c 309 tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781 310
24e14554
CC		 311 s3c_rtc_enable_clk(info);
312
19be09f5
CC		 313 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
314 writeb(0x00, info->base + S3C2410_RTCALM);
1add6781
BD		 315
316 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
317 alrm_en |= S3C2410_RTCALM_SECEN;
19be09f5 318 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
1add6781
BD		 319 }
320
321 if (tm->tm_min < 60 && tm->tm_min >= 0) {
322 alrm_en |= S3C2410_RTCALM_MINEN;
19be09f5 323 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
1add6781
BD		 324 }
325
326 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
327 alrm_en |= S3C2410_RTCALM_HOUREN;
19be09f5 328 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
1add6781
BD		 329 }
330
d4a48c2a 331 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
1add6781 332
19be09f5 333 writeb(alrm_en, info->base + S3C2410_RTCALM);
1add6781 334
24e14554 335 s3c_rtc_disable_clk(info);
1add6781 336
24e14554 337 s3c_rtc_setaie(dev, alrm->enabled);
19be09f5 338
1add6781
BD		 339 return 0;
340}
341
1add6781
BD		 342static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
343{
19be09f5 344 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781 345
24e14554 346 s3c_rtc_enable_clk(info);
9f4123b7 347
ae05c950
CC		 348 if (info->data->enable_tick)
349 info->data->enable_tick(info, seq);
350
24e14554 351 s3c_rtc_disable_clk(info);
ae05c950 352
1add6781
BD		 353 return 0;
354}
355
ff8371ac 356static const struct rtc_class_ops s3c_rtcops = {
1add6781
BD		 357 .read_time = s3c_rtc_gettime,
358 .set_time = s3c_rtc_settime,
359 .read_alarm = s3c_rtc_getalarm,
360 .set_alarm = s3c_rtc_setalarm,
e6eb524e
CY		 361 .proc = s3c_rtc_proc,
362 .alarm_irq_enable = s3c_rtc_setaie,
1add6781
BD		 363};
364
ae05c950 365static void s3c24xx_rtc_enable(struct s3c_rtc *info)
1add6781 366{
d67288da 367 unsigned int con, tmp;
1add6781 368
d67288da 369 con = readw(info->base + S3C2410_RTCCON);
ae05c950
CC		 370 /* re-enable the device, and check it is ok */
371 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
372 dev_info(info->dev, "rtc disabled, re-enabling\n");
1add6781 373
ae05c950
CC		 374 tmp = readw(info->base + S3C2410_RTCCON);
375 writew(tmp | S3C2410_RTCCON_RTCEN,
376 info->base + S3C2410_RTCCON);
377 }
1add6781 378
ae05c950
CC		 379 if (con & S3C2410_RTCCON_CNTSEL) {
380 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
1add6781 381
ae05c950
CC		 382 tmp = readw(info->base + S3C2410_RTCCON);
383 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
384 info->base + S3C2410_RTCCON);
385 }
1add6781 386
ae05c950
CC		 387 if (con & S3C2410_RTCCON_CLKRST) {
388 dev_info(info->dev, "removing RTCCON_CLKRST\n");
1add6781 389
ae05c950
CC		 390 tmp = readw(info->base + S3C2410_RTCCON);
391 writew(tmp & ~S3C2410_RTCCON_CLKRST,
392 info->base + S3C2410_RTCCON);
1add6781 393 }
ae05c950
CC		 394}
395
396static void s3c24xx_rtc_disable(struct s3c_rtc *info)
397{
398 unsigned int con;
399
ae05c950
CC		 400 con = readw(info->base + S3C2410_RTCCON);
401 con &= ~S3C2410_RTCCON_RTCEN;
402 writew(con, info->base + S3C2410_RTCCON);
403
404 con = readb(info->base + S3C2410_TICNT);
405 con &= ~S3C2410_TICNT_ENABLE;
406 writeb(con, info->base + S3C2410_TICNT);
ae05c950
CC		 407}
408
409static void s3c6410_rtc_disable(struct s3c_rtc *info)
410{
411 unsigned int con;
412
ae05c950
CC		 413 con = readw(info->base + S3C2410_RTCCON);
414 con &= ~S3C64XX_RTCCON_TICEN;
415 con &= ~S3C2410_RTCCON_RTCEN;
416 writew(con, info->base + S3C2410_RTCCON);
1add6781
BD		 417}
418
19be09f5 419static int s3c_rtc_remove(struct platform_device *pdev)
1add6781 420{
19be09f5
CC		 421 struct s3c_rtc *info = platform_get_drvdata(pdev);
422
423 s3c_rtc_setaie(info->dev, 0);
1add6781 424
7f23a936
JS		 425 if (info->data->needs_src_clk)
426 clk_unprepare(info->rtc_src_clk);
19be09f5 427 clk_unprepare(info->rtc_clk);
e48add8c 428
1add6781
BD		 429 return 0;
430}
431
d2524caa
HS		 432static const struct of_device_id s3c_rtc_dt_match[];
433
ae05c950 434static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
d2524caa 435{
ae05c950 436 const struct of_device_id *match;
d67288da 437
ae05c950
CC		 438 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
439 return (struct s3c_rtc_data *)match->data;
d2524caa
HS		 440}
441
5a167f45 442static int s3c_rtc_probe(struct platform_device *pdev)
1add6781 443{
19be09f5 444 struct s3c_rtc *info = NULL;
e1df962e 445 struct rtc_time rtc_tm;
1add6781
BD		 446 struct resource *res;
447 int ret;
448
19be09f5
CC		 449 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
450 if (!info)
451 return -ENOMEM;
1add6781
BD		 452
453 /* find the IRQs */
19be09f5
CC		 454 info->irq_tick = platform_get_irq(pdev, 1);
455 if (info->irq_tick < 0) {
1add6781 456 dev_err(&pdev->dev, "no irq for rtc tick\n");
19be09f5 457 return info->irq_tick;
1add6781
BD		 458 }
459
19be09f5 460 info->dev = &pdev->dev;
ae05c950
CC		 461 info->data = s3c_rtc_get_data(pdev);
462 if (!info->data) {
463 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
464 return -EINVAL;
465 }
19be09f5
CC		 466 spin_lock_init(&info->pie_lock);
467 spin_lock_init(&info->alarm_clk_lock);
468
469 platform_set_drvdata(pdev, info);
470
471 info->irq_alarm = platform_get_irq(pdev, 0);
472 if (info->irq_alarm < 0) {
1add6781 473 dev_err(&pdev->dev, "no irq for alarm\n");
19be09f5 474 return info->irq_alarm;
1add6781
BD		 475 }
476
d4a48c2a 477 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
19be09f5 478 info->irq_tick, info->irq_alarm);
1add6781
BD		 479
480 /* get the memory region */
1add6781 481 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
19be09f5
CC		 482 info->base = devm_ioremap_resource(&pdev->dev, res);
483 if (IS_ERR(info->base))
484 return PTR_ERR(info->base);
1add6781 485
19be09f5
CC		 486 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
487 if (IS_ERR(info->rtc_clk)) {
df9e26d0 488 dev_err(&pdev->dev, "failed to find rtc clock\n");
19be09f5 489 return PTR_ERR(info->rtc_clk);
e48add8c 490 }
19be09f5 491 clk_prepare_enable(info->rtc_clk);
e48add8c 492
eaf3a659
MS		 493 if (info->data->needs_src_clk) {
494 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
495 if (IS_ERR(info->rtc_src_clk)) {
496 dev_err(&pdev->dev,
497 "failed to find rtc source clock\n");
7f23a936 498 clk_disable_unprepare(info->rtc_clk);
eaf3a659
MS		 499 return PTR_ERR(info->rtc_src_clk);
500 }
501 clk_prepare_enable(info->rtc_src_clk);
df9e26d0 502 }
df9e26d0 503
1add6781 504 /* check to see if everything is setup correctly */
ae05c950
CC		 505 if (info->data->enable)
506 info->data->enable(info);
1add6781 507
d4a48c2a 508 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
19be09f5 509 readw(info->base + S3C2410_RTCCON));
1add6781 510
51b7616e
YK		 511 device_init_wakeup(&pdev->dev, 1);
512
202fe4c2 513 /* Check RTC Time */
492da68c 514 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
202fe4c2
KK		 515 rtc_tm.tm_year = 100;
516 rtc_tm.tm_mon = 0;
517 rtc_tm.tm_mday = 1;
518 rtc_tm.tm_hour = 0;
519 rtc_tm.tm_min = 0;
520 rtc_tm.tm_sec = 0;
521
522 s3c_rtc_settime(&pdev->dev, &rtc_tm);
523
524 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
525 }
526
1add6781 527 /* register RTC and exit */
19be09f5 528 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
1add6781 529 THIS_MODULE);
19be09f5 530 if (IS_ERR(info->rtc)) {
1add6781 531 dev_err(&pdev->dev, "cannot attach rtc\n");
19be09f5 532 ret = PTR_ERR(info->rtc);
1add6781
BD		 533 goto err_nortc;
534 }
535
19be09f5
CC		 536 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
537 0, "s3c2410-rtc alarm", info);
538 if (ret) {
539 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
540 goto err_nortc;
541 }
eaa6e4dd 542
19be09f5
CC		 543 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
544 0, "s3c2410-rtc tick", info);
545 if (ret) {
546 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
547 goto err_nortc;
548 }
051fe54e 549
ae05c950
CC		 550 if (info->data->select_tick_clk)
551 info->data->select_tick_clk(info);
62d17601 552
19be09f5 553 s3c_rtc_setfreq(info, 1);
62d17601 554
24e14554 555 s3c_rtc_disable_clk(info);
cefe4fbb 556
1add6781
BD		 557 return 0;
558
559 err_nortc:
ae05c950
CC		 560 if (info->data->disable)
561 info->data->disable(info);
24e14554
CC		 562
563 if (info->data->needs_src_clk)
564 clk_disable_unprepare(info->rtc_src_clk);
19be09f5 565 clk_disable_unprepare(info->rtc_clk);
1add6781 566
1add6781
BD		 567 return ret;
568}
569
32e445aa 570#ifdef CONFIG_PM_SLEEP
1add6781 571
32e445aa 572static int s3c_rtc_suspend(struct device *dev)
1add6781 573{
19be09f5 574 struct s3c_rtc *info = dev_get_drvdata(dev);
32e445aa 575
24e14554 576 s3c_rtc_enable_clk(info);
ae05c950 577
1add6781 578 /* save TICNT for anyone using periodic interrupts */
ae05c950
CC		 579 if (info->data->save_tick_cnt)
580 info->data->save_tick_cnt(info);
581
582 if (info->data->disable)
583 info->data->disable(info);
f501ed52 584
19be09f5
CC		 585 if (device_may_wakeup(dev) && !info->wake_en) {
586 if (enable_irq_wake(info->irq_alarm) == 0)
587 info->wake_en = true;
52cd4e5c 588 else
32e445aa 589 dev_err(dev, "enable_irq_wake failed\n");
52cd4e5c 590 }
ae05c950 591
1add6781
BD		 592 return 0;
593}
594
32e445aa 595static int s3c_rtc_resume(struct device *dev)
1add6781 596{
19be09f5 597 struct s3c_rtc *info = dev_get_drvdata(dev);
9f4123b7 598
ae05c950
CC		 599 if (info->data->enable)
600 info->data->enable(info);
601
602 if (info->data->restore_tick_cnt)
603 info->data->restore_tick_cnt(info);
f501ed52 604
24e14554
CC		 605 s3c_rtc_disable_clk(info);
606
19be09f5
CC		 607 if (device_may_wakeup(dev) && info->wake_en) {
608 disable_irq_wake(info->irq_alarm);
609 info->wake_en = false;
52cd4e5c 610 }
ae05c950 611
1add6781
BD		 612 return 0;
613}
1add6781 614#endif
32e445aa
JH		 615static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
616
ae05c950
CC		 617static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
618{
ae05c950 619 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
ae05c950
CC		 620}
621
622static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
623{
ae05c950
CC		 624 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
625 writeb(mask, info->base + S3C2410_INTP);
ae05c950
CC		 626}
627
628static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
629{
630 unsigned int tmp = 0;
631 int val;
632
633 tmp = readb(info->base + S3C2410_TICNT);
634 tmp &= S3C2410_TICNT_ENABLE;
635
636 val = (info->rtc->max_user_freq / freq) - 1;
637 tmp |= val;
638
639 writel(tmp, info->base + S3C2410_TICNT);
640}
641
642static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
643{
644 unsigned int tmp = 0;
645 int val;
646
647 tmp = readb(info->base + S3C2410_TICNT);
648 tmp &= S3C2410_TICNT_ENABLE;
649
650 val = (info->rtc->max_user_freq / freq) - 1;
651
652 tmp |= S3C2443_TICNT_PART(val);
653 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
654
655 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
656
657 writel(tmp, info->base + S3C2410_TICNT);
658}
659
660static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
661{
662 unsigned int tmp = 0;
663 int val;
664
665 tmp = readb(info->base + S3C2410_TICNT);
666 tmp &= S3C2410_TICNT_ENABLE;
667
668 val = (info->rtc->max_user_freq / freq) - 1;
669
670 tmp |= S3C2443_TICNT_PART(val);
671 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
672
673 writel(tmp, info->base + S3C2410_TICNT);
674}
675
676static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
677{
678 int val;
679
680 val = (info->rtc->max_user_freq / freq) - 1;
681 writel(val, info->base + S3C2410_TICNT);
682}
683
684static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
685{
686 unsigned int ticnt;
687
688 ticnt = readb(info->base + S3C2410_TICNT);
689 ticnt &= S3C2410_TICNT_ENABLE;
690
691 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
692}
693
694static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
695{
696 unsigned int con;
697
698 con = readw(info->base + S3C2410_RTCCON);
699 con |= S3C2443_RTCCON_TICSEL;
700 writew(con, info->base + S3C2410_RTCCON);
701}
702
703static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
704{
705 unsigned int ticnt;
706
707 ticnt = readw(info->base + S3C2410_RTCCON);
708 ticnt &= S3C64XX_RTCCON_TICEN;
709
710 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
711}
712
713static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
714{
715 info->ticnt_save = readb(info->base + S3C2410_TICNT);
716}
717
718static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
719{
720 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
721}
722
723static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
724{
725 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
726 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
727 info->ticnt_save = readl(info->base + S3C2410_TICNT);
728}
729
730static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
731{
732 unsigned int con;
733
734 writel(info->ticnt_save, info->base + S3C2410_TICNT);
735 if (info->ticnt_en_save) {
736 con = readw(info->base + S3C2410_RTCCON);
737 writew(con | info->ticnt_en_save,
738 info->base + S3C2410_RTCCON);
739 }
740}
741
742static struct s3c_rtc_data const s3c2410_rtc_data = {
743 .max_user_freq = 128,
744 .irq_handler = s3c24xx_rtc_irq,
745 .set_freq = s3c2410_rtc_setfreq,
746 .enable_tick = s3c24xx_rtc_enable_tick,
747 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
748 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
749 .enable = s3c24xx_rtc_enable,
750 .disable = s3c24xx_rtc_disable,
751};
752
753static struct s3c_rtc_data const s3c2416_rtc_data = {
754 .max_user_freq = 32768,
755 .irq_handler = s3c24xx_rtc_irq,
756 .set_freq = s3c2416_rtc_setfreq,
757 .enable_tick = s3c24xx_rtc_enable_tick,
758 .select_tick_clk = s3c2416_rtc_select_tick_clk,
759 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
760 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
761 .enable = s3c24xx_rtc_enable,
762 .disable = s3c24xx_rtc_disable,
763};
764
765static struct s3c_rtc_data const s3c2443_rtc_data = {
766 .max_user_freq = 32768,
767 .irq_handler = s3c24xx_rtc_irq,
768 .set_freq = s3c2443_rtc_setfreq,
769 .enable_tick = s3c24xx_rtc_enable_tick,
770 .select_tick_clk = s3c2416_rtc_select_tick_clk,
771 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
772 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
773 .enable = s3c24xx_rtc_enable,
774 .disable = s3c24xx_rtc_disable,
775};
776
777static struct s3c_rtc_data const s3c6410_rtc_data = {
778 .max_user_freq = 32768,
8792f777 779 .needs_src_clk = true,
ae05c950
CC		 780 .irq_handler = s3c6410_rtc_irq,
781 .set_freq = s3c6410_rtc_setfreq,
782 .enable_tick = s3c6410_rtc_enable_tick,
783 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
784 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
785 .enable = s3c24xx_rtc_enable,
786 .disable = s3c6410_rtc_disable,
c3cba928
TB		 787};
788
39ce4084 789static const struct of_device_id s3c_rtc_dt_match[] = {
d2524caa 790 {
cd1e6f9e 791 .compatible = "samsung,s3c2410-rtc",
ae05c950 792 .data = (void *)&s3c2410_rtc_data,
25c1a246 793 }, {
cd1e6f9e 794 .compatible = "samsung,s3c2416-rtc",
ae05c950 795 .data = (void *)&s3c2416_rtc_data,
25c1a246 796 }, {
cd1e6f9e 797 .compatible = "samsung,s3c2443-rtc",
ae05c950 798 .data = (void *)&s3c2443_rtc_data,
d2524caa 799 }, {
cd1e6f9e 800 .compatible = "samsung,s3c6410-rtc",
ae05c950 801 .data = (void *)&s3c6410_rtc_data,
df9e26d0
CC		 802 }, {
803 .compatible = "samsung,exynos3250-rtc",
a42e6eae 804 .data = (void *)&s3c6410_rtc_data,
d2524caa 805 },
ae05c950 806 { /* sentinel */ },
39ce4084
TA		 807};
808MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
9f4123b7
MC		 809
810static struct platform_driver s3c_rtc_driver = {
1add6781 811 .probe = s3c_rtc_probe,
5a167f45 812 .remove = s3c_rtc_remove,
1add6781 813 .driver = {
9f4123b7 814 .name = "s3c-rtc",
32e445aa 815 .pm = &s3c_rtc_pm_ops,
04a373fd 816 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
1add6781
BD		 817 },
818};
0c4eae66 819module_platform_driver(s3c_rtc_driver);
1add6781
BD		 820
821MODULE_DESCRIPTION("Samsung S3C RTC Driver");
822MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
823MODULE_LICENSE("GPL");
ad28a07b 824MODULE_ALIAS("platform:s3c2410-rtc");
Linux kernel - Deliverables
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