[deliverable/linux.git] / drivers / rtc / rtc-s3c.c

/* drivers/rtc/rtc-s3c.c
 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com/
 *
 * Copyright (c) 2004,2006 Simtec Electronics
 *	Ben Dooks, <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
*/

#include <linux/module.h>
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/clk.h>
#include <linux/log2.h>
#include <linux/slab.h>

#include <mach/hardware.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <plat/regs-rtc.h>

enum s3c_cpu_type {
	TYPE_S3C2410,
	TYPE_S3C64XX,
};

/* I have yet to find an S3C implementation with more than one
 * of these rtc blocks in */

static struct resource *s3c_rtc_mem;

static struct clk *rtc_clk;
static void __iomem *s3c_rtc_base;
static int s3c_rtc_alarmno = NO_IRQ;
static int s3c_rtc_tickno  = NO_IRQ;
static enum s3c_cpu_type s3c_rtc_cpu_type;

static DEFINE_SPINLOCK(s3c_rtc_pie_lock);

/* IRQ Handlers */

static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
{
	struct rtc_device *rdev = id;

	rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);

	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
		writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);

	return IRQ_HANDLED;
}

static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
{
	struct rtc_device *rdev = id;

	rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);

	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
		writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);

	return IRQ_HANDLED;
}

/* Update control registers */
static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
{
	unsigned int tmp;

	pr_debug("%s: aie=%d\n", __func__, enabled);

	tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;

	if (enabled)
		tmp |= S3C2410_RTCALM_ALMEN;

	writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);

	return 0;
}

static int s3c_rtc_setpie(struct device *dev, int enabled)
{
	unsigned int tmp;

	pr_debug("%s: pie=%d\n", __func__, enabled);

	spin_lock_irq(&s3c_rtc_pie_lock);

	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
		tmp &= ~S3C64XX_RTCCON_TICEN;

		if (enabled)
			tmp |= S3C64XX_RTCCON_TICEN;

		writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
	} else {
		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
		tmp &= ~S3C2410_TICNT_ENABLE;

		if (enabled)
			tmp |= S3C2410_TICNT_ENABLE;

		writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
	}

	spin_unlock_irq(&s3c_rtc_pie_lock);

	return 0;
}

static int s3c_rtc_setfreq(struct device *dev, int freq)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	unsigned int tmp = 0;

	if (!is_power_of_2(freq))
		return -EINVAL;

	spin_lock_irq(&s3c_rtc_pie_lock);

	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
		tmp &= S3C2410_TICNT_ENABLE;
	}

	tmp |= (rtc_dev->max_user_freq / freq)-1;

	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
	spin_unlock_irq(&s3c_rtc_pie_lock);

	return 0;
}

/* Time read/write */

static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
{
	unsigned int have_retried = 0;
	void __iomem *base = s3c_rtc_base;

 retry_get_time:
	rtc_tm->tm_min  = readb(base + S3C2410_RTCMIN);
	rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
	rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
	rtc_tm->tm_mon  = readb(base + S3C2410_RTCMON);
	rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
	rtc_tm->tm_sec  = readb(base + S3C2410_RTCSEC);

	/* the only way to work out wether the system was mid-update
	 * when we read it is to check the second counter, and if it
	 * is zero, then we re-try the entire read
	 */

	if (rtc_tm->tm_sec == 0 && !have_retried) {
		have_retried = 1;
		goto retry_get_time;
	}

	pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
		 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
		 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);

	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);

	rtc_tm->tm_year += 100;
	rtc_tm->tm_mon -= 1;

	return rtc_valid_tm(rtc_tm);
}

static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
{
	void __iomem *base = s3c_rtc_base;
	int year = tm->tm_year - 100;

	pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
		 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
		 tm->tm_hour, tm->tm_min, tm->tm_sec);

	/* we get around y2k by simply not supporting it */

	if (year < 0 || year >= 100) {
		dev_err(dev, "rtc only supports 100 years\n");
		return -EINVAL;
	}

	writeb(bin2bcd(tm->tm_sec),  base + S3C2410_RTCSEC);
	writeb(bin2bcd(tm->tm_min),  base + S3C2410_RTCMIN);
	writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
	writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
	writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
	writeb(bin2bcd(year), base + S3C2410_RTCYEAR);

	return 0;
}

static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *alm_tm = &alrm->time;
	void __iomem *base = s3c_rtc_base;
	unsigned int alm_en;

	alm_tm->tm_sec  = readb(base + S3C2410_ALMSEC);
	alm_tm->tm_min  = readb(base + S3C2410_ALMMIN);
	alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
	alm_tm->tm_mon  = readb(base + S3C2410_ALMMON);
	alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
	alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);

	alm_en = readb(base + S3C2410_RTCALM);

	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;

	pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
		 alm_en,
		 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
		 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);


	/* decode the alarm enable field */

	if (alm_en & S3C2410_RTCALM_SECEN)
		alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
	else
		alm_tm->tm_sec = -1;

	if (alm_en & S3C2410_RTCALM_MINEN)
		alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
	else
		alm_tm->tm_min = -1;

	if (alm_en & S3C2410_RTCALM_HOUREN)
		alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
	else
		alm_tm->tm_hour = -1;

	if (alm_en & S3C2410_RTCALM_DAYEN)
		alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
	else
		alm_tm->tm_mday = -1;

	if (alm_en & S3C2410_RTCALM_MONEN) {
		alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
		alm_tm->tm_mon -= 1;
	} else {
		alm_tm->tm_mon = -1;
	}

	if (alm_en & S3C2410_RTCALM_YEAREN)
		alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
	else
		alm_tm->tm_year = -1;

	return 0;
}

static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *tm = &alrm->time;
	void __iomem *base = s3c_rtc_base;
	unsigned int alrm_en;

	pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
		 alrm->enabled,
		 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
		 tm->tm_hour, tm->tm_min, tm->tm_sec);


	alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
	writeb(0x00, base + S3C2410_RTCALM);

	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
		alrm_en |= S3C2410_RTCALM_SECEN;
		writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
	}

	if (tm->tm_min < 60 && tm->tm_min >= 0) {
		alrm_en |= S3C2410_RTCALM_MINEN;
		writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
	}

	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
		alrm_en |= S3C2410_RTCALM_HOUREN;
		writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
	}

	pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);

	writeb(alrm_en, base + S3C2410_RTCALM);

	s3c_rtc_setaie(dev, alrm->enabled);

	return 0;
}

static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
{
	unsigned int ticnt;

	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
		ticnt &= S3C64XX_RTCCON_TICEN;
	} else {
		ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
		ticnt &= S3C2410_TICNT_ENABLE;
	}

	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt  ? "yes" : "no");
	return 0;
}

static int s3c_rtc_open(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	int ret;

	ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
			  IRQF_DISABLED,  "s3c2410-rtc alarm", rtc_dev);

	if (ret) {
		dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
		return ret;
	}

	ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
			  IRQF_DISABLED,  "s3c2410-rtc tick", rtc_dev);

	if (ret) {
		dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
		goto tick_err;
	}

	return ret;

 tick_err:
	free_irq(s3c_rtc_alarmno, rtc_dev);
	return ret;
}

static void s3c_rtc_release(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);

	/* do not clear AIE here, it may be needed for wake */

	s3c_rtc_setpie(dev, 0);
	free_irq(s3c_rtc_alarmno, rtc_dev);
	free_irq(s3c_rtc_tickno, rtc_dev);
}

static const struct rtc_class_ops s3c_rtcops = {
	.open		= s3c_rtc_open,
	.release	= s3c_rtc_release,
	.read_time	= s3c_rtc_gettime,
	.set_time	= s3c_rtc_settime,
	.read_alarm	= s3c_rtc_getalarm,
	.set_alarm	= s3c_rtc_setalarm,
	.irq_set_freq	= s3c_rtc_setfreq,
	.irq_set_state	= s3c_rtc_setpie,
	.proc		= s3c_rtc_proc,
	.alarm_irq_enable = s3c_rtc_setaie,
};

static void s3c_rtc_enable(struct platform_device *pdev, int en)
{
	void __iomem *base = s3c_rtc_base;
	unsigned int tmp;

	if (s3c_rtc_base == NULL)
		return;

	if (!en) {
		tmp = readw(base + S3C2410_RTCCON);
		if (s3c_rtc_cpu_type == TYPE_S3C64XX)
			tmp &= ~S3C64XX_RTCCON_TICEN;
		tmp &= ~S3C2410_RTCCON_RTCEN;
		writew(tmp, base + S3C2410_RTCCON);

		if (s3c_rtc_cpu_type == TYPE_S3C2410) {
			tmp = readb(base + S3C2410_TICNT);
			tmp &= ~S3C2410_TICNT_ENABLE;
			writeb(tmp, base + S3C2410_TICNT);
		}
	} else {
		/* re-enable the device, and check it is ok */

		if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
			dev_info(&pdev->dev, "rtc disabled, re-enabling\n");

			tmp = readw(base + S3C2410_RTCCON);
			writew(tmp | S3C2410_RTCCON_RTCEN,
				base + S3C2410_RTCCON);
		}

		if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
			dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");

			tmp = readw(base + S3C2410_RTCCON);
			writew(tmp & ~S3C2410_RTCCON_CNTSEL,
				base + S3C2410_RTCCON);
		}

		if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
			dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");

			tmp = readw(base + S3C2410_RTCCON);
			writew(tmp & ~S3C2410_RTCCON_CLKRST,
				base + S3C2410_RTCCON);
		}
	}
}

static int __devexit s3c_rtc_remove(struct platform_device *dev)
{
	struct rtc_device *rtc = platform_get_drvdata(dev);

	platform_set_drvdata(dev, NULL);
	rtc_device_unregister(rtc);

	s3c_rtc_setpie(&dev->dev, 0);
	s3c_rtc_setaie(&dev->dev, 0);

	clk_disable(rtc_clk);
	clk_put(rtc_clk);
	rtc_clk = NULL;

	iounmap(s3c_rtc_base);
	release_resource(s3c_rtc_mem);
	kfree(s3c_rtc_mem);

	return 0;
}

static int __devinit s3c_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct rtc_time rtc_tm;
	struct resource *res;
	int ret;

	pr_debug("%s: probe=%p\n", __func__, pdev);

	/* find the IRQs */

	s3c_rtc_tickno = platform_get_irq(pdev, 1);
	if (s3c_rtc_tickno < 0) {
		dev_err(&pdev->dev, "no irq for rtc tick\n");
		return -ENOENT;
	}

	s3c_rtc_alarmno = platform_get_irq(pdev, 0);
	if (s3c_rtc_alarmno < 0) {
		dev_err(&pdev->dev, "no irq for alarm\n");
		return -ENOENT;
	}

	pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
		 s3c_rtc_tickno, s3c_rtc_alarmno);

	/* get the memory region */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL) {
		dev_err(&pdev->dev, "failed to get memory region resource\n");
		return -ENOENT;
	}

	s3c_rtc_mem = request_mem_region(res->start,
					 res->end-res->start+1,
					 pdev->name);

	if (s3c_rtc_mem == NULL) {
		dev_err(&pdev->dev, "failed to reserve memory region\n");
		ret = -ENOENT;
		goto err_nores;
	}

	s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
	if (s3c_rtc_base == NULL) {
		dev_err(&pdev->dev, "failed ioremap()\n");
		ret = -EINVAL;
		goto err_nomap;
	}

	rtc_clk = clk_get(&pdev->dev, "rtc");
	if (IS_ERR(rtc_clk)) {
		dev_err(&pdev->dev, "failed to find rtc clock source\n");
		ret = PTR_ERR(rtc_clk);
		rtc_clk = NULL;
		goto err_clk;
	}

	clk_enable(rtc_clk);

	/* check to see if everything is setup correctly */

	s3c_rtc_enable(pdev, 1);

	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
		 readw(s3c_rtc_base + S3C2410_RTCCON));

	device_init_wakeup(&pdev->dev, 1);

	/* register RTC and exit */

	rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
				  THIS_MODULE);

	if (IS_ERR(rtc)) {
		dev_err(&pdev->dev, "cannot attach rtc\n");
		ret = PTR_ERR(rtc);
		goto err_nortc;
	}

	s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;

	/* Check RTC Time */

	s3c_rtc_gettime(NULL, &rtc_tm);

	if (rtc_valid_tm(&rtc_tm)) {
		rtc_tm.tm_year	= 100;
		rtc_tm.tm_mon	= 0;
		rtc_tm.tm_mday	= 1;
		rtc_tm.tm_hour	= 0;
		rtc_tm.tm_min	= 0;
		rtc_tm.tm_sec	= 0;

		s3c_rtc_settime(NULL, &rtc_tm);

		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
	}

	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
		rtc->max_user_freq = 32768;
	else
		rtc->max_user_freq = 128;

	platform_set_drvdata(pdev, rtc);

	s3c_rtc_setfreq(&pdev->dev, 1);

	return 0;

 err_nortc:
	s3c_rtc_enable(pdev, 0);
	clk_disable(rtc_clk);
	clk_put(rtc_clk);

 err_clk:
	iounmap(s3c_rtc_base);

 err_nomap:
	release_resource(s3c_rtc_mem);

 err_nores:
	return ret;
}

#ifdef CONFIG_PM

/* RTC Power management control */

static int ticnt_save, ticnt_en_save;

static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	/* save TICNT for anyone using periodic interrupts */
	ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
		ticnt_en_save &= S3C64XX_RTCCON_TICEN;
	}
	s3c_rtc_enable(pdev, 0);

	if (device_may_wakeup(&pdev->dev))
		enable_irq_wake(s3c_rtc_alarmno);

	return 0;
}

static int s3c_rtc_resume(struct platform_device *pdev)
{
	unsigned int tmp;

	s3c_rtc_enable(pdev, 1);
	writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
	if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
		writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
	}

	if (device_may_wakeup(&pdev->dev))
		disable_irq_wake(s3c_rtc_alarmno);

	return 0;
}
#else
#define s3c_rtc_suspend NULL
#define s3c_rtc_resume  NULL
#endif

static struct platform_device_id s3c_rtc_driver_ids[] = {
	{
		.name		= "s3c2410-rtc",
		.driver_data	= TYPE_S3C2410,
	}, {
		.name		= "s3c64xx-rtc",
		.driver_data	= TYPE_S3C64XX,
	},
	{ }
};

MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);

static struct platform_driver s3c_rtc_driver = {
	.probe		= s3c_rtc_probe,
	.remove		= __devexit_p(s3c_rtc_remove),
	.suspend	= s3c_rtc_suspend,
	.resume		= s3c_rtc_resume,
	.id_table	= s3c_rtc_driver_ids,
	.driver		= {
		.name	= "s3c-rtc",
		.owner	= THIS_MODULE,
	},
};

static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";

static int __init s3c_rtc_init(void)
{
	printk(banner);
	return platform_driver_register(&s3c_rtc_driver);
}

static void __exit s3c_rtc_exit(void)
{
	platform_driver_unregister(&s3c_rtc_driver);
}

module_init(s3c_rtc_init);
module_exit(s3c_rtc_exit);

MODULE_DESCRIPTION("Samsung S3C RTC Driver");
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:s3c2410-rtc");
Commit	Line	Data
1add6781	1	/* drivers/rtc/rtc-s3c.c
e48add8c AD	2	*
	3	* Copyright (c) 2010 Samsung Electronics Co., Ltd.
	4	* http://www.samsung.com/
1add6781 BD	5	*
	6	* Copyright (c) 2004,2006 Simtec Electronics
	7	* Ben Dooks, <ben@simtec.co.uk>
	8	* http://armlinux.simtec.co.uk/
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* S3C2410/S3C2440/S3C24XX Internal RTC Driver
	15	*/
	16
	17	#include <linux/module.h>
	18	#include <linux/fs.h>
	19	#include <linux/string.h>
	20	#include <linux/init.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/rtc.h>
	24	#include <linux/bcd.h>
	25	#include <linux/clk.h>
9974b6ea	26	#include <linux/log2.h>
5a0e3ad6	27	#include <linux/slab.h>
1add6781	28
a09e64fb	29	#include <mach/hardware.h>
1add6781 BD	30	#include <asm/uaccess.h>
	31	#include <asm/io.h>
	32	#include <asm/irq.h>
e2cd00cf	33	#include <plat/regs-rtc.h>
1add6781	34
9f4123b7 MC	35	enum s3c_cpu_type {
	36	TYPE_S3C2410,
	37	TYPE_S3C64XX,
	38	};
	39
1add6781 BD	40	/* I have yet to find an S3C implementation with more than one
	41	* of these rtc blocks in */
	42
	43	static struct resource *s3c_rtc_mem;
	44
e48add8c	45	static struct clk *rtc_clk;
1add6781 BD	46	static void __iomem *s3c_rtc_base;
	47	static int s3c_rtc_alarmno = NO_IRQ;
	48	static int s3c_rtc_tickno = NO_IRQ;
9f4123b7	49	static enum s3c_cpu_type s3c_rtc_cpu_type;
1add6781 BD	50
1add6781 BD	51	static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
1add6781 BD	52
	53	/* IRQ Handlers */
	54
7d12e780	55	static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 BD	56	{
	57	struct rtc_device *rdev = id;
	58
ab6a2d70	59	rtc_update_irq(rdev, 1, RTC_AF \| RTC_IRQF);
2f3478f6 AD	60
	61	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	62	writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
	63
1add6781 BD	64	return IRQ_HANDLED;
	65	}
	66
7d12e780	67	static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 BD	68	{
	69	struct rtc_device *rdev = id;
	70
773be7ee	71	rtc_update_irq(rdev, 1, RTC_PF \| RTC_IRQF);
2f3478f6 AD	72
	73	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	74	writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
	75
1add6781 BD	76	return IRQ_HANDLED;
	77	}
	78
	79	/* Update control registers */
2ec38a03	80	static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781 BD	81	{
	82	unsigned int tmp;
	83
2ec38a03	84	pr_debug("%s: aie=%d\n", __func__, enabled);
1add6781	85
9a654518	86	tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781	87
2ec38a03	88	if (enabled)
1add6781 BD	89	tmp \|= S3C2410_RTCALM_ALMEN;
1add6781 BD	90
9a654518	91	writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
2ec38a03 AL	92
2ec38a03 AL	93	return 0;
1add6781 BD	94	}
1add6781 BD	95
773be7ee	96	static int s3c_rtc_setpie(struct device *dev, int enabled)
1add6781 BD	97	{
	98	unsigned int tmp;
	99
773be7ee	100	pr_debug("%s: pie=%d\n", __func__, enabled);
1add6781 BD	101
1add6781 BD	102	spin_lock_irq(&s3c_rtc_pie_lock);
1add6781	103
9f4123b7	104	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671	105	tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 MC	106	tmp &= ~S3C64XX_RTCCON_TICEN;
	107
	108	if (enabled)
	109	tmp \|= S3C64XX_RTCCON_TICEN;
	110
2f3478f6	111	writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 MC	112	} else {
	113	tmp = readb(s3c_rtc_base + S3C2410_TICNT);
	114	tmp &= ~S3C2410_TICNT_ENABLE;
	115
	116	if (enabled)
	117	tmp \|= S3C2410_TICNT_ENABLE;
	118
	119	writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
	120	}
1add6781	121
1add6781	122	spin_unlock_irq(&s3c_rtc_pie_lock);
773be7ee BD	123
773be7ee BD	124	return 0;
1add6781 BD	125	}
1add6781 BD	126
773be7ee	127	static int s3c_rtc_setfreq(struct device *dev, int freq)
1add6781	128	{
9f4123b7 MC	129	struct platform_device *pdev = to_platform_device(dev);
	130	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	131	unsigned int tmp = 0;
1add6781	132
5d2a5037 JC	133	if (!is_power_of_2(freq))
	134	return -EINVAL;
	135
1add6781	136	spin_lock_irq(&s3c_rtc_pie_lock);
1add6781	137
9f4123b7 MC	138	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
	139	tmp = readb(s3c_rtc_base + S3C2410_TICNT);
	140	tmp &= S3C2410_TICNT_ENABLE;
	141	}
	142
	143	tmp \|= (rtc_dev->max_user_freq / freq)-1;
1add6781	144
2f3478f6	145	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
1add6781	146	spin_unlock_irq(&s3c_rtc_pie_lock);
773be7ee BD	147
773be7ee BD	148	return 0;
1add6781 BD	149	}
	150
	151	/* Time read/write */
	152
	153	static int s3c_rtc_gettime(struct device dev, struct rtc_time rtc_tm)
	154	{
	155	unsigned int have_retried = 0;
9a654518	156	void __iomem *base = s3c_rtc_base;
1add6781 BD	157
1add6781 BD	158	retry_get_time:
9a654518 BD	159	rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
	160	rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
	161	rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
	162	rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
	163	rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
	164	rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
1add6781 BD	165
	166	/* the only way to work out wether the system was mid-update
	167	* when we read it is to check the second counter, and if it
	168	* is zero, then we re-try the entire read
	169	*/
	170
	171	if (rtc_tm->tm_sec == 0 && !have_retried) {
	172	have_retried = 1;
	173	goto retry_get_time;
	174	}
	175
30ffc40c KK	176	pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
30ffc40c KK	177	1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
1add6781 BD	178	rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
1add6781 BD	179
fe20ba70 AB	180	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	181	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	182	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	183	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	184	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	185	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781 BD	186
	187	rtc_tm->tm_year += 100;
	188	rtc_tm->tm_mon -= 1;
	189
5b3ffddd	190	return rtc_valid_tm(rtc_tm);
1add6781 BD	191	}
	192
	193	static int s3c_rtc_settime(struct device dev, struct rtc_time tm)
	194	{
9a654518	195	void __iomem *base = s3c_rtc_base;
641741e0	196	int year = tm->tm_year - 100;
9a654518	197
30ffc40c KK	198	pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
30ffc40c KK	199	1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0 BD	200	tm->tm_hour, tm->tm_min, tm->tm_sec);
	201
	202	/* we get around y2k by simply not supporting it */
1add6781	203
641741e0	204	if (year < 0 \|\| year >= 100) {
9a654518	205	dev_err(dev, "rtc only supports 100 years\n");
1add6781	206	return -EINVAL;
9a654518 BD	207	}
9a654518 BD	208
fe20ba70 AB	209	writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
	210	writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
	211	writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
	212	writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
	213	writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
	214	writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
1add6781 BD	215
	216	return 0;
	217	}
	218
	219	static int s3c_rtc_getalarm(struct device dev, struct rtc_wkalrm alrm)
	220	{
	221	struct rtc_time *alm_tm = &alrm->time;
9a654518	222	void __iomem *base = s3c_rtc_base;
1add6781 BD	223	unsigned int alm_en;
1add6781 BD	224
9a654518 BD	225	alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
	226	alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
	227	alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
	228	alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
	229	alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
	230	alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
1add6781	231
9a654518	232	alm_en = readb(base + S3C2410_RTCALM);
1add6781	233
a2db8dfc DB	234	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
a2db8dfc DB	235
30ffc40c	236	pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781	237	alm_en,
30ffc40c	238	1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781 BD	239	alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
	240
	241
	242	/* decode the alarm enable field */
	243
	244	if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70	245	alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781	246	else
dd061d1a	247	alm_tm->tm_sec = -1;
1add6781 BD	248
1add6781 BD	249	if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70	250	alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781	251	else
dd061d1a	252	alm_tm->tm_min = -1;
1add6781 BD	253
1add6781 BD	254	if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70	255	alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781	256	else
dd061d1a	257	alm_tm->tm_hour = -1;
1add6781 BD	258
1add6781 BD	259	if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70	260	alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781	261	else
dd061d1a	262	alm_tm->tm_mday = -1;
1add6781 BD	263
1add6781 BD	264	if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70	265	alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781 BD	266	alm_tm->tm_mon -= 1;
1add6781 BD	267	} else {
dd061d1a	268	alm_tm->tm_mon = -1;
1add6781 BD	269	}
	270
	271	if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70	272	alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781	273	else
dd061d1a	274	alm_tm->tm_year = -1;
1add6781 BD	275
	276	return 0;
	277	}
	278
	279	static int s3c_rtc_setalarm(struct device dev, struct rtc_wkalrm alrm)
	280	{
	281	struct rtc_time *tm = &alrm->time;
9a654518	282	void __iomem *base = s3c_rtc_base;
1add6781 BD	283	unsigned int alrm_en;
1add6781 BD	284
30ffc40c	285	pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781	286	alrm->enabled,
30ffc40c KK	287	1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
30ffc40c KK	288	tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781 BD	289
1add6781 BD	290
9a654518 BD	291	alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
9a654518 BD	292	writeb(0x00, base + S3C2410_RTCALM);
1add6781 BD	293
	294	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
	295	alrm_en \|= S3C2410_RTCALM_SECEN;
fe20ba70	296	writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
1add6781 BD	297	}
	298
	299	if (tm->tm_min < 60 && tm->tm_min >= 0) {
	300	alrm_en \|= S3C2410_RTCALM_MINEN;
fe20ba70	301	writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
1add6781 BD	302	}
	303
	304	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
	305	alrm_en \|= S3C2410_RTCALM_HOUREN;
fe20ba70	306	writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
1add6781 BD	307	}
	308
	309	pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
	310
9a654518	311	writeb(alrm_en, base + S3C2410_RTCALM);
1add6781	312
2ec38a03	313	s3c_rtc_setaie(dev, alrm->enabled);
1add6781	314
1add6781 BD	315	return 0;
	316	}
	317
1add6781 BD	318	static int s3c_rtc_proc(struct device dev, struct seq_file seq)
1add6781 BD	319	{
9f4123b7	320	unsigned int ticnt;
1add6781	321
9f4123b7	322	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671	323	ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 MC	324	ticnt &= S3C64XX_RTCCON_TICEN;
	325	} else {
	326	ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
	327	ticnt &= S3C2410_TICNT_ENABLE;
	328	}
	329
	330	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
1add6781 BD	331	return 0;
	332	}
	333
	334	static int s3c_rtc_open(struct device *dev)
	335	{
	336	struct platform_device *pdev = to_platform_device(dev);
	337	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	338	int ret;
	339
	340	ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
38515e90	341	IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
1add6781 BD	342
	343	if (ret) {
	344	dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
	345	return ret;
	346	}
	347
	348	ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
38515e90	349	IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
1add6781 BD	350
	351	if (ret) {
	352	dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
	353	goto tick_err;
	354	}
	355
	356	return ret;
	357
	358	tick_err:
	359	free_irq(s3c_rtc_alarmno, rtc_dev);
	360	return ret;
	361	}
	362
	363	static void s3c_rtc_release(struct device *dev)
	364	{
	365	struct platform_device *pdev = to_platform_device(dev);
	366	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	367
	368	/* do not clear AIE here, it may be needed for wake */
	369
773be7ee	370	s3c_rtc_setpie(dev, 0);
1add6781 BD	371	free_irq(s3c_rtc_alarmno, rtc_dev);
	372	free_irq(s3c_rtc_tickno, rtc_dev);
	373	}
	374
ff8371ac	375	static const struct rtc_class_ops s3c_rtcops = {
1add6781 BD	376	.open = s3c_rtc_open,
1add6781 BD	377	.release = s3c_rtc_release,
1add6781 BD	378	.read_time = s3c_rtc_gettime,
	379	.set_time = s3c_rtc_settime,
	380	.read_alarm = s3c_rtc_getalarm,
	381	.set_alarm = s3c_rtc_setalarm,
773be7ee BD	382	.irq_set_freq = s3c_rtc_setfreq,
773be7ee BD	383	.irq_set_state = s3c_rtc_setpie,
e6eb524e CY	384	.proc = s3c_rtc_proc,
e6eb524e CY	385	.alarm_irq_enable = s3c_rtc_setaie,
1add6781 BD	386	};
	387
	388	static void s3c_rtc_enable(struct platform_device *pdev, int en)
	389	{
9a654518	390	void __iomem *base = s3c_rtc_base;
1add6781 BD	391	unsigned int tmp;
	392
	393	if (s3c_rtc_base == NULL)
	394	return;
	395
	396	if (!en) {
f61ae671	397	tmp = readw(base + S3C2410_RTCCON);
9f4123b7 MC	398	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	399	tmp &= ~S3C64XX_RTCCON_TICEN;
	400	tmp &= ~S3C2410_RTCCON_RTCEN;
f61ae671	401	writew(tmp, base + S3C2410_RTCCON);
9f4123b7 MC	402
	403	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
	404	tmp = readb(base + S3C2410_TICNT);
	405	tmp &= ~S3C2410_TICNT_ENABLE;
	406	writeb(tmp, base + S3C2410_TICNT);
	407	}
1add6781 BD	408	} else {
	409	/* re-enable the device, and check it is ok */
	410
f61ae671	411	if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
1add6781 BD	412	dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
1add6781 BD	413
f61ae671 CY	414	tmp = readw(base + S3C2410_RTCCON);
	415	writew(tmp \| S3C2410_RTCCON_RTCEN,
	416	base + S3C2410_RTCCON);
1add6781 BD	417	}
1add6781 BD	418
f61ae671	419	if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
1add6781 BD	420	dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
1add6781 BD	421
f61ae671 CY	422	tmp = readw(base + S3C2410_RTCCON);
	423	writew(tmp & ~S3C2410_RTCCON_CNTSEL,
	424	base + S3C2410_RTCCON);
1add6781 BD	425	}
1add6781 BD	426
f61ae671	427	if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
1add6781 BD	428	dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
1add6781 BD	429
f61ae671 CY	430	tmp = readw(base + S3C2410_RTCCON);
	431	writew(tmp & ~S3C2410_RTCCON_CLKRST,
	432	base + S3C2410_RTCCON);
1add6781 BD	433	}
	434	}
	435	}
	436
4cd0c5c4	437	static int __devexit s3c_rtc_remove(struct platform_device *dev)
1add6781 BD	438	{
	439	struct rtc_device *rtc = platform_get_drvdata(dev);
	440
	441	platform_set_drvdata(dev, NULL);
	442	rtc_device_unregister(rtc);
	443
773be7ee	444	s3c_rtc_setpie(&dev->dev, 0);
2ec38a03	445	s3c_rtc_setaie(&dev->dev, 0);
1add6781	446
e48add8c AD	447	clk_disable(rtc_clk);
	448	clk_put(rtc_clk);
	449	rtc_clk = NULL;
	450
1add6781 BD	451	iounmap(s3c_rtc_base);
	452	release_resource(s3c_rtc_mem);
	453	kfree(s3c_rtc_mem);
	454
	455	return 0;
	456	}
	457
4cd0c5c4	458	static int __devinit s3c_rtc_probe(struct platform_device *pdev)
1add6781 BD	459	{
1add6781 BD	460	struct rtc_device *rtc;
e1df962e	461	struct rtc_time rtc_tm;
1add6781 BD	462	struct resource *res;
	463	int ret;
	464
2a4e2b87	465	pr_debug("%s: probe=%p\n", __func__, pdev);
1add6781 BD	466
	467	/* find the IRQs */
	468
	469	s3c_rtc_tickno = platform_get_irq(pdev, 1);
	470	if (s3c_rtc_tickno < 0) {
	471	dev_err(&pdev->dev, "no irq for rtc tick\n");
	472	return -ENOENT;
	473	}
	474
	475	s3c_rtc_alarmno = platform_get_irq(pdev, 0);
	476	if (s3c_rtc_alarmno < 0) {
	477	dev_err(&pdev->dev, "no irq for alarm\n");
	478	return -ENOENT;
	479	}
	480
	481	pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
	482	s3c_rtc_tickno, s3c_rtc_alarmno);
	483
	484	/* get the memory region */
	485
	486	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	487	if (res == NULL) {
	488	dev_err(&pdev->dev, "failed to get memory region resource\n");
	489	return -ENOENT;
	490	}
	491
	492	s3c_rtc_mem = request_mem_region(res->start,
9a654518 BD	493	res->end-res->start+1,
9a654518 BD	494	pdev->name);
1add6781 BD	495
	496	if (s3c_rtc_mem == NULL) {
	497	dev_err(&pdev->dev, "failed to reserve memory region\n");
	498	ret = -ENOENT;
	499	goto err_nores;
	500	}
	501
	502	s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
	503	if (s3c_rtc_base == NULL) {
	504	dev_err(&pdev->dev, "failed ioremap()\n");
	505	ret = -EINVAL;
	506	goto err_nomap;
	507	}
	508
e48add8c AD	509	rtc_clk = clk_get(&pdev->dev, "rtc");
	510	if (IS_ERR(rtc_clk)) {
	511	dev_err(&pdev->dev, "failed to find rtc clock source\n");
	512	ret = PTR_ERR(rtc_clk);
	513	rtc_clk = NULL;
	514	goto err_clk;
	515	}
	516
	517	clk_enable(rtc_clk);
	518
1add6781 BD	519	/* check to see if everything is setup correctly */
	520
	521	s3c_rtc_enable(pdev, 1);
	522
f61ae671 CY	523	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
f61ae671 CY	524	readw(s3c_rtc_base + S3C2410_RTCCON));
1add6781	525
51b7616e YK	526	device_init_wakeup(&pdev->dev, 1);
51b7616e YK	527
1add6781 BD	528	/* register RTC and exit */
	529
	530	rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
	531	THIS_MODULE);
	532
	533	if (IS_ERR(rtc)) {
	534	dev_err(&pdev->dev, "cannot attach rtc\n");
	535	ret = PTR_ERR(rtc);
	536	goto err_nortc;
	537	}
	538
eaa6e4dd MC	539	s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
eaa6e4dd MC	540
051fe54e TK	541	/* Check RTC Time */
051fe54e TK	542
e1df962e	543	s3c_rtc_gettime(NULL, &rtc_tm);
051fe54e	544
e1df962e CY	545	if (rtc_valid_tm(&rtc_tm)) {
	546	rtc_tm.tm_year = 100;
	547	rtc_tm.tm_mon = 0;
	548	rtc_tm.tm_mday = 1;
	549	rtc_tm.tm_hour = 0;
	550	rtc_tm.tm_min = 0;
	551	rtc_tm.tm_sec = 0;
	552
	553	s3c_rtc_settime(NULL, &rtc_tm);
	554
	555	dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
051fe54e TK	556	}
051fe54e TK	557
9f4123b7 MC	558	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	559	rtc->max_user_freq = 32768;
	560	else
	561	rtc->max_user_freq = 128;
	562
1add6781	563	platform_set_drvdata(pdev, rtc);
e893de59 MC	564
	565	s3c_rtc_setfreq(&pdev->dev, 1);
	566
1add6781 BD	567	return 0;
	568
	569	err_nortc:
	570	s3c_rtc_enable(pdev, 0);
e48add8c AD	571	clk_disable(rtc_clk);
	572	clk_put(rtc_clk);
	573
	574	err_clk:
1add6781 BD	575	iounmap(s3c_rtc_base);
	576
	577	err_nomap:
	578	release_resource(s3c_rtc_mem);
	579
	580	err_nores:
	581	return ret;
	582	}
	583
	584	#ifdef CONFIG_PM
	585
	586	/* RTC Power management control */
	587
9f4123b7	588	static int ticnt_save, ticnt_en_save;
1add6781 BD	589
	590	static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	591	{
1add6781	592	/* save TICNT for anyone using periodic interrupts */
9a654518	593	ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
9f4123b7	594	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671	595	ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 MC	596	ticnt_en_save &= S3C64XX_RTCCON_TICEN;
9f4123b7 MC	597	}
1add6781	598	s3c_rtc_enable(pdev, 0);
f501ed52 VZ	599
	600	if (device_may_wakeup(&pdev->dev))
	601	enable_irq_wake(s3c_rtc_alarmno);
	602
1add6781 BD	603	return 0;
	604	}
	605
	606	static int s3c_rtc_resume(struct platform_device *pdev)
	607	{
9f4123b7 MC	608	unsigned int tmp;
9f4123b7 MC	609
1add6781	610	s3c_rtc_enable(pdev, 1);
9a654518	611	writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
9f4123b7	612	if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
f61ae671 CY	613	tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
f61ae671 CY	614	writew(tmp \| ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
9f4123b7	615	}
f501ed52 VZ	616
	617	if (device_may_wakeup(&pdev->dev))
	618	disable_irq_wake(s3c_rtc_alarmno);
	619
1add6781 BD	620	return 0;
	621	}
	622	#else
	623	#define s3c_rtc_suspend NULL
	624	#define s3c_rtc_resume NULL
	625	#endif
	626
9f4123b7 MC	627	static struct platform_device_id s3c_rtc_driver_ids[] = {
	628	{
	629	.name = "s3c2410-rtc",
	630	.driver_data = TYPE_S3C2410,
	631	}, {
	632	.name = "s3c64xx-rtc",
	633	.driver_data = TYPE_S3C64XX,
	634	},
	635	{ }
	636	};
	637
	638	MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
	639
	640	static struct platform_driver s3c_rtc_driver = {
1add6781	641	.probe = s3c_rtc_probe,
4cd0c5c4	642	.remove = __devexit_p(s3c_rtc_remove),
1add6781 BD	643	.suspend = s3c_rtc_suspend,
1add6781 BD	644	.resume = s3c_rtc_resume,
9f4123b7	645	.id_table = s3c_rtc_driver_ids,
1add6781	646	.driver = {
9f4123b7	647	.name = "s3c-rtc",
1add6781 BD	648	.owner = THIS_MODULE,
	649	},
	650	};
	651
	652	static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
	653
	654	static int __init s3c_rtc_init(void)
	655	{
	656	printk(banner);
9f4123b7	657	return platform_driver_register(&s3c_rtc_driver);
1add6781 BD	658	}
	659
	660	static void __exit s3c_rtc_exit(void)
	661	{
9f4123b7	662	platform_driver_unregister(&s3c_rtc_driver);
1add6781 BD	663	}
	664
	665	module_init(s3c_rtc_init);
	666	module_exit(s3c_rtc_exit);
	667
	668	MODULE_DESCRIPTION("Samsung S3C RTC Driver");
	669	MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
	670	MODULE_LICENSE("GPL");
ad28a07b	671	MODULE_ALIAS("platform:s3c2410-rtc");