[deliverable/linux.git] / drivers / rtc / rtc-s3c.c

/* drivers/rtc/rtc-s3c.c
 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com/
 *
 * Copyright (c) 2004,2006 Simtec Electronics
 *	Ben Dooks, <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
*/

#include <linux/module.h>
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/clk.h>
#include <linux/log2.h>
#include <linux/slab.h>

#include <mach/hardware.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <plat/regs-rtc.h>

enum s3c_cpu_type {
	TYPE_S3C2410,
	TYPE_S3C64XX,
};

/* I have yet to find an S3C implementation with more than one
 * of these rtc blocks in */

static struct resource *s3c_rtc_mem;

static struct clk *rtc_clk;
static void __iomem *s3c_rtc_base;
static int s3c_rtc_alarmno = NO_IRQ;
static int s3c_rtc_tickno  = NO_IRQ;
static bool wake_en;
static enum s3c_cpu_type s3c_rtc_cpu_type;

static DEFINE_SPINLOCK(s3c_rtc_pie_lock);

/* IRQ Handlers */

static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
{
	struct rtc_device *rdev = id;

	clk_enable(rtc_clk);
	rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);

	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
		writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);

	clk_disable(rtc_clk);
	return IRQ_HANDLED;
}

static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
{
	struct rtc_device *rdev = id;

	clk_enable(rtc_clk);
	rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);

	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
		writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);

	clk_disable(rtc_clk);
	return IRQ_HANDLED;
}

/* Update control registers */
static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
{
	unsigned int tmp;

	pr_debug("%s: aie=%d\n", __func__, enabled);

	clk_enable(rtc_clk);
	tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;

	if (enabled)
		tmp |= S3C2410_RTCALM_ALMEN;

	writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
	clk_disable(rtc_clk);

	return 0;
}

static int s3c_rtc_setfreq(struct device *dev, int freq)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	unsigned int tmp = 0;

	if (!is_power_of_2(freq))
		return -EINVAL;

	clk_enable(rtc_clk);
	spin_lock_irq(&s3c_rtc_pie_lock);

	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
		tmp &= S3C2410_TICNT_ENABLE;
	}

	tmp |= (rtc_dev->max_user_freq / freq)-1;

	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
	spin_unlock_irq(&s3c_rtc_pie_lock);
	clk_disable(rtc_clk);

	return 0;
}

/* Time read/write */

static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
{
	unsigned int have_retried = 0;
	void __iomem *base = s3c_rtc_base;

	clk_enable(rtc_clk);
 retry_get_time:
	rtc_tm->tm_min  = readb(base + S3C2410_RTCMIN);
	rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
	rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
	rtc_tm->tm_mon  = readb(base + S3C2410_RTCMON);
	rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
	rtc_tm->tm_sec  = readb(base + S3C2410_RTCSEC);

	/* the only way to work out wether the system was mid-update
	 * when we read it is to check the second counter, and if it
	 * is zero, then we re-try the entire read
	 */

	if (rtc_tm->tm_sec == 0 && !have_retried) {
		have_retried = 1;
		goto retry_get_time;
	}

	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);

	rtc_tm->tm_year += 100;

	pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
		 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
		 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);

	rtc_tm->tm_mon -= 1;

	clk_disable(rtc_clk);
	return rtc_valid_tm(rtc_tm);
}

static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
{
	void __iomem *base = s3c_rtc_base;
	int year = tm->tm_year - 100;

	clk_enable(rtc_clk);
	pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
		 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
		 tm->tm_hour, tm->tm_min, tm->tm_sec);

	/* we get around y2k by simply not supporting it */

	if (year < 0 || year >= 100) {
		dev_err(dev, "rtc only supports 100 years\n");
		return -EINVAL;
	}

	writeb(bin2bcd(tm->tm_sec),  base + S3C2410_RTCSEC);
	writeb(bin2bcd(tm->tm_min),  base + S3C2410_RTCMIN);
	writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
	writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
	writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
	writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
	clk_disable(rtc_clk);

	return 0;
}

static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *alm_tm = &alrm->time;
	void __iomem *base = s3c_rtc_base;
	unsigned int alm_en;

	clk_enable(rtc_clk);
	alm_tm->tm_sec  = readb(base + S3C2410_ALMSEC);
	alm_tm->tm_min  = readb(base + S3C2410_ALMMIN);
	alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
	alm_tm->tm_mon  = readb(base + S3C2410_ALMMON);
	alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
	alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);

	alm_en = readb(base + S3C2410_RTCALM);

	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;

	pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
		 alm_en,
		 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
		 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);


	/* decode the alarm enable field */

	if (alm_en & S3C2410_RTCALM_SECEN)
		alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
	else
		alm_tm->tm_sec = -1;

	if (alm_en & S3C2410_RTCALM_MINEN)
		alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
	else
		alm_tm->tm_min = -1;

	if (alm_en & S3C2410_RTCALM_HOUREN)
		alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
	else
		alm_tm->tm_hour = -1;

	if (alm_en & S3C2410_RTCALM_DAYEN)
		alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
	else
		alm_tm->tm_mday = -1;

	if (alm_en & S3C2410_RTCALM_MONEN) {
		alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
		alm_tm->tm_mon -= 1;
	} else {
		alm_tm->tm_mon = -1;
	}

	if (alm_en & S3C2410_RTCALM_YEAREN)
		alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
	else
		alm_tm->tm_year = -1;

	clk_disable(rtc_clk);
	return 0;
}

static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *tm = &alrm->time;
	void __iomem *base = s3c_rtc_base;
	unsigned int alrm_en;

	clk_enable(rtc_clk);
	pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
		 alrm->enabled,
		 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
		 tm->tm_hour, tm->tm_min, tm->tm_sec);

	alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
	writeb(0x00, base + S3C2410_RTCALM);

	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
		alrm_en |= S3C2410_RTCALM_SECEN;
		writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
	}

	if (tm->tm_min < 60 && tm->tm_min >= 0) {
		alrm_en |= S3C2410_RTCALM_MINEN;
		writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
	}

	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
		alrm_en |= S3C2410_RTCALM_HOUREN;
		writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
	}

	pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);

	writeb(alrm_en, base + S3C2410_RTCALM);

	s3c_rtc_setaie(dev, alrm->enabled);

	clk_disable(rtc_clk);
	return 0;
}

static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
{
	unsigned int ticnt;

	clk_enable(rtc_clk);
	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
		ticnt &= S3C64XX_RTCCON_TICEN;
	} else {
		ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
		ticnt &= S3C2410_TICNT_ENABLE;
	}

	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt  ? "yes" : "no");
	clk_disable(rtc_clk);
	return 0;
}

static const struct rtc_class_ops s3c_rtcops = {
	.read_time	= s3c_rtc_gettime,
	.set_time	= s3c_rtc_settime,
	.read_alarm	= s3c_rtc_getalarm,
	.set_alarm	= s3c_rtc_setalarm,
	.proc		= s3c_rtc_proc,
	.alarm_irq_enable = s3c_rtc_setaie,
};

static void s3c_rtc_enable(struct platform_device *pdev, int en)
{
	void __iomem *base = s3c_rtc_base;
	unsigned int tmp;

	if (s3c_rtc_base == NULL)
		return;

	clk_enable(rtc_clk);
	if (!en) {
		tmp = readw(base + S3C2410_RTCCON);
		if (s3c_rtc_cpu_type == TYPE_S3C64XX)
			tmp &= ~S3C64XX_RTCCON_TICEN;
		tmp &= ~S3C2410_RTCCON_RTCEN;
		writew(tmp, base + S3C2410_RTCCON);

		if (s3c_rtc_cpu_type == TYPE_S3C2410) {
			tmp = readb(base + S3C2410_TICNT);
			tmp &= ~S3C2410_TICNT_ENABLE;
			writeb(tmp, base + S3C2410_TICNT);
		}
	} else {
		/* re-enable the device, and check it is ok */

		if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
			dev_info(&pdev->dev, "rtc disabled, re-enabling\n");

			tmp = readw(base + S3C2410_RTCCON);
			writew(tmp | S3C2410_RTCCON_RTCEN,
				base + S3C2410_RTCCON);
		}

		if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
			dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");

			tmp = readw(base + S3C2410_RTCCON);
			writew(tmp & ~S3C2410_RTCCON_CNTSEL,
				base + S3C2410_RTCCON);
		}

		if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
			dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");

			tmp = readw(base + S3C2410_RTCCON);
			writew(tmp & ~S3C2410_RTCCON_CLKRST,
				base + S3C2410_RTCCON);
		}
	}
	clk_disable(rtc_clk);
}

static int __devexit s3c_rtc_remove(struct platform_device *dev)
{
	struct rtc_device *rtc = platform_get_drvdata(dev);

	free_irq(s3c_rtc_alarmno, rtc);
	free_irq(s3c_rtc_tickno, rtc);

	platform_set_drvdata(dev, NULL);
	rtc_device_unregister(rtc);

	s3c_rtc_setaie(&dev->dev, 0);

	clk_put(rtc_clk);
	rtc_clk = NULL;

	iounmap(s3c_rtc_base);
	release_resource(s3c_rtc_mem);
	kfree(s3c_rtc_mem);

	return 0;
}

static int __devinit s3c_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct rtc_time rtc_tm;
	struct resource *res;
	int ret;

	pr_debug("%s: probe=%p\n", __func__, pdev);

	/* find the IRQs */

	s3c_rtc_tickno = platform_get_irq(pdev, 1);
	if (s3c_rtc_tickno < 0) {
		dev_err(&pdev->dev, "no irq for rtc tick\n");
		return -ENOENT;
	}

	s3c_rtc_alarmno = platform_get_irq(pdev, 0);
	if (s3c_rtc_alarmno < 0) {
		dev_err(&pdev->dev, "no irq for alarm\n");
		return -ENOENT;
	}

	pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
		 s3c_rtc_tickno, s3c_rtc_alarmno);

	/* get the memory region */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL) {
		dev_err(&pdev->dev, "failed to get memory region resource\n");
		return -ENOENT;
	}

	s3c_rtc_mem = request_mem_region(res->start, resource_size(res),
					 pdev->name);

	if (s3c_rtc_mem == NULL) {
		dev_err(&pdev->dev, "failed to reserve memory region\n");
		ret = -ENOENT;
		goto err_nores;
	}

	s3c_rtc_base = ioremap(res->start, resource_size(res));
	if (s3c_rtc_base == NULL) {
		dev_err(&pdev->dev, "failed ioremap()\n");
		ret = -EINVAL;
		goto err_nomap;
	}

	rtc_clk = clk_get(&pdev->dev, "rtc");
	if (IS_ERR(rtc_clk)) {
		dev_err(&pdev->dev, "failed to find rtc clock source\n");
		ret = PTR_ERR(rtc_clk);
		rtc_clk = NULL;
		goto err_clk;
	}

	clk_enable(rtc_clk);

	/* check to see if everything is setup correctly */

	s3c_rtc_enable(pdev, 1);

	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
		 readw(s3c_rtc_base + S3C2410_RTCCON));

	device_init_wakeup(&pdev->dev, 1);

	/* register RTC and exit */

	rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
				  THIS_MODULE);

	if (IS_ERR(rtc)) {
		dev_err(&pdev->dev, "cannot attach rtc\n");
		ret = PTR_ERR(rtc);
		goto err_nortc;
	}

	s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;

	/* Check RTC Time */

	s3c_rtc_gettime(NULL, &rtc_tm);

	if (rtc_valid_tm(&rtc_tm)) {
		rtc_tm.tm_year	= 100;
		rtc_tm.tm_mon	= 0;
		rtc_tm.tm_mday	= 1;
		rtc_tm.tm_hour	= 0;
		rtc_tm.tm_min	= 0;
		rtc_tm.tm_sec	= 0;

		s3c_rtc_settime(NULL, &rtc_tm);

		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
	}

	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
		rtc->max_user_freq = 32768;
	else
		rtc->max_user_freq = 128;

	platform_set_drvdata(pdev, rtc);

	s3c_rtc_setfreq(&pdev->dev, 1);

	ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
			  IRQF_DISABLED,  "s3c2410-rtc alarm", rtc);
	if (ret) {
		dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
		goto err_alarm_irq;
	}

	ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
			  IRQF_DISABLED,  "s3c2410-rtc tick", rtc);
	if (ret) {
		dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
		free_irq(s3c_rtc_alarmno, rtc);
		goto err_tick_irq;
	}

	clk_disable(rtc_clk);

	return 0;

 err_tick_irq:
	free_irq(s3c_rtc_alarmno, rtc);

 err_alarm_irq:
	platform_set_drvdata(pdev, NULL);
	rtc_device_unregister(rtc);

 err_nortc:
	s3c_rtc_enable(pdev, 0);
	clk_disable(rtc_clk);
	clk_put(rtc_clk);

 err_clk:
	iounmap(s3c_rtc_base);

 err_nomap:
	release_resource(s3c_rtc_mem);

 err_nores:
	return ret;
}

#ifdef CONFIG_PM

/* RTC Power management control */

static int ticnt_save, ticnt_en_save;

static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	clk_enable(rtc_clk);
	/* save TICNT for anyone using periodic interrupts */
	ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
		ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
		ticnt_en_save &= S3C64XX_RTCCON_TICEN;
	}
	s3c_rtc_enable(pdev, 0);

	if (device_may_wakeup(&pdev->dev) && !wake_en) {
		if (enable_irq_wake(s3c_rtc_alarmno) == 0)
			wake_en = true;
		else
			dev_err(&pdev->dev, "enable_irq_wake failed\n");
	}
	clk_disable(rtc_clk);

	return 0;
}

static int s3c_rtc_resume(struct platform_device *pdev)
{
	unsigned int tmp;

	clk_enable(rtc_clk);
	s3c_rtc_enable(pdev, 1);
	writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
	if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
		writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
	}

	if (device_may_wakeup(&pdev->dev) && wake_en) {
		disable_irq_wake(s3c_rtc_alarmno);
		wake_en = false;
	}
	clk_disable(rtc_clk);

	return 0;
}
#else
#define s3c_rtc_suspend NULL
#define s3c_rtc_resume  NULL
#endif

static struct platform_device_id s3c_rtc_driver_ids[] = {
	{
		.name		= "s3c2410-rtc",
		.driver_data	= TYPE_S3C2410,
	}, {
		.name		= "s3c64xx-rtc",
		.driver_data	= TYPE_S3C64XX,
	},
	{ }
};

MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);

static struct platform_driver s3c_rtc_driver = {
	.probe		= s3c_rtc_probe,
	.remove		= __devexit_p(s3c_rtc_remove),
	.suspend	= s3c_rtc_suspend,
	.resume		= s3c_rtc_resume,
	.id_table	= s3c_rtc_driver_ids,
	.driver		= {
		.name	= "s3c-rtc",
		.owner	= THIS_MODULE,
	},
};

static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";

static int __init s3c_rtc_init(void)
{
	printk(banner);
	return platform_driver_register(&s3c_rtc_driver);
}

static void __exit s3c_rtc_exit(void)
{
	platform_driver_unregister(&s3c_rtc_driver);
}

module_init(s3c_rtc_init);
module_exit(s3c_rtc_exit);

MODULE_DESCRIPTION("Samsung S3C RTC Driver");
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:s3c2410-rtc");
Commit	Line	Data
1add6781	1	/* drivers/rtc/rtc-s3c.c
e48add8c AD	2	*
	3	* Copyright (c) 2010 Samsung Electronics Co., Ltd.
	4	* http://www.samsung.com/
1add6781 BD	5	*
	6	* Copyright (c) 2004,2006 Simtec Electronics
	7	* Ben Dooks, <ben@simtec.co.uk>
	8	* http://armlinux.simtec.co.uk/
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* S3C2410/S3C2440/S3C24XX Internal RTC Driver
	15	*/
	16
	17	#include <linux/module.h>
	18	#include <linux/fs.h>
	19	#include <linux/string.h>
	20	#include <linux/init.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/rtc.h>
	24	#include <linux/bcd.h>
	25	#include <linux/clk.h>
9974b6ea	26	#include <linux/log2.h>
5a0e3ad6	27	#include <linux/slab.h>
1add6781	28
a09e64fb	29	#include <mach/hardware.h>
1add6781 BD	30	#include <asm/uaccess.h>
	31	#include <asm/io.h>
	32	#include <asm/irq.h>
e2cd00cf	33	#include <plat/regs-rtc.h>
1add6781	34
9f4123b7 MC	35	enum s3c_cpu_type {
	36	TYPE_S3C2410,
	37	TYPE_S3C64XX,
	38	};
	39
1add6781 BD	40	/* I have yet to find an S3C implementation with more than one
	41	* of these rtc blocks in */
	42
	43	static struct resource *s3c_rtc_mem;
	44
e48add8c	45	static struct clk *rtc_clk;
1add6781 BD	46	static void __iomem *s3c_rtc_base;
	47	static int s3c_rtc_alarmno = NO_IRQ;
	48	static int s3c_rtc_tickno = NO_IRQ;
52cd4e5c	49	static bool wake_en;
9f4123b7	50	static enum s3c_cpu_type s3c_rtc_cpu_type;
1add6781 BD	51
1add6781 BD	52	static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
1add6781 BD	53
	54	/* IRQ Handlers */
	55
7d12e780	56	static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 BD	57	{
	58	struct rtc_device *rdev = id;
	59
cefe4fbb	60	clk_enable(rtc_clk);
ab6a2d70	61	rtc_update_irq(rdev, 1, RTC_AF \| RTC_IRQF);
2f3478f6 AD	62
	63	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	64	writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
	65
cefe4fbb	66	clk_disable(rtc_clk);
1add6781 BD	67	return IRQ_HANDLED;
	68	}
	69
7d12e780	70	static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 BD	71	{
	72	struct rtc_device *rdev = id;
	73
cefe4fbb	74	clk_enable(rtc_clk);
773be7ee	75	rtc_update_irq(rdev, 1, RTC_PF \| RTC_IRQF);
2f3478f6 AD	76
	77	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	78	writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
	79
cefe4fbb	80	clk_disable(rtc_clk);
1add6781 BD	81	return IRQ_HANDLED;
	82	}
	83
	84	/* Update control registers */
2ec38a03	85	static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781 BD	86	{
	87	unsigned int tmp;
	88
2ec38a03	89	pr_debug("%s: aie=%d\n", __func__, enabled);
1add6781	90
cefe4fbb	91	clk_enable(rtc_clk);
9a654518	92	tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781	93
2ec38a03	94	if (enabled)
1add6781 BD	95	tmp \|= S3C2410_RTCALM_ALMEN;
1add6781 BD	96
9a654518	97	writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
cefe4fbb	98	clk_disable(rtc_clk);
2ec38a03 AL	99
2ec38a03 AL	100	return 0;
1add6781 BD	101	}
1add6781 BD	102
773be7ee	103	static int s3c_rtc_setfreq(struct device *dev, int freq)
1add6781	104	{
9f4123b7 MC	105	struct platform_device *pdev = to_platform_device(dev);
	106	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
	107	unsigned int tmp = 0;
1add6781	108
5d2a5037 JC	109	if (!is_power_of_2(freq))
	110	return -EINVAL;
	111
cefe4fbb	112	clk_enable(rtc_clk);
1add6781	113	spin_lock_irq(&s3c_rtc_pie_lock);
1add6781	114
9f4123b7 MC	115	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
	116	tmp = readb(s3c_rtc_base + S3C2410_TICNT);
	117	tmp &= S3C2410_TICNT_ENABLE;
	118	}
	119
	120	tmp \|= (rtc_dev->max_user_freq / freq)-1;
1add6781	121
2f3478f6	122	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
1add6781	123	spin_unlock_irq(&s3c_rtc_pie_lock);
cefe4fbb	124	clk_disable(rtc_clk);
773be7ee BD	125
773be7ee BD	126	return 0;
1add6781 BD	127	}
	128
	129	/* Time read/write */
	130
	131	static int s3c_rtc_gettime(struct device dev, struct rtc_time rtc_tm)
	132	{
	133	unsigned int have_retried = 0;
9a654518	134	void __iomem *base = s3c_rtc_base;
1add6781	135
cefe4fbb	136	clk_enable(rtc_clk);
1add6781	137	retry_get_time:
9a654518 BD	138	rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
	139	rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
	140	rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
	141	rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
	142	rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
	143	rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
1add6781 BD	144
	145	/* the only way to work out wether the system was mid-update
	146	* when we read it is to check the second counter, and if it
	147	* is zero, then we re-try the entire read
	148	*/
	149
	150	if (rtc_tm->tm_sec == 0 && !have_retried) {
	151	have_retried = 1;
	152	goto retry_get_time;
	153	}
	154
fe20ba70 AB	155	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	156	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	157	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	158	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	159	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	160	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781 BD	161
1add6781 BD	162	rtc_tm->tm_year += 100;
4e8896cd MH	163
	164	pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
	165	1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
	166	rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
	167
1add6781 BD	168	rtc_tm->tm_mon -= 1;
1add6781 BD	169
cefe4fbb	170	clk_disable(rtc_clk);
5b3ffddd	171	return rtc_valid_tm(rtc_tm);
1add6781 BD	172	}
	173
	174	static int s3c_rtc_settime(struct device dev, struct rtc_time tm)
	175	{
9a654518	176	void __iomem *base = s3c_rtc_base;
641741e0	177	int year = tm->tm_year - 100;
9a654518	178
cefe4fbb	179	clk_enable(rtc_clk);
30ffc40c KK	180	pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
30ffc40c KK	181	1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0 BD	182	tm->tm_hour, tm->tm_min, tm->tm_sec);
	183
	184	/* we get around y2k by simply not supporting it */
1add6781	185
641741e0	186	if (year < 0 \|\| year >= 100) {
9a654518	187	dev_err(dev, "rtc only supports 100 years\n");
1add6781	188	return -EINVAL;
9a654518 BD	189	}
9a654518 BD	190
fe20ba70 AB	191	writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
	192	writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
	193	writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
	194	writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
	195	writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
	196	writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
cefe4fbb	197	clk_disable(rtc_clk);
1add6781 BD	198
	199	return 0;
	200	}
	201
	202	static int s3c_rtc_getalarm(struct device dev, struct rtc_wkalrm alrm)
	203	{
	204	struct rtc_time *alm_tm = &alrm->time;
9a654518	205	void __iomem *base = s3c_rtc_base;
1add6781 BD	206	unsigned int alm_en;
1add6781 BD	207
cefe4fbb	208	clk_enable(rtc_clk);
9a654518 BD	209	alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
	210	alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
	211	alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
	212	alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
	213	alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
	214	alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
1add6781	215
9a654518	216	alm_en = readb(base + S3C2410_RTCALM);
1add6781	217
a2db8dfc DB	218	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
a2db8dfc DB	219
30ffc40c	220	pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781	221	alm_en,
30ffc40c	222	1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781 BD	223	alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
	224
	225
	226	/* decode the alarm enable field */
	227
	228	if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70	229	alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781	230	else
dd061d1a	231	alm_tm->tm_sec = -1;
1add6781 BD	232
1add6781 BD	233	if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70	234	alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781	235	else
dd061d1a	236	alm_tm->tm_min = -1;
1add6781 BD	237
1add6781 BD	238	if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70	239	alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781	240	else
dd061d1a	241	alm_tm->tm_hour = -1;
1add6781 BD	242
1add6781 BD	243	if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70	244	alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781	245	else
dd061d1a	246	alm_tm->tm_mday = -1;
1add6781 BD	247
1add6781 BD	248	if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70	249	alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781 BD	250	alm_tm->tm_mon -= 1;
1add6781 BD	251	} else {
dd061d1a	252	alm_tm->tm_mon = -1;
1add6781 BD	253	}
	254
	255	if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70	256	alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781	257	else
dd061d1a	258	alm_tm->tm_year = -1;
1add6781	259
cefe4fbb	260	clk_disable(rtc_clk);
1add6781 BD	261	return 0;
	262	}
	263
	264	static int s3c_rtc_setalarm(struct device dev, struct rtc_wkalrm alrm)
	265	{
	266	struct rtc_time *tm = &alrm->time;
9a654518	267	void __iomem *base = s3c_rtc_base;
1add6781 BD	268	unsigned int alrm_en;
1add6781 BD	269
cefe4fbb	270	clk_enable(rtc_clk);
30ffc40c	271	pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781	272	alrm->enabled,
4e8896cd	273	1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
30ffc40c	274	tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781	275
9a654518 BD	276	alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
9a654518 BD	277	writeb(0x00, base + S3C2410_RTCALM);
1add6781 BD	278
	279	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
	280	alrm_en \|= S3C2410_RTCALM_SECEN;
fe20ba70	281	writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
1add6781 BD	282	}
	283
	284	if (tm->tm_min < 60 && tm->tm_min >= 0) {
	285	alrm_en \|= S3C2410_RTCALM_MINEN;
fe20ba70	286	writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
1add6781 BD	287	}
	288
	289	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
	290	alrm_en \|= S3C2410_RTCALM_HOUREN;
fe20ba70	291	writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
1add6781 BD	292	}
	293
	294	pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
	295
9a654518	296	writeb(alrm_en, base + S3C2410_RTCALM);
1add6781	297
2ec38a03	298	s3c_rtc_setaie(dev, alrm->enabled);
1add6781	299
cefe4fbb	300	clk_disable(rtc_clk);
1add6781 BD	301	return 0;
	302	}
	303
1add6781 BD	304	static int s3c_rtc_proc(struct device dev, struct seq_file seq)
1add6781 BD	305	{
9f4123b7	306	unsigned int ticnt;
1add6781	307
cefe4fbb	308	clk_enable(rtc_clk);
9f4123b7	309	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671	310	ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 MC	311	ticnt &= S3C64XX_RTCCON_TICEN;
	312	} else {
	313	ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
	314	ticnt &= S3C2410_TICNT_ENABLE;
	315	}
	316
	317	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
cefe4fbb	318	clk_disable(rtc_clk);
1add6781 BD	319	return 0;
	320	}
	321
ff8371ac	322	static const struct rtc_class_ops s3c_rtcops = {
1add6781 BD	323	.read_time = s3c_rtc_gettime,
	324	.set_time = s3c_rtc_settime,
	325	.read_alarm = s3c_rtc_getalarm,
	326	.set_alarm = s3c_rtc_setalarm,
e6eb524e CY	327	.proc = s3c_rtc_proc,
e6eb524e CY	328	.alarm_irq_enable = s3c_rtc_setaie,
1add6781 BD	329	};
	330
	331	static void s3c_rtc_enable(struct platform_device *pdev, int en)
	332	{
9a654518	333	void __iomem *base = s3c_rtc_base;
1add6781 BD	334	unsigned int tmp;
	335
	336	if (s3c_rtc_base == NULL)
	337	return;
	338
cefe4fbb	339	clk_enable(rtc_clk);
1add6781	340	if (!en) {
f61ae671	341	tmp = readw(base + S3C2410_RTCCON);
9f4123b7 MC	342	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	343	tmp &= ~S3C64XX_RTCCON_TICEN;
	344	tmp &= ~S3C2410_RTCCON_RTCEN;
f61ae671	345	writew(tmp, base + S3C2410_RTCCON);
9f4123b7 MC	346
	347	if (s3c_rtc_cpu_type == TYPE_S3C2410) {
	348	tmp = readb(base + S3C2410_TICNT);
	349	tmp &= ~S3C2410_TICNT_ENABLE;
	350	writeb(tmp, base + S3C2410_TICNT);
	351	}
1add6781 BD	352	} else {
	353	/* re-enable the device, and check it is ok */
	354
f61ae671	355	if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
1add6781 BD	356	dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
1add6781 BD	357
f61ae671 CY	358	tmp = readw(base + S3C2410_RTCCON);
	359	writew(tmp \| S3C2410_RTCCON_RTCEN,
	360	base + S3C2410_RTCCON);
1add6781 BD	361	}
1add6781 BD	362
f61ae671	363	if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
1add6781 BD	364	dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
1add6781 BD	365
f61ae671 CY	366	tmp = readw(base + S3C2410_RTCCON);
	367	writew(tmp & ~S3C2410_RTCCON_CNTSEL,
	368	base + S3C2410_RTCCON);
1add6781 BD	369	}
1add6781 BD	370
f61ae671	371	if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
1add6781 BD	372	dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
1add6781 BD	373
f61ae671 CY	374	tmp = readw(base + S3C2410_RTCCON);
	375	writew(tmp & ~S3C2410_RTCCON_CLKRST,
	376	base + S3C2410_RTCCON);
1add6781 BD	377	}
1add6781 BD	378	}
cefe4fbb	379	clk_disable(rtc_clk);
1add6781 BD	380	}
1add6781 BD	381
4cd0c5c4	382	static int __devexit s3c_rtc_remove(struct platform_device *dev)
1add6781 BD	383	{
	384	struct rtc_device *rtc = platform_get_drvdata(dev);
	385
62d17601 MH	386	free_irq(s3c_rtc_alarmno, rtc);
	387	free_irq(s3c_rtc_tickno, rtc);
	388
1add6781 BD	389	platform_set_drvdata(dev, NULL);
	390	rtc_device_unregister(rtc);
	391
2ec38a03	392	s3c_rtc_setaie(&dev->dev, 0);
1add6781	393
e48add8c AD	394	clk_put(rtc_clk);
	395	rtc_clk = NULL;
	396
1add6781 BD	397	iounmap(s3c_rtc_base);
	398	release_resource(s3c_rtc_mem);
	399	kfree(s3c_rtc_mem);
	400
	401	return 0;
	402	}
	403
4cd0c5c4	404	static int __devinit s3c_rtc_probe(struct platform_device *pdev)
1add6781 BD	405	{
1add6781 BD	406	struct rtc_device *rtc;
e1df962e	407	struct rtc_time rtc_tm;
1add6781 BD	408	struct resource *res;
	409	int ret;
	410
2a4e2b87	411	pr_debug("%s: probe=%p\n", __func__, pdev);
1add6781 BD	412
	413	/* find the IRQs */
	414
	415	s3c_rtc_tickno = platform_get_irq(pdev, 1);
	416	if (s3c_rtc_tickno < 0) {
	417	dev_err(&pdev->dev, "no irq for rtc tick\n");
	418	return -ENOENT;
	419	}
	420
	421	s3c_rtc_alarmno = platform_get_irq(pdev, 0);
	422	if (s3c_rtc_alarmno < 0) {
	423	dev_err(&pdev->dev, "no irq for alarm\n");
	424	return -ENOENT;
	425	}
	426
	427	pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
	428	s3c_rtc_tickno, s3c_rtc_alarmno);
	429
	430	/* get the memory region */
	431
	432	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	433	if (res == NULL) {
	434	dev_err(&pdev->dev, "failed to get memory region resource\n");
	435	return -ENOENT;
	436	}
	437
28f65c11	438	s3c_rtc_mem = request_mem_region(res->start, resource_size(res),
9a654518	439	pdev->name);
1add6781 BD	440
	441	if (s3c_rtc_mem == NULL) {
	442	dev_err(&pdev->dev, "failed to reserve memory region\n");
	443	ret = -ENOENT;
	444	goto err_nores;
	445	}
	446
28f65c11	447	s3c_rtc_base = ioremap(res->start, resource_size(res));
1add6781 BD	448	if (s3c_rtc_base == NULL) {
	449	dev_err(&pdev->dev, "failed ioremap()\n");
	450	ret = -EINVAL;
	451	goto err_nomap;
	452	}
	453
e48add8c AD	454	rtc_clk = clk_get(&pdev->dev, "rtc");
	455	if (IS_ERR(rtc_clk)) {
	456	dev_err(&pdev->dev, "failed to find rtc clock source\n");
	457	ret = PTR_ERR(rtc_clk);
	458	rtc_clk = NULL;
	459	goto err_clk;
	460	}
	461
	462	clk_enable(rtc_clk);
	463
1add6781 BD	464	/* check to see if everything is setup correctly */
	465
	466	s3c_rtc_enable(pdev, 1);
	467
f61ae671 CY	468	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
f61ae671 CY	469	readw(s3c_rtc_base + S3C2410_RTCCON));
1add6781	470
51b7616e YK	471	device_init_wakeup(&pdev->dev, 1);
51b7616e YK	472
1add6781 BD	473	/* register RTC and exit */
	474
	475	rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
	476	THIS_MODULE);
	477
	478	if (IS_ERR(rtc)) {
	479	dev_err(&pdev->dev, "cannot attach rtc\n");
	480	ret = PTR_ERR(rtc);
	481	goto err_nortc;
	482	}
	483
eaa6e4dd MC	484	s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
eaa6e4dd MC	485
051fe54e TK	486	/* Check RTC Time */
051fe54e TK	487
e1df962e	488	s3c_rtc_gettime(NULL, &rtc_tm);
051fe54e	489
e1df962e CY	490	if (rtc_valid_tm(&rtc_tm)) {
	491	rtc_tm.tm_year = 100;
	492	rtc_tm.tm_mon = 0;
	493	rtc_tm.tm_mday = 1;
	494	rtc_tm.tm_hour = 0;
	495	rtc_tm.tm_min = 0;
	496	rtc_tm.tm_sec = 0;
	497
	498	s3c_rtc_settime(NULL, &rtc_tm);
	499
	500	dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
051fe54e TK	501	}
051fe54e TK	502
9f4123b7 MC	503	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
	504	rtc->max_user_freq = 32768;
	505	else
	506	rtc->max_user_freq = 128;
	507
1add6781	508	platform_set_drvdata(pdev, rtc);
e893de59 MC	509
	510	s3c_rtc_setfreq(&pdev->dev, 1);
	511
62d17601 MH	512	ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
	513	IRQF_DISABLED, "s3c2410-rtc alarm", rtc);
	514	if (ret) {
	515	dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
	516	goto err_alarm_irq;
	517	}
	518
	519	ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
	520	IRQF_DISABLED, "s3c2410-rtc tick", rtc);
	521	if (ret) {
	522	dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
	523	free_irq(s3c_rtc_alarmno, rtc);
	524	goto err_tick_irq;
	525	}
	526
cefe4fbb DK	527	clk_disable(rtc_clk);
cefe4fbb DK	528
1add6781 BD	529	return 0;
1add6781 BD	530
62d17601 MH	531	err_tick_irq:
	532	free_irq(s3c_rtc_alarmno, rtc);
	533
	534	err_alarm_irq:
	535	platform_set_drvdata(pdev, NULL);
	536	rtc_device_unregister(rtc);
	537
1add6781 BD	538	err_nortc:
1add6781 BD	539	s3c_rtc_enable(pdev, 0);
e48add8c AD	540	clk_disable(rtc_clk);
	541	clk_put(rtc_clk);
	542
	543	err_clk:
1add6781 BD	544	iounmap(s3c_rtc_base);
	545
	546	err_nomap:
	547	release_resource(s3c_rtc_mem);
	548
	549	err_nores:
	550	return ret;
	551	}
	552
	553	#ifdef CONFIG_PM
	554
	555	/* RTC Power management control */
	556
9f4123b7	557	static int ticnt_save, ticnt_en_save;
1add6781 BD	558
	559	static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
	560	{
cefe4fbb	561	clk_enable(rtc_clk);
1add6781	562	/* save TICNT for anyone using periodic interrupts */
9a654518	563	ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
9f4123b7	564	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671	565	ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 MC	566	ticnt_en_save &= S3C64XX_RTCCON_TICEN;
9f4123b7 MC	567	}
1add6781	568	s3c_rtc_enable(pdev, 0);
f501ed52	569
52cd4e5c BD	570	if (device_may_wakeup(&pdev->dev) && !wake_en) {
	571	if (enable_irq_wake(s3c_rtc_alarmno) == 0)
	572	wake_en = true;
	573	else
	574	dev_err(&pdev->dev, "enable_irq_wake failed\n");
	575	}
cefe4fbb	576	clk_disable(rtc_clk);
f501ed52	577
1add6781 BD	578	return 0;
	579	}
	580
	581	static int s3c_rtc_resume(struct platform_device *pdev)
	582	{
9f4123b7 MC	583	unsigned int tmp;
9f4123b7 MC	584
cefe4fbb	585	clk_enable(rtc_clk);
1add6781	586	s3c_rtc_enable(pdev, 1);
9a654518	587	writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
9f4123b7	588	if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
f61ae671 CY	589	tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
f61ae671 CY	590	writew(tmp \| ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
9f4123b7	591	}
f501ed52	592
52cd4e5c	593	if (device_may_wakeup(&pdev->dev) && wake_en) {
f501ed52	594	disable_irq_wake(s3c_rtc_alarmno);
52cd4e5c BD	595	wake_en = false;
52cd4e5c BD	596	}
cefe4fbb	597	clk_disable(rtc_clk);
f501ed52	598
1add6781 BD	599	return 0;
	600	}
	601	#else
	602	#define s3c_rtc_suspend NULL
	603	#define s3c_rtc_resume NULL
	604	#endif
	605
9f4123b7 MC	606	static struct platform_device_id s3c_rtc_driver_ids[] = {
	607	{
	608	.name = "s3c2410-rtc",
	609	.driver_data = TYPE_S3C2410,
	610	}, {
	611	.name = "s3c64xx-rtc",
	612	.driver_data = TYPE_S3C64XX,
	613	},
	614	{ }
	615	};
	616
	617	MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
	618
	619	static struct platform_driver s3c_rtc_driver = {
1add6781	620	.probe = s3c_rtc_probe,
4cd0c5c4	621	.remove = __devexit_p(s3c_rtc_remove),
1add6781 BD	622	.suspend = s3c_rtc_suspend,
1add6781 BD	623	.resume = s3c_rtc_resume,
9f4123b7	624	.id_table = s3c_rtc_driver_ids,
1add6781	625	.driver = {
9f4123b7	626	.name = "s3c-rtc",
1add6781 BD	627	.owner = THIS_MODULE,
	628	},
	629	};
	630
	631	static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
	632
	633	static int __init s3c_rtc_init(void)
	634	{
	635	printk(banner);
9f4123b7	636	return platform_driver_register(&s3c_rtc_driver);
1add6781 BD	637	}
	638
	639	static void __exit s3c_rtc_exit(void)
	640	{
9f4123b7	641	platform_driver_unregister(&s3c_rtc_driver);
1add6781 BD	642	}
	643
	644	module_init(s3c_rtc_init);
	645	module_exit(s3c_rtc_exit);
	646
	647	MODULE_DESCRIPTION("Samsung S3C RTC Driver");
	648	MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
	649	MODULE_LICENSE("GPL");
ad28a07b	650	MODULE_ALIAS("platform:s3c2410-rtc");