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1add6781 BD |
1 | /* drivers/rtc/rtc-s3c.c |
2 | * | |
3 | * Copyright (c) 2004,2006 Simtec Electronics | |
4 | * Ben Dooks, <ben@simtec.co.uk> | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/clk.h> | |
23 | ||
24 | #include <asm/hardware.h> | |
25 | #include <asm/uaccess.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/irq.h> | |
28 | #include <asm/rtc.h> | |
29 | ||
30 | #include <asm/mach/time.h> | |
31 | ||
32 | #include <asm/arch/regs-rtc.h> | |
33 | ||
34 | /* I have yet to find an S3C implementation with more than one | |
35 | * of these rtc blocks in */ | |
36 | ||
37 | static struct resource *s3c_rtc_mem; | |
38 | ||
39 | static void __iomem *s3c_rtc_base; | |
40 | static int s3c_rtc_alarmno = NO_IRQ; | |
41 | static int s3c_rtc_tickno = NO_IRQ; | |
42 | static int s3c_rtc_freq = 1; | |
43 | ||
44 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | |
45 | static unsigned int tick_count; | |
46 | ||
47 | /* IRQ Handlers */ | |
48 | ||
49 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id, struct pt_regs *r) | |
50 | { | |
51 | struct rtc_device *rdev = id; | |
52 | ||
53 | rtc_update_irq(&rdev->class_dev, 1, RTC_AF | RTC_IRQF); | |
54 | return IRQ_HANDLED; | |
55 | } | |
56 | ||
57 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id, struct pt_regs *r) | |
58 | { | |
59 | struct rtc_device *rdev = id; | |
60 | ||
61 | rtc_update_irq(&rdev->class_dev, tick_count++, RTC_PF | RTC_IRQF); | |
62 | return IRQ_HANDLED; | |
63 | } | |
64 | ||
65 | /* Update control registers */ | |
66 | static void s3c_rtc_setaie(int to) | |
67 | { | |
68 | unsigned int tmp; | |
69 | ||
70 | pr_debug("%s: aie=%d\n", __FUNCTION__, to); | |
71 | ||
9a654518 | 72 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
1add6781 BD |
73 | |
74 | if (to) | |
75 | tmp |= S3C2410_RTCALM_ALMEN; | |
76 | ||
9a654518 | 77 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
1add6781 BD |
78 | } |
79 | ||
80 | static void s3c_rtc_setpie(int to) | |
81 | { | |
82 | unsigned int tmp; | |
83 | ||
84 | pr_debug("%s: pie=%d\n", __FUNCTION__, to); | |
85 | ||
86 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 87 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE; |
1add6781 BD |
88 | |
89 | if (to) | |
90 | tmp |= S3C2410_TICNT_ENABLE; | |
91 | ||
9a654518 | 92 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
93 | spin_unlock_irq(&s3c_rtc_pie_lock); |
94 | } | |
95 | ||
96 | static void s3c_rtc_setfreq(int freq) | |
97 | { | |
98 | unsigned int tmp; | |
99 | ||
100 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 101 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE; |
1add6781 BD |
102 | |
103 | s3c_rtc_freq = freq; | |
104 | ||
105 | tmp |= (128 / freq)-1; | |
106 | ||
9a654518 | 107 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
108 | spin_unlock_irq(&s3c_rtc_pie_lock); |
109 | } | |
110 | ||
111 | /* Time read/write */ | |
112 | ||
113 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | |
114 | { | |
115 | unsigned int have_retried = 0; | |
9a654518 | 116 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
117 | |
118 | retry_get_time: | |
9a654518 BD |
119 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); |
120 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
121 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
122 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
123 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
124 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
1add6781 BD |
125 | |
126 | /* the only way to work out wether the system was mid-update | |
127 | * when we read it is to check the second counter, and if it | |
128 | * is zero, then we re-try the entire read | |
129 | */ | |
130 | ||
131 | if (rtc_tm->tm_sec == 0 && !have_retried) { | |
132 | have_retried = 1; | |
133 | goto retry_get_time; | |
134 | } | |
135 | ||
136 | pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | |
137 | rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | |
138 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); | |
139 | ||
140 | BCD_TO_BIN(rtc_tm->tm_sec); | |
141 | BCD_TO_BIN(rtc_tm->tm_min); | |
142 | BCD_TO_BIN(rtc_tm->tm_hour); | |
143 | BCD_TO_BIN(rtc_tm->tm_mday); | |
144 | BCD_TO_BIN(rtc_tm->tm_mon); | |
145 | BCD_TO_BIN(rtc_tm->tm_year); | |
146 | ||
147 | rtc_tm->tm_year += 100; | |
148 | rtc_tm->tm_mon -= 1; | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
154 | { | |
9a654518 BD |
155 | void __iomem *base = s3c_rtc_base; |
156 | ||
1add6781 BD |
157 | /* the rtc gets round the y2k problem by just not supporting it */ |
158 | ||
9a654518 BD |
159 | if (tm->tm_year > 100) { |
160 | dev_err(dev, "rtc only supports 100 years\n"); | |
1add6781 | 161 | return -EINVAL; |
9a654518 BD |
162 | } |
163 | ||
164 | pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", | |
165 | tm->tm_year, tm->tm_mon, tm->tm_mday, | |
166 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
1add6781 | 167 | |
9a654518 BD |
168 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC); |
169 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN); | |
170 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR); | |
171 | writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE); | |
172 | writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON); | |
173 | writeb(BIN2BCD(tm->tm_year - 100), base + S3C2410_RTCYEAR); | |
1add6781 BD |
174 | |
175 | return 0; | |
176 | } | |
177 | ||
178 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
179 | { | |
180 | struct rtc_time *alm_tm = &alrm->time; | |
9a654518 | 181 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
182 | unsigned int alm_en; |
183 | ||
9a654518 BD |
184 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); |
185 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | |
186 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | |
187 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | |
188 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | |
189 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | |
1add6781 | 190 | |
9a654518 | 191 | alm_en = readb(base + S3C2410_RTCALM); |
1add6781 BD |
192 | |
193 | pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", | |
194 | alm_en, | |
195 | alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, | |
196 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); | |
197 | ||
198 | ||
199 | /* decode the alarm enable field */ | |
200 | ||
201 | if (alm_en & S3C2410_RTCALM_SECEN) | |
202 | BCD_TO_BIN(alm_tm->tm_sec); | |
203 | else | |
204 | alm_tm->tm_sec = 0xff; | |
205 | ||
206 | if (alm_en & S3C2410_RTCALM_MINEN) | |
207 | BCD_TO_BIN(alm_tm->tm_min); | |
208 | else | |
209 | alm_tm->tm_min = 0xff; | |
210 | ||
211 | if (alm_en & S3C2410_RTCALM_HOUREN) | |
212 | BCD_TO_BIN(alm_tm->tm_hour); | |
213 | else | |
214 | alm_tm->tm_hour = 0xff; | |
215 | ||
216 | if (alm_en & S3C2410_RTCALM_DAYEN) | |
217 | BCD_TO_BIN(alm_tm->tm_mday); | |
218 | else | |
219 | alm_tm->tm_mday = 0xff; | |
220 | ||
221 | if (alm_en & S3C2410_RTCALM_MONEN) { | |
222 | BCD_TO_BIN(alm_tm->tm_mon); | |
223 | alm_tm->tm_mon -= 1; | |
224 | } else { | |
225 | alm_tm->tm_mon = 0xff; | |
226 | } | |
227 | ||
228 | if (alm_en & S3C2410_RTCALM_YEAREN) | |
229 | BCD_TO_BIN(alm_tm->tm_year); | |
230 | else | |
231 | alm_tm->tm_year = 0xffff; | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
236 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
237 | { | |
238 | struct rtc_time *tm = &alrm->time; | |
9a654518 | 239 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
240 | unsigned int alrm_en; |
241 | ||
242 | pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | |
243 | alrm->enabled, | |
244 | tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | |
245 | tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | |
246 | ||
247 | ||
9a654518 BD |
248 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
249 | writeb(0x00, base + S3C2410_RTCALM); | |
1add6781 BD |
250 | |
251 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | |
252 | alrm_en |= S3C2410_RTCALM_SECEN; | |
9a654518 | 253 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC); |
1add6781 BD |
254 | } |
255 | ||
256 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | |
257 | alrm_en |= S3C2410_RTCALM_MINEN; | |
9a654518 | 258 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN); |
1add6781 BD |
259 | } |
260 | ||
261 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | |
262 | alrm_en |= S3C2410_RTCALM_HOUREN; | |
9a654518 | 263 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR); |
1add6781 BD |
264 | } |
265 | ||
266 | pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); | |
267 | ||
9a654518 | 268 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 BD |
269 | |
270 | if (0) { | |
9a654518 | 271 | alrm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 272 | alrm_en &= ~S3C2410_RTCALM_ALMEN; |
9a654518 | 273 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 BD |
274 | disable_irq_wake(s3c_rtc_alarmno); |
275 | } | |
276 | ||
277 | if (alrm->enabled) | |
278 | enable_irq_wake(s3c_rtc_alarmno); | |
279 | else | |
280 | disable_irq_wake(s3c_rtc_alarmno); | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
285 | static int s3c_rtc_ioctl(struct device *dev, | |
286 | unsigned int cmd, unsigned long arg) | |
287 | { | |
288 | unsigned int ret = -ENOIOCTLCMD; | |
289 | ||
290 | switch (cmd) { | |
291 | case RTC_AIE_OFF: | |
292 | case RTC_AIE_ON: | |
293 | s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0); | |
294 | ret = 0; | |
295 | break; | |
296 | ||
297 | case RTC_PIE_OFF: | |
298 | case RTC_PIE_ON: | |
299 | tick_count = 0; | |
300 | s3c_rtc_setpie((cmd == RTC_PIE_ON) ? 1 : 0); | |
301 | ret = 0; | |
302 | break; | |
303 | ||
304 | case RTC_IRQP_READ: | |
305 | ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg); | |
306 | break; | |
307 | ||
308 | case RTC_IRQP_SET: | |
309 | /* check for power of 2 */ | |
310 | ||
311 | if ((arg & (arg-1)) != 0 || arg < 1) { | |
312 | ret = -EINVAL; | |
313 | goto exit; | |
314 | } | |
315 | ||
316 | pr_debug("s3c2410_rtc: setting frequency %ld\n", arg); | |
317 | ||
318 | s3c_rtc_setfreq(arg); | |
319 | ret = 0; | |
320 | break; | |
321 | ||
322 | case RTC_UIE_ON: | |
323 | case RTC_UIE_OFF: | |
324 | ret = -EINVAL; | |
325 | } | |
326 | ||
327 | exit: | |
328 | return ret; | |
329 | } | |
330 | ||
331 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) | |
332 | { | |
9a654518 BD |
333 | unsigned int rtcalm = readb(s3c_rtc_base + S3C2410_RTCALM); |
334 | unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT); | |
1add6781 BD |
335 | |
336 | seq_printf(seq, "alarm_IRQ\t: %s\n", | |
337 | (rtcalm & S3C2410_RTCALM_ALMEN) ? "yes" : "no" ); | |
338 | ||
339 | seq_printf(seq, "periodic_IRQ\t: %s\n", | |
340 | (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" ); | |
341 | ||
342 | seq_printf(seq, "periodic_freq\t: %d\n", s3c_rtc_freq); | |
343 | ||
344 | return 0; | |
345 | } | |
346 | ||
347 | static int s3c_rtc_open(struct device *dev) | |
348 | { | |
349 | struct platform_device *pdev = to_platform_device(dev); | |
350 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
351 | int ret; | |
352 | ||
353 | ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, | |
354 | SA_INTERRUPT, "s3c2410-rtc alarm", rtc_dev); | |
355 | ||
356 | if (ret) { | |
357 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); | |
358 | return ret; | |
359 | } | |
360 | ||
361 | ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, | |
362 | SA_INTERRUPT, "s3c2410-rtc tick", rtc_dev); | |
363 | ||
364 | if (ret) { | |
365 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | |
366 | goto tick_err; | |
367 | } | |
368 | ||
369 | return ret; | |
370 | ||
371 | tick_err: | |
372 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
373 | return ret; | |
374 | } | |
375 | ||
376 | static void s3c_rtc_release(struct device *dev) | |
377 | { | |
378 | struct platform_device *pdev = to_platform_device(dev); | |
379 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
380 | ||
381 | /* do not clear AIE here, it may be needed for wake */ | |
382 | ||
383 | s3c_rtc_setpie(0); | |
384 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
385 | free_irq(s3c_rtc_tickno, rtc_dev); | |
386 | } | |
387 | ||
388 | static struct rtc_class_ops s3c_rtcops = { | |
389 | .open = s3c_rtc_open, | |
390 | .release = s3c_rtc_release, | |
391 | .ioctl = s3c_rtc_ioctl, | |
392 | .read_time = s3c_rtc_gettime, | |
393 | .set_time = s3c_rtc_settime, | |
394 | .read_alarm = s3c_rtc_getalarm, | |
395 | .set_alarm = s3c_rtc_setalarm, | |
396 | .proc = s3c_rtc_proc, | |
397 | }; | |
398 | ||
399 | static void s3c_rtc_enable(struct platform_device *pdev, int en) | |
400 | { | |
9a654518 | 401 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
402 | unsigned int tmp; |
403 | ||
404 | if (s3c_rtc_base == NULL) | |
405 | return; | |
406 | ||
407 | if (!en) { | |
9a654518 BD |
408 | tmp = readb(base + S3C2410_RTCCON); |
409 | writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON); | |
1add6781 | 410 | |
9a654518 BD |
411 | tmp = readb(base + S3C2410_TICNT); |
412 | writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT); | |
1add6781 BD |
413 | } else { |
414 | /* re-enable the device, and check it is ok */ | |
415 | ||
9a654518 | 416 | if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ |
1add6781 BD |
417 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); |
418 | ||
9a654518 BD |
419 | tmp = readb(base + S3C2410_RTCCON); |
420 | writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
1add6781 BD |
421 | } |
422 | ||
9a654518 | 423 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ |
1add6781 BD |
424 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); |
425 | ||
9a654518 BD |
426 | tmp = readb(base + S3C2410_RTCCON); |
427 | writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); | |
1add6781 BD |
428 | } |
429 | ||
9a654518 | 430 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ |
1add6781 BD |
431 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); |
432 | ||
9a654518 BD |
433 | tmp = readb(base + S3C2410_RTCCON); |
434 | writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); | |
1add6781 BD |
435 | } |
436 | } | |
437 | } | |
438 | ||
439 | static int s3c_rtc_remove(struct platform_device *dev) | |
440 | { | |
441 | struct rtc_device *rtc = platform_get_drvdata(dev); | |
442 | ||
443 | platform_set_drvdata(dev, NULL); | |
444 | rtc_device_unregister(rtc); | |
445 | ||
446 | s3c_rtc_setpie(0); | |
447 | s3c_rtc_setaie(0); | |
448 | ||
449 | iounmap(s3c_rtc_base); | |
450 | release_resource(s3c_rtc_mem); | |
451 | kfree(s3c_rtc_mem); | |
452 | ||
453 | return 0; | |
454 | } | |
455 | ||
456 | static int s3c_rtc_probe(struct platform_device *pdev) | |
457 | { | |
458 | struct rtc_device *rtc; | |
459 | struct resource *res; | |
460 | int ret; | |
461 | ||
462 | pr_debug("%s: probe=%p\n", __FUNCTION__, pdev); | |
463 | ||
464 | /* find the IRQs */ | |
465 | ||
466 | s3c_rtc_tickno = platform_get_irq(pdev, 1); | |
467 | if (s3c_rtc_tickno < 0) { | |
468 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | |
469 | return -ENOENT; | |
470 | } | |
471 | ||
472 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); | |
473 | if (s3c_rtc_alarmno < 0) { | |
474 | dev_err(&pdev->dev, "no irq for alarm\n"); | |
475 | return -ENOENT; | |
476 | } | |
477 | ||
478 | pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", | |
479 | s3c_rtc_tickno, s3c_rtc_alarmno); | |
480 | ||
481 | /* get the memory region */ | |
482 | ||
483 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
484 | if (res == NULL) { | |
485 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | |
486 | return -ENOENT; | |
487 | } | |
488 | ||
489 | s3c_rtc_mem = request_mem_region(res->start, | |
9a654518 BD |
490 | res->end-res->start+1, |
491 | pdev->name); | |
1add6781 BD |
492 | |
493 | if (s3c_rtc_mem == NULL) { | |
494 | dev_err(&pdev->dev, "failed to reserve memory region\n"); | |
495 | ret = -ENOENT; | |
496 | goto err_nores; | |
497 | } | |
498 | ||
499 | s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); | |
500 | if (s3c_rtc_base == NULL) { | |
501 | dev_err(&pdev->dev, "failed ioremap()\n"); | |
502 | ret = -EINVAL; | |
503 | goto err_nomap; | |
504 | } | |
505 | ||
506 | /* check to see if everything is setup correctly */ | |
507 | ||
508 | s3c_rtc_enable(pdev, 1); | |
509 | ||
9a654518 BD |
510 | pr_debug("s3c2410_rtc: RTCCON=%02x\n", |
511 | readb(s3c_rtc_base + S3C2410_RTCCON)); | |
1add6781 BD |
512 | |
513 | s3c_rtc_setfreq(s3c_rtc_freq); | |
514 | ||
515 | /* register RTC and exit */ | |
516 | ||
517 | rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
518 | THIS_MODULE); | |
519 | ||
520 | if (IS_ERR(rtc)) { | |
521 | dev_err(&pdev->dev, "cannot attach rtc\n"); | |
522 | ret = PTR_ERR(rtc); | |
523 | goto err_nortc; | |
524 | } | |
525 | ||
526 | rtc->max_user_freq = 128; | |
527 | ||
528 | platform_set_drvdata(pdev, rtc); | |
529 | return 0; | |
530 | ||
531 | err_nortc: | |
532 | s3c_rtc_enable(pdev, 0); | |
533 | iounmap(s3c_rtc_base); | |
534 | ||
535 | err_nomap: | |
536 | release_resource(s3c_rtc_mem); | |
537 | ||
538 | err_nores: | |
539 | return ret; | |
540 | } | |
541 | ||
542 | #ifdef CONFIG_PM | |
543 | ||
544 | /* RTC Power management control */ | |
545 | ||
546 | static struct timespec s3c_rtc_delta; | |
547 | ||
548 | static int ticnt_save; | |
549 | ||
550 | static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
551 | { | |
552 | struct rtc_time tm; | |
553 | struct timespec time; | |
554 | ||
555 | time.tv_nsec = 0; | |
556 | ||
557 | /* save TICNT for anyone using periodic interrupts */ | |
558 | ||
9a654518 | 559 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
560 | |
561 | /* calculate time delta for suspend */ | |
562 | ||
563 | s3c_rtc_gettime(&pdev->dev, &tm); | |
564 | rtc_tm_to_time(&tm, &time.tv_sec); | |
565 | save_time_delta(&s3c_rtc_delta, &time); | |
566 | s3c_rtc_enable(pdev, 0); | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
571 | static int s3c_rtc_resume(struct platform_device *pdev) | |
572 | { | |
573 | struct rtc_time tm; | |
574 | struct timespec time; | |
575 | ||
576 | time.tv_nsec = 0; | |
577 | ||
578 | s3c_rtc_enable(pdev, 1); | |
579 | s3c_rtc_gettime(&pdev->dev, &tm); | |
580 | rtc_tm_to_time(&tm, &time.tv_sec); | |
581 | restore_time_delta(&s3c_rtc_delta, &time); | |
582 | ||
9a654518 | 583 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
584 | return 0; |
585 | } | |
586 | #else | |
587 | #define s3c_rtc_suspend NULL | |
588 | #define s3c_rtc_resume NULL | |
589 | #endif | |
590 | ||
591 | static struct platform_driver s3c2410_rtcdrv = { | |
592 | .probe = s3c_rtc_probe, | |
593 | .remove = s3c_rtc_remove, | |
594 | .suspend = s3c_rtc_suspend, | |
595 | .resume = s3c_rtc_resume, | |
596 | .driver = { | |
597 | .name = "s3c2410-rtc", | |
598 | .owner = THIS_MODULE, | |
599 | }, | |
600 | }; | |
601 | ||
602 | static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; | |
603 | ||
604 | static int __init s3c_rtc_init(void) | |
605 | { | |
606 | printk(banner); | |
607 | return platform_driver_register(&s3c2410_rtcdrv); | |
608 | } | |
609 | ||
610 | static void __exit s3c_rtc_exit(void) | |
611 | { | |
612 | platform_driver_unregister(&s3c2410_rtcdrv); | |
613 | } | |
614 | ||
615 | module_init(s3c_rtc_init); | |
616 | module_exit(s3c_rtc_exit); | |
617 | ||
618 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); | |
619 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
620 | MODULE_LICENSE("GPL"); |