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1add6781 BD |
1 | /* drivers/rtc/rtc-s3c.c |
2 | * | |
3 | * Copyright (c) 2004,2006 Simtec Electronics | |
4 | * Ben Dooks, <ben@simtec.co.uk> | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/clk.h> | |
9974b6ea | 23 | #include <linux/log2.h> |
1add6781 | 24 | |
a09e64fb | 25 | #include <mach/hardware.h> |
1add6781 BD |
26 | #include <asm/uaccess.h> |
27 | #include <asm/io.h> | |
28 | #include <asm/irq.h> | |
e2cd00cf | 29 | #include <plat/regs-rtc.h> |
1add6781 BD |
30 | |
31 | /* I have yet to find an S3C implementation with more than one | |
32 | * of these rtc blocks in */ | |
33 | ||
34 | static struct resource *s3c_rtc_mem; | |
35 | ||
36 | static void __iomem *s3c_rtc_base; | |
37 | static int s3c_rtc_alarmno = NO_IRQ; | |
38 | static int s3c_rtc_tickno = NO_IRQ; | |
1add6781 BD |
39 | |
40 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | |
1add6781 BD |
41 | |
42 | /* IRQ Handlers */ | |
43 | ||
7d12e780 | 44 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
1add6781 BD |
45 | { |
46 | struct rtc_device *rdev = id; | |
47 | ||
ab6a2d70 | 48 | rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); |
1add6781 BD |
49 | return IRQ_HANDLED; |
50 | } | |
51 | ||
7d12e780 | 52 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) |
1add6781 BD |
53 | { |
54 | struct rtc_device *rdev = id; | |
55 | ||
773be7ee | 56 | rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); |
1add6781 BD |
57 | return IRQ_HANDLED; |
58 | } | |
59 | ||
60 | /* Update control registers */ | |
61 | static void s3c_rtc_setaie(int to) | |
62 | { | |
63 | unsigned int tmp; | |
64 | ||
2a4e2b87 | 65 | pr_debug("%s: aie=%d\n", __func__, to); |
1add6781 | 66 | |
9a654518 | 67 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
1add6781 BD |
68 | |
69 | if (to) | |
70 | tmp |= S3C2410_RTCALM_ALMEN; | |
71 | ||
9a654518 | 72 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
1add6781 BD |
73 | } |
74 | ||
773be7ee | 75 | static int s3c_rtc_setpie(struct device *dev, int enabled) |
1add6781 BD |
76 | { |
77 | unsigned int tmp; | |
78 | ||
773be7ee | 79 | pr_debug("%s: pie=%d\n", __func__, enabled); |
1add6781 BD |
80 | |
81 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 82 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE; |
1add6781 | 83 | |
773be7ee | 84 | if (enabled) |
1add6781 BD |
85 | tmp |= S3C2410_TICNT_ENABLE; |
86 | ||
9a654518 | 87 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 88 | spin_unlock_irq(&s3c_rtc_pie_lock); |
773be7ee BD |
89 | |
90 | return 0; | |
1add6781 BD |
91 | } |
92 | ||
773be7ee | 93 | static int s3c_rtc_setfreq(struct device *dev, int freq) |
1add6781 BD |
94 | { |
95 | unsigned int tmp; | |
96 | ||
5d2a5037 JC |
97 | if (!is_power_of_2(freq)) |
98 | return -EINVAL; | |
99 | ||
1add6781 | 100 | spin_lock_irq(&s3c_rtc_pie_lock); |
1add6781 | 101 | |
773be7ee | 102 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE; |
1add6781 BD |
103 | tmp |= (128 / freq)-1; |
104 | ||
9a654518 | 105 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 106 | spin_unlock_irq(&s3c_rtc_pie_lock); |
773be7ee BD |
107 | |
108 | return 0; | |
1add6781 BD |
109 | } |
110 | ||
111 | /* Time read/write */ | |
112 | ||
113 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | |
114 | { | |
115 | unsigned int have_retried = 0; | |
9a654518 | 116 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
117 | |
118 | retry_get_time: | |
9a654518 BD |
119 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); |
120 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
121 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
122 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
123 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
124 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
1add6781 BD |
125 | |
126 | /* the only way to work out wether the system was mid-update | |
127 | * when we read it is to check the second counter, and if it | |
128 | * is zero, then we re-try the entire read | |
129 | */ | |
130 | ||
131 | if (rtc_tm->tm_sec == 0 && !have_retried) { | |
132 | have_retried = 1; | |
133 | goto retry_get_time; | |
134 | } | |
135 | ||
136 | pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | |
137 | rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | |
138 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); | |
139 | ||
fe20ba70 AB |
140 | rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); |
141 | rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); | |
142 | rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); | |
143 | rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); | |
144 | rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); | |
145 | rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); | |
1add6781 BD |
146 | |
147 | rtc_tm->tm_year += 100; | |
148 | rtc_tm->tm_mon -= 1; | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
154 | { | |
9a654518 | 155 | void __iomem *base = s3c_rtc_base; |
641741e0 | 156 | int year = tm->tm_year - 100; |
9a654518 | 157 | |
641741e0 BD |
158 | pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", |
159 | tm->tm_year, tm->tm_mon, tm->tm_mday, | |
160 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
161 | ||
162 | /* we get around y2k by simply not supporting it */ | |
1add6781 | 163 | |
641741e0 | 164 | if (year < 0 || year >= 100) { |
9a654518 | 165 | dev_err(dev, "rtc only supports 100 years\n"); |
1add6781 | 166 | return -EINVAL; |
9a654518 BD |
167 | } |
168 | ||
fe20ba70 AB |
169 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); |
170 | writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); | |
171 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); | |
172 | writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); | |
173 | writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); | |
174 | writeb(bin2bcd(year), base + S3C2410_RTCYEAR); | |
1add6781 BD |
175 | |
176 | return 0; | |
177 | } | |
178 | ||
179 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
180 | { | |
181 | struct rtc_time *alm_tm = &alrm->time; | |
9a654518 | 182 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
183 | unsigned int alm_en; |
184 | ||
9a654518 BD |
185 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); |
186 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | |
187 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | |
188 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | |
189 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | |
190 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | |
1add6781 | 191 | |
9a654518 | 192 | alm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 193 | |
a2db8dfc DB |
194 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
195 | ||
1add6781 BD |
196 | pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", |
197 | alm_en, | |
198 | alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, | |
199 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); | |
200 | ||
201 | ||
202 | /* decode the alarm enable field */ | |
203 | ||
204 | if (alm_en & S3C2410_RTCALM_SECEN) | |
fe20ba70 | 205 | alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); |
1add6781 BD |
206 | else |
207 | alm_tm->tm_sec = 0xff; | |
208 | ||
209 | if (alm_en & S3C2410_RTCALM_MINEN) | |
fe20ba70 | 210 | alm_tm->tm_min = bcd2bin(alm_tm->tm_min); |
1add6781 BD |
211 | else |
212 | alm_tm->tm_min = 0xff; | |
213 | ||
214 | if (alm_en & S3C2410_RTCALM_HOUREN) | |
fe20ba70 | 215 | alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); |
1add6781 BD |
216 | else |
217 | alm_tm->tm_hour = 0xff; | |
218 | ||
219 | if (alm_en & S3C2410_RTCALM_DAYEN) | |
fe20ba70 | 220 | alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); |
1add6781 BD |
221 | else |
222 | alm_tm->tm_mday = 0xff; | |
223 | ||
224 | if (alm_en & S3C2410_RTCALM_MONEN) { | |
fe20ba70 | 225 | alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); |
1add6781 BD |
226 | alm_tm->tm_mon -= 1; |
227 | } else { | |
228 | alm_tm->tm_mon = 0xff; | |
229 | } | |
230 | ||
231 | if (alm_en & S3C2410_RTCALM_YEAREN) | |
fe20ba70 | 232 | alm_tm->tm_year = bcd2bin(alm_tm->tm_year); |
1add6781 BD |
233 | else |
234 | alm_tm->tm_year = 0xffff; | |
235 | ||
236 | return 0; | |
237 | } | |
238 | ||
239 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
240 | { | |
241 | struct rtc_time *tm = &alrm->time; | |
9a654518 | 242 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
243 | unsigned int alrm_en; |
244 | ||
245 | pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | |
246 | alrm->enabled, | |
247 | tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | |
248 | tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | |
249 | ||
250 | ||
9a654518 BD |
251 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
252 | writeb(0x00, base + S3C2410_RTCALM); | |
1add6781 BD |
253 | |
254 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | |
255 | alrm_en |= S3C2410_RTCALM_SECEN; | |
fe20ba70 | 256 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC); |
1add6781 BD |
257 | } |
258 | ||
259 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | |
260 | alrm_en |= S3C2410_RTCALM_MINEN; | |
fe20ba70 | 261 | writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN); |
1add6781 BD |
262 | } |
263 | ||
264 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | |
265 | alrm_en |= S3C2410_RTCALM_HOUREN; | |
fe20ba70 | 266 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); |
1add6781 BD |
267 | } |
268 | ||
269 | pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); | |
270 | ||
9a654518 | 271 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 | 272 | |
773be7ee | 273 | s3c_rtc_setaie(alrm->enabled); |
1add6781 BD |
274 | |
275 | if (alrm->enabled) | |
276 | enable_irq_wake(s3c_rtc_alarmno); | |
277 | else | |
278 | disable_irq_wake(s3c_rtc_alarmno); | |
279 | ||
280 | return 0; | |
281 | } | |
282 | ||
1add6781 BD |
283 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) |
284 | { | |
9a654518 | 285 | unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 286 | |
1add6781 BD |
287 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
288 | (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" ); | |
1add6781 BD |
289 | return 0; |
290 | } | |
291 | ||
292 | static int s3c_rtc_open(struct device *dev) | |
293 | { | |
294 | struct platform_device *pdev = to_platform_device(dev); | |
295 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
296 | int ret; | |
297 | ||
298 | ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, | |
38515e90 | 299 | IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); |
1add6781 BD |
300 | |
301 | if (ret) { | |
302 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); | |
303 | return ret; | |
304 | } | |
305 | ||
306 | ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, | |
38515e90 | 307 | IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); |
1add6781 BD |
308 | |
309 | if (ret) { | |
310 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | |
311 | goto tick_err; | |
312 | } | |
313 | ||
314 | return ret; | |
315 | ||
316 | tick_err: | |
317 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
318 | return ret; | |
319 | } | |
320 | ||
321 | static void s3c_rtc_release(struct device *dev) | |
322 | { | |
323 | struct platform_device *pdev = to_platform_device(dev); | |
324 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
325 | ||
326 | /* do not clear AIE here, it may be needed for wake */ | |
327 | ||
773be7ee | 328 | s3c_rtc_setpie(dev, 0); |
1add6781 BD |
329 | free_irq(s3c_rtc_alarmno, rtc_dev); |
330 | free_irq(s3c_rtc_tickno, rtc_dev); | |
331 | } | |
332 | ||
ff8371ac | 333 | static const struct rtc_class_ops s3c_rtcops = { |
1add6781 BD |
334 | .open = s3c_rtc_open, |
335 | .release = s3c_rtc_release, | |
1add6781 BD |
336 | .read_time = s3c_rtc_gettime, |
337 | .set_time = s3c_rtc_settime, | |
338 | .read_alarm = s3c_rtc_getalarm, | |
339 | .set_alarm = s3c_rtc_setalarm, | |
773be7ee BD |
340 | .irq_set_freq = s3c_rtc_setfreq, |
341 | .irq_set_state = s3c_rtc_setpie, | |
1add6781 BD |
342 | .proc = s3c_rtc_proc, |
343 | }; | |
344 | ||
345 | static void s3c_rtc_enable(struct platform_device *pdev, int en) | |
346 | { | |
9a654518 | 347 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
348 | unsigned int tmp; |
349 | ||
350 | if (s3c_rtc_base == NULL) | |
351 | return; | |
352 | ||
353 | if (!en) { | |
9a654518 BD |
354 | tmp = readb(base + S3C2410_RTCCON); |
355 | writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON); | |
1add6781 | 356 | |
9a654518 BD |
357 | tmp = readb(base + S3C2410_TICNT); |
358 | writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT); | |
1add6781 BD |
359 | } else { |
360 | /* re-enable the device, and check it is ok */ | |
361 | ||
9a654518 | 362 | if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ |
1add6781 BD |
363 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); |
364 | ||
9a654518 BD |
365 | tmp = readb(base + S3C2410_RTCCON); |
366 | writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
1add6781 BD |
367 | } |
368 | ||
9a654518 | 369 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ |
1add6781 BD |
370 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); |
371 | ||
9a654518 BD |
372 | tmp = readb(base + S3C2410_RTCCON); |
373 | writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); | |
1add6781 BD |
374 | } |
375 | ||
9a654518 | 376 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ |
1add6781 BD |
377 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); |
378 | ||
9a654518 BD |
379 | tmp = readb(base + S3C2410_RTCCON); |
380 | writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); | |
1add6781 BD |
381 | } |
382 | } | |
383 | } | |
384 | ||
4cd0c5c4 | 385 | static int __devexit s3c_rtc_remove(struct platform_device *dev) |
1add6781 BD |
386 | { |
387 | struct rtc_device *rtc = platform_get_drvdata(dev); | |
388 | ||
389 | platform_set_drvdata(dev, NULL); | |
390 | rtc_device_unregister(rtc); | |
391 | ||
773be7ee | 392 | s3c_rtc_setpie(&dev->dev, 0); |
1add6781 BD |
393 | s3c_rtc_setaie(0); |
394 | ||
395 | iounmap(s3c_rtc_base); | |
396 | release_resource(s3c_rtc_mem); | |
397 | kfree(s3c_rtc_mem); | |
398 | ||
399 | return 0; | |
400 | } | |
401 | ||
4cd0c5c4 | 402 | static int __devinit s3c_rtc_probe(struct platform_device *pdev) |
1add6781 BD |
403 | { |
404 | struct rtc_device *rtc; | |
405 | struct resource *res; | |
406 | int ret; | |
407 | ||
2a4e2b87 | 408 | pr_debug("%s: probe=%p\n", __func__, pdev); |
1add6781 BD |
409 | |
410 | /* find the IRQs */ | |
411 | ||
412 | s3c_rtc_tickno = platform_get_irq(pdev, 1); | |
413 | if (s3c_rtc_tickno < 0) { | |
414 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | |
415 | return -ENOENT; | |
416 | } | |
417 | ||
418 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); | |
419 | if (s3c_rtc_alarmno < 0) { | |
420 | dev_err(&pdev->dev, "no irq for alarm\n"); | |
421 | return -ENOENT; | |
422 | } | |
423 | ||
424 | pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", | |
425 | s3c_rtc_tickno, s3c_rtc_alarmno); | |
426 | ||
427 | /* get the memory region */ | |
428 | ||
429 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
430 | if (res == NULL) { | |
431 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | |
432 | return -ENOENT; | |
433 | } | |
434 | ||
435 | s3c_rtc_mem = request_mem_region(res->start, | |
9a654518 BD |
436 | res->end-res->start+1, |
437 | pdev->name); | |
1add6781 BD |
438 | |
439 | if (s3c_rtc_mem == NULL) { | |
440 | dev_err(&pdev->dev, "failed to reserve memory region\n"); | |
441 | ret = -ENOENT; | |
442 | goto err_nores; | |
443 | } | |
444 | ||
445 | s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); | |
446 | if (s3c_rtc_base == NULL) { | |
447 | dev_err(&pdev->dev, "failed ioremap()\n"); | |
448 | ret = -EINVAL; | |
449 | goto err_nomap; | |
450 | } | |
451 | ||
452 | /* check to see if everything is setup correctly */ | |
453 | ||
454 | s3c_rtc_enable(pdev, 1); | |
455 | ||
9a654518 BD |
456 | pr_debug("s3c2410_rtc: RTCCON=%02x\n", |
457 | readb(s3c_rtc_base + S3C2410_RTCCON)); | |
1add6781 | 458 | |
773be7ee | 459 | s3c_rtc_setfreq(&pdev->dev, 1); |
1add6781 | 460 | |
51b7616e YK |
461 | device_init_wakeup(&pdev->dev, 1); |
462 | ||
1add6781 BD |
463 | /* register RTC and exit */ |
464 | ||
465 | rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
466 | THIS_MODULE); | |
467 | ||
468 | if (IS_ERR(rtc)) { | |
469 | dev_err(&pdev->dev, "cannot attach rtc\n"); | |
470 | ret = PTR_ERR(rtc); | |
471 | goto err_nortc; | |
472 | } | |
473 | ||
474 | rtc->max_user_freq = 128; | |
475 | ||
476 | platform_set_drvdata(pdev, rtc); | |
477 | return 0; | |
478 | ||
479 | err_nortc: | |
480 | s3c_rtc_enable(pdev, 0); | |
481 | iounmap(s3c_rtc_base); | |
482 | ||
483 | err_nomap: | |
484 | release_resource(s3c_rtc_mem); | |
485 | ||
486 | err_nores: | |
487 | return ret; | |
488 | } | |
489 | ||
490 | #ifdef CONFIG_PM | |
491 | ||
492 | /* RTC Power management control */ | |
493 | ||
1add6781 BD |
494 | static int ticnt_save; |
495 | ||
496 | static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
497 | { | |
1add6781 | 498 | /* save TICNT for anyone using periodic interrupts */ |
9a654518 | 499 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 500 | s3c_rtc_enable(pdev, 0); |
1add6781 BD |
501 | return 0; |
502 | } | |
503 | ||
504 | static int s3c_rtc_resume(struct platform_device *pdev) | |
505 | { | |
1add6781 | 506 | s3c_rtc_enable(pdev, 1); |
9a654518 | 507 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
508 | return 0; |
509 | } | |
510 | #else | |
511 | #define s3c_rtc_suspend NULL | |
512 | #define s3c_rtc_resume NULL | |
513 | #endif | |
514 | ||
eb944db0 | 515 | static struct platform_driver s3c2410_rtc_driver = { |
1add6781 | 516 | .probe = s3c_rtc_probe, |
4cd0c5c4 | 517 | .remove = __devexit_p(s3c_rtc_remove), |
1add6781 BD |
518 | .suspend = s3c_rtc_suspend, |
519 | .resume = s3c_rtc_resume, | |
520 | .driver = { | |
521 | .name = "s3c2410-rtc", | |
522 | .owner = THIS_MODULE, | |
523 | }, | |
524 | }; | |
525 | ||
526 | static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; | |
527 | ||
528 | static int __init s3c_rtc_init(void) | |
529 | { | |
530 | printk(banner); | |
eb944db0 | 531 | return platform_driver_register(&s3c2410_rtc_driver); |
1add6781 BD |
532 | } |
533 | ||
534 | static void __exit s3c_rtc_exit(void) | |
535 | { | |
eb944db0 | 536 | platform_driver_unregister(&s3c2410_rtc_driver); |
1add6781 BD |
537 | } |
538 | ||
539 | module_init(s3c_rtc_init); | |
540 | module_exit(s3c_rtc_exit); | |
541 | ||
542 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); | |
543 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
544 | MODULE_LICENSE("GPL"); | |
ad28a07b | 545 | MODULE_ALIAS("platform:s3c2410-rtc"); |