projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'arc-4.4-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
[deliverable/linux.git] / drivers / rtc / rtc-s5m.c
CommitLineData
5bccae6e 1/*
f8b23bbd 2 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
5bccae6e
SK		 3 * http://www.samsung.com
4 *
5 * Copyright (C) 2013 Google, Inc
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
a737e835
JP		 18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
5bccae6e
SK		 20#include <linux/module.h>
21#include <linux/i2c.h>
5bccae6e 22#include <linux/bcd.h>
5bccae6e
SK		 23#include <linux/regmap.h>
24#include <linux/rtc.h>
5bccae6e
SK		 25#include <linux/platform_device.h>
26#include <linux/mfd/samsung/core.h>
27#include <linux/mfd/samsung/irq.h>
28#include <linux/mfd/samsung/rtc.h>
0c5deb1e 29#include <linux/mfd/samsung/s2mps14.h>
5bccae6e 30
d73238d4
KK		 31/*
32 * Maximum number of retries for checking changes in UDR field
602cb5bb 33 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
d73238d4
KK		 34 *
35 * After writing to RTC registers (setting time or alarm) read the UDR field
602cb5bb 36 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
d73238d4
KK		 37 * been transferred.
38 */
39#define UDR_READ_RETRY_CNT 5
40
f8b23bbd
KK		 41/* Registers used by the driver which are different between chipsets. */
42struct s5m_rtc_reg_config {
43 /* Number of registers used for setting time/alarm0/alarm1 */
44 unsigned int regs_count;
45 /* First register for time, seconds */
46 unsigned int time;
47 /* RTC control register */
48 unsigned int ctrl;
49 /* First register for alarm 0, seconds */
50 unsigned int alarm0;
51 /* First register for alarm 1, seconds */
52 unsigned int alarm1;
f8b23bbd
KK		 53 /*
54 * Register for update flag (UDR). Typically setting UDR field to 1
55 * will enable update of time or alarm register. Then it will be
56 * auto-cleared after successful update.
57 */
58 unsigned int rtc_udr_update;
59 /* Mask for UDR field in 'rtc_udr_update' register */
60 unsigned int rtc_udr_mask;
61};
62
63/* Register map for S5M8763 and S5M8767 */
64static const struct s5m_rtc_reg_config s5m_rtc_regs = {
65 .regs_count = 8,
66 .time = S5M_RTC_SEC,
67 .ctrl = S5M_ALARM1_CONF,
68 .alarm0 = S5M_ALARM0_SEC,
69 .alarm1 = S5M_ALARM1_SEC,
f8b23bbd
KK		 70 .rtc_udr_update = S5M_RTC_UDR_CON,
71 .rtc_udr_mask = S5M_RTC_UDR_MASK,
72};
73
0c5deb1e
KK		 74/*
75 * Register map for S2MPS14.
76 * It may be also suitable for S2MPS11 but this was not tested.
77 */
78static const struct s5m_rtc_reg_config s2mps_rtc_regs = {
79 .regs_count = 7,
80 .time = S2MPS_RTC_SEC,
81 .ctrl = S2MPS_RTC_CTRL,
82 .alarm0 = S2MPS_ALARM0_SEC,
83 .alarm1 = S2MPS_ALARM1_SEC,
0c5deb1e
KK		 84 .rtc_udr_update = S2MPS_RTC_UDR_CON,
85 .rtc_udr_mask = S2MPS_RTC_WUDR_MASK,
86};
87
5bccae6e
SK		 88struct s5m_rtc_info {
89 struct device *dev;
e349c910 90 struct i2c_client *i2c;
5bccae6e 91 struct sec_pmic_dev *s5m87xx;
5ccb7d71 92 struct regmap *regmap;
5bccae6e
SK		 93 struct rtc_device *rtc_dev;
94 int irq;
94f91922 95 enum sec_device_type device_type;
5bccae6e 96 int rtc_24hr_mode;
f8b23bbd 97 const struct s5m_rtc_reg_config *regs;
5bccae6e
SK		 98};
99
e349c910
KK		 100static const struct regmap_config s5m_rtc_regmap_config = {
101 .reg_bits = 8,
102 .val_bits = 8,
103
602cb5bb 104 .max_register = S5M_RTC_REG_MAX,
e349c910
KK		 105};
106
107static const struct regmap_config s2mps14_rtc_regmap_config = {
108 .reg_bits = 8,
109 .val_bits = 8,
110
111 .max_register = S2MPS_RTC_REG_MAX,
112};
113
5bccae6e
SK		 114static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
115 int rtc_24hr_mode)
116{
117 tm->tm_sec = data[RTC_SEC] & 0x7f;
118 tm->tm_min = data[RTC_MIN] & 0x7f;
119 if (rtc_24hr_mode) {
120 tm->tm_hour = data[RTC_HOUR] & 0x1f;
121 } else {
122 tm->tm_hour = data[RTC_HOUR] & 0x0f;
123 if (data[RTC_HOUR] & HOUR_PM_MASK)
124 tm->tm_hour += 12;
125 }
126
127 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
128 tm->tm_mday = data[RTC_DATE] & 0x1f;
129 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
130 tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
131 tm->tm_yday = 0;
132 tm->tm_isdst = 0;
133}
134
135static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
136{
137 data[RTC_SEC] = tm->tm_sec;
138 data[RTC_MIN] = tm->tm_min;
139
140 if (tm->tm_hour >= 12)
141 data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
142 else
143 data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
144
145 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
146 data[RTC_DATE] = tm->tm_mday;
147 data[RTC_MONTH] = tm->tm_mon + 1;
148 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
149
150 if (tm->tm_year < 100) {
a737e835 151 pr_err("RTC cannot handle the year %d\n",
5bccae6e
SK		 152 1900 + tm->tm_year);
153 return -EINVAL;
154 } else {
155 return 0;
156 }
157}
158
d73238d4
KK		 159/*
160 * Read RTC_UDR_CON register and wait till UDR field is cleared.
161 * This indicates that time/alarm update ended.
162 */
163static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
164{
165 int ret, retry = UDR_READ_RETRY_CNT;
166 unsigned int data;
167
168 do {
f8b23bbd
KK		 169 ret = regmap_read(info->regmap, info->regs->rtc_udr_update,
170 &data);
171 } while (--retry && (data & info->regs->rtc_udr_mask) && !ret);
d73238d4
KK		 172
173 if (!retry)
174 dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
175
176 return ret;
177}
178
f8b23bbd
KK		 179static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
180 struct rtc_wkalrm *alarm)
181{
182 int ret;
183 unsigned int val;
184
185 switch (info->device_type) {
186 case S5M8767X:
187 case S5M8763X:
188 ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
189 val &= S5M_ALARM0_STATUS;
190 break;
0c5deb1e 191 case S2MPS14X:
5281f94a 192 case S2MPS13X:
0c5deb1e
KK		 193 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
194 &val);
195 val &= S2MPS_ALARM0_STATUS;
196 break;
f8b23bbd
KK		 197 default:
198 return -EINVAL;
199 }
200 if (ret < 0)
201 return ret;
202
203 if (val)
204 alarm->pending = 1;
205 else
206 alarm->pending = 0;
207
208 return 0;
209}
210
5bccae6e
SK		 211static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
212{
213 int ret;
214 unsigned int data;
215
f8b23bbd 216 ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
5bccae6e
SK		 217 if (ret < 0) {
218 dev_err(info->dev, "failed to read update reg(%d)\n", ret);
219 return ret;
220 }
221
f8b23bbd 222 data |= info->regs->rtc_udr_mask;
0c5deb1e
KK		 223 if (info->device_type == S5M8763X || info->device_type == S5M8767X)
224 data |= S5M_RTC_TIME_EN_MASK;
5bccae6e 225
f8b23bbd 226 ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
5bccae6e
SK		 227 if (ret < 0) {
228 dev_err(info->dev, "failed to write update reg(%d)\n", ret);
229 return ret;
230 }
231
d73238d4 232 ret = s5m8767_wait_for_udr_update(info);
5bccae6e
SK		 233
234 return ret;
235}
236
237static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
238{
239 int ret;
240 unsigned int data;
241
f8b23bbd 242 ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data);
5bccae6e
SK		 243 if (ret < 0) {
244 dev_err(info->dev, "%s: fail to read update reg(%d)\n",
245 __func__, ret);
246 return ret;
247 }
248
f8b23bbd 249 data |= info->regs->rtc_udr_mask;
0c5deb1e
KK		 250 switch (info->device_type) {
251 case S5M8763X:
252 case S5M8767X:
253 data &= ~S5M_RTC_TIME_EN_MASK;
254 break;
255 case S2MPS14X:
256 data |= S2MPS_RTC_RUDR_MASK;
257 break;
5281f94a
KK		 258 case S2MPS13X:
259 data |= S2MPS13_RTC_AUDR_MASK;
260 break;
0c5deb1e
KK		 261 default:
262 return -EINVAL;
263 }
5bccae6e 264
f8b23bbd 265 ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data);
5bccae6e
SK		 266 if (ret < 0) {
267 dev_err(info->dev, "%s: fail to write update reg(%d)\n",
268 __func__, ret);
269 return ret;
270 }
271
d73238d4 272 ret = s5m8767_wait_for_udr_update(info);
5bccae6e 273
5281f94a
KK		 274 /* On S2MPS13 the AUDR is not auto-cleared */
275 if (info->device_type == S2MPS13X)
276 regmap_update_bits(info->regmap, info->regs->rtc_udr_update,
277 S2MPS13_RTC_AUDR_MASK, 0);
278
5bccae6e
SK		 279 return ret;
280}
281
282static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
283{
284 tm->tm_sec = bcd2bin(data[RTC_SEC]);
285 tm->tm_min = bcd2bin(data[RTC_MIN]);
286
287 if (data[RTC_HOUR] & HOUR_12) {
288 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
289 if (data[RTC_HOUR] & HOUR_PM)
290 tm->tm_hour += 12;
291 } else {
292 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
293 }
294
295 tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
296 tm->tm_mday = bcd2bin(data[RTC_DATE]);
297 tm->tm_mon = bcd2bin(data[RTC_MONTH]);
298 tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
299 tm->tm_year -= 1900;
300}
301
302static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
303{
304 data[RTC_SEC] = bin2bcd(tm->tm_sec);
305 data[RTC_MIN] = bin2bcd(tm->tm_min);
306 data[RTC_HOUR] = bin2bcd(tm->tm_hour);
307 data[RTC_WEEKDAY] = tm->tm_wday;
308 data[RTC_DATE] = bin2bcd(tm->tm_mday);
309 data[RTC_MONTH] = bin2bcd(tm->tm_mon);
310 data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
311 data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
312}
313
314static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
315{
316 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 317 u8 data[info->regs->regs_count];
5bccae6e
SK		 318 int ret;
319
5281f94a 320 if (info->device_type == S2MPS14X || info->device_type == S2MPS13X) {
0c5deb1e
KK		 321 ret = regmap_update_bits(info->regmap,
322 info->regs->rtc_udr_update,
323 S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);
324 if (ret) {
325 dev_err(dev,
326 "Failed to prepare registers for time reading: %d\n",
327 ret);
328 return ret;
329 }
330 }
f8b23bbd
KK		 331 ret = regmap_bulk_read(info->regmap, info->regs->time, data,
332 info->regs->regs_count);
5bccae6e
SK		 333 if (ret < 0)
334 return ret;
335
336 switch (info->device_type) {
337 case S5M8763X:
338 s5m8763_data_to_tm(data, tm);
339 break;
340
341 case S5M8767X:
0c5deb1e 342 case S2MPS14X:
5281f94a 343 case S2MPS13X:
5bccae6e
SK		 344 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
345 break;
346
347 default:
348 return -EINVAL;
349 }
350
351 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
352 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
353 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
354
355 return rtc_valid_tm(tm);
356}
357
358static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
359{
360 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 361 u8 data[info->regs->regs_count];
5bccae6e
SK		 362 int ret = 0;
363
364 switch (info->device_type) {
365 case S5M8763X:
366 s5m8763_tm_to_data(tm, data);
367 break;
368 case S5M8767X:
0c5deb1e 369 case S2MPS14X:
5281f94a 370 case S2MPS13X:
5bccae6e
SK		 371 ret = s5m8767_tm_to_data(tm, data);
372 break;
373 default:
374 return -EINVAL;
375 }
376
377 if (ret < 0)
378 return ret;
379
380 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
381 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
382 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
383
f8b23bbd
KK		 384 ret = regmap_raw_write(info->regmap, info->regs->time, data,
385 info->regs->regs_count);
5bccae6e
SK		 386 if (ret < 0)
387 return ret;
388
389 ret = s5m8767_rtc_set_time_reg(info);
390
391 return ret;
392}
393
394static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
395{
396 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 397 u8 data[info->regs->regs_count];
5bccae6e
SK		 398 unsigned int val;
399 int ret, i;
400
f8b23bbd
KK		 401 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
402 info->regs->regs_count);
5bccae6e
SK		 403 if (ret < 0)
404 return ret;
405
406 switch (info->device_type) {
407 case S5M8763X:
408 s5m8763_data_to_tm(data, &alrm->time);
602cb5bb 409 ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
5bccae6e
SK		 410 if (ret < 0)
411 return ret;
412
413 alrm->enabled = !!val;
5bccae6e
SK		 414 break;
415
416 case S5M8767X:
0c5deb1e 417 case S2MPS14X:
5281f94a 418 case S2MPS13X:
5bccae6e 419 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
5bccae6e 420 alrm->enabled = 0;
f8b23bbd 421 for (i = 0; i < info->regs->regs_count; i++) {
5bccae6e
SK		 422 if (data[i] & ALARM_ENABLE_MASK) {
423 alrm->enabled = 1;
424 break;
425 }
426 }
5bccae6e
SK		 427 break;
428
429 default:
430 return -EINVAL;
431 }
432
f8b23bbd
KK		 433 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
434 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
435 alrm->time.tm_mday, alrm->time.tm_hour,
436 alrm->time.tm_min, alrm->time.tm_sec,
437 alrm->time.tm_wday);
438
439 ret = s5m_check_peding_alarm_interrupt(info, alrm);
5bccae6e
SK		 440
441 return 0;
442}
443
444static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
445{
f8b23bbd 446 u8 data[info->regs->regs_count];
5bccae6e
SK		 447 int ret, i;
448 struct rtc_time tm;
449
f8b23bbd
KK		 450 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
451 info->regs->regs_count);
5bccae6e
SK		 452 if (ret < 0)
453 return ret;
454
455 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
456 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
457 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
458 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
459
460 switch (info->device_type) {
461 case S5M8763X:
602cb5bb 462 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
5bccae6e
SK		 463 break;
464
465 case S5M8767X:
0c5deb1e 466 case S2MPS14X:
5281f94a 467 case S2MPS13X:
f8b23bbd 468 for (i = 0; i < info->regs->regs_count; i++)
5bccae6e
SK		 469 data[i] &= ~ALARM_ENABLE_MASK;
470
f8b23bbd
KK		 471 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
472 info->regs->regs_count);
5bccae6e
SK		 473 if (ret < 0)
474 return ret;
475
476 ret = s5m8767_rtc_set_alarm_reg(info);
477
478 break;
479
480 default:
481 return -EINVAL;
482 }
483
484 return ret;
485}
486
487static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
488{
489 int ret;
f8b23bbd 490 u8 data[info->regs->regs_count];
5bccae6e
SK		 491 u8 alarm0_conf;
492 struct rtc_time tm;
493
f8b23bbd
KK		 494 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
495 info->regs->regs_count);
5bccae6e
SK		 496 if (ret < 0)
497 return ret;
498
499 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
500 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
501 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
502 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
503
504 switch (info->device_type) {
505 case S5M8763X:
506 alarm0_conf = 0x77;
602cb5bb 507 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
5bccae6e
SK		 508 break;
509
510 case S5M8767X:
0c5deb1e 511 case S2MPS14X:
5281f94a 512 case S2MPS13X:
5bccae6e
SK		 513 data[RTC_SEC] |= ALARM_ENABLE_MASK;
514 data[RTC_MIN] |= ALARM_ENABLE_MASK;
515 data[RTC_HOUR] |= ALARM_ENABLE_MASK;
516 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
517 if (data[RTC_DATE] & 0x1f)
518 data[RTC_DATE] |= ALARM_ENABLE_MASK;
519 if (data[RTC_MONTH] & 0xf)
520 data[RTC_MONTH] |= ALARM_ENABLE_MASK;
521 if (data[RTC_YEAR1] & 0x7f)
522 data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
523
f8b23bbd
KK		 524 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
525 info->regs->regs_count);
5bccae6e
SK		 526 if (ret < 0)
527 return ret;
528 ret = s5m8767_rtc_set_alarm_reg(info);
529
530 break;
531
532 default:
533 return -EINVAL;
534 }
535
536 return ret;
537}
538
539static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
540{
541 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 542 u8 data[info->regs->regs_count];
5bccae6e
SK		 543 int ret;
544
545 switch (info->device_type) {
546 case S5M8763X:
547 s5m8763_tm_to_data(&alrm->time, data);
548 break;
549
550 case S5M8767X:
0c5deb1e 551 case S2MPS14X:
5281f94a 552 case S2MPS13X:
5bccae6e
SK		 553 s5m8767_tm_to_data(&alrm->time, data);
554 break;
555
556 default:
557 return -EINVAL;
558 }
559
560 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
561 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
562 alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
563 alrm->time.tm_sec, alrm->time.tm_wday);
564
565 ret = s5m_rtc_stop_alarm(info);
566 if (ret < 0)
567 return ret;
568
f8b23bbd
KK		 569 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
570 info->regs->regs_count);
5bccae6e
SK		 571 if (ret < 0)
572 return ret;
573
574 ret = s5m8767_rtc_set_alarm_reg(info);
575 if (ret < 0)
576 return ret;
577
578 if (alrm->enabled)
579 ret = s5m_rtc_start_alarm(info);
580
581 return ret;
582}
583
584static int s5m_rtc_alarm_irq_enable(struct device *dev,
585 unsigned int enabled)
586{
587 struct s5m_rtc_info *info = dev_get_drvdata(dev);
588
589 if (enabled)
590 return s5m_rtc_start_alarm(info);
591 else
592 return s5m_rtc_stop_alarm(info);
593}
594
595static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
596{
597 struct s5m_rtc_info *info = data;
598
599 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
600
601 return IRQ_HANDLED;
602}
603
604static const struct rtc_class_ops s5m_rtc_ops = {
605 .read_time = s5m_rtc_read_time,
606 .set_time = s5m_rtc_set_time,
607 .read_alarm = s5m_rtc_read_alarm,
608 .set_alarm = s5m_rtc_set_alarm,
609 .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
610};
611
5bccae6e
SK		 612static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
613{
614 u8 data[2];
5bccae6e 615 int ret;
5bccae6e 616
0c5deb1e
KK		 617 switch (info->device_type) {
618 case S5M8763X:
619 case S5M8767X:
620 /* UDR update time. Default of 7.32 ms is too long. */
621 ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
622 S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
623 if (ret < 0)
624 dev_err(info->dev, "%s: fail to change UDR time: %d\n",
625 __func__, ret);
0c5f5d9a 626
0c5deb1e
KK		 627 /* Set RTC control register : Binary mode, 24hour mode */
628 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
629 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
630
631 ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
632 break;
633
634 case S2MPS14X:
5281f94a 635 case S2MPS13X:
0c5deb1e
KK		 636 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
637 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
ff02c044
JS		 638 if (ret < 0)
639 break;
640
641 /*
642 * Should set WUDR & (RUDR or AUDR) bits to high after writing
643 * RTC_CTRL register like writing Alarm registers. We can't find
644 * the description from datasheet but vendor code does that
645 * really.
646 */
647 ret = s5m8767_rtc_set_alarm_reg(info);
0c5deb1e
KK		 648 break;
649
650 default:
651 return -EINVAL;
652 }
5bccae6e
SK		 653
654 info->rtc_24hr_mode = 1;
5bccae6e
SK		 655 if (ret < 0) {
656 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
657 __func__, ret);
658 return ret;
659 }
660
5bccae6e
SK		 661 return ret;
662}
663
664static int s5m_rtc_probe(struct platform_device *pdev)
665{
666 struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
667 struct sec_platform_data *pdata = s5m87xx->pdata;
668 struct s5m_rtc_info *info;
e349c910 669 const struct regmap_config *regmap_cfg;
a0347f20 670 int ret, alarm_irq;
5bccae6e
SK		 671
672 if (!pdata) {
673 dev_err(pdev->dev.parent, "Platform data not supplied\n");
674 return -ENODEV;
675 }
676
677 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
678 if (!info)
679 return -ENOMEM;
680
94f91922 681 switch (platform_get_device_id(pdev)->driver_data) {
e349c910 682 case S2MPS14X:
5281f94a 683 case S2MPS13X:
e349c910 684 regmap_cfg = &s2mps14_rtc_regmap_config;
0c5deb1e 685 info->regs = &s2mps_rtc_regs;
a0347f20 686 alarm_irq = S2MPS14_IRQ_RTCA0;
e349c910
KK		 687 break;
688 case S5M8763X:
689 regmap_cfg = &s5m_rtc_regmap_config;
f8b23bbd 690 info->regs = &s5m_rtc_regs;
a0347f20 691 alarm_irq = S5M8763_IRQ_ALARM0;
e349c910
KK		 692 break;
693 case S5M8767X:
694 regmap_cfg = &s5m_rtc_regmap_config;
f8b23bbd 695 info->regs = &s5m_rtc_regs;
a0347f20 696 alarm_irq = S5M8767_IRQ_RTCA1;
e349c910
KK		 697 break;
698 default:
94f91922
KK		 699 dev_err(&pdev->dev,
700 "Device type %lu is not supported by RTC driver\n",
701 platform_get_device_id(pdev)->driver_data);
e349c910
KK		 702 return -ENODEV;
703 }
704
705 info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
706 if (!info->i2c) {
707 dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
708 return -ENODEV;
709 }
710
711 info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
712 if (IS_ERR(info->regmap)) {
713 ret = PTR_ERR(info->regmap);
714 dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
715 ret);
716 goto err;
717 }
718
5bccae6e
SK		 719 info->dev = &pdev->dev;
720 info->s5m87xx = s5m87xx;
94f91922 721 info->device_type = platform_get_device_id(pdev)->driver_data;
5bccae6e 722
b7d5b9a9
BZ		 723 if (s5m87xx->irq_data) {
724 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
725 if (info->irq <= 0) {
726 ret = -EINVAL;
727 dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
a0347f20 728 alarm_irq);
b7d5b9a9
BZ		 729 goto err;
730 }
5bccae6e
SK		 731 }
732
733 platform_set_drvdata(pdev, info);
734
735 ret = s5m8767_rtc_init_reg(info);
736
5bccae6e
SK		 737 device_init_wakeup(&pdev->dev, 1);
738
739 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
740 &s5m_rtc_ops, THIS_MODULE);
741
e349c910
KK		 742 if (IS_ERR(info->rtc_dev)) {
743 ret = PTR_ERR(info->rtc_dev);
744 goto err;
745 }
5bccae6e 746
b7d5b9a9
BZ		 747 if (!info->irq) {
748 dev_info(&pdev->dev, "Alarm IRQ not available\n");
749 return 0;
750 }
751
5bccae6e
SK		 752 ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
753 s5m_rtc_alarm_irq, 0, "rtc-alarm0",
754 info);
e349c910 755 if (ret < 0) {
5bccae6e
SK		 756 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
757 info->irq, ret);
e349c910
KK		 758 goto err;
759 }
760
761 return 0;
762
763err:
764 i2c_unregister_device(info->i2c);
5bccae6e
SK		 765
766 return ret;
767}
768
e349c910
KK		 769static int s5m_rtc_remove(struct platform_device *pdev)
770{
771 struct s5m_rtc_info *info = platform_get_drvdata(pdev);
772
e349c910
KK		 773 i2c_unregister_device(info->i2c);
774
775 return 0;
776}
777
11ba5a1e 778#ifdef CONFIG_PM_SLEEP
222ead7f
KK		 779static int s5m_rtc_resume(struct device *dev)
780{
781 struct s5m_rtc_info *info = dev_get_drvdata(dev);
782 int ret = 0;
783
b7d5b9a9 784 if (info->irq && device_may_wakeup(dev))
222ead7f
KK		 785 ret = disable_irq_wake(info->irq);
786
787 return ret;
788}
789
790static int s5m_rtc_suspend(struct device *dev)
791{
792 struct s5m_rtc_info *info = dev_get_drvdata(dev);
793 int ret = 0;
794
b7d5b9a9 795 if (info->irq && device_may_wakeup(dev))
222ead7f
KK		 796 ret = enable_irq_wake(info->irq);
797
798 return ret;
799}
11ba5a1e 800#endif /* CONFIG_PM_SLEEP */
222ead7f
KK		 801
802static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
803
5bccae6e 804static const struct platform_device_id s5m_rtc_id[] = {
0c5deb1e 805 { "s5m-rtc", S5M8767X },
5281f94a 806 { "s2mps13-rtc", S2MPS13X },
0c5deb1e 807 { "s2mps14-rtc", S2MPS14X },
45cd15e6 808 { },
5bccae6e 809};
63074cc3 810MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
5bccae6e
SK		 811
812static struct platform_driver s5m_rtc_driver = {
813 .driver = {
814 .name = "s5m-rtc",
222ead7f 815 .pm = &s5m_rtc_pm_ops,
5bccae6e
SK		 816 },
817 .probe = s5m_rtc_probe,
e349c910 818 .remove = s5m_rtc_remove,
5bccae6e
SK		 819 .id_table = s5m_rtc_id,
820};
821
822module_platform_driver(s5m_rtc_driver);
823
824/* Module information */
825MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
0c5deb1e 826MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
5bccae6e
SK		 827MODULE_LICENSE("GPL");
828MODULE_ALIAS("platform:s5m-rtc");
Linux kernel - Deliverables
This page took 0.169641 seconds and 5 git commands to generate.