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rtc: s5m: Cleanup by removing useless 'rtc' prefix from fields
[deliverable/linux.git] / drivers / rtc / rtc-s5m.c
CommitLineData
5bccae6e 1/*
f8b23bbd 2 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
5bccae6e
SK		 3 * http://www.samsung.com
4 *
5 * Copyright (C) 2013 Google, Inc
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
a737e835
JP		 18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
5bccae6e
SK		 20#include <linux/module.h>
21#include <linux/i2c.h>
5bccae6e 22#include <linux/bcd.h>
5bccae6e
SK		 23#include <linux/regmap.h>
24#include <linux/rtc.h>
5bccae6e
SK		 25#include <linux/platform_device.h>
26#include <linux/mfd/samsung/core.h>
27#include <linux/mfd/samsung/irq.h>
28#include <linux/mfd/samsung/rtc.h>
0c5deb1e 29#include <linux/mfd/samsung/s2mps14.h>
5bccae6e 30
d73238d4
KK		 31/*
32 * Maximum number of retries for checking changes in UDR field
602cb5bb 33 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
d73238d4
KK		 34 *
35 * After writing to RTC registers (setting time or alarm) read the UDR field
602cb5bb 36 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
d73238d4
KK		 37 * been transferred.
38 */
39#define UDR_READ_RETRY_CNT 5
40
f8b23bbd
KK		 41/* Registers used by the driver which are different between chipsets. */
42struct s5m_rtc_reg_config {
43 /* Number of registers used for setting time/alarm0/alarm1 */
44 unsigned int regs_count;
45 /* First register for time, seconds */
46 unsigned int time;
47 /* RTC control register */
48 unsigned int ctrl;
49 /* First register for alarm 0, seconds */
50 unsigned int alarm0;
51 /* First register for alarm 1, seconds */
52 unsigned int alarm1;
f8b23bbd
KK		 53 /*
54 * Register for update flag (UDR). Typically setting UDR field to 1
55 * will enable update of time or alarm register. Then it will be
56 * auto-cleared after successful update.
57 */
a83a793a
KK		 58 unsigned int udr_update;
59 /* Mask for UDR field in 'udr_update' register */
60 unsigned int udr_mask;
f8b23bbd
KK		 61};
62
63/* Register map for S5M8763 and S5M8767 */
64static const struct s5m_rtc_reg_config s5m_rtc_regs = {
65 .regs_count = 8,
66 .time = S5M_RTC_SEC,
67 .ctrl = S5M_ALARM1_CONF,
68 .alarm0 = S5M_ALARM0_SEC,
69 .alarm1 = S5M_ALARM1_SEC,
a83a793a
KK		 70 .udr_update = S5M_RTC_UDR_CON,
71 .udr_mask = S5M_RTC_UDR_MASK,
f8b23bbd
KK		 72};
73
0c5deb1e
KK		 74/*
75 * Register map for S2MPS14.
76 * It may be also suitable for S2MPS11 but this was not tested.
77 */
78static const struct s5m_rtc_reg_config s2mps_rtc_regs = {
79 .regs_count = 7,
80 .time = S2MPS_RTC_SEC,
81 .ctrl = S2MPS_RTC_CTRL,
82 .alarm0 = S2MPS_ALARM0_SEC,
83 .alarm1 = S2MPS_ALARM1_SEC,
a83a793a
KK		 84 .udr_update = S2MPS_RTC_UDR_CON,
85 .udr_mask = S2MPS_RTC_WUDR_MASK,
0c5deb1e
KK		 86};
87
5bccae6e
SK		 88struct s5m_rtc_info {
89 struct device *dev;
e349c910 90 struct i2c_client *i2c;
5bccae6e 91 struct sec_pmic_dev *s5m87xx;
5ccb7d71 92 struct regmap *regmap;
5bccae6e
SK		 93 struct rtc_device *rtc_dev;
94 int irq;
94f91922 95 enum sec_device_type device_type;
5bccae6e 96 int rtc_24hr_mode;
f8b23bbd 97 const struct s5m_rtc_reg_config *regs;
5bccae6e
SK		 98};
99
e349c910
KK		 100static const struct regmap_config s5m_rtc_regmap_config = {
101 .reg_bits = 8,
102 .val_bits = 8,
103
602cb5bb 104 .max_register = S5M_RTC_REG_MAX,
e349c910
KK		 105};
106
107static const struct regmap_config s2mps14_rtc_regmap_config = {
108 .reg_bits = 8,
109 .val_bits = 8,
110
111 .max_register = S2MPS_RTC_REG_MAX,
112};
113
5bccae6e
SK		 114static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
115 int rtc_24hr_mode)
116{
117 tm->tm_sec = data[RTC_SEC] & 0x7f;
118 tm->tm_min = data[RTC_MIN] & 0x7f;
119 if (rtc_24hr_mode) {
120 tm->tm_hour = data[RTC_HOUR] & 0x1f;
121 } else {
122 tm->tm_hour = data[RTC_HOUR] & 0x0f;
123 if (data[RTC_HOUR] & HOUR_PM_MASK)
124 tm->tm_hour += 12;
125 }
126
127 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
128 tm->tm_mday = data[RTC_DATE] & 0x1f;
129 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
130 tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
131 tm->tm_yday = 0;
132 tm->tm_isdst = 0;
133}
134
135static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
136{
137 data[RTC_SEC] = tm->tm_sec;
138 data[RTC_MIN] = tm->tm_min;
139
140 if (tm->tm_hour >= 12)
141 data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
142 else
143 data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
144
145 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
146 data[RTC_DATE] = tm->tm_mday;
147 data[RTC_MONTH] = tm->tm_mon + 1;
148 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
149
150 if (tm->tm_year < 100) {
a737e835 151 pr_err("RTC cannot handle the year %d\n",
5bccae6e
SK		 152 1900 + tm->tm_year);
153 return -EINVAL;
154 } else {
155 return 0;
156 }
157}
158
d73238d4
KK		 159/*
160 * Read RTC_UDR_CON register and wait till UDR field is cleared.
161 * This indicates that time/alarm update ended.
162 */
163static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
164{
165 int ret, retry = UDR_READ_RETRY_CNT;
166 unsigned int data;
167
168 do {
a83a793a
KK		 169 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
170 } while (--retry && (data & info->regs->udr_mask) && !ret);
d73238d4
KK		 171
172 if (!retry)
173 dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
174
175 return ret;
176}
177
f8b23bbd
KK		 178static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
179 struct rtc_wkalrm *alarm)
180{
181 int ret;
182 unsigned int val;
183
184 switch (info->device_type) {
185 case S5M8767X:
186 case S5M8763X:
187 ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
188 val &= S5M_ALARM0_STATUS;
189 break;
a65e5efa 190 case S2MPS15X:
0c5deb1e 191 case S2MPS14X:
5281f94a 192 case S2MPS13X:
0c5deb1e
KK		 193 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
194 &val);
195 val &= S2MPS_ALARM0_STATUS;
196 break;
f8b23bbd
KK		 197 default:
198 return -EINVAL;
199 }
200 if (ret < 0)
201 return ret;
202
203 if (val)
204 alarm->pending = 1;
205 else
206 alarm->pending = 0;
207
208 return 0;
209}
210
5bccae6e
SK		 211static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
212{
213 int ret;
214 unsigned int data;
215
a83a793a 216 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
5bccae6e
SK		 217 if (ret < 0) {
218 dev_err(info->dev, "failed to read update reg(%d)\n", ret);
219 return ret;
220 }
221
a65e5efa
AA		 222 switch (info->device_type) {
223 case S5M8763X:
224 case S5M8767X:
a83a793a 225 data |= info->regs->udr_mask | S5M_RTC_TIME_EN_MASK;
a65e5efa
AA		 226 case S2MPS15X:
227 /* As per UM, for write time register, set WUDR bit to high */
228 data |= S2MPS15_RTC_WUDR_MASK;
229 break;
230 case S2MPS14X:
231 case S2MPS13X:
a83a793a 232 data |= info->regs->udr_mask;
a65e5efa
AA		 233 break;
234 default:
235 return -EINVAL;
236 }
237
a83a793a 238 ret = regmap_write(info->regmap, info->regs->udr_update, data);
5bccae6e
SK		 239 if (ret < 0) {
240 dev_err(info->dev, "failed to write update reg(%d)\n", ret);
241 return ret;
242 }
243
d73238d4 244 ret = s5m8767_wait_for_udr_update(info);
5bccae6e
SK		 245
246 return ret;
247}
248
249static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
250{
251 int ret;
252 unsigned int data;
253
a83a793a 254 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
5bccae6e
SK		 255 if (ret < 0) {
256 dev_err(info->dev, "%s: fail to read update reg(%d)\n",
257 __func__, ret);
258 return ret;
259 }
260
a83a793a 261 data |= info->regs->udr_mask;
0c5deb1e
KK		 262 switch (info->device_type) {
263 case S5M8763X:
264 case S5M8767X:
265 data &= ~S5M_RTC_TIME_EN_MASK;
266 break;
a65e5efa
AA		 267 case S2MPS15X:
268 /* As per UM, for write alarm, set A_UDR(bit[4]) to high
a83a793a 269 * udr_mask above sets bit[4]
a65e5efa
AA		 270 */
271 break;
0c5deb1e
KK		 272 case S2MPS14X:
273 data |= S2MPS_RTC_RUDR_MASK;
274 break;
5281f94a
KK		 275 case S2MPS13X:
276 data |= S2MPS13_RTC_AUDR_MASK;
277 break;
0c5deb1e
KK		 278 default:
279 return -EINVAL;
280 }
5bccae6e 281
a83a793a 282 ret = regmap_write(info->regmap, info->regs->udr_update, data);
5bccae6e
SK		 283 if (ret < 0) {
284 dev_err(info->dev, "%s: fail to write update reg(%d)\n",
285 __func__, ret);
286 return ret;
287 }
288
d73238d4 289 ret = s5m8767_wait_for_udr_update(info);
5bccae6e 290
5281f94a
KK		 291 /* On S2MPS13 the AUDR is not auto-cleared */
292 if (info->device_type == S2MPS13X)
a83a793a 293 regmap_update_bits(info->regmap, info->regs->udr_update,
5281f94a
KK		 294 S2MPS13_RTC_AUDR_MASK, 0);
295
5bccae6e
SK		 296 return ret;
297}
298
299static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
300{
301 tm->tm_sec = bcd2bin(data[RTC_SEC]);
302 tm->tm_min = bcd2bin(data[RTC_MIN]);
303
304 if (data[RTC_HOUR] & HOUR_12) {
305 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
306 if (data[RTC_HOUR] & HOUR_PM)
307 tm->tm_hour += 12;
308 } else {
309 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
310 }
311
312 tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
313 tm->tm_mday = bcd2bin(data[RTC_DATE]);
314 tm->tm_mon = bcd2bin(data[RTC_MONTH]);
315 tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
316 tm->tm_year -= 1900;
317}
318
319static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
320{
321 data[RTC_SEC] = bin2bcd(tm->tm_sec);
322 data[RTC_MIN] = bin2bcd(tm->tm_min);
323 data[RTC_HOUR] = bin2bcd(tm->tm_hour);
324 data[RTC_WEEKDAY] = tm->tm_wday;
325 data[RTC_DATE] = bin2bcd(tm->tm_mday);
326 data[RTC_MONTH] = bin2bcd(tm->tm_mon);
327 data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
328 data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
329}
330
331static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
332{
333 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 334 u8 data[info->regs->regs_count];
5bccae6e
SK		 335 int ret;
336
a65e5efa
AA		 337 if (info->device_type == S2MPS15X || info->device_type == S2MPS14X ||
338 info->device_type == S2MPS13X) {
0c5deb1e 339 ret = regmap_update_bits(info->regmap,
a83a793a 340 info->regs->udr_update,
0c5deb1e
KK		 341 S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK);
342 if (ret) {
343 dev_err(dev,
344 "Failed to prepare registers for time reading: %d\n",
345 ret);
346 return ret;
347 }
348 }
f8b23bbd
KK		 349 ret = regmap_bulk_read(info->regmap, info->regs->time, data,
350 info->regs->regs_count);
5bccae6e
SK		 351 if (ret < 0)
352 return ret;
353
354 switch (info->device_type) {
355 case S5M8763X:
356 s5m8763_data_to_tm(data, tm);
357 break;
358
359 case S5M8767X:
a65e5efa 360 case S2MPS15X:
0c5deb1e 361 case S2MPS14X:
5281f94a 362 case S2MPS13X:
5bccae6e
SK		 363 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
364 break;
365
366 default:
367 return -EINVAL;
368 }
369
370 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
371 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
372 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
373
374 return rtc_valid_tm(tm);
375}
376
377static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
378{
379 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 380 u8 data[info->regs->regs_count];
5bccae6e
SK		 381 int ret = 0;
382
383 switch (info->device_type) {
384 case S5M8763X:
385 s5m8763_tm_to_data(tm, data);
386 break;
387 case S5M8767X:
a65e5efa 388 case S2MPS15X:
0c5deb1e 389 case S2MPS14X:
5281f94a 390 case S2MPS13X:
5bccae6e
SK		 391 ret = s5m8767_tm_to_data(tm, data);
392 break;
393 default:
394 return -EINVAL;
395 }
396
397 if (ret < 0)
398 return ret;
399
400 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
401 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
402 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
403
f8b23bbd
KK		 404 ret = regmap_raw_write(info->regmap, info->regs->time, data,
405 info->regs->regs_count);
5bccae6e
SK		 406 if (ret < 0)
407 return ret;
408
409 ret = s5m8767_rtc_set_time_reg(info);
410
411 return ret;
412}
413
414static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
415{
416 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 417 u8 data[info->regs->regs_count];
5bccae6e
SK		 418 unsigned int val;
419 int ret, i;
420
f8b23bbd
KK		 421 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
422 info->regs->regs_count);
5bccae6e
SK		 423 if (ret < 0)
424 return ret;
425
426 switch (info->device_type) {
427 case S5M8763X:
428 s5m8763_data_to_tm(data, &alrm->time);
602cb5bb 429 ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
5bccae6e
SK		 430 if (ret < 0)
431 return ret;
432
433 alrm->enabled = !!val;
5bccae6e
SK		 434 break;
435
436 case S5M8767X:
a65e5efa 437 case S2MPS15X:
0c5deb1e 438 case S2MPS14X:
5281f94a 439 case S2MPS13X:
5bccae6e 440 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
5bccae6e 441 alrm->enabled = 0;
f8b23bbd 442 for (i = 0; i < info->regs->regs_count; i++) {
5bccae6e
SK		 443 if (data[i] & ALARM_ENABLE_MASK) {
444 alrm->enabled = 1;
445 break;
446 }
447 }
5bccae6e
SK		 448 break;
449
450 default:
451 return -EINVAL;
452 }
453
f8b23bbd
KK		 454 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
455 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
456 alrm->time.tm_mday, alrm->time.tm_hour,
457 alrm->time.tm_min, alrm->time.tm_sec,
458 alrm->time.tm_wday);
459
460 ret = s5m_check_peding_alarm_interrupt(info, alrm);
5bccae6e
SK		 461
462 return 0;
463}
464
465static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
466{
f8b23bbd 467 u8 data[info->regs->regs_count];
5bccae6e
SK		 468 int ret, i;
469 struct rtc_time tm;
470
f8b23bbd
KK		 471 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
472 info->regs->regs_count);
5bccae6e
SK		 473 if (ret < 0)
474 return ret;
475
476 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
477 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
478 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
479 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
480
481 switch (info->device_type) {
482 case S5M8763X:
602cb5bb 483 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
5bccae6e
SK		 484 break;
485
486 case S5M8767X:
a65e5efa 487 case S2MPS15X:
0c5deb1e 488 case S2MPS14X:
5281f94a 489 case S2MPS13X:
f8b23bbd 490 for (i = 0; i < info->regs->regs_count; i++)
5bccae6e
SK		 491 data[i] &= ~ALARM_ENABLE_MASK;
492
f8b23bbd
KK		 493 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
494 info->regs->regs_count);
5bccae6e
SK		 495 if (ret < 0)
496 return ret;
497
498 ret = s5m8767_rtc_set_alarm_reg(info);
499
500 break;
501
502 default:
503 return -EINVAL;
504 }
505
506 return ret;
507}
508
509static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
510{
511 int ret;
f8b23bbd 512 u8 data[info->regs->regs_count];
5bccae6e
SK		 513 u8 alarm0_conf;
514 struct rtc_time tm;
515
f8b23bbd
KK		 516 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
517 info->regs->regs_count);
5bccae6e
SK		 518 if (ret < 0)
519 return ret;
520
521 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
522 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
523 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
524 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
525
526 switch (info->device_type) {
527 case S5M8763X:
528 alarm0_conf = 0x77;
602cb5bb 529 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
5bccae6e
SK		 530 break;
531
532 case S5M8767X:
a65e5efa 533 case S2MPS15X:
0c5deb1e 534 case S2MPS14X:
5281f94a 535 case S2MPS13X:
5bccae6e
SK		 536 data[RTC_SEC] |= ALARM_ENABLE_MASK;
537 data[RTC_MIN] |= ALARM_ENABLE_MASK;
538 data[RTC_HOUR] |= ALARM_ENABLE_MASK;
539 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
540 if (data[RTC_DATE] & 0x1f)
541 data[RTC_DATE] |= ALARM_ENABLE_MASK;
542 if (data[RTC_MONTH] & 0xf)
543 data[RTC_MONTH] |= ALARM_ENABLE_MASK;
544 if (data[RTC_YEAR1] & 0x7f)
545 data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
546
f8b23bbd
KK		 547 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
548 info->regs->regs_count);
5bccae6e
SK		 549 if (ret < 0)
550 return ret;
551 ret = s5m8767_rtc_set_alarm_reg(info);
552
553 break;
554
555 default:
556 return -EINVAL;
557 }
558
559 return ret;
560}
561
562static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
563{
564 struct s5m_rtc_info *info = dev_get_drvdata(dev);
f8b23bbd 565 u8 data[info->regs->regs_count];
5bccae6e
SK		 566 int ret;
567
568 switch (info->device_type) {
569 case S5M8763X:
570 s5m8763_tm_to_data(&alrm->time, data);
571 break;
572
573 case S5M8767X:
a65e5efa 574 case S2MPS15X:
0c5deb1e 575 case S2MPS14X:
5281f94a 576 case S2MPS13X:
5bccae6e
SK		 577 s5m8767_tm_to_data(&alrm->time, data);
578 break;
579
580 default:
581 return -EINVAL;
582 }
583
584 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
585 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
586 alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
587 alrm->time.tm_sec, alrm->time.tm_wday);
588
589 ret = s5m_rtc_stop_alarm(info);
590 if (ret < 0)
591 return ret;
592
f8b23bbd
KK		 593 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
594 info->regs->regs_count);
5bccae6e
SK		 595 if (ret < 0)
596 return ret;
597
598 ret = s5m8767_rtc_set_alarm_reg(info);
599 if (ret < 0)
600 return ret;
601
602 if (alrm->enabled)
603 ret = s5m_rtc_start_alarm(info);
604
605 return ret;
606}
607
608static int s5m_rtc_alarm_irq_enable(struct device *dev,
609 unsigned int enabled)
610{
611 struct s5m_rtc_info *info = dev_get_drvdata(dev);
612
613 if (enabled)
614 return s5m_rtc_start_alarm(info);
615 else
616 return s5m_rtc_stop_alarm(info);
617}
618
619static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
620{
621 struct s5m_rtc_info *info = data;
622
623 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
624
625 return IRQ_HANDLED;
626}
627
628static const struct rtc_class_ops s5m_rtc_ops = {
629 .read_time = s5m_rtc_read_time,
630 .set_time = s5m_rtc_set_time,
631 .read_alarm = s5m_rtc_read_alarm,
632 .set_alarm = s5m_rtc_set_alarm,
633 .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
634};
635
5bccae6e
SK		 636static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
637{
638 u8 data[2];
5bccae6e 639 int ret;
5bccae6e 640
0c5deb1e
KK		 641 switch (info->device_type) {
642 case S5M8763X:
643 case S5M8767X:
644 /* UDR update time. Default of 7.32 ms is too long. */
645 ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
646 S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
647 if (ret < 0)
648 dev_err(info->dev, "%s: fail to change UDR time: %d\n",
649 __func__, ret);
0c5f5d9a 650
0c5deb1e
KK		 651 /* Set RTC control register : Binary mode, 24hour mode */
652 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
653 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
654
655 ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
656 break;
657
a65e5efa 658 case S2MPS15X:
0c5deb1e 659 case S2MPS14X:
5281f94a 660 case S2MPS13X:
0c5deb1e
KK		 661 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
662 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
ff02c044
JS		 663 if (ret < 0)
664 break;
665
666 /*
667 * Should set WUDR & (RUDR or AUDR) bits to high after writing
668 * RTC_CTRL register like writing Alarm registers. We can't find
669 * the description from datasheet but vendor code does that
670 * really.
671 */
672 ret = s5m8767_rtc_set_alarm_reg(info);
0c5deb1e
KK		 673 break;
674
675 default:
676 return -EINVAL;
677 }
5bccae6e
SK		 678
679 info->rtc_24hr_mode = 1;
5bccae6e
SK		 680 if (ret < 0) {
681 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
682 __func__, ret);
683 return ret;
684 }
685
5bccae6e
SK		 686 return ret;
687}
688
689static int s5m_rtc_probe(struct platform_device *pdev)
690{
691 struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
692 struct sec_platform_data *pdata = s5m87xx->pdata;
693 struct s5m_rtc_info *info;
e349c910 694 const struct regmap_config *regmap_cfg;
a0347f20 695 int ret, alarm_irq;
5bccae6e
SK		 696
697 if (!pdata) {
698 dev_err(pdev->dev.parent, "Platform data not supplied\n");
699 return -ENODEV;
700 }
701
702 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
703 if (!info)
704 return -ENOMEM;
705
94f91922 706 switch (platform_get_device_id(pdev)->driver_data) {
a65e5efa 707 case S2MPS15X:
e349c910 708 case S2MPS14X:
5281f94a 709 case S2MPS13X:
e349c910 710 regmap_cfg = &s2mps14_rtc_regmap_config;
0c5deb1e 711 info->regs = &s2mps_rtc_regs;
a0347f20 712 alarm_irq = S2MPS14_IRQ_RTCA0;
e349c910
KK		 713 break;
714 case S5M8763X:
715 regmap_cfg = &s5m_rtc_regmap_config;
f8b23bbd 716 info->regs = &s5m_rtc_regs;
a0347f20 717 alarm_irq = S5M8763_IRQ_ALARM0;
e349c910
KK		 718 break;
719 case S5M8767X:
720 regmap_cfg = &s5m_rtc_regmap_config;
f8b23bbd 721 info->regs = &s5m_rtc_regs;
a0347f20 722 alarm_irq = S5M8767_IRQ_RTCA1;
e349c910
KK		 723 break;
724 default:
94f91922
KK		 725 dev_err(&pdev->dev,
726 "Device type %lu is not supported by RTC driver\n",
727 platform_get_device_id(pdev)->driver_data);
e349c910
KK		 728 return -ENODEV;
729 }
730
731 info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
732 if (!info->i2c) {
733 dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
734 return -ENODEV;
735 }
736
737 info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
738 if (IS_ERR(info->regmap)) {
739 ret = PTR_ERR(info->regmap);
740 dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
741 ret);
742 goto err;
743 }
744
5bccae6e
SK		 745 info->dev = &pdev->dev;
746 info->s5m87xx = s5m87xx;
94f91922 747 info->device_type = platform_get_device_id(pdev)->driver_data;
5bccae6e 748
b7d5b9a9
BZ		 749 if (s5m87xx->irq_data) {
750 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
751 if (info->irq <= 0) {
752 ret = -EINVAL;
753 dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
a0347f20 754 alarm_irq);
b7d5b9a9
BZ		 755 goto err;
756 }
5bccae6e
SK		 757 }
758
759 platform_set_drvdata(pdev, info);
760
761 ret = s5m8767_rtc_init_reg(info);
762
5bccae6e
SK		 763 device_init_wakeup(&pdev->dev, 1);
764
765 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
766 &s5m_rtc_ops, THIS_MODULE);
767
e349c910
KK		 768 if (IS_ERR(info->rtc_dev)) {
769 ret = PTR_ERR(info->rtc_dev);
770 goto err;
771 }
5bccae6e 772
b7d5b9a9
BZ		 773 if (!info->irq) {
774 dev_info(&pdev->dev, "Alarm IRQ not available\n");
775 return 0;
776 }
777
5bccae6e
SK		 778 ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
779 s5m_rtc_alarm_irq, 0, "rtc-alarm0",
780 info);
e349c910 781 if (ret < 0) {
5bccae6e
SK		 782 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
783 info->irq, ret);
e349c910
KK		 784 goto err;
785 }
786
787 return 0;
788
789err:
790 i2c_unregister_device(info->i2c);
5bccae6e
SK		 791
792 return ret;
793}
794
e349c910
KK		 795static int s5m_rtc_remove(struct platform_device *pdev)
796{
797 struct s5m_rtc_info *info = platform_get_drvdata(pdev);
798
e349c910
KK		 799 i2c_unregister_device(info->i2c);
800
801 return 0;
802}
803
11ba5a1e 804#ifdef CONFIG_PM_SLEEP
222ead7f
KK		 805static int s5m_rtc_resume(struct device *dev)
806{
807 struct s5m_rtc_info *info = dev_get_drvdata(dev);
808 int ret = 0;
809
b7d5b9a9 810 if (info->irq && device_may_wakeup(dev))
222ead7f
KK		 811 ret = disable_irq_wake(info->irq);
812
813 return ret;
814}
815
816static int s5m_rtc_suspend(struct device *dev)
817{
818 struct s5m_rtc_info *info = dev_get_drvdata(dev);
819 int ret = 0;
820
b7d5b9a9 821 if (info->irq && device_may_wakeup(dev))
222ead7f
KK		 822 ret = enable_irq_wake(info->irq);
823
824 return ret;
825}
11ba5a1e 826#endif /* CONFIG_PM_SLEEP */
222ead7f
KK		 827
828static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
829
5bccae6e 830static const struct platform_device_id s5m_rtc_id[] = {
0c5deb1e 831 { "s5m-rtc", S5M8767X },
5281f94a 832 { "s2mps13-rtc", S2MPS13X },
0c5deb1e 833 { "s2mps14-rtc", S2MPS14X },
a65e5efa 834 { "s2mps15-rtc", S2MPS15X },
45cd15e6 835 { },
5bccae6e 836};
63074cc3 837MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
5bccae6e
SK		 838
839static struct platform_driver s5m_rtc_driver = {
840 .driver = {
841 .name = "s5m-rtc",
222ead7f 842 .pm = &s5m_rtc_pm_ops,
5bccae6e
SK		 843 },
844 .probe = s5m_rtc_probe,
e349c910 845 .remove = s5m_rtc_remove,
5bccae6e
SK		 846 .id_table = s5m_rtc_id,
847};
848
849module_platform_driver(s5m_rtc_driver);
850
851/* Module information */
852MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
0c5deb1e 853MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
5bccae6e
SK		 854MODULE_LICENSE("GPL");
855MODULE_ALIAS("platform:s5m-rtc");
Linux kernel - Deliverables
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