Commit | Line | Data |
---|---|---|
5bccae6e | 1 | /* |
f8b23bbd | 2 | * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd |
5bccae6e SK |
3 | * http://www.samsung.com |
4 | * | |
5 | * Copyright (C) 2013 Google, Inc | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/i2c.h> | |
5bccae6e | 20 | #include <linux/bcd.h> |
5bccae6e SK |
21 | #include <linux/regmap.h> |
22 | #include <linux/rtc.h> | |
5bccae6e SK |
23 | #include <linux/platform_device.h> |
24 | #include <linux/mfd/samsung/core.h> | |
25 | #include <linux/mfd/samsung/irq.h> | |
26 | #include <linux/mfd/samsung/rtc.h> | |
0c5deb1e | 27 | #include <linux/mfd/samsung/s2mps14.h> |
5bccae6e | 28 | |
d73238d4 KK |
29 | /* |
30 | * Maximum number of retries for checking changes in UDR field | |
602cb5bb | 31 | * of S5M_RTC_UDR_CON register (to limit possible endless loop). |
d73238d4 KK |
32 | * |
33 | * After writing to RTC registers (setting time or alarm) read the UDR field | |
602cb5bb | 34 | * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have |
d73238d4 KK |
35 | * been transferred. |
36 | */ | |
37 | #define UDR_READ_RETRY_CNT 5 | |
38 | ||
f8b23bbd KK |
39 | /* Registers used by the driver which are different between chipsets. */ |
40 | struct s5m_rtc_reg_config { | |
41 | /* Number of registers used for setting time/alarm0/alarm1 */ | |
42 | unsigned int regs_count; | |
43 | /* First register for time, seconds */ | |
44 | unsigned int time; | |
45 | /* RTC control register */ | |
46 | unsigned int ctrl; | |
47 | /* First register for alarm 0, seconds */ | |
48 | unsigned int alarm0; | |
49 | /* First register for alarm 1, seconds */ | |
50 | unsigned int alarm1; | |
f8b23bbd KK |
51 | /* |
52 | * Register for update flag (UDR). Typically setting UDR field to 1 | |
53 | * will enable update of time or alarm register. Then it will be | |
54 | * auto-cleared after successful update. | |
55 | */ | |
56 | unsigned int rtc_udr_update; | |
57 | /* Mask for UDR field in 'rtc_udr_update' register */ | |
58 | unsigned int rtc_udr_mask; | |
59 | }; | |
60 | ||
61 | /* Register map for S5M8763 and S5M8767 */ | |
62 | static const struct s5m_rtc_reg_config s5m_rtc_regs = { | |
63 | .regs_count = 8, | |
64 | .time = S5M_RTC_SEC, | |
65 | .ctrl = S5M_ALARM1_CONF, | |
66 | .alarm0 = S5M_ALARM0_SEC, | |
67 | .alarm1 = S5M_ALARM1_SEC, | |
f8b23bbd KK |
68 | .rtc_udr_update = S5M_RTC_UDR_CON, |
69 | .rtc_udr_mask = S5M_RTC_UDR_MASK, | |
70 | }; | |
71 | ||
0c5deb1e KK |
72 | /* |
73 | * Register map for S2MPS14. | |
74 | * It may be also suitable for S2MPS11 but this was not tested. | |
75 | */ | |
76 | static const struct s5m_rtc_reg_config s2mps_rtc_regs = { | |
77 | .regs_count = 7, | |
78 | .time = S2MPS_RTC_SEC, | |
79 | .ctrl = S2MPS_RTC_CTRL, | |
80 | .alarm0 = S2MPS_ALARM0_SEC, | |
81 | .alarm1 = S2MPS_ALARM1_SEC, | |
0c5deb1e KK |
82 | .rtc_udr_update = S2MPS_RTC_UDR_CON, |
83 | .rtc_udr_mask = S2MPS_RTC_WUDR_MASK, | |
84 | }; | |
85 | ||
5bccae6e SK |
86 | struct s5m_rtc_info { |
87 | struct device *dev; | |
e349c910 | 88 | struct i2c_client *i2c; |
5bccae6e | 89 | struct sec_pmic_dev *s5m87xx; |
5ccb7d71 | 90 | struct regmap *regmap; |
5bccae6e SK |
91 | struct rtc_device *rtc_dev; |
92 | int irq; | |
93 | int device_type; | |
94 | int rtc_24hr_mode; | |
f8b23bbd | 95 | const struct s5m_rtc_reg_config *regs; |
5bccae6e SK |
96 | }; |
97 | ||
e349c910 KK |
98 | static const struct regmap_config s5m_rtc_regmap_config = { |
99 | .reg_bits = 8, | |
100 | .val_bits = 8, | |
101 | ||
602cb5bb | 102 | .max_register = S5M_RTC_REG_MAX, |
e349c910 KK |
103 | }; |
104 | ||
105 | static const struct regmap_config s2mps14_rtc_regmap_config = { | |
106 | .reg_bits = 8, | |
107 | .val_bits = 8, | |
108 | ||
109 | .max_register = S2MPS_RTC_REG_MAX, | |
110 | }; | |
111 | ||
5bccae6e SK |
112 | static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm, |
113 | int rtc_24hr_mode) | |
114 | { | |
115 | tm->tm_sec = data[RTC_SEC] & 0x7f; | |
116 | tm->tm_min = data[RTC_MIN] & 0x7f; | |
117 | if (rtc_24hr_mode) { | |
118 | tm->tm_hour = data[RTC_HOUR] & 0x1f; | |
119 | } else { | |
120 | tm->tm_hour = data[RTC_HOUR] & 0x0f; | |
121 | if (data[RTC_HOUR] & HOUR_PM_MASK) | |
122 | tm->tm_hour += 12; | |
123 | } | |
124 | ||
125 | tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f); | |
126 | tm->tm_mday = data[RTC_DATE] & 0x1f; | |
127 | tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; | |
128 | tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100; | |
129 | tm->tm_yday = 0; | |
130 | tm->tm_isdst = 0; | |
131 | } | |
132 | ||
133 | static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data) | |
134 | { | |
135 | data[RTC_SEC] = tm->tm_sec; | |
136 | data[RTC_MIN] = tm->tm_min; | |
137 | ||
138 | if (tm->tm_hour >= 12) | |
139 | data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK; | |
140 | else | |
141 | data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK; | |
142 | ||
143 | data[RTC_WEEKDAY] = 1 << tm->tm_wday; | |
144 | data[RTC_DATE] = tm->tm_mday; | |
145 | data[RTC_MONTH] = tm->tm_mon + 1; | |
146 | data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; | |
147 | ||
148 | if (tm->tm_year < 100) { | |
149 | pr_err("s5m8767 RTC cannot handle the year %d.\n", | |
150 | 1900 + tm->tm_year); | |
151 | return -EINVAL; | |
152 | } else { | |
153 | return 0; | |
154 | } | |
155 | } | |
156 | ||
d73238d4 KK |
157 | /* |
158 | * Read RTC_UDR_CON register and wait till UDR field is cleared. | |
159 | * This indicates that time/alarm update ended. | |
160 | */ | |
161 | static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info) | |
162 | { | |
163 | int ret, retry = UDR_READ_RETRY_CNT; | |
164 | unsigned int data; | |
165 | ||
166 | do { | |
f8b23bbd KK |
167 | ret = regmap_read(info->regmap, info->regs->rtc_udr_update, |
168 | &data); | |
169 | } while (--retry && (data & info->regs->rtc_udr_mask) && !ret); | |
d73238d4 KK |
170 | |
171 | if (!retry) | |
172 | dev_err(info->dev, "waiting for UDR update, reached max number of retries\n"); | |
173 | ||
174 | return ret; | |
175 | } | |
176 | ||
f8b23bbd KK |
177 | static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info, |
178 | struct rtc_wkalrm *alarm) | |
179 | { | |
180 | int ret; | |
181 | unsigned int val; | |
182 | ||
183 | switch (info->device_type) { | |
184 | case S5M8767X: | |
185 | case S5M8763X: | |
186 | ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val); | |
187 | val &= S5M_ALARM0_STATUS; | |
188 | break; | |
0c5deb1e | 189 | case S2MPS14X: |
5281f94a | 190 | case S2MPS13X: |
0c5deb1e KK |
191 | ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2, |
192 | &val); | |
193 | val &= S2MPS_ALARM0_STATUS; | |
194 | break; | |
f8b23bbd KK |
195 | default: |
196 | return -EINVAL; | |
197 | } | |
198 | if (ret < 0) | |
199 | return ret; | |
200 | ||
201 | if (val) | |
202 | alarm->pending = 1; | |
203 | else | |
204 | alarm->pending = 0; | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
5bccae6e SK |
209 | static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) |
210 | { | |
211 | int ret; | |
212 | unsigned int data; | |
213 | ||
f8b23bbd | 214 | ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data); |
5bccae6e SK |
215 | if (ret < 0) { |
216 | dev_err(info->dev, "failed to read update reg(%d)\n", ret); | |
217 | return ret; | |
218 | } | |
219 | ||
f8b23bbd | 220 | data |= info->regs->rtc_udr_mask; |
0c5deb1e KK |
221 | if (info->device_type == S5M8763X || info->device_type == S5M8767X) |
222 | data |= S5M_RTC_TIME_EN_MASK; | |
5bccae6e | 223 | |
f8b23bbd | 224 | ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data); |
5bccae6e SK |
225 | if (ret < 0) { |
226 | dev_err(info->dev, "failed to write update reg(%d)\n", ret); | |
227 | return ret; | |
228 | } | |
229 | ||
d73238d4 | 230 | ret = s5m8767_wait_for_udr_update(info); |
5bccae6e SK |
231 | |
232 | return ret; | |
233 | } | |
234 | ||
235 | static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) | |
236 | { | |
237 | int ret; | |
238 | unsigned int data; | |
239 | ||
f8b23bbd | 240 | ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data); |
5bccae6e SK |
241 | if (ret < 0) { |
242 | dev_err(info->dev, "%s: fail to read update reg(%d)\n", | |
243 | __func__, ret); | |
244 | return ret; | |
245 | } | |
246 | ||
f8b23bbd | 247 | data |= info->regs->rtc_udr_mask; |
0c5deb1e KK |
248 | switch (info->device_type) { |
249 | case S5M8763X: | |
250 | case S5M8767X: | |
251 | data &= ~S5M_RTC_TIME_EN_MASK; | |
252 | break; | |
253 | case S2MPS14X: | |
254 | data |= S2MPS_RTC_RUDR_MASK; | |
255 | break; | |
5281f94a KK |
256 | case S2MPS13X: |
257 | data |= S2MPS13_RTC_AUDR_MASK; | |
258 | break; | |
0c5deb1e KK |
259 | default: |
260 | return -EINVAL; | |
261 | } | |
5bccae6e | 262 | |
f8b23bbd | 263 | ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data); |
5bccae6e SK |
264 | if (ret < 0) { |
265 | dev_err(info->dev, "%s: fail to write update reg(%d)\n", | |
266 | __func__, ret); | |
267 | return ret; | |
268 | } | |
269 | ||
d73238d4 | 270 | ret = s5m8767_wait_for_udr_update(info); |
5bccae6e | 271 | |
5281f94a KK |
272 | /* On S2MPS13 the AUDR is not auto-cleared */ |
273 | if (info->device_type == S2MPS13X) | |
274 | regmap_update_bits(info->regmap, info->regs->rtc_udr_update, | |
275 | S2MPS13_RTC_AUDR_MASK, 0); | |
276 | ||
5bccae6e SK |
277 | return ret; |
278 | } | |
279 | ||
280 | static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm) | |
281 | { | |
282 | tm->tm_sec = bcd2bin(data[RTC_SEC]); | |
283 | tm->tm_min = bcd2bin(data[RTC_MIN]); | |
284 | ||
285 | if (data[RTC_HOUR] & HOUR_12) { | |
286 | tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f); | |
287 | if (data[RTC_HOUR] & HOUR_PM) | |
288 | tm->tm_hour += 12; | |
289 | } else { | |
290 | tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f); | |
291 | } | |
292 | ||
293 | tm->tm_wday = data[RTC_WEEKDAY] & 0x07; | |
294 | tm->tm_mday = bcd2bin(data[RTC_DATE]); | |
295 | tm->tm_mon = bcd2bin(data[RTC_MONTH]); | |
296 | tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100; | |
297 | tm->tm_year -= 1900; | |
298 | } | |
299 | ||
300 | static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data) | |
301 | { | |
302 | data[RTC_SEC] = bin2bcd(tm->tm_sec); | |
303 | data[RTC_MIN] = bin2bcd(tm->tm_min); | |
304 | data[RTC_HOUR] = bin2bcd(tm->tm_hour); | |
305 | data[RTC_WEEKDAY] = tm->tm_wday; | |
306 | data[RTC_DATE] = bin2bcd(tm->tm_mday); | |
307 | data[RTC_MONTH] = bin2bcd(tm->tm_mon); | |
308 | data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100); | |
309 | data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100); | |
310 | } | |
311 | ||
312 | static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
313 | { | |
314 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
f8b23bbd | 315 | u8 data[info->regs->regs_count]; |
5bccae6e SK |
316 | int ret; |
317 | ||
5281f94a | 318 | if (info->device_type == S2MPS14X || info->device_type == S2MPS13X) { |
0c5deb1e KK |
319 | ret = regmap_update_bits(info->regmap, |
320 | info->regs->rtc_udr_update, | |
321 | S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK); | |
322 | if (ret) { | |
323 | dev_err(dev, | |
324 | "Failed to prepare registers for time reading: %d\n", | |
325 | ret); | |
326 | return ret; | |
327 | } | |
328 | } | |
f8b23bbd KK |
329 | ret = regmap_bulk_read(info->regmap, info->regs->time, data, |
330 | info->regs->regs_count); | |
5bccae6e SK |
331 | if (ret < 0) |
332 | return ret; | |
333 | ||
334 | switch (info->device_type) { | |
335 | case S5M8763X: | |
336 | s5m8763_data_to_tm(data, tm); | |
337 | break; | |
338 | ||
339 | case S5M8767X: | |
0c5deb1e | 340 | case S2MPS14X: |
5281f94a | 341 | case S2MPS13X: |
5bccae6e SK |
342 | s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode); |
343 | break; | |
344 | ||
345 | default: | |
346 | return -EINVAL; | |
347 | } | |
348 | ||
349 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
350 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, | |
351 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); | |
352 | ||
353 | return rtc_valid_tm(tm); | |
354 | } | |
355 | ||
356 | static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
357 | { | |
358 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
f8b23bbd | 359 | u8 data[info->regs->regs_count]; |
5bccae6e SK |
360 | int ret = 0; |
361 | ||
362 | switch (info->device_type) { | |
363 | case S5M8763X: | |
364 | s5m8763_tm_to_data(tm, data); | |
365 | break; | |
366 | case S5M8767X: | |
0c5deb1e | 367 | case S2MPS14X: |
5281f94a | 368 | case S2MPS13X: |
5bccae6e SK |
369 | ret = s5m8767_tm_to_data(tm, data); |
370 | break; | |
371 | default: | |
372 | return -EINVAL; | |
373 | } | |
374 | ||
375 | if (ret < 0) | |
376 | return ret; | |
377 | ||
378 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
379 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, | |
380 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); | |
381 | ||
f8b23bbd KK |
382 | ret = regmap_raw_write(info->regmap, info->regs->time, data, |
383 | info->regs->regs_count); | |
5bccae6e SK |
384 | if (ret < 0) |
385 | return ret; | |
386 | ||
387 | ret = s5m8767_rtc_set_time_reg(info); | |
388 | ||
389 | return ret; | |
390 | } | |
391 | ||
392 | static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
393 | { | |
394 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
f8b23bbd | 395 | u8 data[info->regs->regs_count]; |
5bccae6e SK |
396 | unsigned int val; |
397 | int ret, i; | |
398 | ||
f8b23bbd KK |
399 | ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data, |
400 | info->regs->regs_count); | |
5bccae6e SK |
401 | if (ret < 0) |
402 | return ret; | |
403 | ||
404 | switch (info->device_type) { | |
405 | case S5M8763X: | |
406 | s5m8763_data_to_tm(data, &alrm->time); | |
602cb5bb | 407 | ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val); |
5bccae6e SK |
408 | if (ret < 0) |
409 | return ret; | |
410 | ||
411 | alrm->enabled = !!val; | |
5bccae6e SK |
412 | break; |
413 | ||
414 | case S5M8767X: | |
0c5deb1e | 415 | case S2MPS14X: |
5281f94a | 416 | case S2MPS13X: |
5bccae6e | 417 | s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); |
5bccae6e | 418 | alrm->enabled = 0; |
f8b23bbd | 419 | for (i = 0; i < info->regs->regs_count; i++) { |
5bccae6e SK |
420 | if (data[i] & ALARM_ENABLE_MASK) { |
421 | alrm->enabled = 1; | |
422 | break; | |
423 | } | |
424 | } | |
5bccae6e SK |
425 | break; |
426 | ||
427 | default: | |
428 | return -EINVAL; | |
429 | } | |
430 | ||
f8b23bbd KK |
431 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, |
432 | 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, | |
433 | alrm->time.tm_mday, alrm->time.tm_hour, | |
434 | alrm->time.tm_min, alrm->time.tm_sec, | |
435 | alrm->time.tm_wday); | |
436 | ||
437 | ret = s5m_check_peding_alarm_interrupt(info, alrm); | |
5bccae6e SK |
438 | |
439 | return 0; | |
440 | } | |
441 | ||
442 | static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) | |
443 | { | |
f8b23bbd | 444 | u8 data[info->regs->regs_count]; |
5bccae6e SK |
445 | int ret, i; |
446 | struct rtc_time tm; | |
447 | ||
f8b23bbd KK |
448 | ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data, |
449 | info->regs->regs_count); | |
5bccae6e SK |
450 | if (ret < 0) |
451 | return ret; | |
452 | ||
453 | s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
454 | dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
455 | 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, | |
456 | tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); | |
457 | ||
458 | switch (info->device_type) { | |
459 | case S5M8763X: | |
602cb5bb | 460 | ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0); |
5bccae6e SK |
461 | break; |
462 | ||
463 | case S5M8767X: | |
0c5deb1e | 464 | case S2MPS14X: |
5281f94a | 465 | case S2MPS13X: |
f8b23bbd | 466 | for (i = 0; i < info->regs->regs_count; i++) |
5bccae6e SK |
467 | data[i] &= ~ALARM_ENABLE_MASK; |
468 | ||
f8b23bbd KK |
469 | ret = regmap_raw_write(info->regmap, info->regs->alarm0, data, |
470 | info->regs->regs_count); | |
5bccae6e SK |
471 | if (ret < 0) |
472 | return ret; | |
473 | ||
474 | ret = s5m8767_rtc_set_alarm_reg(info); | |
475 | ||
476 | break; | |
477 | ||
478 | default: | |
479 | return -EINVAL; | |
480 | } | |
481 | ||
482 | return ret; | |
483 | } | |
484 | ||
485 | static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |
486 | { | |
487 | int ret; | |
f8b23bbd | 488 | u8 data[info->regs->regs_count]; |
5bccae6e SK |
489 | u8 alarm0_conf; |
490 | struct rtc_time tm; | |
491 | ||
f8b23bbd KK |
492 | ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data, |
493 | info->regs->regs_count); | |
5bccae6e SK |
494 | if (ret < 0) |
495 | return ret; | |
496 | ||
497 | s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
498 | dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
499 | 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, | |
500 | tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); | |
501 | ||
502 | switch (info->device_type) { | |
503 | case S5M8763X: | |
504 | alarm0_conf = 0x77; | |
602cb5bb | 505 | ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf); |
5bccae6e SK |
506 | break; |
507 | ||
508 | case S5M8767X: | |
0c5deb1e | 509 | case S2MPS14X: |
5281f94a | 510 | case S2MPS13X: |
5bccae6e SK |
511 | data[RTC_SEC] |= ALARM_ENABLE_MASK; |
512 | data[RTC_MIN] |= ALARM_ENABLE_MASK; | |
513 | data[RTC_HOUR] |= ALARM_ENABLE_MASK; | |
514 | data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; | |
515 | if (data[RTC_DATE] & 0x1f) | |
516 | data[RTC_DATE] |= ALARM_ENABLE_MASK; | |
517 | if (data[RTC_MONTH] & 0xf) | |
518 | data[RTC_MONTH] |= ALARM_ENABLE_MASK; | |
519 | if (data[RTC_YEAR1] & 0x7f) | |
520 | data[RTC_YEAR1] |= ALARM_ENABLE_MASK; | |
521 | ||
f8b23bbd KK |
522 | ret = regmap_raw_write(info->regmap, info->regs->alarm0, data, |
523 | info->regs->regs_count); | |
5bccae6e SK |
524 | if (ret < 0) |
525 | return ret; | |
526 | ret = s5m8767_rtc_set_alarm_reg(info); | |
527 | ||
528 | break; | |
529 | ||
530 | default: | |
531 | return -EINVAL; | |
532 | } | |
533 | ||
534 | return ret; | |
535 | } | |
536 | ||
537 | static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
538 | { | |
539 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
f8b23bbd | 540 | u8 data[info->regs->regs_count]; |
5bccae6e SK |
541 | int ret; |
542 | ||
543 | switch (info->device_type) { | |
544 | case S5M8763X: | |
545 | s5m8763_tm_to_data(&alrm->time, data); | |
546 | break; | |
547 | ||
548 | case S5M8767X: | |
0c5deb1e | 549 | case S2MPS14X: |
5281f94a | 550 | case S2MPS13X: |
5bccae6e SK |
551 | s5m8767_tm_to_data(&alrm->time, data); |
552 | break; | |
553 | ||
554 | default: | |
555 | return -EINVAL; | |
556 | } | |
557 | ||
558 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
559 | 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, | |
560 | alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min, | |
561 | alrm->time.tm_sec, alrm->time.tm_wday); | |
562 | ||
563 | ret = s5m_rtc_stop_alarm(info); | |
564 | if (ret < 0) | |
565 | return ret; | |
566 | ||
f8b23bbd KK |
567 | ret = regmap_raw_write(info->regmap, info->regs->alarm0, data, |
568 | info->regs->regs_count); | |
5bccae6e SK |
569 | if (ret < 0) |
570 | return ret; | |
571 | ||
572 | ret = s5m8767_rtc_set_alarm_reg(info); | |
573 | if (ret < 0) | |
574 | return ret; | |
575 | ||
576 | if (alrm->enabled) | |
577 | ret = s5m_rtc_start_alarm(info); | |
578 | ||
579 | return ret; | |
580 | } | |
581 | ||
582 | static int s5m_rtc_alarm_irq_enable(struct device *dev, | |
583 | unsigned int enabled) | |
584 | { | |
585 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
586 | ||
587 | if (enabled) | |
588 | return s5m_rtc_start_alarm(info); | |
589 | else | |
590 | return s5m_rtc_stop_alarm(info); | |
591 | } | |
592 | ||
593 | static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data) | |
594 | { | |
595 | struct s5m_rtc_info *info = data; | |
596 | ||
597 | rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); | |
598 | ||
599 | return IRQ_HANDLED; | |
600 | } | |
601 | ||
602 | static const struct rtc_class_ops s5m_rtc_ops = { | |
603 | .read_time = s5m_rtc_read_time, | |
604 | .set_time = s5m_rtc_set_time, | |
605 | .read_alarm = s5m_rtc_read_alarm, | |
606 | .set_alarm = s5m_rtc_set_alarm, | |
607 | .alarm_irq_enable = s5m_rtc_alarm_irq_enable, | |
608 | }; | |
609 | ||
5bccae6e SK |
610 | static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) |
611 | { | |
612 | u8 data[2]; | |
5bccae6e | 613 | int ret; |
5bccae6e | 614 | |
0c5deb1e KK |
615 | switch (info->device_type) { |
616 | case S5M8763X: | |
617 | case S5M8767X: | |
618 | /* UDR update time. Default of 7.32 ms is too long. */ | |
619 | ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON, | |
620 | S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US); | |
621 | if (ret < 0) | |
622 | dev_err(info->dev, "%s: fail to change UDR time: %d\n", | |
623 | __func__, ret); | |
0c5f5d9a | 624 | |
0c5deb1e KK |
625 | /* Set RTC control register : Binary mode, 24hour mode */ |
626 | data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
627 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
628 | ||
629 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2); | |
630 | break; | |
631 | ||
632 | case S2MPS14X: | |
5281f94a | 633 | case S2MPS13X: |
0c5deb1e KK |
634 | data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); |
635 | ret = regmap_write(info->regmap, info->regs->ctrl, data[0]); | |
636 | break; | |
637 | ||
638 | default: | |
639 | return -EINVAL; | |
640 | } | |
5bccae6e SK |
641 | |
642 | info->rtc_24hr_mode = 1; | |
5bccae6e SK |
643 | if (ret < 0) { |
644 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", | |
645 | __func__, ret); | |
646 | return ret; | |
647 | } | |
648 | ||
5bccae6e SK |
649 | return ret; |
650 | } | |
651 | ||
652 | static int s5m_rtc_probe(struct platform_device *pdev) | |
653 | { | |
654 | struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent); | |
655 | struct sec_platform_data *pdata = s5m87xx->pdata; | |
656 | struct s5m_rtc_info *info; | |
e349c910 | 657 | const struct regmap_config *regmap_cfg; |
a0347f20 | 658 | int ret, alarm_irq; |
5bccae6e SK |
659 | |
660 | if (!pdata) { | |
661 | dev_err(pdev->dev.parent, "Platform data not supplied\n"); | |
662 | return -ENODEV; | |
663 | } | |
664 | ||
665 | info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); | |
666 | if (!info) | |
667 | return -ENOMEM; | |
668 | ||
e349c910 KK |
669 | switch (pdata->device_type) { |
670 | case S2MPS14X: | |
5281f94a | 671 | case S2MPS13X: |
e349c910 | 672 | regmap_cfg = &s2mps14_rtc_regmap_config; |
0c5deb1e | 673 | info->regs = &s2mps_rtc_regs; |
a0347f20 | 674 | alarm_irq = S2MPS14_IRQ_RTCA0; |
e349c910 KK |
675 | break; |
676 | case S5M8763X: | |
677 | regmap_cfg = &s5m_rtc_regmap_config; | |
f8b23bbd | 678 | info->regs = &s5m_rtc_regs; |
a0347f20 | 679 | alarm_irq = S5M8763_IRQ_ALARM0; |
e349c910 KK |
680 | break; |
681 | case S5M8767X: | |
682 | regmap_cfg = &s5m_rtc_regmap_config; | |
f8b23bbd | 683 | info->regs = &s5m_rtc_regs; |
a0347f20 | 684 | alarm_irq = S5M8767_IRQ_RTCA1; |
e349c910 KK |
685 | break; |
686 | default: | |
687 | dev_err(&pdev->dev, "Device type is not supported by RTC driver\n"); | |
688 | return -ENODEV; | |
689 | } | |
690 | ||
691 | info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR); | |
692 | if (!info->i2c) { | |
693 | dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n"); | |
694 | return -ENODEV; | |
695 | } | |
696 | ||
697 | info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg); | |
698 | if (IS_ERR(info->regmap)) { | |
699 | ret = PTR_ERR(info->regmap); | |
700 | dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n", | |
701 | ret); | |
702 | goto err; | |
703 | } | |
704 | ||
5bccae6e SK |
705 | info->dev = &pdev->dev; |
706 | info->s5m87xx = s5m87xx; | |
5bccae6e | 707 | info->device_type = s5m87xx->device_type; |
5bccae6e | 708 | |
b7d5b9a9 BZ |
709 | if (s5m87xx->irq_data) { |
710 | info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq); | |
711 | if (info->irq <= 0) { | |
712 | ret = -EINVAL; | |
713 | dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n", | |
a0347f20 | 714 | alarm_irq); |
b7d5b9a9 BZ |
715 | goto err; |
716 | } | |
5bccae6e SK |
717 | } |
718 | ||
719 | platform_set_drvdata(pdev, info); | |
720 | ||
721 | ret = s5m8767_rtc_init_reg(info); | |
722 | ||
5bccae6e SK |
723 | device_init_wakeup(&pdev->dev, 1); |
724 | ||
725 | info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc", | |
726 | &s5m_rtc_ops, THIS_MODULE); | |
727 | ||
e349c910 KK |
728 | if (IS_ERR(info->rtc_dev)) { |
729 | ret = PTR_ERR(info->rtc_dev); | |
730 | goto err; | |
731 | } | |
5bccae6e | 732 | |
b7d5b9a9 BZ |
733 | if (!info->irq) { |
734 | dev_info(&pdev->dev, "Alarm IRQ not available\n"); | |
735 | return 0; | |
736 | } | |
737 | ||
5bccae6e SK |
738 | ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL, |
739 | s5m_rtc_alarm_irq, 0, "rtc-alarm0", | |
740 | info); | |
e349c910 | 741 | if (ret < 0) { |
5bccae6e SK |
742 | dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", |
743 | info->irq, ret); | |
e349c910 KK |
744 | goto err; |
745 | } | |
746 | ||
747 | return 0; | |
748 | ||
749 | err: | |
750 | i2c_unregister_device(info->i2c); | |
5bccae6e SK |
751 | |
752 | return ret; | |
753 | } | |
754 | ||
e349c910 KK |
755 | static int s5m_rtc_remove(struct platform_device *pdev) |
756 | { | |
757 | struct s5m_rtc_info *info = platform_get_drvdata(pdev); | |
758 | ||
e349c910 KK |
759 | i2c_unregister_device(info->i2c); |
760 | ||
761 | return 0; | |
762 | } | |
763 | ||
11ba5a1e | 764 | #ifdef CONFIG_PM_SLEEP |
222ead7f KK |
765 | static int s5m_rtc_resume(struct device *dev) |
766 | { | |
767 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
768 | int ret = 0; | |
769 | ||
b7d5b9a9 | 770 | if (info->irq && device_may_wakeup(dev)) |
222ead7f KK |
771 | ret = disable_irq_wake(info->irq); |
772 | ||
773 | return ret; | |
774 | } | |
775 | ||
776 | static int s5m_rtc_suspend(struct device *dev) | |
777 | { | |
778 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
779 | int ret = 0; | |
780 | ||
b7d5b9a9 | 781 | if (info->irq && device_may_wakeup(dev)) |
222ead7f KK |
782 | ret = enable_irq_wake(info->irq); |
783 | ||
784 | return ret; | |
785 | } | |
11ba5a1e | 786 | #endif /* CONFIG_PM_SLEEP */ |
222ead7f KK |
787 | |
788 | static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume); | |
789 | ||
5bccae6e | 790 | static const struct platform_device_id s5m_rtc_id[] = { |
0c5deb1e | 791 | { "s5m-rtc", S5M8767X }, |
5281f94a | 792 | { "s2mps13-rtc", S2MPS13X }, |
0c5deb1e | 793 | { "s2mps14-rtc", S2MPS14X }, |
45cd15e6 | 794 | { }, |
5bccae6e SK |
795 | }; |
796 | ||
797 | static struct platform_driver s5m_rtc_driver = { | |
798 | .driver = { | |
799 | .name = "s5m-rtc", | |
222ead7f | 800 | .pm = &s5m_rtc_pm_ops, |
5bccae6e SK |
801 | }, |
802 | .probe = s5m_rtc_probe, | |
e349c910 | 803 | .remove = s5m_rtc_remove, |
5bccae6e SK |
804 | .id_table = s5m_rtc_id, |
805 | }; | |
806 | ||
807 | module_platform_driver(s5m_rtc_driver); | |
808 | ||
809 | /* Module information */ | |
810 | MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); | |
0c5deb1e | 811 | MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver"); |
5bccae6e SK |
812 | MODULE_LICENSE("GPL"); |
813 | MODULE_ALIAS("platform:s5m-rtc"); |