Commit | Line | Data |
---|---|---|
317a6104 PM |
1 | /* |
2 | * SuperH On-Chip RTC Support | |
3 | * | |
b420b1a7 | 4 | * Copyright (C) 2006, 2007, 2008 Paul Mundt |
1b73e6ae | 5 | * Copyright (C) 2006 Jamie Lenehan |
b420b1a7 | 6 | * Copyright (C) 2008 Angelo Castello |
317a6104 PM |
7 | * |
8 | * Based on the old arch/sh/kernel/cpu/rtc.c by: | |
9 | * | |
10 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | |
11 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | |
12 | * | |
13 | * This file is subject to the terms and conditions of the GNU General Public | |
14 | * License. See the file "COPYING" in the main directory of this archive | |
15 | * for more details. | |
16 | */ | |
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/bcd.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/seq_file.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/spinlock.h> | |
31ccb081 | 26 | #include <linux/io.h> |
5d2a5037 | 27 | #include <linux/log2.h> |
ad89f87a | 28 | #include <asm/rtc.h> |
317a6104 | 29 | |
1b73e6ae | 30 | #define DRV_NAME "sh-rtc" |
b420b1a7 | 31 | #define DRV_VERSION "0.2.0" |
317a6104 PM |
32 | |
33 | #define RTC_REG(r) ((r) * rtc_reg_size) | |
34 | ||
31ccb081 | 35 | #define R64CNT RTC_REG(0) |
1b73e6ae JL |
36 | |
37 | #define RSECCNT RTC_REG(1) /* RTC sec */ | |
38 | #define RMINCNT RTC_REG(2) /* RTC min */ | |
39 | #define RHRCNT RTC_REG(3) /* RTC hour */ | |
40 | #define RWKCNT RTC_REG(4) /* RTC week */ | |
41 | #define RDAYCNT RTC_REG(5) /* RTC day */ | |
42 | #define RMONCNT RTC_REG(6) /* RTC month */ | |
43 | #define RYRCNT RTC_REG(7) /* RTC year */ | |
44 | #define RSECAR RTC_REG(8) /* ALARM sec */ | |
45 | #define RMINAR RTC_REG(9) /* ALARM min */ | |
46 | #define RHRAR RTC_REG(10) /* ALARM hour */ | |
47 | #define RWKAR RTC_REG(11) /* ALARM week */ | |
48 | #define RDAYAR RTC_REG(12) /* ALARM day */ | |
49 | #define RMONAR RTC_REG(13) /* ALARM month */ | |
50 | #define RCR1 RTC_REG(14) /* Control */ | |
51 | #define RCR2 RTC_REG(15) /* Control */ | |
52 | ||
ff1b7506 PM |
53 | /* |
54 | * Note on RYRAR and RCR3: Up until this point most of the register | |
55 | * definitions are consistent across all of the available parts. However, | |
56 | * the placement of the optional RYRAR and RCR3 (the RYRAR control | |
57 | * register used to control RYRCNT/RYRAR compare) varies considerably | |
58 | * across various parts, occasionally being mapped in to a completely | |
59 | * unrelated address space. For proper RYRAR support a separate resource | |
60 | * would have to be handed off, but as this is purely optional in | |
61 | * practice, we simply opt not to support it, thereby keeping the code | |
62 | * quite a bit more simplified. | |
63 | */ | |
64 | ||
1b73e6ae JL |
65 | /* ALARM Bits - or with BCD encoded value */ |
66 | #define AR_ENB 0x80 /* Enable for alarm cmp */ | |
317a6104 | 67 | |
b420b1a7 AC |
68 | /* Period Bits */ |
69 | #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */ | |
70 | #define PF_COUNT 0x200 /* Half periodic counter */ | |
71 | #define PF_OXS 0x400 /* Periodic One x Second */ | |
72 | #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */ | |
73 | #define PF_MASK 0xf00 | |
74 | ||
317a6104 PM |
75 | /* RCR1 Bits */ |
76 | #define RCR1_CF 0x80 /* Carry Flag */ | |
77 | #define RCR1_CIE 0x10 /* Carry Interrupt Enable */ | |
78 | #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ | |
79 | #define RCR1_AF 0x01 /* Alarm Flag */ | |
80 | ||
81 | /* RCR2 Bits */ | |
82 | #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ | |
83 | #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ | |
84 | #define RCR2_RTCEN 0x08 /* ENable RTC */ | |
85 | #define RCR2_ADJ 0x04 /* ADJustment (30-second) */ | |
86 | #define RCR2_RESET 0x02 /* Reset bit */ | |
87 | #define RCR2_START 0x01 /* Start bit */ | |
88 | ||
89 | struct sh_rtc { | |
90 | void __iomem *regbase; | |
91 | unsigned long regsize; | |
92 | struct resource *res; | |
2fac6674 AV |
93 | int alarm_irq; |
94 | int periodic_irq; | |
95 | int carry_irq; | |
317a6104 PM |
96 | struct rtc_device *rtc_dev; |
97 | spinlock_t lock; | |
ad89f87a | 98 | unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */ |
b420b1a7 | 99 | unsigned short periodic_freq; |
317a6104 PM |
100 | }; |
101 | ||
31ccb081 | 102 | static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id) |
317a6104 | 103 | { |
b420b1a7 AC |
104 | struct sh_rtc *rtc = dev_id; |
105 | unsigned int tmp; | |
317a6104 PM |
106 | |
107 | spin_lock(&rtc->lock); | |
108 | ||
109 | tmp = readb(rtc->regbase + RCR1); | |
1b73e6ae | 110 | tmp &= ~RCR1_CF; |
317a6104 PM |
111 | writeb(tmp, rtc->regbase + RCR1); |
112 | ||
b420b1a7 AC |
113 | /* Users have requested One x Second IRQ */ |
114 | if (rtc->periodic_freq & PF_OXS) | |
115 | rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF); | |
317a6104 PM |
116 | |
117 | spin_unlock(&rtc->lock); | |
118 | ||
119 | return IRQ_HANDLED; | |
120 | } | |
121 | ||
1b73e6ae JL |
122 | static irqreturn_t sh_rtc_alarm(int irq, void *dev_id) |
123 | { | |
b420b1a7 AC |
124 | struct sh_rtc *rtc = dev_id; |
125 | unsigned int tmp; | |
1b73e6ae JL |
126 | |
127 | spin_lock(&rtc->lock); | |
128 | ||
129 | tmp = readb(rtc->regbase + RCR1); | |
b420b1a7 | 130 | tmp &= ~(RCR1_AF | RCR1_AIE); |
1b73e6ae JL |
131 | writeb(tmp, rtc->regbase + RCR1); |
132 | ||
b420b1a7 | 133 | rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF); |
1b73e6ae JL |
134 | |
135 | spin_unlock(&rtc->lock); | |
b420b1a7 | 136 | |
1b73e6ae JL |
137 | return IRQ_HANDLED; |
138 | } | |
139 | ||
31ccb081 | 140 | static irqreturn_t sh_rtc_periodic(int irq, void *dev_id) |
317a6104 | 141 | { |
b420b1a7 AC |
142 | struct sh_rtc *rtc = dev_id; |
143 | struct rtc_device *rtc_dev = rtc->rtc_dev; | |
144 | unsigned int tmp; | |
317a6104 PM |
145 | |
146 | spin_lock(&rtc->lock); | |
147 | ||
b420b1a7 AC |
148 | tmp = readb(rtc->regbase + RCR2); |
149 | tmp &= ~RCR2_PEF; | |
150 | writeb(tmp, rtc->regbase + RCR2); | |
151 | ||
152 | /* Half period enabled than one skipped and the next notified */ | |
153 | if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT)) | |
154 | rtc->periodic_freq &= ~PF_COUNT; | |
155 | else { | |
156 | if (rtc->periodic_freq & PF_HP) | |
157 | rtc->periodic_freq |= PF_COUNT; | |
158 | if (rtc->periodic_freq & PF_KOU) { | |
159 | spin_lock(&rtc_dev->irq_task_lock); | |
160 | if (rtc_dev->irq_task) | |
161 | rtc_dev->irq_task->func(rtc_dev->irq_task->private_data); | |
162 | spin_unlock(&rtc_dev->irq_task_lock); | |
163 | } else | |
164 | rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF); | |
165 | } | |
317a6104 PM |
166 | |
167 | spin_unlock(&rtc->lock); | |
168 | ||
169 | return IRQ_HANDLED; | |
170 | } | |
171 | ||
172 | static inline void sh_rtc_setpie(struct device *dev, unsigned int enable) | |
173 | { | |
174 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
175 | unsigned int tmp; | |
176 | ||
177 | spin_lock_irq(&rtc->lock); | |
178 | ||
179 | tmp = readb(rtc->regbase + RCR2); | |
180 | ||
181 | if (enable) { | |
b420b1a7 AC |
182 | tmp &= ~RCR2_PEF; /* Clear PES bit */ |
183 | tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */ | |
317a6104 PM |
184 | } else |
185 | tmp &= ~(RCR2_PESMASK | RCR2_PEF); | |
186 | ||
187 | writeb(tmp, rtc->regbase + RCR2); | |
188 | ||
189 | spin_unlock_irq(&rtc->lock); | |
190 | } | |
191 | ||
b420b1a7 | 192 | static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq) |
317a6104 PM |
193 | { |
194 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
b420b1a7 | 195 | int tmp, ret = 0; |
317a6104 PM |
196 | |
197 | spin_lock_irq(&rtc->lock); | |
b420b1a7 | 198 | tmp = rtc->periodic_freq & PF_MASK; |
317a6104 | 199 | |
b420b1a7 AC |
200 | switch (freq) { |
201 | case 0: | |
202 | rtc->periodic_freq = 0x00; | |
203 | break; | |
204 | case 1: | |
205 | rtc->periodic_freq = 0x60; | |
206 | break; | |
207 | case 2: | |
208 | rtc->periodic_freq = 0x50; | |
209 | break; | |
210 | case 4: | |
211 | rtc->periodic_freq = 0x40; | |
212 | break; | |
213 | case 8: | |
214 | rtc->periodic_freq = 0x30 | PF_HP; | |
215 | break; | |
216 | case 16: | |
217 | rtc->periodic_freq = 0x30; | |
218 | break; | |
219 | case 32: | |
220 | rtc->periodic_freq = 0x20 | PF_HP; | |
221 | break; | |
222 | case 64: | |
223 | rtc->periodic_freq = 0x20; | |
224 | break; | |
225 | case 128: | |
226 | rtc->periodic_freq = 0x10 | PF_HP; | |
227 | break; | |
228 | case 256: | |
229 | rtc->periodic_freq = 0x10; | |
230 | break; | |
231 | default: | |
232 | ret = -ENOTSUPP; | |
233 | } | |
317a6104 | 234 | |
b420b1a7 AC |
235 | if (ret == 0) { |
236 | rtc->periodic_freq |= tmp; | |
237 | rtc->rtc_dev->irq_freq = freq; | |
238 | } | |
317a6104 PM |
239 | |
240 | spin_unlock_irq(&rtc->lock); | |
b420b1a7 | 241 | return ret; |
317a6104 PM |
242 | } |
243 | ||
b420b1a7 | 244 | static inline void sh_rtc_setaie(struct device *dev, unsigned int enable) |
317a6104 PM |
245 | { |
246 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
247 | unsigned int tmp; | |
317a6104 | 248 | |
b420b1a7 | 249 | spin_lock_irq(&rtc->lock); |
317a6104 | 250 | |
b420b1a7 | 251 | tmp = readb(rtc->regbase + RCR1); |
317a6104 | 252 | |
b420b1a7 AC |
253 | if (!enable) |
254 | tmp &= ~RCR1_AIE; | |
255 | else | |
256 | tmp |= RCR1_AIE; | |
317a6104 | 257 | |
b420b1a7 | 258 | writeb(tmp, rtc->regbase + RCR1); |
317a6104 | 259 | |
b420b1a7 | 260 | spin_unlock_irq(&rtc->lock); |
317a6104 PM |
261 | } |
262 | ||
317a6104 PM |
263 | static int sh_rtc_proc(struct device *dev, struct seq_file *seq) |
264 | { | |
265 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
266 | unsigned int tmp; | |
267 | ||
268 | tmp = readb(rtc->regbase + RCR1); | |
b420b1a7 | 269 | seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no"); |
317a6104 PM |
270 | |
271 | tmp = readb(rtc->regbase + RCR2); | |
272 | seq_printf(seq, "periodic_IRQ\t: %s\n", | |
b420b1a7 | 273 | (tmp & RCR2_PESMASK) ? "yes" : "no"); |
317a6104 PM |
274 | |
275 | return 0; | |
276 | } | |
277 | ||
278 | static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
279 | { | |
b420b1a7 AC |
280 | struct sh_rtc *rtc = dev_get_drvdata(dev); |
281 | unsigned int ret = 0; | |
317a6104 PM |
282 | |
283 | switch (cmd) { | |
284 | case RTC_PIE_OFF: | |
285 | case RTC_PIE_ON: | |
286 | sh_rtc_setpie(dev, cmd == RTC_PIE_ON); | |
317a6104 PM |
287 | break; |
288 | case RTC_AIE_OFF: | |
289 | case RTC_AIE_ON: | |
290 | sh_rtc_setaie(dev, cmd == RTC_AIE_ON); | |
317a6104 | 291 | break; |
b420b1a7 AC |
292 | case RTC_UIE_OFF: |
293 | rtc->periodic_freq &= ~PF_OXS; | |
294 | break; | |
295 | case RTC_UIE_ON: | |
296 | rtc->periodic_freq |= PF_OXS; | |
297 | break; | |
298 | case RTC_IRQP_READ: | |
299 | ret = put_user(rtc->rtc_dev->irq_freq, | |
300 | (unsigned long __user *)arg); | |
301 | break; | |
302 | case RTC_IRQP_SET: | |
303 | ret = sh_rtc_setfreq(dev, arg); | |
304 | break; | |
305 | default: | |
306 | ret = -ENOIOCTLCMD; | |
317a6104 PM |
307 | } |
308 | ||
309 | return ret; | |
310 | } | |
311 | ||
312 | static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
313 | { | |
314 | struct platform_device *pdev = to_platform_device(dev); | |
315 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
316 | unsigned int sec128, sec2, yr, yr100, cf_bit; | |
317 | ||
318 | do { | |
319 | unsigned int tmp; | |
320 | ||
321 | spin_lock_irq(&rtc->lock); | |
322 | ||
323 | tmp = readb(rtc->regbase + RCR1); | |
324 | tmp &= ~RCR1_CF; /* Clear CF-bit */ | |
325 | tmp |= RCR1_CIE; | |
326 | writeb(tmp, rtc->regbase + RCR1); | |
327 | ||
328 | sec128 = readb(rtc->regbase + R64CNT); | |
329 | ||
fe20ba70 AB |
330 | tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT)); |
331 | tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT)); | |
332 | tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT)); | |
333 | tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT)); | |
334 | tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT)); | |
335 | tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1; | |
317a6104 | 336 | |
ad89f87a PM |
337 | if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { |
338 | yr = readw(rtc->regbase + RYRCNT); | |
fe20ba70 | 339 | yr100 = bcd2bin(yr >> 8); |
ad89f87a PM |
340 | yr &= 0xff; |
341 | } else { | |
342 | yr = readb(rtc->regbase + RYRCNT); | |
fe20ba70 | 343 | yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20); |
ad89f87a | 344 | } |
317a6104 | 345 | |
fe20ba70 | 346 | tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900; |
317a6104 PM |
347 | |
348 | sec2 = readb(rtc->regbase + R64CNT); | |
349 | cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF; | |
350 | ||
351 | spin_unlock_irq(&rtc->lock); | |
352 | } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0); | |
353 | ||
354 | #if RTC_BIT_INVERTED != 0 | |
355 | if ((sec128 & RTC_BIT_INVERTED)) | |
356 | tm->tm_sec--; | |
357 | #endif | |
358 | ||
435c55d1 | 359 | dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
317a6104 | 360 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 361 | __func__, |
317a6104 | 362 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
a1614796 | 363 | tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); |
317a6104 | 364 | |
0ac554b9 | 365 | if (rtc_valid_tm(tm) < 0) { |
317a6104 | 366 | dev_err(dev, "invalid date\n"); |
0ac554b9 PM |
367 | rtc_time_to_tm(0, tm); |
368 | } | |
317a6104 PM |
369 | |
370 | return 0; | |
371 | } | |
372 | ||
373 | static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
374 | { | |
375 | struct platform_device *pdev = to_platform_device(dev); | |
376 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
377 | unsigned int tmp; | |
378 | int year; | |
379 | ||
380 | spin_lock_irq(&rtc->lock); | |
381 | ||
382 | /* Reset pre-scaler & stop RTC */ | |
383 | tmp = readb(rtc->regbase + RCR2); | |
384 | tmp |= RCR2_RESET; | |
699bc661 | 385 | tmp &= ~RCR2_START; |
317a6104 PM |
386 | writeb(tmp, rtc->regbase + RCR2); |
387 | ||
fe20ba70 AB |
388 | writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT); |
389 | writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT); | |
390 | writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT); | |
391 | writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT); | |
392 | writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT); | |
393 | writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT); | |
317a6104 | 394 | |
ad89f87a | 395 | if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { |
fe20ba70 AB |
396 | year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) | |
397 | bin2bcd(tm->tm_year % 100); | |
ad89f87a PM |
398 | writew(year, rtc->regbase + RYRCNT); |
399 | } else { | |
400 | year = tm->tm_year % 100; | |
fe20ba70 | 401 | writeb(bin2bcd(year), rtc->regbase + RYRCNT); |
ad89f87a | 402 | } |
317a6104 PM |
403 | |
404 | /* Start RTC */ | |
405 | tmp = readb(rtc->regbase + RCR2); | |
406 | tmp &= ~RCR2_RESET; | |
407 | tmp |= RCR2_RTCEN | RCR2_START; | |
408 | writeb(tmp, rtc->regbase + RCR2); | |
409 | ||
410 | spin_unlock_irq(&rtc->lock); | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
1b73e6ae JL |
415 | static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off) |
416 | { | |
417 | unsigned int byte; | |
418 | int value = 0xff; /* return 0xff for ignored values */ | |
419 | ||
420 | byte = readb(rtc->regbase + reg_off); | |
421 | if (byte & AR_ENB) { | |
422 | byte &= ~AR_ENB; /* strip the enable bit */ | |
fe20ba70 | 423 | value = bcd2bin(byte); |
1b73e6ae JL |
424 | } |
425 | ||
426 | return value; | |
427 | } | |
428 | ||
429 | static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) | |
430 | { | |
431 | struct platform_device *pdev = to_platform_device(dev); | |
432 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
b420b1a7 | 433 | struct rtc_time *tm = &wkalrm->time; |
1b73e6ae JL |
434 | |
435 | spin_lock_irq(&rtc->lock); | |
436 | ||
437 | tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR); | |
438 | tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR); | |
439 | tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR); | |
440 | tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR); | |
441 | tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR); | |
442 | tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR); | |
443 | if (tm->tm_mon > 0) | |
444 | tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */ | |
445 | tm->tm_year = 0xffff; | |
446 | ||
0d103e90 DB |
447 | wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0; |
448 | ||
1b73e6ae JL |
449 | spin_unlock_irq(&rtc->lock); |
450 | ||
451 | return 0; | |
452 | } | |
453 | ||
454 | static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc, | |
455 | int value, int reg_off) | |
456 | { | |
457 | /* < 0 for a value that is ignored */ | |
458 | if (value < 0) | |
459 | writeb(0, rtc->regbase + reg_off); | |
460 | else | |
fe20ba70 | 461 | writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off); |
1b73e6ae JL |
462 | } |
463 | ||
b420b1a7 | 464 | static int sh_rtc_check_alarm(struct rtc_time *tm) |
1b73e6ae JL |
465 | { |
466 | /* | |
467 | * The original rtc says anything > 0xc0 is "don't care" or "match | |
468 | * all" - most users use 0xff but rtc-dev uses -1 for the same thing. | |
469 | * The original rtc doesn't support years - some things use -1 and | |
470 | * some 0xffff. We use -1 to make out tests easier. | |
471 | */ | |
472 | if (tm->tm_year == 0xffff) | |
473 | tm->tm_year = -1; | |
474 | if (tm->tm_mon >= 0xff) | |
475 | tm->tm_mon = -1; | |
476 | if (tm->tm_mday >= 0xff) | |
477 | tm->tm_mday = -1; | |
478 | if (tm->tm_wday >= 0xff) | |
479 | tm->tm_wday = -1; | |
480 | if (tm->tm_hour >= 0xff) | |
481 | tm->tm_hour = -1; | |
482 | if (tm->tm_min >= 0xff) | |
483 | tm->tm_min = -1; | |
484 | if (tm->tm_sec >= 0xff) | |
485 | tm->tm_sec = -1; | |
486 | ||
487 | if (tm->tm_year > 9999 || | |
488 | tm->tm_mon >= 12 || | |
489 | tm->tm_mday == 0 || tm->tm_mday >= 32 || | |
490 | tm->tm_wday >= 7 || | |
491 | tm->tm_hour >= 24 || | |
492 | tm->tm_min >= 60 || | |
493 | tm->tm_sec >= 60) | |
494 | return -EINVAL; | |
495 | ||
496 | return 0; | |
497 | } | |
498 | ||
499 | static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) | |
500 | { | |
501 | struct platform_device *pdev = to_platform_device(dev); | |
502 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
503 | unsigned int rcr1; | |
504 | struct rtc_time *tm = &wkalrm->time; | |
505 | int mon, err; | |
506 | ||
507 | err = sh_rtc_check_alarm(tm); | |
508 | if (unlikely(err < 0)) | |
509 | return err; | |
510 | ||
511 | spin_lock_irq(&rtc->lock); | |
512 | ||
15c945c3 | 513 | /* disable alarm interrupt and clear the alarm flag */ |
1b73e6ae | 514 | rcr1 = readb(rtc->regbase + RCR1); |
b420b1a7 | 515 | rcr1 &= ~(RCR1_AF | RCR1_AIE); |
15c945c3 | 516 | writeb(rcr1, rtc->regbase + RCR1); |
1b73e6ae | 517 | |
1b73e6ae JL |
518 | /* set alarm time */ |
519 | sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR); | |
520 | sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR); | |
521 | sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR); | |
522 | sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR); | |
523 | sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR); | |
524 | mon = tm->tm_mon; | |
525 | if (mon >= 0) | |
526 | mon += 1; | |
527 | sh_rtc_write_alarm_value(rtc, mon, RMONAR); | |
528 | ||
15c945c3 JL |
529 | if (wkalrm->enabled) { |
530 | rcr1 |= RCR1_AIE; | |
531 | writeb(rcr1, rtc->regbase + RCR1); | |
532 | } | |
1b73e6ae JL |
533 | |
534 | spin_unlock_irq(&rtc->lock); | |
535 | ||
536 | return 0; | |
537 | } | |
538 | ||
b420b1a7 AC |
539 | static int sh_rtc_irq_set_state(struct device *dev, int enabled) |
540 | { | |
541 | struct platform_device *pdev = to_platform_device(dev); | |
542 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
543 | ||
544 | if (enabled) { | |
545 | rtc->periodic_freq |= PF_KOU; | |
546 | return sh_rtc_ioctl(dev, RTC_PIE_ON, 0); | |
547 | } else { | |
548 | rtc->periodic_freq &= ~PF_KOU; | |
549 | return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0); | |
550 | } | |
551 | } | |
552 | ||
553 | static int sh_rtc_irq_set_freq(struct device *dev, int freq) | |
554 | { | |
5d2a5037 JC |
555 | if (!is_power_of_2(freq)) |
556 | return -EINVAL; | |
b420b1a7 AC |
557 | return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq); |
558 | } | |
559 | ||
317a6104 | 560 | static struct rtc_class_ops sh_rtc_ops = { |
317a6104 PM |
561 | .ioctl = sh_rtc_ioctl, |
562 | .read_time = sh_rtc_read_time, | |
563 | .set_time = sh_rtc_set_time, | |
1b73e6ae JL |
564 | .read_alarm = sh_rtc_read_alarm, |
565 | .set_alarm = sh_rtc_set_alarm, | |
b420b1a7 AC |
566 | .irq_set_state = sh_rtc_irq_set_state, |
567 | .irq_set_freq = sh_rtc_irq_set_freq, | |
317a6104 PM |
568 | .proc = sh_rtc_proc, |
569 | }; | |
570 | ||
571 | static int __devinit sh_rtc_probe(struct platform_device *pdev) | |
572 | { | |
573 | struct sh_rtc *rtc; | |
574 | struct resource *res; | |
b420b1a7 | 575 | unsigned int tmp; |
2641dc92 | 576 | int ret; |
317a6104 PM |
577 | |
578 | rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL); | |
579 | if (unlikely(!rtc)) | |
580 | return -ENOMEM; | |
581 | ||
582 | spin_lock_init(&rtc->lock); | |
583 | ||
b420b1a7 | 584 | /* get periodic/carry/alarm irqs */ |
2641dc92 | 585 | ret = platform_get_irq(pdev, 0); |
2fac6674 | 586 | if (unlikely(ret <= 0)) { |
2641dc92 | 587 | ret = -ENOENT; |
317a6104 PM |
588 | dev_err(&pdev->dev, "No IRQ for period\n"); |
589 | goto err_badres; | |
590 | } | |
2641dc92 | 591 | rtc->periodic_irq = ret; |
317a6104 | 592 | |
2641dc92 | 593 | ret = platform_get_irq(pdev, 1); |
2fac6674 | 594 | if (unlikely(ret <= 0)) { |
2641dc92 | 595 | ret = -ENOENT; |
317a6104 PM |
596 | dev_err(&pdev->dev, "No IRQ for carry\n"); |
597 | goto err_badres; | |
598 | } | |
2641dc92 | 599 | rtc->carry_irq = ret; |
317a6104 | 600 | |
2641dc92 | 601 | ret = platform_get_irq(pdev, 2); |
2fac6674 | 602 | if (unlikely(ret <= 0)) { |
2641dc92 | 603 | ret = -ENOENT; |
317a6104 PM |
604 | dev_err(&pdev->dev, "No IRQ for alarm\n"); |
605 | goto err_badres; | |
606 | } | |
2641dc92 | 607 | rtc->alarm_irq = ret; |
317a6104 PM |
608 | |
609 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
610 | if (unlikely(res == NULL)) { | |
2641dc92 | 611 | ret = -ENOENT; |
317a6104 PM |
612 | dev_err(&pdev->dev, "No IO resource\n"); |
613 | goto err_badres; | |
614 | } | |
615 | ||
616 | rtc->regsize = res->end - res->start + 1; | |
617 | ||
618 | rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name); | |
619 | if (unlikely(!rtc->res)) { | |
620 | ret = -EBUSY; | |
621 | goto err_badres; | |
622 | } | |
623 | ||
0305794c | 624 | rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize); |
317a6104 PM |
625 | if (unlikely(!rtc->regbase)) { |
626 | ret = -EINVAL; | |
627 | goto err_badmap; | |
628 | } | |
629 | ||
630 | rtc->rtc_dev = rtc_device_register("sh", &pdev->dev, | |
631 | &sh_rtc_ops, THIS_MODULE); | |
29dd0dae | 632 | if (IS_ERR(rtc->rtc_dev)) { |
317a6104 | 633 | ret = PTR_ERR(rtc->rtc_dev); |
0305794c | 634 | goto err_unmap; |
317a6104 PM |
635 | } |
636 | ||
ad89f87a PM |
637 | rtc->capabilities = RTC_DEF_CAPABILITIES; |
638 | if (pdev->dev.platform_data) { | |
639 | struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data; | |
640 | ||
641 | /* | |
642 | * Some CPUs have special capabilities in addition to the | |
643 | * default set. Add those in here. | |
644 | */ | |
645 | rtc->capabilities |= pinfo->capabilities; | |
646 | } | |
647 | ||
b420b1a7 AC |
648 | rtc->rtc_dev->max_user_freq = 256; |
649 | rtc->rtc_dev->irq_freq = 1; | |
650 | rtc->periodic_freq = 0x60; | |
651 | ||
317a6104 PM |
652 | platform_set_drvdata(pdev, rtc); |
653 | ||
b420b1a7 AC |
654 | /* register periodic/carry/alarm irqs */ |
655 | ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED, | |
656 | "sh-rtc period", rtc); | |
657 | if (unlikely(ret)) { | |
658 | dev_err(&pdev->dev, | |
659 | "request period IRQ failed with %d, IRQ %d\n", ret, | |
660 | rtc->periodic_irq); | |
0305794c | 661 | goto err_unmap; |
b420b1a7 AC |
662 | } |
663 | ||
664 | ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED, | |
665 | "sh-rtc carry", rtc); | |
666 | if (unlikely(ret)) { | |
667 | dev_err(&pdev->dev, | |
668 | "request carry IRQ failed with %d, IRQ %d\n", ret, | |
669 | rtc->carry_irq); | |
670 | free_irq(rtc->periodic_irq, rtc); | |
0305794c | 671 | goto err_unmap; |
b420b1a7 AC |
672 | } |
673 | ||
674 | ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED, | |
675 | "sh-rtc alarm", rtc); | |
676 | if (unlikely(ret)) { | |
677 | dev_err(&pdev->dev, | |
678 | "request alarm IRQ failed with %d, IRQ %d\n", ret, | |
679 | rtc->alarm_irq); | |
680 | free_irq(rtc->carry_irq, rtc); | |
681 | free_irq(rtc->periodic_irq, rtc); | |
0305794c | 682 | goto err_unmap; |
b420b1a7 AC |
683 | } |
684 | ||
685 | tmp = readb(rtc->regbase + RCR1); | |
686 | tmp &= ~RCR1_CF; | |
687 | tmp |= RCR1_CIE; | |
688 | writeb(tmp, rtc->regbase + RCR1); | |
689 | ||
317a6104 PM |
690 | return 0; |
691 | ||
0305794c PM |
692 | err_unmap: |
693 | iounmap(rtc->regbase); | |
317a6104 PM |
694 | err_badmap: |
695 | release_resource(rtc->res); | |
696 | err_badres: | |
697 | kfree(rtc); | |
698 | ||
699 | return ret; | |
700 | } | |
701 | ||
702 | static int __devexit sh_rtc_remove(struct platform_device *pdev) | |
703 | { | |
704 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
705 | ||
706 | if (likely(rtc->rtc_dev)) | |
707 | rtc_device_unregister(rtc->rtc_dev); | |
708 | ||
709 | sh_rtc_setpie(&pdev->dev, 0); | |
710 | sh_rtc_setaie(&pdev->dev, 0); | |
711 | ||
b420b1a7 AC |
712 | free_irq(rtc->carry_irq, rtc); |
713 | free_irq(rtc->periodic_irq, rtc); | |
714 | free_irq(rtc->alarm_irq, rtc); | |
715 | ||
317a6104 PM |
716 | release_resource(rtc->res); |
717 | ||
0305794c PM |
718 | iounmap(rtc->regbase); |
719 | ||
317a6104 PM |
720 | platform_set_drvdata(pdev, NULL); |
721 | ||
722 | kfree(rtc); | |
723 | ||
724 | return 0; | |
725 | } | |
726 | static struct platform_driver sh_rtc_platform_driver = { | |
727 | .driver = { | |
1b73e6ae | 728 | .name = DRV_NAME, |
317a6104 PM |
729 | .owner = THIS_MODULE, |
730 | }, | |
731 | .probe = sh_rtc_probe, | |
732 | .remove = __devexit_p(sh_rtc_remove), | |
733 | }; | |
734 | ||
735 | static int __init sh_rtc_init(void) | |
736 | { | |
737 | return platform_driver_register(&sh_rtc_platform_driver); | |
738 | } | |
739 | ||
740 | static void __exit sh_rtc_exit(void) | |
741 | { | |
742 | platform_driver_unregister(&sh_rtc_platform_driver); | |
743 | } | |
744 | ||
745 | module_init(sh_rtc_init); | |
746 | module_exit(sh_rtc_exit); | |
747 | ||
748 | MODULE_DESCRIPTION("SuperH on-chip RTC driver"); | |
1b73e6ae | 749 | MODULE_VERSION(DRV_VERSION); |
b420b1a7 AC |
750 | MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, " |
751 | "Jamie Lenehan <lenehan@twibble.org>, " | |
752 | "Angelo Castello <angelo.castello@st.com>"); | |
317a6104 | 753 | MODULE_LICENSE("GPL"); |
ad28a07b | 754 | MODULE_ALIAS("platform:" DRV_NAME); |