[deliverable/linux.git] / drivers / rtc / rtc-twl4030.c

/*
 * rtc-twl4030.c -- TWL4030 Real Time Clock interface
 *
 * Copyright (C) 2007 MontaVista Software, Inc
 * Author: Alexandre Rusev <source@mvista.com>
 *
 * Based on original TI driver twl4030-rtc.c
 *   Copyright (C) 2006 Texas Instruments, Inc.
 *
 * Based on rtc-omap.c
 *   Copyright (C) 2003 MontaVista Software, Inc.
 *   Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
 *   Copyright (C) 2006 David Brownell
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>

#include <linux/i2c/twl4030.h>


/*
 * RTC block register offsets (use TWL_MODULE_RTC)
 */
#define REG_SECONDS_REG                          0x00
#define REG_MINUTES_REG                          0x01
#define REG_HOURS_REG                            0x02
#define REG_DAYS_REG                             0x03
#define REG_MONTHS_REG                           0x04
#define REG_YEARS_REG                            0x05
#define REG_WEEKS_REG                            0x06

#define REG_ALARM_SECONDS_REG                    0x07
#define REG_ALARM_MINUTES_REG                    0x08
#define REG_ALARM_HOURS_REG                      0x09
#define REG_ALARM_DAYS_REG                       0x0A
#define REG_ALARM_MONTHS_REG                     0x0B
#define REG_ALARM_YEARS_REG                      0x0C

#define REG_RTC_CTRL_REG                         0x0D
#define REG_RTC_STATUS_REG                       0x0E
#define REG_RTC_INTERRUPTS_REG                   0x0F

#define REG_RTC_COMP_LSB_REG                     0x10
#define REG_RTC_COMP_MSB_REG                     0x11

/* RTC_CTRL_REG bitfields */
#define BIT_RTC_CTRL_REG_STOP_RTC_M              0x01
#define BIT_RTC_CTRL_REG_ROUND_30S_M             0x02
#define BIT_RTC_CTRL_REG_AUTO_COMP_M             0x04
#define BIT_RTC_CTRL_REG_MODE_12_24_M            0x08
#define BIT_RTC_CTRL_REG_TEST_MODE_M             0x10
#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M        0x20
#define BIT_RTC_CTRL_REG_GET_TIME_M              0x40

/* RTC_STATUS_REG bitfields */
#define BIT_RTC_STATUS_REG_RUN_M                 0x02
#define BIT_RTC_STATUS_REG_1S_EVENT_M            0x04
#define BIT_RTC_STATUS_REG_1M_EVENT_M            0x08
#define BIT_RTC_STATUS_REG_1H_EVENT_M            0x10
#define BIT_RTC_STATUS_REG_1D_EVENT_M            0x20
#define BIT_RTC_STATUS_REG_ALARM_M               0x40
#define BIT_RTC_STATUS_REG_POWER_UP_M            0x80

/* RTC_INTERRUPTS_REG bitfields */
#define BIT_RTC_INTERRUPTS_REG_EVERY_M           0x03
#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M        0x04
#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M        0x08


/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
#define ALL_TIME_REGS		6

/*----------------------------------------------------------------------*/

/*
 * Supports 1 byte read from TWL4030 RTC register.
 */
static int twl4030_rtc_read_u8(u8 *data, u8 reg)
{
	int ret;

	ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
	if (ret < 0)
		pr_err("twl4030_rtc: Could not read TWL4030"
		       "register %X - error %d\n", reg, ret);
	return ret;
}

/*
 * Supports 1 byte write to TWL4030 RTC registers.
 */
static int twl4030_rtc_write_u8(u8 data, u8 reg)
{
	int ret;

	ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
	if (ret < 0)
		pr_err("twl4030_rtc: Could not write TWL4030"
		       "register %X - error %d\n", reg, ret);
	return ret;
}

/*
 * Cache the value for timer/alarm interrupts register; this is
 * only changed by callers holding rtc ops lock (or resume).
 */
static unsigned char rtc_irq_bits;

/*
 * Enable timer and/or alarm interrupts.
 */
static int set_rtc_irq_bit(unsigned char bit)
{
	unsigned char val;
	int ret;

	val = rtc_irq_bits | bit;
	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
	if (ret == 0)
		rtc_irq_bits = val;

	return ret;
}

/*
 * Disable timer and/or alarm interrupts.
 */
static int mask_rtc_irq_bit(unsigned char bit)
{
	unsigned char val;
	int ret;

	val = rtc_irq_bits & ~bit;
	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
	if (ret == 0)
		rtc_irq_bits = val;

	return ret;
}

static inline int twl4030_rtc_alarm_irq_set_state(int enabled)
{
	int ret;

	if (enabled)
		ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	else
		ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);

	return ret;
}

static inline int twl4030_rtc_irq_set_state(int enabled)
{
	int ret;

	if (enabled)
		ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
	else
		ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);

	return ret;
}

/*
 * Gets current TWL4030 RTC time and date parameters.
 *
 * The RTC's time/alarm representation is not what gmtime(3) requires
 * Linux to use:
 *
 *  - Months are 1..12 vs Linux 0-11
 *  - Years are 0..99 vs Linux 1900..N (we assume 21st century)
 */
static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	unsigned char rtc_data[ALL_TIME_REGS + 1];
	int ret;
	u8 save_control;

	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		return ret;

	save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;

	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		return ret;

	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
			       REG_SECONDS_REG, ALL_TIME_REGS);

	if (ret < 0) {
		dev_err(dev, "rtc_read_time error %d\n", ret);
		return ret;
	}

	tm->tm_sec = bcd2bin(rtc_data[0]);
	tm->tm_min = bcd2bin(rtc_data[1]);
	tm->tm_hour = bcd2bin(rtc_data[2]);
	tm->tm_mday = bcd2bin(rtc_data[3]);
	tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
	tm->tm_year = bcd2bin(rtc_data[5]) + 100;

	return ret;
}

static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned char save_control;
	unsigned char rtc_data[ALL_TIME_REGS + 1];
	int ret;

	rtc_data[1] = bin2bcd(tm->tm_sec);
	rtc_data[2] = bin2bcd(tm->tm_min);
	rtc_data[3] = bin2bcd(tm->tm_hour);
	rtc_data[4] = bin2bcd(tm->tm_mday);
	rtc_data[5] = bin2bcd(tm->tm_mon + 1);
	rtc_data[6] = bin2bcd(tm->tm_year - 100);

	/* Stop RTC while updating the TC registers */
	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		goto out;

	save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
	twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
	if (ret < 0)
		goto out;

	/* update all the time registers in one shot */
	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
			REG_SECONDS_REG, ALL_TIME_REGS);
	if (ret < 0) {
		dev_err(dev, "rtc_set_time error %d\n", ret);
		goto out;
	}

	/* Start back RTC */
	save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);

out:
	return ret;
}

/*
 * Gets current TWL4030 RTC alarm time.
 */
static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	unsigned char rtc_data[ALL_TIME_REGS + 1];
	int ret;

	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
			       REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
	if (ret < 0) {
		dev_err(dev, "rtc_read_alarm error %d\n", ret);
		return ret;
	}

	/* some of these fields may be wildcard/"match all" */
	alm->time.tm_sec = bcd2bin(rtc_data[0]);
	alm->time.tm_min = bcd2bin(rtc_data[1]);
	alm->time.tm_hour = bcd2bin(rtc_data[2]);
	alm->time.tm_mday = bcd2bin(rtc_data[3]);
	alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
	alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;

	/* report cached alarm enable state */
	if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
		alm->enabled = 1;

	return ret;
}

static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	unsigned char alarm_data[ALL_TIME_REGS + 1];
	int ret;

	ret = twl4030_rtc_alarm_irq_set_state(0);
	if (ret)
		goto out;

	alarm_data[1] = bin2bcd(alm->time.tm_sec);
	alarm_data[2] = bin2bcd(alm->time.tm_min);
	alarm_data[3] = bin2bcd(alm->time.tm_hour);
	alarm_data[4] = bin2bcd(alm->time.tm_mday);
	alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
	alarm_data[6] = bin2bcd(alm->time.tm_year - 100);

	/* update all the alarm registers in one shot */
	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
			REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
	if (ret) {
		dev_err(dev, "rtc_set_alarm error %d\n", ret);
		goto out;
	}

	if (alm->enabled)
		ret = twl4030_rtc_alarm_irq_set_state(1);
out:
	return ret;
}

#ifdef	CONFIG_RTC_INTF_DEV

static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd,
			     unsigned long arg)
{
	switch (cmd) {
	case RTC_AIE_OFF:
		return twl4030_rtc_alarm_irq_set_state(0);
	case RTC_AIE_ON:
		return twl4030_rtc_alarm_irq_set_state(1);
	case RTC_UIE_OFF:
		return twl4030_rtc_irq_set_state(0);
	case RTC_UIE_ON:
		return twl4030_rtc_irq_set_state(1);

	default:
		return -ENOIOCTLCMD;
	}
}

#else
#define	twl4030_rtc_ioctl	NULL
#endif

static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
{
	unsigned long events = 0;
	int ret = IRQ_NONE;
	int res;
	u8 rd_reg;

#ifdef CONFIG_LOCKDEP
	/* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
	 * we don't want and can't tolerate.  Although it might be
	 * friendlier not to borrow this thread context...
	 */
	local_irq_enable();
#endif

	res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
	if (res)
		goto out;
	/*
	 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
	 * only one (ALARM or RTC) interrupt source may be enabled
	 * at time, we also could check our results
	 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
	 */
	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
		events |= RTC_IRQF | RTC_AF;
	else
		events |= RTC_IRQF | RTC_UF;

	res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
				   REG_RTC_STATUS_REG);
	if (res)
		goto out;

	/* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
	 * needs 2 reads to clear the interrupt. One read is done in
	 * do_twl4030_pwrirq(). Doing the second read, to clear
	 * the bit.
	 *
	 * FIXME the reason PWR_ISR1 needs an extra read is that
	 * RTC_IF retriggered until we cleared REG_ALARM_M above.
	 * But re-reading like this is a bad hack; by doing so we
	 * risk wrongly clearing status for some other IRQ (losing
	 * the interrupt).  Be smarter about handling RTC_UF ...
	 */
	res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
			&rd_reg, TWL4030_INT_PWR_ISR1);
	if (res)
		goto out;

	/* Notify RTC core on event */
	rtc_update_irq(rtc, 1, events);

	ret = IRQ_HANDLED;
out:
	return ret;
}

static struct rtc_class_ops twl4030_rtc_ops = {
	.ioctl		= twl4030_rtc_ioctl,
	.read_time	= twl4030_rtc_read_time,
	.set_time	= twl4030_rtc_set_time,
	.read_alarm	= twl4030_rtc_read_alarm,
	.set_alarm	= twl4030_rtc_set_alarm,
};

/*----------------------------------------------------------------------*/

static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	int ret = 0;
	int irq = platform_get_irq(pdev, 0);
	u8 rd_reg;

	if (irq <= 0)
		return -EINVAL;

	rtc = rtc_device_register(pdev->name,
				  &pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc)) {
		ret = -EINVAL;
		dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
			PTR_ERR(rtc));
		goto out0;

	}

	platform_set_drvdata(pdev, rtc);

	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);

	if (ret < 0)
		goto out1;

	if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
		dev_warn(&pdev->dev, "Power up reset detected.\n");

	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
		dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");

	/* Clear RTC Power up reset and pending alarm interrupts */
	ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
	if (ret < 0)
		goto out1;

	ret = request_irq(irq, twl4030_rtc_interrupt,
				IRQF_TRIGGER_RISING,
				rtc->dev.bus_id, rtc);
	if (ret < 0) {
		dev_err(&pdev->dev, "IRQ is not free.\n");
		goto out1;
	}

	/* Check RTC module status, Enable if it is off */
	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
	if (ret < 0)
		goto out2;

	if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
		dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
		rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
		ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
		if (ret < 0)
			goto out2;
	}

	/* init cached IRQ enable bits */
	ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
	if (ret < 0)
		goto out2;

	return ret;


out2:
	free_irq(irq, rtc);
out1:
	rtc_device_unregister(rtc);
out0:
	return ret;
}

/*
 * Disable all TWL4030 RTC module interrupts.
 * Sets status flag to free.
 */
static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
{
	/* leave rtc running, but disable irqs */
	struct rtc_device *rtc = platform_get_drvdata(pdev);
	int irq = platform_get_irq(pdev, 0);

	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);

	free_irq(irq, rtc);

	rtc_device_unregister(rtc);
	platform_set_drvdata(pdev, NULL);
	return 0;
}

static void twl4030_rtc_shutdown(struct platform_device *pdev)
{
	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
			 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
}

#ifdef CONFIG_PM

static unsigned char irqstat;

static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
{
	irqstat = rtc_irq_bits;

	/* REVISIT alarm may need to wake us from sleep */
	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
			 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
	return 0;
}

static int twl4030_rtc_resume(struct platform_device *pdev)
{
	set_rtc_irq_bit(irqstat);
	return 0;
}

#else
#define twl4030_rtc_suspend NULL
#define twl4030_rtc_resume  NULL
#endif

MODULE_ALIAS("platform:twl4030_rtc");

static struct platform_driver twl4030rtc_driver = {
	.probe		= twl4030_rtc_probe,
	.remove		= __devexit_p(twl4030_rtc_remove),
	.shutdown	= twl4030_rtc_shutdown,
	.suspend	= twl4030_rtc_suspend,
	.resume		= twl4030_rtc_resume,
	.driver		= {
		.owner	= THIS_MODULE,
		.name	= "twl4030_rtc",
	},
};

static int __init twl4030_rtc_init(void)
{
	return platform_driver_register(&twl4030rtc_driver);
}
module_init(twl4030_rtc_init);

static void __exit twl4030_rtc_exit(void)
{
	platform_driver_unregister(&twl4030rtc_driver);
}
module_exit(twl4030_rtc_exit);

MODULE_AUTHOR("Texas Instruments, MontaVista Software");
MODULE_LICENSE("GPL");
Commit	Line	Data
f96411ab DB	1	/*
	2	* rtc-twl4030.c -- TWL4030 Real Time Clock interface
	3	*
	4	* Copyright (C) 2007 MontaVista Software, Inc
	5	* Author: Alexandre Rusev <source@mvista.com>
	6	*
	7	* Based on original TI driver twl4030-rtc.c
	8	* Copyright (C) 2006 Texas Instruments, Inc.
	9	*
	10	* Based on rtc-omap.c
	11	* Copyright (C) 2003 MontaVista Software, Inc.
	12	* Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
	13	* Copyright (C) 2006 David Brownell
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License
	17	* as published by the Free Software Foundation; either version
	18	* 2 of the License, or (at your option) any later version.
	19	*/
	20
	21	#include <linux/kernel.h>
2fac6674	22	#include <linux/errno.h>
f96411ab DB	23	#include <linux/init.h>
	24	#include <linux/module.h>
	25	#include <linux/types.h>
	26	#include <linux/rtc.h>
	27	#include <linux/bcd.h>
	28	#include <linux/platform_device.h>
	29	#include <linux/interrupt.h>
	30
	31	#include <linux/i2c/twl4030.h>
	32
	33
	34	/*
	35	* RTC block register offsets (use TWL_MODULE_RTC)
	36	*/
	37	#define REG_SECONDS_REG 0x00
	38	#define REG_MINUTES_REG 0x01
	39	#define REG_HOURS_REG 0x02
	40	#define REG_DAYS_REG 0x03
	41	#define REG_MONTHS_REG 0x04
	42	#define REG_YEARS_REG 0x05
	43	#define REG_WEEKS_REG 0x06
	44
	45	#define REG_ALARM_SECONDS_REG 0x07
	46	#define REG_ALARM_MINUTES_REG 0x08
	47	#define REG_ALARM_HOURS_REG 0x09
	48	#define REG_ALARM_DAYS_REG 0x0A
	49	#define REG_ALARM_MONTHS_REG 0x0B
	50	#define REG_ALARM_YEARS_REG 0x0C
	51
	52	#define REG_RTC_CTRL_REG 0x0D
	53	#define REG_RTC_STATUS_REG 0x0E
	54	#define REG_RTC_INTERRUPTS_REG 0x0F
	55
	56	#define REG_RTC_COMP_LSB_REG 0x10
	57	#define REG_RTC_COMP_MSB_REG 0x11
	58
	59	/* RTC_CTRL_REG bitfields */
	60	#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
	61	#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
	62	#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
	63	#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
	64	#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
	65	#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
	66	#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
	67
	68	/* RTC_STATUS_REG bitfields */
	69	#define BIT_RTC_STATUS_REG_RUN_M 0x02
	70	#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
	71	#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
	72	#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
	73	#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
	74	#define BIT_RTC_STATUS_REG_ALARM_M 0x40
	75	#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
	76
	77	/* RTC_INTERRUPTS_REG bitfields */
	78	#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
	79	#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
	80	#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
	81
	82
	83	/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
	84	#define ALL_TIME_REGS 6
	85
	86	/----------------------------------------------------------------------/
87
88	/*
89	* Supports 1 byte read from TWL4030 RTC register.
90	*/
91	static int twl4030_rtc_read_u8(u8 *data, u8 reg)
92	{
93	int ret;
94
95	ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
96	if (ret < 0)
97	pr_err("twl4030_rtc: Could not read TWL4030"
98	"register %X - error %d\n", reg, ret);
99	return ret;
100	}
101
102	/*
103	* Supports 1 byte write to TWL4030 RTC registers.
104	*/
105	static int twl4030_rtc_write_u8(u8 data, u8 reg)
106	{
107	int ret;
108
109	ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
110	if (ret < 0)
111	pr_err("twl4030_rtc: Could not write TWL4030"
112	"register %X - error %d\n", reg, ret);
113	return ret;
114	}
115
116	/*
117	* Cache the value for timer/alarm interrupts register; this is
118	* only changed by callers holding rtc ops lock (or resume).
119	*/
120	static unsigned char rtc_irq_bits;
121
122	/*
123	* Enable timer and/or alarm interrupts.
124	*/
125	static int set_rtc_irq_bit(unsigned char bit)
126	{
127	unsigned char val;
128	int ret;
129
130	val = rtc_irq_bits \| bit;
131	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
132	if (ret == 0)
133	rtc_irq_bits = val;
134
135	return ret;
136	}
137
138	/*
139	* Disable timer and/or alarm interrupts.
140	*/
141	static int mask_rtc_irq_bit(unsigned char bit)
142	{
143	unsigned char val;
144	int ret;
145
146	val = rtc_irq_bits & ~bit;
147	ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
148	if (ret == 0)
149	rtc_irq_bits = val;
150
151	return ret;
152	}
153
154	static inline int twl4030_rtc_alarm_irq_set_state(int enabled)
155	{
156	int ret;
157
158	if (enabled)
159	ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
160	else
161	ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
162
163	return ret;
164	}
165
166	static inline int twl4030_rtc_irq_set_state(int enabled)
167	{
168	int ret;
169
170	if (enabled)
171	ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
172	else
173	ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
174
175	return ret;
176	}
177
178	/*
179	* Gets current TWL4030 RTC time and date parameters.
180	*
181	* The RTC's time/alarm representation is not what gmtime(3) requires
182	* Linux to use:
183	*
184	* - Months are 1..12 vs Linux 0-11
185	* - Years are 0..99 vs Linux 1900..N (we assume 21st century)
186	*/
187	static int twl4030_rtc_read_time(struct device dev, struct rtc_time tm)
188	{
189	unsigned char rtc_data[ALL_TIME_REGS + 1];
190	int ret;
191	u8 save_control;
192
193	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
194	if (ret < 0)
195	return ret;
196
197	save_control \|= BIT_RTC_CTRL_REG_GET_TIME_M;
198
199	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
200	if (ret < 0)
201	return ret;
202
203	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
204	REG_SECONDS_REG, ALL_TIME_REGS);
205
206	if (ret < 0) {
207	dev_err(dev, "rtc_read_time error %d\n", ret);
208	return ret;
209	}
210
211	tm->tm_sec = bcd2bin(rtc_data[0]);
212	tm->tm_min = bcd2bin(rtc_data[1]);
213	tm->tm_hour = bcd2bin(rtc_data[2]);
214	tm->tm_mday = bcd2bin(rtc_data[3]);
215	tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
216	tm->tm_year = bcd2bin(rtc_data[5]) + 100;
217
218	return ret;
219	}
220
221	static int twl4030_rtc_set_time(struct device dev, struct rtc_time tm)
222	{
223	unsigned char save_control;
224	unsigned char rtc_data[ALL_TIME_REGS + 1];
225	int ret;
226
227	rtc_data[1] = bin2bcd(tm->tm_sec);
228	rtc_data[2] = bin2bcd(tm->tm_min);
229	rtc_data[3] = bin2bcd(tm->tm_hour);
230	rtc_data[4] = bin2bcd(tm->tm_mday);
231	rtc_data[5] = bin2bcd(tm->tm_mon + 1);
232	rtc_data[6] = bin2bcd(tm->tm_year - 100);
233
234	/* Stop RTC while updating the TC registers */
235	ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
236	if (ret < 0)
237	goto out;
238
239	save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
240	twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
241	if (ret < 0)
242	goto out;
243
244	/* update all the time registers in one shot */
245	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
246	REG_SECONDS_REG, ALL_TIME_REGS);
247	if (ret < 0) {
248	dev_err(dev, "rtc_set_time error %d\n", ret);
249	goto out;
250	}
251
252	/* Start back RTC */
253	save_control \|= BIT_RTC_CTRL_REG_STOP_RTC_M;
254	ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
255
256	out:
257	return ret;
258	}
259
260	/*
261	* Gets current TWL4030 RTC alarm time.
262	*/
263	static int twl4030_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
264	{
265	unsigned char rtc_data[ALL_TIME_REGS + 1];
266	int ret;
267
268	ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
269	REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
270	if (ret < 0) {
271	dev_err(dev, "rtc_read_alarm error %d\n", ret);
272	return ret;
273	}
274
275	/* some of these fields may be wildcard/"match all" */
276	alm->time.tm_sec = bcd2bin(rtc_data[0]);
277	alm->time.tm_min = bcd2bin(rtc_data[1]);
278	alm->time.tm_hour = bcd2bin(rtc_data[2]);
279	alm->time.tm_mday = bcd2bin(rtc_data[3]);
280	alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
281	alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
282
283	/* report cached alarm enable state */
284	if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
285	alm->enabled = 1;
286
287	return ret;
288	}
289
290	static int twl4030_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
291	{
292	unsigned char alarm_data[ALL_TIME_REGS + 1];
293	int ret;
294
295	ret = twl4030_rtc_alarm_irq_set_state(0);
296	if (ret)
297	goto out;
298
299	alarm_data[1] = bin2bcd(alm->time.tm_sec);
300	alarm_data[2] = bin2bcd(alm->time.tm_min);
301	alarm_data[3] = bin2bcd(alm->time.tm_hour);
302	alarm_data[4] = bin2bcd(alm->time.tm_mday);
303	alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
304	alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
305
306	/* update all the alarm registers in one shot */
307	ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
308	REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
309	if (ret) {
310	dev_err(dev, "rtc_set_alarm error %d\n", ret);
311	goto out;
312	}
313
314	if (alm->enabled)
315	ret = twl4030_rtc_alarm_irq_set_state(1);
316	out:
317	return ret;
318	}
319
320	#ifdef CONFIG_RTC_INTF_DEV
321
322	static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd,
323	unsigned long arg)
324	{
325	switch (cmd) {
326	case RTC_AIE_OFF:
327	return twl4030_rtc_alarm_irq_set_state(0);
328	case RTC_AIE_ON:
329	return twl4030_rtc_alarm_irq_set_state(1);
330	case RTC_UIE_OFF:
331	return twl4030_rtc_irq_set_state(0);
332	case RTC_UIE_ON:
333	return twl4030_rtc_irq_set_state(1);
334
335	default:
336	return -ENOIOCTLCMD;
337	}
338	}
339
340	#else
cc616860	341	#define twl4030_rtc_ioctl NULL
f96411ab DB	342	#endif
	343
	344	static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
	345	{
	346	unsigned long events = 0;
	347	int ret = IRQ_NONE;
	348	int res;
	349	u8 rd_reg;
	350
	351	#ifdef CONFIG_LOCKDEP
	352	/* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
	353	* we don't want and can't tolerate. Although it might be
	354	* friendlier not to borrow this thread context...
	355	*/
	356	local_irq_enable();
	357	#endif
	358
	359	res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
	360	if (res)
	361	goto out;
	362	/*
	363	* Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
	364	* only one (ALARM or RTC) interrupt source may be enabled
	365	* at time, we also could check our results
	366	* by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
	367	*/
	368	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
	369	events \|= RTC_IRQF \| RTC_AF;
	370	else
	371	events \|= RTC_IRQF \| RTC_UF;
	372
	373	res = twl4030_rtc_write_u8(rd_reg \| BIT_RTC_STATUS_REG_ALARM_M,
	374	REG_RTC_STATUS_REG);
	375	if (res)
	376	goto out;
	377
	378	/* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
	379	* needs 2 reads to clear the interrupt. One read is done in
	380	* do_twl4030_pwrirq(). Doing the second read, to clear
	381	* the bit.
	382	*
	383	* FIXME the reason PWR_ISR1 needs an extra read is that
	384	* RTC_IF retriggered until we cleared REG_ALARM_M above.
	385	* But re-reading like this is a bad hack; by doing so we
	386	* risk wrongly clearing status for some other IRQ (losing
	387	* the interrupt). Be smarter about handling RTC_UF ...
	388	*/
	389	res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
	390	&rd_reg, TWL4030_INT_PWR_ISR1);
	391	if (res)
	392	goto out;
	393
	394	/* Notify RTC core on event */
	395	rtc_update_irq(rtc, 1, events);
	396
	397	ret = IRQ_HANDLED;
	398	out:
	399	return ret;
	400	}
	401
	402	static struct rtc_class_ops twl4030_rtc_ops = {
	403	.ioctl = twl4030_rtc_ioctl,
	404	.read_time = twl4030_rtc_read_time,
	405	.set_time = twl4030_rtc_set_time,
406	.read_alarm = twl4030_rtc_read_alarm,
407	.set_alarm = twl4030_rtc_set_alarm,
408	};
409
410	/----------------------------------------------------------------------/
411
412	static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
413	{
414	struct rtc_device *rtc;
415	int ret = 0;
416	int irq = platform_get_irq(pdev, 0);
417	u8 rd_reg;
418
2fac6674 AV	419	if (irq <= 0)
2fac6674 AV	420	return -EINVAL;
f96411ab DB	421
	422	rtc = rtc_device_register(pdev->name,
	423	&pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
	424	if (IS_ERR(rtc)) {
	425	ret = -EINVAL;
	426	dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
	427	PTR_ERR(rtc));
	428	goto out0;
	429
	430	}
	431
	432	platform_set_drvdata(pdev, rtc);
	433
	434	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
	435
	436	if (ret < 0)
	437	goto out1;
	438
	439	if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
	440	dev_warn(&pdev->dev, "Power up reset detected.\n");
	441
	442	if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
	443	dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
	444
	445	/* Clear RTC Power up reset and pending alarm interrupts */
	446	ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
	447	if (ret < 0)
	448	goto out1;
	449
	450	ret = request_irq(irq, twl4030_rtc_interrupt,
	451	IRQF_TRIGGER_RISING,
	452	rtc->dev.bus_id, rtc);
	453	if (ret < 0) {
	454	dev_err(&pdev->dev, "IRQ is not free.\n");
	455	goto out1;
	456	}
	457
	458	/* Check RTC module status, Enable if it is off */
	459	ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
	460	if (ret < 0)
	461	goto out2;
	462
	463	if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
	464	dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
	465	rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
	466	ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
	467	if (ret < 0)
	468	goto out2;
	469	}
	470
	471	/* init cached IRQ enable bits */
	472	ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
	473	if (ret < 0)
	474	goto out2;
	475
	476	return ret;
	477
	478
	479	out2:
	480	free_irq(irq, rtc);
	481	out1:
	482	rtc_device_unregister(rtc);
	483	out0:
	484	return ret;
485	}
486
487	/*
488	* Disable all TWL4030 RTC module interrupts.
489	* Sets status flag to free.
490	*/
491	static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
492	{
493	/* leave rtc running, but disable irqs */
494	struct rtc_device *rtc = platform_get_drvdata(pdev);
495	int irq = platform_get_irq(pdev, 0);
496
497	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
498	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
499
500	free_irq(irq, rtc);
501
502	rtc_device_unregister(rtc);
503	platform_set_drvdata(pdev, NULL);
504	return 0;
505	}
506
507	static void twl4030_rtc_shutdown(struct platform_device *pdev)
508	{
509	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M \|
510	BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
511	}
512
513	#ifdef CONFIG_PM
514
515	static unsigned char irqstat;
516
517	static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
518	{
519	irqstat = rtc_irq_bits;
520
521	/* REVISIT alarm may need to wake us from sleep */
522	mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M \|
523	BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
524	return 0;
525	}
526
527	static int twl4030_rtc_resume(struct platform_device *pdev)
528	{
529	set_rtc_irq_bit(irqstat);
530	return 0;
531	}
532
533	#else
534	#define twl4030_rtc_suspend NULL
535	#define twl4030_rtc_resume NULL
536	#endif
537
538	MODULE_ALIAS("platform:twl4030_rtc");
539
540	static struct platform_driver twl4030rtc_driver = {
541	.probe = twl4030_rtc_probe,
542	.remove = __devexit_p(twl4030_rtc_remove),
543	.shutdown = twl4030_rtc_shutdown,
544	.suspend = twl4030_rtc_suspend,
545	.resume = twl4030_rtc_resume,
546	.driver = {
547	.owner = THIS_MODULE,
548	.name = "twl4030_rtc",
549	},
550	};
551
552	static int __init twl4030_rtc_init(void)
553	{
554	return platform_driver_register(&twl4030rtc_driver);
555	}
556	module_init(twl4030_rtc_init);
557
558	static void __exit twl4030_rtc_exit(void)
559	{
560	platform_driver_unregister(&twl4030rtc_driver);
561	}
562	module_exit(twl4030_rtc_exit);
563
564	MODULE_AUTHOR("Texas Instruments, MontaVista Software");
565	MODULE_LICENSE("GPL");