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1 | /* |
2 | * Real Time Clock driver for Wolfson Microelectronics WM831x | |
3 | * | |
4 | * Copyright (C) 2009 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/time.h> | |
18 | #include <linux/rtc.h> | |
19 | #include <linux/bcd.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/ioctl.h> | |
22 | #include <linux/completion.h> | |
23 | #include <linux/mfd/wm831x/core.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/platform_device.h> | |
26 | ||
27 | ||
28 | /* | |
29 | * R16416 (0x4020) - RTC Write Counter | |
30 | */ | |
31 | #define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */ | |
32 | #define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */ | |
33 | #define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */ | |
34 | ||
35 | /* | |
36 | * R16417 (0x4021) - RTC Time 1 | |
37 | */ | |
38 | #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */ | |
39 | #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */ | |
40 | #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */ | |
41 | ||
42 | /* | |
43 | * R16418 (0x4022) - RTC Time 2 | |
44 | */ | |
45 | #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */ | |
46 | #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */ | |
47 | #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */ | |
48 | ||
49 | /* | |
50 | * R16419 (0x4023) - RTC Alarm 1 | |
51 | */ | |
52 | #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */ | |
53 | #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */ | |
54 | #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */ | |
55 | ||
56 | /* | |
57 | * R16420 (0x4024) - RTC Alarm 2 | |
58 | */ | |
59 | #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */ | |
60 | #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */ | |
61 | #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */ | |
62 | ||
63 | /* | |
64 | * R16421 (0x4025) - RTC Control | |
65 | */ | |
66 | #define WM831X_RTC_VALID 0x8000 /* RTC_VALID */ | |
67 | #define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */ | |
68 | #define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */ | |
69 | #define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */ | |
70 | #define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */ | |
71 | #define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */ | |
72 | #define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */ | |
73 | #define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */ | |
74 | #define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */ | |
75 | #define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */ | |
76 | #define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */ | |
77 | #define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */ | |
78 | #define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */ | |
79 | #define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */ | |
80 | #define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */ | |
81 | ||
82 | /* | |
83 | * R16422 (0x4026) - RTC Trim | |
84 | */ | |
85 | #define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */ | |
86 | #define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */ | |
87 | #define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */ | |
88 | ||
89 | #define WM831X_SET_TIME_RETRIES 5 | |
90 | #define WM831X_GET_TIME_RETRIES 5 | |
91 | ||
92 | struct wm831x_rtc { | |
93 | struct wm831x *wm831x; | |
94 | struct rtc_device *rtc; | |
95 | unsigned int alarm_enabled:1; | |
96 | }; | |
97 | ||
98 | /* | |
99 | * Read current time and date in RTC | |
100 | */ | |
101 | static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm) | |
102 | { | |
103 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
104 | struct wm831x *wm831x = wm831x_rtc->wm831x; | |
105 | u16 time1[2], time2[2]; | |
106 | int ret; | |
107 | int count = 0; | |
108 | ||
109 | /* Has the RTC been programmed? */ | |
110 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | |
111 | if (ret < 0) { | |
112 | dev_err(dev, "Failed to read RTC control: %d\n", ret); | |
113 | return ret; | |
114 | } | |
115 | if (!(ret & WM831X_RTC_VALID)) { | |
116 | dev_dbg(dev, "RTC not yet configured\n"); | |
117 | return -EINVAL; | |
118 | } | |
119 | ||
120 | /* Read twice to make sure we don't read a corrupt, partially | |
121 | * incremented, value. | |
122 | */ | |
123 | do { | |
124 | ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1, | |
125 | 2, time1); | |
126 | if (ret != 0) | |
127 | continue; | |
128 | ||
129 | ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1, | |
130 | 2, time2); | |
131 | if (ret != 0) | |
132 | continue; | |
133 | ||
134 | if (memcmp(time1, time2, sizeof(time1)) == 0) { | |
135 | u32 time = (time1[0] << 16) | time1[1]; | |
136 | ||
137 | rtc_time_to_tm(time, tm); | |
138 | return rtc_valid_tm(tm); | |
139 | } | |
140 | ||
141 | } while (++count < WM831X_GET_TIME_RETRIES); | |
142 | ||
143 | dev_err(dev, "Timed out reading current time\n"); | |
144 | ||
145 | return -EIO; | |
146 | } | |
147 | ||
148 | /* | |
149 | * Set current time and date in RTC | |
150 | */ | |
151 | static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time) | |
152 | { | |
153 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
154 | struct wm831x *wm831x = wm831x_rtc->wm831x; | |
155 | struct rtc_time new_tm; | |
156 | unsigned long new_time; | |
157 | int ret; | |
158 | int count = 0; | |
159 | ||
160 | ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1, | |
161 | (time >> 16) & 0xffff); | |
162 | if (ret < 0) { | |
163 | dev_err(dev, "Failed to write TIME_1: %d\n", ret); | |
164 | return ret; | |
165 | } | |
166 | ||
167 | ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff); | |
168 | if (ret < 0) { | |
169 | dev_err(dev, "Failed to write TIME_2: %d\n", ret); | |
170 | return ret; | |
171 | } | |
172 | ||
173 | /* Wait for the update to complete - should happen first time | |
174 | * round but be conservative. | |
175 | */ | |
176 | do { | |
177 | msleep(1); | |
178 | ||
179 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | |
180 | if (ret < 0) | |
181 | ret = WM831X_RTC_SYNC_BUSY; | |
182 | } while (!(ret & WM831X_RTC_SYNC_BUSY) && | |
183 | ++count < WM831X_SET_TIME_RETRIES); | |
184 | ||
185 | if (ret & WM831X_RTC_SYNC_BUSY) { | |
186 | dev_err(dev, "Timed out writing RTC update\n"); | |
187 | return -EIO; | |
188 | } | |
189 | ||
190 | /* Check that the update was accepted; security features may | |
191 | * have caused the update to be ignored. | |
192 | */ | |
193 | ret = wm831x_rtc_readtime(dev, &new_tm); | |
194 | if (ret < 0) | |
195 | return ret; | |
196 | ||
197 | ret = rtc_tm_to_time(&new_tm, &new_time); | |
198 | if (ret < 0) { | |
199 | dev_err(dev, "Failed to convert time: %d\n", ret); | |
200 | return ret; | |
201 | } | |
202 | ||
203 | /* Allow a second of change in case of tick */ | |
204 | if (new_time - time > 1) { | |
205 | dev_err(dev, "RTC update not permitted by hardware\n"); | |
206 | return -EPERM; | |
207 | } | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
212 | /* | |
213 | * Read alarm time and date in RTC | |
214 | */ | |
215 | static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
216 | { | |
217 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
218 | int ret; | |
219 | u16 data[2]; | |
220 | u32 time; | |
221 | ||
222 | ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1, | |
223 | 2, data); | |
224 | if (ret != 0) { | |
225 | dev_err(dev, "Failed to read alarm time: %d\n", ret); | |
226 | return ret; | |
227 | } | |
228 | ||
229 | time = (data[0] << 16) | data[1]; | |
230 | ||
231 | rtc_time_to_tm(time, &alrm->time); | |
232 | ||
233 | ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL); | |
234 | if (ret < 0) { | |
235 | dev_err(dev, "Failed to read RTC control: %d\n", ret); | |
236 | return ret; | |
237 | } | |
238 | ||
239 | if (ret & WM831X_RTC_ALM_ENA) | |
240 | alrm->enabled = 1; | |
241 | else | |
242 | alrm->enabled = 0; | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
247 | static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc) | |
248 | { | |
249 | wm831x_rtc->alarm_enabled = 0; | |
250 | ||
251 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
252 | WM831X_RTC_ALM_ENA, 0); | |
253 | } | |
254 | ||
255 | static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc) | |
256 | { | |
257 | wm831x_rtc->alarm_enabled = 1; | |
258 | ||
259 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
260 | WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA); | |
261 | } | |
262 | ||
263 | static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
264 | { | |
265 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
266 | struct wm831x *wm831x = wm831x_rtc->wm831x; | |
267 | int ret; | |
268 | unsigned long time; | |
269 | ||
270 | ret = rtc_tm_to_time(&alrm->time, &time); | |
271 | if (ret < 0) { | |
272 | dev_err(dev, "Failed to convert time: %d\n", ret); | |
273 | return ret; | |
274 | } | |
275 | ||
276 | ret = wm831x_rtc_stop_alarm(wm831x_rtc); | |
277 | if (ret < 0) { | |
278 | dev_err(dev, "Failed to stop alarm: %d\n", ret); | |
279 | return ret; | |
280 | } | |
281 | ||
282 | ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1, | |
283 | (time >> 16) & 0xffff); | |
284 | if (ret < 0) { | |
285 | dev_err(dev, "Failed to write ALARM_1: %d\n", ret); | |
286 | return ret; | |
287 | } | |
288 | ||
289 | ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff); | |
290 | if (ret < 0) { | |
291 | dev_err(dev, "Failed to write ALARM_2: %d\n", ret); | |
292 | return ret; | |
293 | } | |
294 | ||
295 | if (alrm->enabled) { | |
296 | ret = wm831x_rtc_start_alarm(wm831x_rtc); | |
297 | if (ret < 0) { | |
298 | dev_err(dev, "Failed to start alarm: %d\n", ret); | |
299 | return ret; | |
300 | } | |
301 | } | |
302 | ||
303 | return 0; | |
304 | } | |
305 | ||
306 | static int wm831x_rtc_alarm_irq_enable(struct device *dev, | |
307 | unsigned int enabled) | |
308 | { | |
309 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
310 | ||
311 | if (enabled) | |
312 | return wm831x_rtc_start_alarm(wm831x_rtc); | |
313 | else | |
314 | return wm831x_rtc_stop_alarm(wm831x_rtc); | |
315 | } | |
316 | ||
317 | static int wm831x_rtc_update_irq_enable(struct device *dev, | |
318 | unsigned int enabled) | |
319 | { | |
320 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | |
321 | int val; | |
322 | ||
323 | if (enabled) | |
324 | val = 1 << WM831X_RTC_PINT_FREQ_SHIFT; | |
325 | else | |
326 | val = 0; | |
327 | ||
328 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
329 | WM831X_RTC_PINT_FREQ_MASK, val); | |
330 | } | |
331 | ||
332 | static irqreturn_t wm831x_alm_irq(int irq, void *data) | |
333 | { | |
334 | struct wm831x_rtc *wm831x_rtc = data; | |
335 | ||
336 | rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF); | |
337 | ||
338 | return IRQ_HANDLED; | |
339 | } | |
340 | ||
341 | static irqreturn_t wm831x_per_irq(int irq, void *data) | |
342 | { | |
343 | struct wm831x_rtc *wm831x_rtc = data; | |
344 | ||
345 | rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_UF); | |
346 | ||
347 | return IRQ_HANDLED; | |
348 | } | |
349 | ||
350 | static const struct rtc_class_ops wm831x_rtc_ops = { | |
351 | .read_time = wm831x_rtc_readtime, | |
352 | .set_mmss = wm831x_rtc_set_mmss, | |
353 | .read_alarm = wm831x_rtc_readalarm, | |
354 | .set_alarm = wm831x_rtc_setalarm, | |
355 | .alarm_irq_enable = wm831x_rtc_alarm_irq_enable, | |
356 | .update_irq_enable = wm831x_rtc_update_irq_enable, | |
357 | }; | |
358 | ||
359 | #ifdef CONFIG_PM | |
360 | /* Turn off the alarm if it should not be a wake source. */ | |
361 | static int wm831x_rtc_suspend(struct device *dev) | |
362 | { | |
363 | struct platform_device *pdev = to_platform_device(dev); | |
364 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | |
365 | int ret, enable; | |
366 | ||
367 | if (wm831x_rtc->alarm_enabled && device_may_wakeup(&pdev->dev)) | |
368 | enable = WM831X_RTC_ALM_ENA; | |
369 | else | |
370 | enable = 0; | |
371 | ||
372 | ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
373 | WM831X_RTC_ALM_ENA, enable); | |
374 | if (ret != 0) | |
375 | dev_err(&pdev->dev, "Failed to update RTC alarm: %d\n", ret); | |
376 | ||
377 | return 0; | |
378 | } | |
379 | ||
380 | /* Enable the alarm if it should be enabled (in case it was disabled to | |
381 | * prevent use as a wake source). | |
382 | */ | |
383 | static int wm831x_rtc_resume(struct device *dev) | |
384 | { | |
385 | struct platform_device *pdev = to_platform_device(dev); | |
386 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | |
387 | int ret; | |
388 | ||
389 | if (wm831x_rtc->alarm_enabled) { | |
390 | ret = wm831x_rtc_start_alarm(wm831x_rtc); | |
391 | if (ret != 0) | |
392 | dev_err(&pdev->dev, | |
393 | "Failed to restart RTC alarm: %d\n", ret); | |
394 | } | |
395 | ||
396 | return 0; | |
397 | } | |
398 | ||
399 | /* Unconditionally disable the alarm */ | |
400 | static int wm831x_rtc_freeze(struct device *dev) | |
401 | { | |
402 | struct platform_device *pdev = to_platform_device(dev); | |
403 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | |
404 | int ret; | |
405 | ||
406 | ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | |
407 | WM831X_RTC_ALM_ENA, 0); | |
408 | if (ret != 0) | |
409 | dev_err(&pdev->dev, "Failed to stop RTC alarm: %d\n", ret); | |
410 | ||
411 | return 0; | |
412 | } | |
413 | #else | |
414 | #define wm831x_rtc_suspend NULL | |
415 | #define wm831x_rtc_resume NULL | |
416 | #define wm831x_rtc_freeze NULL | |
417 | #endif | |
418 | ||
419 | static int wm831x_rtc_probe(struct platform_device *pdev) | |
420 | { | |
421 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
422 | struct wm831x_rtc *wm831x_rtc; | |
423 | int per_irq = platform_get_irq_byname(pdev, "PER"); | |
424 | int alm_irq = platform_get_irq_byname(pdev, "ALM"); | |
425 | int ret = 0; | |
426 | ||
427 | wm831x_rtc = kzalloc(sizeof(*wm831x_rtc), GFP_KERNEL); | |
428 | if (wm831x_rtc == NULL) | |
429 | return -ENOMEM; | |
430 | ||
431 | platform_set_drvdata(pdev, wm831x_rtc); | |
432 | wm831x_rtc->wm831x = wm831x; | |
433 | ||
434 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | |
435 | if (ret < 0) { | |
436 | dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret); | |
437 | goto err; | |
438 | } | |
439 | if (ret & WM831X_RTC_ALM_ENA) | |
440 | wm831x_rtc->alarm_enabled = 1; | |
441 | ||
442 | device_init_wakeup(&pdev->dev, 1); | |
443 | ||
444 | wm831x_rtc->rtc = rtc_device_register("wm831x", &pdev->dev, | |
445 | &wm831x_rtc_ops, THIS_MODULE); | |
446 | if (IS_ERR(wm831x_rtc->rtc)) { | |
447 | ret = PTR_ERR(wm831x_rtc->rtc); | |
448 | goto err; | |
449 | } | |
450 | ||
451 | ret = wm831x_request_irq(wm831x, per_irq, wm831x_per_irq, | |
452 | IRQF_TRIGGER_RISING, "wm831x_rtc_per", | |
453 | wm831x_rtc); | |
454 | if (ret != 0) { | |
455 | dev_err(&pdev->dev, "Failed to request periodic IRQ %d: %d\n", | |
456 | per_irq, ret); | |
457 | } | |
458 | ||
459 | ret = wm831x_request_irq(wm831x, alm_irq, wm831x_alm_irq, | |
460 | IRQF_TRIGGER_RISING, "wm831x_rtc_alm", | |
461 | wm831x_rtc); | |
462 | if (ret != 0) { | |
463 | dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n", | |
464 | alm_irq, ret); | |
465 | } | |
466 | ||
467 | return 0; | |
468 | ||
469 | err: | |
470 | kfree(wm831x_rtc); | |
471 | return ret; | |
472 | } | |
473 | ||
474 | static int __devexit wm831x_rtc_remove(struct platform_device *pdev) | |
475 | { | |
476 | struct wm831x_rtc *wm831x_rtc = platform_get_drvdata(pdev); | |
477 | int per_irq = platform_get_irq_byname(pdev, "PER"); | |
478 | int alm_irq = platform_get_irq_byname(pdev, "ALM"); | |
479 | ||
480 | wm831x_free_irq(wm831x_rtc->wm831x, alm_irq, wm831x_rtc); | |
481 | wm831x_free_irq(wm831x_rtc->wm831x, per_irq, wm831x_rtc); | |
482 | rtc_device_unregister(wm831x_rtc->rtc); | |
483 | kfree(wm831x_rtc); | |
484 | ||
485 | return 0; | |
486 | } | |
487 | ||
488 | static struct dev_pm_ops wm831x_rtc_pm_ops = { | |
489 | .suspend = wm831x_rtc_suspend, | |
490 | .resume = wm831x_rtc_resume, | |
491 | ||
492 | .freeze = wm831x_rtc_freeze, | |
493 | .thaw = wm831x_rtc_resume, | |
494 | .restore = wm831x_rtc_resume, | |
495 | ||
496 | .poweroff = wm831x_rtc_suspend, | |
497 | }; | |
498 | ||
499 | static struct platform_driver wm831x_rtc_driver = { | |
500 | .probe = wm831x_rtc_probe, | |
501 | .remove = __devexit_p(wm831x_rtc_remove), | |
502 | .driver = { | |
503 | .name = "wm831x-rtc", | |
504 | .pm = &wm831x_rtc_pm_ops, | |
505 | }, | |
506 | }; | |
507 | ||
508 | static int __init wm831x_rtc_init(void) | |
509 | { | |
510 | return platform_driver_register(&wm831x_rtc_driver); | |
511 | } | |
512 | module_init(wm831x_rtc_init); | |
513 | ||
514 | static void __exit wm831x_rtc_exit(void) | |
515 | { | |
516 | platform_driver_unregister(&wm831x_rtc_driver); | |
517 | } | |
518 | module_exit(wm831x_rtc_exit); | |
519 | ||
520 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | |
521 | MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs"); | |
522 | MODULE_LICENSE("GPL"); | |
523 | MODULE_ALIAS("platform:wm831x-rtc"); |