[deliverable/linux.git] / drivers / s390 / cio / ioasm.h

#ifndef S390_CIO_IOASM_H
#define S390_CIO_IOASM_H

#include <asm/chpid.h>
#include <asm/schid.h>
#include <asm/crw.h>
#include "orb.h"
#include "cio.h"
#include "trace.h"

/*
 * Some S390 specific IO instructions as inline
 */

static inline int stsch(struct subchannel_id schid, struct schib *addr)
{
	register struct subchannel_id reg1 asm ("1") = schid;
	int ccode = -EIO;

	asm volatile(
		"	stsch	0(%3)\n"
		"0:	ipm	%0\n"
		"	srl	%0,28\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "+d" (ccode), "=m" (*addr)
		: "d" (reg1), "a" (addr)
		: "cc");
	trace_s390_cio_stsch(schid, addr, ccode);

	return ccode;
}

static inline int msch(struct subchannel_id schid, struct schib *addr)
{
	register struct subchannel_id reg1 asm ("1") = schid;
	int ccode = -EIO;

	asm volatile(
		"	msch	0(%2)\n"
		"0:	ipm	%0\n"
		"	srl	%0,28\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "+d" (ccode)
		: "d" (reg1), "a" (addr), "m" (*addr)
		: "cc");
	trace_s390_cio_msch(schid, addr, ccode);

	return ccode;
}

static inline int tsch(struct subchannel_id schid, struct irb *addr)
{
	register struct subchannel_id reg1 asm ("1") = schid;
	int ccode;

	asm volatile(
		"	tsch	0(%3)\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (ccode), "=m" (*addr)
		: "d" (reg1), "a" (addr)
		: "cc");
	trace_s390_cio_tsch(schid, addr, ccode);

	return ccode;
}

static inline int ssch(struct subchannel_id schid, union orb *addr)
{
	register struct subchannel_id reg1 asm("1") = schid;
	int ccode = -EIO;

	asm volatile(
		"	ssch	0(%2)\n"
		"0:	ipm	%0\n"
		"	srl	%0,28\n"
		"1:\n"
		EX_TABLE(0b, 1b)
		: "+d" (ccode)
		: "d" (reg1), "a" (addr), "m" (*addr)
		: "cc", "memory");
	trace_s390_cio_ssch(schid, addr, ccode);

	return ccode;
}

static inline int csch(struct subchannel_id schid)
{
	register struct subchannel_id reg1 asm("1") = schid;
	int ccode;

	asm volatile(
		"	csch\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (ccode)
		: "d" (reg1)
		: "cc");
	trace_s390_cio_csch(schid, ccode);

	return ccode;
}

static inline int tpi(struct tpi_info *addr)
{
	int ccode;

	asm volatile(
		"	tpi	0(%2)\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (ccode), "=m" (*addr)
		: "a" (addr)
		: "cc");
	trace_s390_cio_tpi(addr, ccode);

	return ccode;
}

static inline int chsc(void *chsc_area)
{
	typedef struct { char _[4096]; } addr_type;
	int cc;

	asm volatile(
		"	.insn	rre,0xb25f0000,%2,0\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (cc), "=m" (*(addr_type *) chsc_area)
		: "d" (chsc_area), "m" (*(addr_type *) chsc_area)
		: "cc");
	trace_s390_cio_chsc(chsc_area, cc);

	return cc;
}

static inline int rchp(struct chp_id chpid)
{
	register struct chp_id reg1 asm ("1") = chpid;
	int ccode;

	asm volatile(
		"	lr	1,%1\n"
		"	rchp\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (ccode) : "d" (reg1) : "cc");
	trace_s390_cio_rchp(chpid, ccode);

	return ccode;
}

static inline int rsch(struct subchannel_id schid)
{
	register struct subchannel_id reg1 asm("1") = schid;
	int ccode;

	asm volatile(
		"	rsch\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (ccode)
		: "d" (reg1)
		: "cc", "memory");
	trace_s390_cio_rsch(schid, ccode);

	return ccode;
}

static inline int hsch(struct subchannel_id schid)
{
	register struct subchannel_id reg1 asm("1") = schid;
	int ccode;

	asm volatile(
		"	hsch\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (ccode)
		: "d" (reg1)
		: "cc");
	trace_s390_cio_hsch(schid, ccode);

	return ccode;
}

static inline int xsch(struct subchannel_id schid)
{
	register struct subchannel_id reg1 asm("1") = schid;
	int ccode;

	asm volatile(
		"	xsch\n"
		"	ipm	%0\n"
		"	srl	%0,28"
		: "=d" (ccode)
		: "d" (reg1)
		: "cc");
	trace_s390_cio_xsch(schid, ccode);

	return ccode;
}

static inline int stcrw(struct crw *crw)
{
	int ccode;

	asm volatile(
		"	stcrw	0(%2)\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (ccode), "=m" (*crw)
		: "a" (crw)
		: "cc");
	trace_s390_cio_stcrw(crw, ccode);

	return ccode;
}

#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef S390_CIO_IOASM_H
	2	#define S390_CIO_IOASM_H
	3
e5854a58	4	#include <asm/chpid.h>
9d92a7e1	5	#include <asm/schid.h>
2ab59de7	6	#include <asm/crw.h>
dbda8ce5 SO	7	#include "orb.h"
dbda8ce5 SO	8	#include "cio.h"
42248979	9	#include "trace.h"
a8237fc4	10
1da177e4 LT	11	/*
	12	* Some S390 specific IO instructions as inline
	13	*/
	14
62e65da9	15	static inline int stsch(struct subchannel_id schid, struct schib *addr)
fb6958a5	16	{
94c12cc7 MS	17	register struct subchannel_id reg1 asm ("1") = schid;
94c12cc7 MS	18	int ccode = -EIO;
fb6958a5	19
94c12cc7	20	asm volatile(
f9c9fe3e	21	" stsch 0(%3)\n"
94c12cc7 MS	22	"0: ipm %0\n"
94c12cc7 MS	23	" srl %0,28\n"
fb6958a5	24	"1:\n"
94c12cc7	25	EX_TABLE(0b,1b)
f9c9fe3e PO	26	: "+d" (ccode), "=m" (*addr)
	27	: "d" (reg1), "a" (addr)
	28	: "cc");
42248979 PO	29	trace_s390_cio_stsch(schid, addr, ccode);
42248979 PO	30
fb6958a5 CH	31	return ccode;
	32	}
	33
f9c9fe3e	34	static inline int msch(struct subchannel_id schid, struct schib *addr)
1da177e4	35	{
94c12cc7 MS	36	register struct subchannel_id reg1 asm ("1") = schid;
94c12cc7 MS	37	int ccode = -EIO;
1da177e4	38
94c12cc7 MS	39	asm volatile(
	40	" msch 0(%2)\n"
	41	"0: ipm %0\n"
	42	" srl %0,28\n"
1da177e4	43	"1:\n"
94c12cc7	44	EX_TABLE(0b,1b)
f9c9fe3e PO	45	: "+d" (ccode)
	46	: "d" (reg1), "a" (addr), "m" (*addr)
	47	: "cc");
42248979 PO	48	trace_s390_cio_msch(schid, addr, ccode);
42248979 PO	49
1da177e4 LT	50	return ccode;
	51	}
	52
f9c9fe3e	53	static inline int tsch(struct subchannel_id schid, struct irb *addr)
1da177e4	54	{
94c12cc7	55	register struct subchannel_id reg1 asm ("1") = schid;
1da177e4 LT	56	int ccode;
1da177e4 LT	57
94c12cc7	58	asm volatile(
f9c9fe3e	59	" tsch 0(%3)\n"
94c12cc7 MS	60	" ipm %0\n"
94c12cc7 MS	61	" srl %0,28"
f9c9fe3e PO	62	: "=d" (ccode), "=m" (*addr)
	63	: "d" (reg1), "a" (addr)
	64	: "cc");
42248979 PO	65	trace_s390_cio_tsch(schid, addr, ccode);
42248979 PO	66
1da177e4 LT	67	return ccode;
	68	}
	69
dbda8ce5 SO	70	static inline int ssch(struct subchannel_id schid, union orb *addr)
	71	{
	72	register struct subchannel_id reg1 asm("1") = schid;
	73	int ccode = -EIO;
	74
	75	asm volatile(
	76	" ssch 0(%2)\n"
	77	"0: ipm %0\n"
	78	" srl %0,28\n"
	79	"1:\n"
	80	EX_TABLE(0b, 1b)
	81	: "+d" (ccode)
	82	: "d" (reg1), "a" (addr), "m" (*addr)
	83	: "cc", "memory");
42248979 PO	84	trace_s390_cio_ssch(schid, addr, ccode);
42248979 PO	85
dbda8ce5 SO	86	return ccode;
	87	}
	88
	89	static inline int csch(struct subchannel_id schid)
	90	{
	91	register struct subchannel_id reg1 asm("1") = schid;
	92	int ccode;
	93
	94	asm volatile(
	95	" csch\n"
	96	" ipm %0\n"
	97	" srl %0,28"
	98	: "=d" (ccode)
	99	: "d" (reg1)
	100	: "cc");
42248979 PO	101	trace_s390_cio_csch(schid, ccode);
42248979 PO	102
dbda8ce5 SO	103	return ccode;
	104	}
	105
f9c9fe3e	106	static inline int tpi(struct tpi_info *addr)
1da177e4 LT	107	{
	108	int ccode;
	109
94c12cc7	110	asm volatile(
f9c9fe3e	111	" tpi 0(%2)\n"
94c12cc7 MS	112	" ipm %0\n"
94c12cc7 MS	113	" srl %0,28"
f9c9fe3e PO	114	: "=d" (ccode), "=m" (*addr)
	115	: "a" (addr)
	116	: "cc");
42248979 PO	117	trace_s390_cio_tpi(addr, ccode);
42248979 PO	118
1da177e4 LT	119	return ccode;
	120	}
	121
4c24da79	122	static inline int chsc(void *chsc_area)
1da177e4	123	{
a8237fc4	124	typedef struct { char _[4096]; } addr_type;
1da177e4 LT	125	int cc;
1da177e4 LT	126
94c12cc7 MS	127	asm volatile(
	128	" .insn rre,0xb25f0000,%2,0\n"
	129	" ipm %0\n"
	130	" srl %0,28\n"
a8237fc4 CH	131	: "=d" (cc), "=m" ((addr_type ) chsc_area)
a8237fc4 CH	132	: "d" (chsc_area), "m" ((addr_type ) chsc_area)
94c12cc7	133	: "cc");
42248979 PO	134	trace_s390_cio_chsc(chsc_area, cc);
42248979 PO	135
1da177e4 LT	136	return cc;
	137	}
	138
f86635fa	139	static inline int rchp(struct chp_id chpid)
1da177e4	140	{
f86635fa	141	register struct chp_id reg1 asm ("1") = chpid;
1da177e4 LT	142	int ccode;
1da177e4 LT	143
94c12cc7 MS	144	asm volatile(
	145	" lr 1,%1\n"
	146	" rchp\n"
	147	" ipm %0\n"
	148	" srl %0,28"
	149	: "=d" (ccode) : "d" (reg1) : "cc");
42248979 PO	150	trace_s390_cio_rchp(chpid, ccode);
42248979 PO	151
1da177e4 LT	152	return ccode;
	153	}
	154
2ab59de7 PO	155	static inline int rsch(struct subchannel_id schid)
	156	{
	157	register struct subchannel_id reg1 asm("1") = schid;
	158	int ccode;
	159
	160	asm volatile(
	161	" rsch\n"
	162	" ipm %0\n"
	163	" srl %0,28"
	164	: "=d" (ccode)
	165	: "d" (reg1)
	166	: "cc", "memory");
42248979 PO	167	trace_s390_cio_rsch(schid, ccode);
42248979 PO	168
2ab59de7 PO	169	return ccode;
	170	}
	171
	172	static inline int hsch(struct subchannel_id schid)
	173	{
	174	register struct subchannel_id reg1 asm("1") = schid;
	175	int ccode;
	176
	177	asm volatile(
	178	" hsch\n"
	179	" ipm %0\n"
	180	" srl %0,28"
	181	: "=d" (ccode)
	182	: "d" (reg1)
	183	: "cc");
42248979 PO	184	trace_s390_cio_hsch(schid, ccode);
42248979 PO	185
2ab59de7 PO	186	return ccode;
	187	}
	188
	189	static inline int xsch(struct subchannel_id schid)
	190	{
	191	register struct subchannel_id reg1 asm("1") = schid;
	192	int ccode;
	193
	194	asm volatile(
	195	" xsch\n"
	196	" ipm %0\n"
	197	" srl %0,28"
	198	: "=d" (ccode)
	199	: "d" (reg1)
	200	: "cc");
42248979 PO	201	trace_s390_cio_xsch(schid, ccode);
42248979 PO	202
2ab59de7 PO	203	return ccode;
	204	}
	205
	206	static inline int stcrw(struct crw *crw)
	207	{
	208	int ccode;
	209
	210	asm volatile(
	211	" stcrw 0(%2)\n"
	212	" ipm %0\n"
	213	" srl %0,28\n"
	214	: "=d" (ccode), "=m" (*crw)
	215	: "a" (crw)
	216	: "cc");
42248979 PO	217	trace_s390_cio_stcrw(crw, ccode);
42248979 PO	218
2ab59de7 PO	219	return ccode;
	220	}
	221
1da177e4	222	#endif