[S390] cio: move orb definitions to separate header
[deliverable/linux.git] / drivers / s390 / cio / ioasm.h
CommitLineData
1da177e4
LT
1#ifndef S390_CIO_IOASM_H
2#define S390_CIO_IOASM_H
3
e5854a58 4#include <asm/chpid.h>
9d92a7e1 5#include <asm/schid.h>
a8237fc4 6
1da177e4
LT
7/*
8 * TPI info structure
9 */
10struct tpi_info {
a8237fc4 11 struct subchannel_id schid;
1da177e4
LT
12 __u32 intparm; /* interruption parameter */
13 __u32 adapter_IO : 1;
14 __u32 reserved2 : 1;
15 __u32 isc : 3;
16 __u32 reserved3 : 12;
17 __u32 int_type : 3;
18 __u32 reserved4 : 12;
19} __attribute__ ((packed));
20
21
22/*
23 * Some S390 specific IO instructions as inline
24 */
25
f9c9fe3e 26static inline int stsch_err(struct subchannel_id schid, struct schib *addr)
fb6958a5 27{
94c12cc7
MS
28 register struct subchannel_id reg1 asm ("1") = schid;
29 int ccode = -EIO;
fb6958a5 30
94c12cc7 31 asm volatile(
f9c9fe3e 32 " stsch 0(%3)\n"
94c12cc7
MS
33 "0: ipm %0\n"
34 " srl %0,28\n"
fb6958a5 35 "1:\n"
94c12cc7 36 EX_TABLE(0b,1b)
f9c9fe3e
PO
37 : "+d" (ccode), "=m" (*addr)
38 : "d" (reg1), "a" (addr)
39 : "cc");
fb6958a5
CH
40 return ccode;
41}
42
f9c9fe3e 43static inline int msch(struct subchannel_id schid, struct schib *addr)
1da177e4 44{
94c12cc7 45 register struct subchannel_id reg1 asm ("1") = schid;
1da177e4
LT
46 int ccode;
47
94c12cc7
MS
48 asm volatile(
49 " msch 0(%2)\n"
50 " ipm %0\n"
51 " srl %0,28"
f9c9fe3e
PO
52 : "=d" (ccode)
53 : "d" (reg1), "a" (addr), "m" (*addr)
54 : "cc");
1da177e4
LT
55 return ccode;
56}
57
f9c9fe3e 58static inline int msch_err(struct subchannel_id schid, struct schib *addr)
1da177e4 59{
94c12cc7
MS
60 register struct subchannel_id reg1 asm ("1") = schid;
61 int ccode = -EIO;
1da177e4 62
94c12cc7
MS
63 asm volatile(
64 " msch 0(%2)\n"
65 "0: ipm %0\n"
66 " srl %0,28\n"
1da177e4 67 "1:\n"
94c12cc7 68 EX_TABLE(0b,1b)
f9c9fe3e
PO
69 : "+d" (ccode)
70 : "d" (reg1), "a" (addr), "m" (*addr)
71 : "cc");
1da177e4
LT
72 return ccode;
73}
74
f9c9fe3e 75static inline int tsch(struct subchannel_id schid, struct irb *addr)
1da177e4 76{
94c12cc7 77 register struct subchannel_id reg1 asm ("1") = schid;
1da177e4
LT
78 int ccode;
79
94c12cc7 80 asm volatile(
f9c9fe3e 81 " tsch 0(%3)\n"
94c12cc7
MS
82 " ipm %0\n"
83 " srl %0,28"
f9c9fe3e
PO
84 : "=d" (ccode), "=m" (*addr)
85 : "d" (reg1), "a" (addr)
86 : "cc");
1da177e4
LT
87 return ccode;
88}
89
f9c9fe3e 90static inline int tpi(struct tpi_info *addr)
1da177e4
LT
91{
92 int ccode;
93
94c12cc7 94 asm volatile(
f9c9fe3e 95 " tpi 0(%2)\n"
94c12cc7
MS
96 " ipm %0\n"
97 " srl %0,28"
f9c9fe3e
PO
98 : "=d" (ccode), "=m" (*addr)
99 : "a" (addr)
100 : "cc");
1da177e4
LT
101 return ccode;
102}
103
4c24da79 104static inline int chsc(void *chsc_area)
1da177e4 105{
a8237fc4 106 typedef struct { char _[4096]; } addr_type;
1da177e4
LT
107 int cc;
108
94c12cc7
MS
109 asm volatile(
110 " .insn rre,0xb25f0000,%2,0\n"
111 " ipm %0\n"
112 " srl %0,28\n"
a8237fc4
CH
113 : "=d" (cc), "=m" (*(addr_type *) chsc_area)
114 : "d" (chsc_area), "m" (*(addr_type *) chsc_area)
94c12cc7 115 : "cc");
1da177e4
LT
116 return cc;
117}
118
f86635fa 119static inline int rchp(struct chp_id chpid)
1da177e4 120{
f86635fa 121 register struct chp_id reg1 asm ("1") = chpid;
1da177e4
LT
122 int ccode;
123
94c12cc7
MS
124 asm volatile(
125 " lr 1,%1\n"
126 " rchp\n"
127 " ipm %0\n"
128 " srl %0,28"
129 : "=d" (ccode) : "d" (reg1) : "cc");
1da177e4
LT
130 return ccode;
131}
132
133#endif
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