[deliverable/linux.git] / drivers / s390 / cio / qdio.h

#ifndef _CIO_QDIO_H
#define _CIO_QDIO_H

#include <asm/page.h>

#include "schid.h"

#ifdef CONFIG_QDIO_DEBUG
#define QDIO_VERBOSE_LEVEL 9
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_VERBOSE_LEVEL 5
#endif /* CONFIG_QDIO_DEBUG */
#define QDIO_USE_PROCESSING_STATE

#ifdef CONFIG_QDIO_PERF_STATS
#define QDIO_PERFORMANCE_STATS
#endif /* CONFIG_QDIO_PERF_STATS */

#define QDIO_MINIMAL_BH_RELIEF_TIME 16
#define QDIO_TIMER_POLL_VALUE 1
#define IQDIO_TIMER_POLL_VALUE 1

/*
 * unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
 * we never know, whether we'll get initiative again, e.g. to give the
 * transmit skb's back to the stack, however the stack may be waiting for
 * them... therefore we define 4 as threshold to start polling (which
 * will stop as soon as the asynchronous queue catches up)
 * btw, this only applies to the asynchronous HiperSockets queue
 */
#define IQDIO_FILL_LEVEL_TO_POLL 4

#define TIQDIO_THININT_ISC 3
#define TIQDIO_DELAY_TARGET 0
#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
#define IQDIO_LOCAL_LAPS 4
#define IQDIO_LOCAL_LAPS_INT 1
#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
/*#define IQDIO_IQDC_INT_PARM 0x1234*/

#define QDIO_Q_LAPS 5

#define QDIO_STORAGE_KEY PAGE_DEFAULT_KEY

#define L2_CACHELINE_SIZE 256
#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))

#define QDIO_PERF "qdio_perf"

/* must be a power of 2 */
/*#define QDIO_STATS_NUMBER 4

#define QDIO_STATS_CLASSES 2
#define QDIO_STATS_COUNT_NEEDED 2*/

#define QDIO_NO_USE_COUNT_TIMEOUT (1*HZ) /* wait for 1 sec on each q before
					    exiting without having use_count
					    of the queue to 0 */

#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
#define QDIO_ACTIVATE_TIMEOUT ((5*HZ)>>10)
#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)

enum qdio_irq_states {
	QDIO_IRQ_STATE_INACTIVE,
	QDIO_IRQ_STATE_ESTABLISHED,
	QDIO_IRQ_STATE_ACTIVE,
	QDIO_IRQ_STATE_STOPPED,
	QDIO_IRQ_STATE_CLEANUP,
	QDIO_IRQ_STATE_ERR,
	NR_QDIO_IRQ_STATES,
};

/* used as intparm in do_IO: */
#define QDIO_DOING_SENSEID 0
#define QDIO_DOING_ESTABLISH 1
#define QDIO_DOING_ACTIVATE 2
#define QDIO_DOING_CLEANUP 3

/************************* DEBUG FACILITY STUFF *********************/

#define QDIO_DBF_HEX(ex,name,level,addr,len) \
	do { \
	if (ex) \
		debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
	else \
		debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
	} while (0)
#define QDIO_DBF_TEXT(ex,name,level,text) \
	do { \
	if (ex) \
		debug_text_exception(qdio_dbf_##name,level,text); \
	else \
		debug_text_event(qdio_dbf_##name,level,text); \
	} while (0)


#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SETUP_NAME "qdio_setup"
#define QDIO_DBF_SETUP_LEN 8
#define QDIO_DBF_SETUP_PAGES 4
#define QDIO_DBF_SETUP_NR_AREAS 1
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SETUP_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SETUP_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
#define QDIO_DBF_SBAL_LEN 256
#define QDIO_DBF_SBAL_PAGES 4
#define QDIO_DBF_SBAL_NR_AREAS 2
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SBAL_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SBAL_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_TRACE_NAME "qdio_trace"
#define QDIO_DBF_TRACE_LEN 8
#define QDIO_DBF_TRACE_NR_AREAS 2
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_TRACE_PAGES 16
#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_TRACE_PAGES 4
#define QDIO_DBF_TRACE_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SENSE_NAME "qdio_sense"
#define QDIO_DBF_SENSE_LEN 64
#define QDIO_DBF_SENSE_PAGES 2
#define QDIO_DBF_SENSE_NR_AREAS 1
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SENSE_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SENSE_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#ifdef CONFIG_QDIO_DEBUG
#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT

#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
#define QDIO_DBF_SLSB_OUT_PAGES 256
#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
#define QDIO_DBF_SLSB_OUT_LEVEL 6

#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
#define QDIO_DBF_SLSB_IN_PAGES 256
#define QDIO_DBF_SLSB_IN_NR_AREAS 1
#define QDIO_DBF_SLSB_IN_LEVEL 6
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_PRINTK_HEADER QDIO_NAME ": "

#if QDIO_VERBOSE_LEVEL>8
#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_STUPID(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>7
#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ALL(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>6
#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_INFO(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>5
#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_WARN(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>4
#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ERR(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>3
#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_CRIT(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>2
#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ALERT(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>1
#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_EMERG(x...) do { } while (0)
#endif

#define HEXDUMP16(importance,header,ptr) \
QDIO_PRINT_##importance(header "%02x %02x %02x %02x  " \
			"%02x %02x %02x %02x  %02x %02x %02x %02x  " \
			"%02x %02x %02x %02x\n",*(((char*)ptr)), \
			*(((char*)ptr)+1),*(((char*)ptr)+2), \
			*(((char*)ptr)+3),*(((char*)ptr)+4), \
			*(((char*)ptr)+5),*(((char*)ptr)+6), \
			*(((char*)ptr)+7),*(((char*)ptr)+8), \
			*(((char*)ptr)+9),*(((char*)ptr)+10), \
			*(((char*)ptr)+11),*(((char*)ptr)+12), \
			*(((char*)ptr)+13),*(((char*)ptr)+14), \
			*(((char*)ptr)+15)); \
QDIO_PRINT_##importance(header "%02x %02x %02x %02x  %02x %02x %02x %02x  " \
			"%02x %02x %02x %02x  %02x %02x %02x %02x\n", \
			*(((char*)ptr)+16),*(((char*)ptr)+17), \
			*(((char*)ptr)+18),*(((char*)ptr)+19), \
			*(((char*)ptr)+20),*(((char*)ptr)+21), \
			*(((char*)ptr)+22),*(((char*)ptr)+23), \
			*(((char*)ptr)+24),*(((char*)ptr)+25), \
			*(((char*)ptr)+26),*(((char*)ptr)+27), \
			*(((char*)ptr)+28),*(((char*)ptr)+29), \
			*(((char*)ptr)+30),*(((char*)ptr)+31));

/****************** END OF DEBUG FACILITY STUFF *********************/

/*
 * Some instructions as assembly
 */

static inline int
do_sqbs(unsigned long sch, unsigned char state, int queue,
       unsigned int *start, unsigned int *count)
{
#ifdef CONFIG_64BIT
       register unsigned long _ccq asm ("0") = *count;
       register unsigned long _sch asm ("1") = sch;
       unsigned long _queuestart = ((unsigned long)queue << 32) | *start;

       asm volatile (
              " .insn rsy,0xeb000000008A,%1,0,0(%2)\n\t"
              : "+d" (_ccq), "+d" (_queuestart)
              : "d" ((unsigned long)state), "d" (_sch)
              : "memory", "cc"
       );
       *count = _ccq & 0xff;
       *start = _queuestart & 0xff;

       return (_ccq >> 32) & 0xff;
#else
       return 0;
#endif
}

static inline int
do_eqbs(unsigned long sch, unsigned char *state, int queue,
	unsigned int *start, unsigned int *count)
{
#ifdef CONFIG_64BIT
	register unsigned long _ccq asm ("0") = *count;
	register unsigned long _sch asm ("1") = sch;
	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
	unsigned long _state = 0;

	asm volatile (
	      " .insn rrf,0xB99c0000,%1,%2,0,0  \n\t"
	      : "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
	      : "d" (_sch)
	      : "memory", "cc"
	);
	*count = _ccq & 0xff;
	*start = _queuestart & 0xff;
	*state = _state & 0xff;

	return (_ccq >> 32) & 0xff;
#else
	return 0;
#endif
}


static inline int
do_siga_sync(struct subchannel_id schid, unsigned int mask1, unsigned int mask2)
{
	int cc;

#ifndef CONFIG_64BIT
	asm volatile (
		"lhi	0,2	\n\t"
		"lr	1,%1	\n\t"
		"lr	2,%2	\n\t"
		"lr	3,%3	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (schid), "d" (mask1), "d" (mask2)
		: "cc", "0", "1", "2", "3"
		);
#else /* CONFIG_64BIT */
	asm volatile (
		"lghi	0,2	\n\t"
		"llgfr	1,%1	\n\t"
		"llgfr	2,%2	\n\t"
		"llgfr	3,%3	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (schid), "d" (mask1), "d" (mask2)
		: "cc", "0", "1", "2", "3"
		);
#endif /* CONFIG_64BIT */
	return cc;
}

static inline int
do_siga_input(struct subchannel_id schid, unsigned int mask)
{
	int cc;

#ifndef CONFIG_64BIT
	asm volatile (
		"lhi	0,1	\n\t"
		"lr	1,%1	\n\t"
		"lr	2,%2	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (schid), "d" (mask)
		: "cc", "0", "1", "2", "memory"
		);
#else /* CONFIG_64BIT */
	asm volatile (
		"lghi	0,1	\n\t"
		"llgfr	1,%1	\n\t"
		"llgfr	2,%2	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (schid), "d" (mask)
		: "cc", "0", "1", "2", "memory"
		);
#endif /* CONFIG_64BIT */
	
	return cc;
}

static inline int
do_siga_output(unsigned long schid, unsigned long mask, __u32 *bb,
	       unsigned int fc)
{
	int cc;
	__u32 busy_bit;

#ifndef CONFIG_64BIT
	asm volatile (
		"lhi	0,0	\n\t"
		"lr	1,%2	\n\t"
		"lr	2,%3	\n\t"
		"siga	0	\n\t"
		"0:"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		"srl	0,31	\n\t"
		"lr	%1,0	\n\t"
		"1:	\n\t"
		".section .fixup,\"ax\"\n\t"
		"2:	\n\t"
		"lhi	%0,%4	\n\t"
		"bras	1,3f	\n\t"
		".long 1b	\n\t"
		"3:	\n\t"
		"l	1,0(1)	\n\t"
		"br	1	\n\t"
		".previous	\n\t"
		".section __ex_table,\"a\"\n\t"
		".align 4	\n\t"
		".long	0b,2b	\n\t"
		".previous	\n\t"
		: "=d" (cc), "=d" (busy_bit)
		: "d" (schid), "d" (mask),
		"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
		: "cc", "0", "1", "2", "memory"
		);
#else /* CONFIG_64BIT */
	asm volatile (
        	"llgfr  0,%5    \n\t"
                "lgr    1,%2    \n\t"
		"llgfr	2,%3	\n\t"
		"siga	0	\n\t"
		"0:"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		"srl	0,31	\n\t"
		"llgfr	%1,0	\n\t"
		"1:	\n\t"
		".section .fixup,\"ax\"\n\t"
		"lghi	%0,%4	\n\t"
		"jg	1b	\n\t"
		".previous\n\t"
		".section __ex_table,\"a\"\n\t"
		".align 8	\n\t"
		".quad	0b,1b	\n\t"
		".previous	\n\t"
		: "=d" (cc), "=d" (busy_bit)
		: "d" (schid), "d" (mask),
		"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION), "d" (fc)
		: "cc", "0", "1", "2", "memory"
		);
#endif /* CONFIG_64BIT */
	
	(*bb) = busy_bit;
	return cc;
}

static inline unsigned long
do_clear_global_summary(void)
{

	unsigned long time;

#ifndef CONFIG_64BIT
	asm volatile (
		"lhi	1,3	\n\t"
		".insn	rre,0xb2650000,2,0	\n\t"
		"lr	%0,3	\n\t"
		: "=d" (time) : : "cc", "1", "2", "3"
		);
#else /* CONFIG_64BIT */
	asm volatile (
		"lghi	1,3	\n\t"
		".insn	rre,0xb2650000,2,0	\n\t"
		"lgr	%0,3	\n\t"
		: "=d" (time) : : "cc", "1", "2", "3"
		);
#endif /* CONFIG_64BIT */
	
	return time;
}
	
/*
 * QDIO device commands returned by extended Sense-ID
 */
#define DEFAULT_ESTABLISH_QS_CMD 0x1b
#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
#define DEFAULT_ACTIVATE_QS_CMD 0x1f
#define DEFAULT_ACTIVATE_QS_COUNT 0

/*
 * additional CIWs returned by extended Sense-ID
 */
#define CIW_TYPE_EQUEUE 0x3       /* establish QDIO queues */
#define CIW_TYPE_AQUEUE 0x4       /* activate QDIO queues */

#define QDIO_CHSC_RESPONSE_CODE_OK 1
/* flags for st qdio sch data */
#define CHSC_FLAG_QDIO_CAPABILITY 0x80
#define CHSC_FLAG_VALIDITY 0x40

#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04

#ifdef QDIO_PERFORMANCE_STATS
struct qdio_perf_stats {
	unsigned int tl_runs;

	unsigned int siga_outs;
	unsigned int siga_ins;
	unsigned int siga_syncs;
	unsigned int pcis;
	unsigned int thinints;
	unsigned int fast_reqs;

	__u64 start_time_outbound;
	unsigned int outbound_cnt;
	unsigned int outbound_time;
	__u64 start_time_inbound;
	unsigned int inbound_cnt;
	unsigned int inbound_time;
};
#endif /* QDIO_PERFORMANCE_STATS */

#define atomic_swap(a,b) xchg((int*)a.counter,b)

/* unlikely as the later the better */
#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
	qdio_siga_sync(q,~0U,~0U)
#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
	qdio_siga_sync(q,~0U,0)

#define NOW qdio_get_micros()
#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)

#define MY_MODULE_STRING(x) #x

#ifdef CONFIG_64BIT
#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
#else /* CONFIG_64BIT */
#define QDIO_GET_ADDR(x) ((__u32)(long)x)
#endif /* CONFIG_64BIT */

struct qdio_q {
	volatile struct slsb slsb;

	char unused[QDIO_MAX_BUFFERS_PER_Q];

	__u32 * dev_st_chg_ind;

	int is_input_q;
	struct subchannel_id schid;
	struct ccw_device *cdev;

	unsigned int is_iqdio_q;
	unsigned int is_thinint_q;

	/* bit 0 means queue 0, bit 1 means queue 1, ... */
	unsigned int mask;
	unsigned int q_no;

	qdio_handler_t (*handler);

	/* points to the next buffer to be checked for having
	 * been processed by the card (outbound)
	 * or to the next buffer the program should check for (inbound) */
	volatile int first_to_check;
	/* and the last time it was: */
	volatile int last_move_ftc;

	atomic_t number_of_buffers_used;
	atomic_t polling;

	unsigned int siga_in;
	unsigned int siga_out;
	unsigned int siga_sync;
	unsigned int siga_sync_done_on_thinints;
	unsigned int siga_sync_done_on_outb_tis;
	unsigned int hydra_gives_outbound_pcis;

	/* used to save beginning position when calling dd_handlers */
	int first_element_to_kick;

	atomic_t use_count;
	atomic_t is_in_shutdown;

	void *irq_ptr;

#ifdef QDIO_USE_TIMERS_FOR_POLLING
	struct timer_list timer;
	atomic_t timer_already_set;
	spinlock_t timer_lock;
#else /* QDIO_USE_TIMERS_FOR_POLLING */
	struct tasklet_struct tasklet;
#endif /* QDIO_USE_TIMERS_FOR_POLLING */


	enum qdio_irq_states state;

	/* used to store the error condition during a data transfer */
	unsigned int qdio_error;
	unsigned int siga_error;
	unsigned int error_status_flags;

	/* list of interesting queues */
	volatile struct qdio_q *list_next;
	volatile struct qdio_q *list_prev;

	struct sl *sl;
	volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];

	struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];

	unsigned long int_parm;

	/*struct {
		int in_bh_check_limit;
		int threshold;
	} threshold_classes[QDIO_STATS_CLASSES];*/

	struct {
		/* inbound: the time to stop polling
		   outbound: the time to kick peer */
		int threshold; /* the real value */

		/* outbound: last time of do_QDIO
		   inbound: last time of noticing incoming data */
		/*__u64 last_transfer_times[QDIO_STATS_NUMBER];
		int last_transfer_index; */

		__u64 last_transfer_time;
		__u64 busy_start;
	} timing;
	atomic_t busy_siga_counter;
        unsigned int queue_type;

	/* leave this member at the end. won't be cleared in qdio_fill_qs */
	struct slib *slib; /* a page is allocated under this pointer,
			      sl points into this page, offset PAGE_SIZE/2
			      (after slib) */
} __attribute__ ((aligned(256)));

struct qdio_irq {
	__u32 * volatile dev_st_chg_ind;

	unsigned long int_parm;
	struct subchannel_id schid;

	unsigned int is_iqdio_irq;
	unsigned int is_thinint_irq;
	unsigned int hydra_gives_outbound_pcis;
	unsigned int sync_done_on_outb_pcis;

	/* QEBSM facility */
	unsigned int is_qebsm;
	unsigned long sch_token;

	enum qdio_irq_states state;

	unsigned int no_input_qs;
	unsigned int no_output_qs;

	unsigned char qdioac;

	struct ccw1 ccw;

	struct ciw equeue;
	struct ciw aqueue;

	struct qib qib;
	
 	void (*original_int_handler) (struct ccw_device *,
 				      unsigned long, struct irb *);

	/* leave these four members together at the end. won't be cleared in qdio_fill_irq */
	struct qdr *qdr;
	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
	struct semaphore setting_up_sema;
};
#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef _CIO_QDIO_H
	2	#define _CIO_QDIO_H
	3
0b642ede PO	4	#include <asm/page.h>
0b642ede PO	5
a8237fc4 CH	6	#include "schid.h"
a8237fc4 CH	7
1da177e4 LT	8	#ifdef CONFIG_QDIO_DEBUG
	9	#define QDIO_VERBOSE_LEVEL 9
	10	#else /* CONFIG_QDIO_DEBUG */
	11	#define QDIO_VERBOSE_LEVEL 5
	12	#endif /* CONFIG_QDIO_DEBUG */
1da177e4 LT	13	#define QDIO_USE_PROCESSING_STATE
	14
	15	#ifdef CONFIG_QDIO_PERF_STATS
	16	#define QDIO_PERFORMANCE_STATS
	17	#endif /* CONFIG_QDIO_PERF_STATS */
	18
	19	#define QDIO_MINIMAL_BH_RELIEF_TIME 16
	20	#define QDIO_TIMER_POLL_VALUE 1
	21	#define IQDIO_TIMER_POLL_VALUE 1
	22
	23	/*
	24	* unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
	25	* we never know, whether we'll get initiative again, e.g. to give the
	26	* transmit skb's back to the stack, however the stack may be waiting for
	27	* them... therefore we define 4 as threshold to start polling (which
	28	* will stop as soon as the asynchronous queue catches up)
	29	* btw, this only applies to the asynchronous HiperSockets queue
	30	*/
	31	#define IQDIO_FILL_LEVEL_TO_POLL 4
	32
	33	#define TIQDIO_THININT_ISC 3
	34	#define TIQDIO_DELAY_TARGET 0
	35	#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
	36	#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
	37	#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
	38	#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
	39	#define IQDIO_LOCAL_LAPS 4
	40	#define IQDIO_LOCAL_LAPS_INT 1
	41	#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
	42	/#define IQDIO_IQDC_INT_PARM 0x1234/
	43
	44	#define QDIO_Q_LAPS 5
	45
0b642ede	46	#define QDIO_STORAGE_KEY PAGE_DEFAULT_KEY
1da177e4 LT	47
	48	#define L2_CACHELINE_SIZE 256
	49	#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))
	50
	51	#define QDIO_PERF "qdio_perf"
	52
	53	/* must be a power of 2 */
	54	/*#define QDIO_STATS_NUMBER 4
	55
	56	#define QDIO_STATS_CLASSES 2
	57	#define QDIO_STATS_COUNT_NEEDED 2*/
	58
	59	#define QDIO_NO_USE_COUNT_TIMEOUT (1HZ) / wait for 1 sec on each q before
	60	exiting without having use_count
	61	of the queue to 0 */
	62
	63	#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
	64	#define QDIO_ACTIVATE_TIMEOUT ((5*HZ)>>10)
	65	#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
	66	#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)
	67
	68	enum qdio_irq_states {
	69	QDIO_IRQ_STATE_INACTIVE,
	70	QDIO_IRQ_STATE_ESTABLISHED,
	71	QDIO_IRQ_STATE_ACTIVE,
	72	QDIO_IRQ_STATE_STOPPED,
	73	QDIO_IRQ_STATE_CLEANUP,
	74	QDIO_IRQ_STATE_ERR,
	75	NR_QDIO_IRQ_STATES,
	76	};
	77
	78	/* used as intparm in do_IO: */
	79	#define QDIO_DOING_SENSEID 0
	80	#define QDIO_DOING_ESTABLISH 1
	81	#define QDIO_DOING_ACTIVATE 2
	82	#define QDIO_DOING_CLEANUP 3
	83
	84	/*********************** DEBUG FACILITY STUFF *******************/
	85
	86	#define QDIO_DBF_HEX(ex,name,level,addr,len) \
	87	do { \
	88	if (ex) \
	89	debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
	90	else \
	91	debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
	92	} while (0)
	93	#define QDIO_DBF_TEXT(ex,name,level,text) \
	94	do { \
	95	if (ex) \
	96	debug_text_exception(qdio_dbf_##name,level,text); \
	97	else \
	98	debug_text_event(qdio_dbf_##name,level,text); \
	99	} while (0)
	100
	101
	102	#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
	103	#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
	104	#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
	105	#ifdef CONFIG_QDIO_DEBUG
	106	#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
	107	#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
	108	#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
	109	#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
	110	#else /* CONFIG_QDIO_DEBUG */
111	#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
112	#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
113	#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
114	#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
115	#endif /* CONFIG_QDIO_DEBUG */
116
117	#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
118	#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
119	#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
120	#ifdef CONFIG_QDIO_DEBUG
121	#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
122	#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
123	#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
124	#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
125	#else /* CONFIG_QDIO_DEBUG */
126	#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
127	#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
128	#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
129	#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
130	#endif /* CONFIG_QDIO_DEBUG */
131
132	#define QDIO_DBF_SETUP_NAME "qdio_setup"
133	#define QDIO_DBF_SETUP_LEN 8
66a464db	134	#define QDIO_DBF_SETUP_PAGES 4
1da177e4 LT	135	#define QDIO_DBF_SETUP_NR_AREAS 1
	136	#ifdef CONFIG_QDIO_DEBUG
	137	#define QDIO_DBF_SETUP_LEVEL 6
	138	#else /* CONFIG_QDIO_DEBUG */
	139	#define QDIO_DBF_SETUP_LEVEL 2
	140	#endif /* CONFIG_QDIO_DEBUG */
	141
	142	#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
	143	#define QDIO_DBF_SBAL_LEN 256
66a464db	144	#define QDIO_DBF_SBAL_PAGES 4
1da177e4 LT	145	#define QDIO_DBF_SBAL_NR_AREAS 2
	146	#ifdef CONFIG_QDIO_DEBUG
	147	#define QDIO_DBF_SBAL_LEVEL 6
	148	#else /* CONFIG_QDIO_DEBUG */
	149	#define QDIO_DBF_SBAL_LEVEL 2
	150	#endif /* CONFIG_QDIO_DEBUG */
	151
	152	#define QDIO_DBF_TRACE_NAME "qdio_trace"
	153	#define QDIO_DBF_TRACE_LEN 8
	154	#define QDIO_DBF_TRACE_NR_AREAS 2
	155	#ifdef CONFIG_QDIO_DEBUG
66a464db	156	#define QDIO_DBF_TRACE_PAGES 16
1da177e4 LT	157	#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
1da177e4 LT	158	#else /* CONFIG_QDIO_DEBUG */
66a464db	159	#define QDIO_DBF_TRACE_PAGES 4
1da177e4 LT	160	#define QDIO_DBF_TRACE_LEVEL 2
	161	#endif /* CONFIG_QDIO_DEBUG */
	162
	163	#define QDIO_DBF_SENSE_NAME "qdio_sense"
	164	#define QDIO_DBF_SENSE_LEN 64
66a464db	165	#define QDIO_DBF_SENSE_PAGES 2
1da177e4 LT	166	#define QDIO_DBF_SENSE_NR_AREAS 1
	167	#ifdef CONFIG_QDIO_DEBUG
	168	#define QDIO_DBF_SENSE_LEVEL 6
	169	#else /* CONFIG_QDIO_DEBUG */
	170	#define QDIO_DBF_SENSE_LEVEL 2
	171	#endif /* CONFIG_QDIO_DEBUG */
	172
	173	#ifdef CONFIG_QDIO_DEBUG
	174	#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT
	175
	176	#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
	177	#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
66a464db	178	#define QDIO_DBF_SLSB_OUT_PAGES 256
1da177e4 LT	179	#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
	180	#define QDIO_DBF_SLSB_OUT_LEVEL 6
	181
	182	#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
	183	#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
66a464db	184	#define QDIO_DBF_SLSB_IN_PAGES 256
1da177e4 LT	185	#define QDIO_DBF_SLSB_IN_NR_AREAS 1
	186	#define QDIO_DBF_SLSB_IN_LEVEL 6
	187	#endif /* CONFIG_QDIO_DEBUG */
	188
	189	#define QDIO_PRINTK_HEADER QDIO_NAME ": "
	190
	191	#if QDIO_VERBOSE_LEVEL>8
	192	#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
	193	#else
39b083fe	194	#define QDIO_PRINT_STUPID(x...) do { } while (0)
1da177e4 LT	195	#endif
	196
	197	#if QDIO_VERBOSE_LEVEL>7
	198	#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
	199	#else
39b083fe	200	#define QDIO_PRINT_ALL(x...) do { } while (0)
1da177e4 LT	201	#endif
	202
	203	#if QDIO_VERBOSE_LEVEL>6
	204	#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
	205	#else
39b083fe	206	#define QDIO_PRINT_INFO(x...) do { } while (0)
1da177e4 LT	207	#endif
	208
	209	#if QDIO_VERBOSE_LEVEL>5
	210	#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
	211	#else
39b083fe	212	#define QDIO_PRINT_WARN(x...) do { } while (0)
1da177e4 LT	213	#endif
	214
	215	#if QDIO_VERBOSE_LEVEL>4
	216	#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
	217	#else
39b083fe	218	#define QDIO_PRINT_ERR(x...) do { } while (0)
1da177e4 LT	219	#endif
	220
	221	#if QDIO_VERBOSE_LEVEL>3
	222	#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
	223	#else
39b083fe	224	#define QDIO_PRINT_CRIT(x...) do { } while (0)
1da177e4 LT	225	#endif
	226
	227	#if QDIO_VERBOSE_LEVEL>2
	228	#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
	229	#else
39b083fe	230	#define QDIO_PRINT_ALERT(x...) do { } while (0)
1da177e4 LT	231	#endif
	232
	233	#if QDIO_VERBOSE_LEVEL>1
	234	#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
	235	#else
39b083fe	236	#define QDIO_PRINT_EMERG(x...) do { } while (0)
1da177e4 LT	237	#endif
	238
	239	#define HEXDUMP16(importance,header,ptr) \
	240	QDIO_PRINT_##importance(header "%02x %02x %02x %02x " \
	241	"%02x %02x %02x %02x %02x %02x %02x %02x " \
	242	"%02x %02x %02x %02x\n",(((char)ptr)), \
	243	(((char)ptr)+1),(((char)ptr)+2), \
	244	(((char)ptr)+3),(((char)ptr)+4), \
	245	(((char)ptr)+5),(((char)ptr)+6), \
	246	(((char)ptr)+7),(((char)ptr)+8), \
	247	(((char)ptr)+9),(((char)ptr)+10), \
	248	(((char)ptr)+11),(((char)ptr)+12), \
	249	(((char)ptr)+13),(((char)ptr)+14), \
	250	(((char)ptr)+15)); \
	251	QDIO_PRINT_##importance(header "%02x %02x %02x %02x %02x %02x %02x %02x " \
	252	"%02x %02x %02x %02x %02x %02x %02x %02x\n", \
	253	(((char)ptr)+16),(((char)ptr)+17), \
	254	(((char)ptr)+18),(((char)ptr)+19), \
	255	(((char)ptr)+20),(((char)ptr)+21), \
	256	(((char)ptr)+22),(((char)ptr)+23), \
	257	(((char)ptr)+24),(((char)ptr)+25), \
	258	(((char)ptr)+26),(((char)ptr)+27), \
	259	(((char)ptr)+28),(((char)ptr)+29), \
	260	(((char)ptr)+30),(((char)ptr)+31));
	261
	262	/**************** END OF DEBUG FACILITY STUFF *******************/
	263
	264	/*
	265	* Some instructions as assembly
	266	*/
8129ee16 FP	267
	268	static inline int
	269	do_sqbs(unsigned long sch, unsigned char state, int queue,
	270	unsigned int start, unsigned int count)
	271	{
347a8dc3	272	#ifdef CONFIG_64BIT
8129ee16 FP	273	register unsigned long _ccq asm ("0") = *count;
	274	register unsigned long _sch asm ("1") = sch;
	275	unsigned long _queuestart = ((unsigned long)queue << 32) \| *start;
	276
	277	asm volatile (
	278	" .insn rsy,0xeb000000008A,%1,0,0(%2)\n\t"
	279	: "+d" (_ccq), "+d" (_queuestart)
	280	: "d" ((unsigned long)state), "d" (_sch)
	281	: "memory", "cc"
	282	);
	283	*count = _ccq & 0xff;
	284	*start = _queuestart & 0xff;
	285
	286	return (_ccq >> 32) & 0xff;
	287	#else
	288	return 0;
	289	#endif
	290	}
	291
	292	static inline int
	293	do_eqbs(unsigned long sch, unsigned char *state, int queue,
	294	unsigned int start, unsigned int count)
	295	{
347a8dc3	296	#ifdef CONFIG_64BIT
8129ee16 FP	297	register unsigned long _ccq asm ("0") = *count;
	298	register unsigned long _sch asm ("1") = sch;
	299	unsigned long _queuestart = ((unsigned long)queue << 32) \| *start;
	300	unsigned long _state = 0;
	301
	302	asm volatile (
	303	" .insn rrf,0xB99c0000,%1,%2,0,0 \n\t"
	304	: "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
	305	: "d" (_sch)
	306	: "memory", "cc"
	307	);
	308	*count = _ccq & 0xff;
	309	*start = _queuestart & 0xff;
	310	*state = _state & 0xff;
	311
	312	return (_ccq >> 32) & 0xff;
	313	#else
	314	return 0;
	315	#endif
	316	}
	317
	318
4448aaf0	319	static inline int
a8237fc4	320	do_siga_sync(struct subchannel_id schid, unsigned int mask1, unsigned int mask2)
1da177e4 LT	321	{
	322	int cc;
	323
347a8dc3	324	#ifndef CONFIG_64BIT
1da177e4 LT	325	asm volatile (
	326	"lhi 0,2 \n\t"
	327	"lr 1,%1 \n\t"
	328	"lr 2,%2 \n\t"
	329	"lr 3,%3 \n\t"
	330	"siga 0 \n\t"
	331	"ipm %0 \n\t"
	332	"srl %0,28 \n\t"
	333	: "=d" (cc)
a8237fc4	334	: "d" (schid), "d" (mask1), "d" (mask2)
1da177e4 LT	335	: "cc", "0", "1", "2", "3"
1da177e4 LT	336	);
347a8dc3	337	#else /* CONFIG_64BIT */
1da177e4 LT	338	asm volatile (
	339	"lghi 0,2 \n\t"
	340	"llgfr 1,%1 \n\t"
	341	"llgfr 2,%2 \n\t"
	342	"llgfr 3,%3 \n\t"
	343	"siga 0 \n\t"
	344	"ipm %0 \n\t"
	345	"srl %0,28 \n\t"
	346	: "=d" (cc)
a8237fc4	347	: "d" (schid), "d" (mask1), "d" (mask2)
1da177e4 LT	348	: "cc", "0", "1", "2", "3"
1da177e4 LT	349	);
347a8dc3	350	#endif /* CONFIG_64BIT */
1da177e4 LT	351	return cc;
	352	}
	353
4448aaf0	354	static inline int
a8237fc4	355	do_siga_input(struct subchannel_id schid, unsigned int mask)
1da177e4 LT	356	{
	357	int cc;
	358
347a8dc3	359	#ifndef CONFIG_64BIT
1da177e4 LT	360	asm volatile (
	361	"lhi 0,1 \n\t"
	362	"lr 1,%1 \n\t"
	363	"lr 2,%2 \n\t"
	364	"siga 0 \n\t"
	365	"ipm %0 \n\t"
	366	"srl %0,28 \n\t"
	367	: "=d" (cc)
a8237fc4	368	: "d" (schid), "d" (mask)
1da177e4 LT	369	: "cc", "0", "1", "2", "memory"
1da177e4 LT	370	);
347a8dc3	371	#else /* CONFIG_64BIT */
1da177e4 LT	372	asm volatile (
	373	"lghi 0,1 \n\t"
	374	"llgfr 1,%1 \n\t"
	375	"llgfr 2,%2 \n\t"
	376	"siga 0 \n\t"
	377	"ipm %0 \n\t"
	378	"srl %0,28 \n\t"
	379	: "=d" (cc)
a8237fc4	380	: "d" (schid), "d" (mask)
1da177e4 LT	381	: "cc", "0", "1", "2", "memory"
1da177e4 LT	382	);
347a8dc3	383	#endif /* CONFIG_64BIT */
1da177e4 LT	384
	385	return cc;
	386	}
	387
4448aaf0	388	static inline int
a8237fc4	389	do_siga_output(unsigned long schid, unsigned long mask, __u32 *bb,
8129ee16	390	unsigned int fc)
1da177e4 LT	391	{
	392	int cc;
	393	__u32 busy_bit;
	394
347a8dc3	395	#ifndef CONFIG_64BIT
1da177e4 LT	396	asm volatile (
	397	"lhi 0,0 \n\t"
	398	"lr 1,%2 \n\t"
	399	"lr 2,%3 \n\t"
	400	"siga 0 \n\t"
	401	"0:"
	402	"ipm %0 \n\t"
	403	"srl %0,28 \n\t"
	404	"srl 0,31 \n\t"
	405	"lr %1,0 \n\t"
	406	"1: \n\t"
	407	".section .fixup,\"ax\"\n\t"
	408	"2: \n\t"
	409	"lhi %0,%4 \n\t"
	410	"bras 1,3f \n\t"
	411	".long 1b \n\t"
	412	"3: \n\t"
	413	"l 1,0(1) \n\t"
	414	"br 1 \n\t"
	415	".previous \n\t"
	416	".section __ex_table,\"a\"\n\t"
	417	".align 4 \n\t"
	418	".long 0b,2b \n\t"
	419	".previous \n\t"
	420	: "=d" (cc), "=d" (busy_bit)
a8237fc4	421	: "d" (schid), "d" (mask),
1da177e4 LT	422	"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
	423	: "cc", "0", "1", "2", "memory"
	424	);
347a8dc3	425	#else /* CONFIG_64BIT */
1da177e4	426	asm volatile (
8129ee16 FP	427	"llgfr 0,%5 \n\t"
8129ee16 FP	428	"lgr 1,%2 \n\t"
1da177e4 LT	429	"llgfr 2,%3 \n\t"
	430	"siga 0 \n\t"
	431	"0:"
	432	"ipm %0 \n\t"
	433	"srl %0,28 \n\t"
	434	"srl 0,31 \n\t"
	435	"llgfr %1,0 \n\t"
	436	"1: \n\t"
	437	".section .fixup,\"ax\"\n\t"
	438	"lghi %0,%4 \n\t"
	439	"jg 1b \n\t"
	440	".previous\n\t"
	441	".section __ex_table,\"a\"\n\t"
	442	".align 8 \n\t"
	443	".quad 0b,1b \n\t"
	444	".previous \n\t"
	445	: "=d" (cc), "=d" (busy_bit)
a8237fc4	446	: "d" (schid), "d" (mask),
8129ee16	447	"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION), "d" (fc)
1da177e4 LT	448	: "cc", "0", "1", "2", "memory"
1da177e4 LT	449	);
347a8dc3	450	#endif /* CONFIG_64BIT */
1da177e4 LT	451
	452	(*bb) = busy_bit;
	453	return cc;
	454	}
	455
4448aaf0	456	static inline unsigned long
1da177e4 LT	457	do_clear_global_summary(void)
	458	{
	459
	460	unsigned long time;
	461
347a8dc3	462	#ifndef CONFIG_64BIT
1da177e4 LT	463	asm volatile (
	464	"lhi 1,3 \n\t"
	465	".insn rre,0xb2650000,2,0 \n\t"
	466	"lr %0,3 \n\t"
	467	: "=d" (time) : : "cc", "1", "2", "3"
	468	);
347a8dc3	469	#else /* CONFIG_64BIT */
1da177e4 LT	470	asm volatile (
	471	"lghi 1,3 \n\t"
	472	".insn rre,0xb2650000,2,0 \n\t"
	473	"lgr %0,3 \n\t"
	474	: "=d" (time) : : "cc", "1", "2", "3"
	475	);
347a8dc3	476	#endif /* CONFIG_64BIT */
1da177e4 LT	477
	478	return time;
	479	}
	480
	481	/*
	482	* QDIO device commands returned by extended Sense-ID
	483	*/
	484	#define DEFAULT_ESTABLISH_QS_CMD 0x1b
	485	#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
	486	#define DEFAULT_ACTIVATE_QS_CMD 0x1f
	487	#define DEFAULT_ACTIVATE_QS_COUNT 0
	488
	489	/*
	490	* additional CIWs returned by extended Sense-ID
	491	*/
	492	#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
	493	#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
	494
	495	#define QDIO_CHSC_RESPONSE_CODE_OK 1
	496	/* flags for st qdio sch data */
	497	#define CHSC_FLAG_QDIO_CAPABILITY 0x80
	498	#define CHSC_FLAG_VALIDITY 0x40
	499
	500	#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
	501	#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
	502	#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
	503	#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
	504	#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04
	505
	506	#ifdef QDIO_PERFORMANCE_STATS
	507	struct qdio_perf_stats {
	508	unsigned int tl_runs;
	509
	510	unsigned int siga_outs;
	511	unsigned int siga_ins;
	512	unsigned int siga_syncs;
	513	unsigned int pcis;
	514	unsigned int thinints;
	515	unsigned int fast_reqs;
	516
	517	__u64 start_time_outbound;
	518	unsigned int outbound_cnt;
	519	unsigned int outbound_time;
	520	__u64 start_time_inbound;
	521	unsigned int inbound_cnt;
	522	unsigned int inbound_time;
	523	};
	524	#endif /* QDIO_PERFORMANCE_STATS */
	525
	526	#define atomic_swap(a,b) xchg((int*)a.counter,b)
	527
	528	/* unlikely as the later the better */
	529	#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
	530	#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
	531	qdio_siga_sync(q,~0U,~0U)
	532	#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
	533	qdio_siga_sync(q,~0U,0)
	534
	535	#define NOW qdio_get_micros()
	536	#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
	537	#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
	538	#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
	539	#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)
	540
541	#define MY_MODULE_STRING(x) #x
542
347a8dc3	543	#ifdef CONFIG_64BIT
1da177e4	544	#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
347a8dc3	545	#else /* CONFIG_64BIT */
1da177e4	546	#define QDIO_GET_ADDR(x) ((__u32)(long)x)
347a8dc3	547	#endif /* CONFIG_64BIT */
1da177e4	548
1da177e4 LT	549	struct qdio_q {
	550	volatile struct slsb slsb;
	551
	552	char unused[QDIO_MAX_BUFFERS_PER_Q];
	553
8129ee16	554	__u32 * dev_st_chg_ind;
1da177e4 LT	555
1da177e4 LT	556	int is_input_q;
a8237fc4	557	struct subchannel_id schid;
1da177e4 LT	558	struct ccw_device *cdev;
	559
	560	unsigned int is_iqdio_q;
	561	unsigned int is_thinint_q;
	562
	563	/* bit 0 means queue 0, bit 1 means queue 1, ... */
	564	unsigned int mask;
	565	unsigned int q_no;
	566
	567	qdio_handler_t (*handler);
	568
	569	/* points to the next buffer to be checked for having
	570	* been processed by the card (outbound)
	571	* or to the next buffer the program should check for (inbound) */
	572	volatile int first_to_check;
	573	/* and the last time it was: */
	574	volatile int last_move_ftc;
	575
	576	atomic_t number_of_buffers_used;
	577	atomic_t polling;
	578
	579	unsigned int siga_in;
	580	unsigned int siga_out;
	581	unsigned int siga_sync;
	582	unsigned int siga_sync_done_on_thinints;
	583	unsigned int siga_sync_done_on_outb_tis;
	584	unsigned int hydra_gives_outbound_pcis;
	585
	586	/* used to save beginning position when calling dd_handlers */
	587	int first_element_to_kick;
	588
	589	atomic_t use_count;
	590	atomic_t is_in_shutdown;
	591
	592	void *irq_ptr;
	593
	594	#ifdef QDIO_USE_TIMERS_FOR_POLLING
	595	struct timer_list timer;
	596	atomic_t timer_already_set;
	597	spinlock_t timer_lock;
	598	#else /* QDIO_USE_TIMERS_FOR_POLLING */
	599	struct tasklet_struct tasklet;
	600	#endif /* QDIO_USE_TIMERS_FOR_POLLING */
	601
8129ee16	602
1da177e4 LT	603	enum qdio_irq_states state;
	604
	605	/* used to store the error condition during a data transfer */
	606	unsigned int qdio_error;
	607	unsigned int siga_error;
	608	unsigned int error_status_flags;
	609
	610	/* list of interesting queues */
	611	volatile struct qdio_q *list_next;
	612	volatile struct qdio_q *list_prev;
	613
	614	struct sl *sl;
	615	volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];
	616
	617	struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];
	618
	619	unsigned long int_parm;
	620
	621	/*struct {
	622	int in_bh_check_limit;
	623	int threshold;
	624	} threshold_classes[QDIO_STATS_CLASSES];*/
	625
	626	struct {
	627	/* inbound: the time to stop polling
	628	outbound: the time to kick peer */
	629	int threshold; /* the real value */
	630
	631	/* outbound: last time of do_QDIO
	632	inbound: last time of noticing incoming data */
	633	/*__u64 last_transfer_times[QDIO_STATS_NUMBER];
	634	int last_transfer_index; */
	635
	636	__u64 last_transfer_time;
	637	__u64 busy_start;
	638	} timing;
	639	atomic_t busy_siga_counter;
	640	unsigned int queue_type;
	641
	642	/* leave this member at the end. won't be cleared in qdio_fill_qs */
	643	struct slib slib; / a page is allocated under this pointer,
	644	sl points into this page, offset PAGE_SIZE/2
	645	(after slib) */
	646	} __attribute__ ((aligned(256)));
	647
	648	struct qdio_irq {
	649	__u32 * volatile dev_st_chg_ind;
	650
	651	unsigned long int_parm;
a8237fc4	652	struct subchannel_id schid;
1da177e4 LT	653
	654	unsigned int is_iqdio_irq;
	655	unsigned int is_thinint_irq;
	656	unsigned int hydra_gives_outbound_pcis;
	657	unsigned int sync_done_on_outb_pcis;
	658
8129ee16 FP	659	/* QEBSM facility */
	660	unsigned int is_qebsm;
	661	unsigned long sch_token;
	662
1da177e4 LT	663	enum qdio_irq_states state;
	664
	665	unsigned int no_input_qs;
	666	unsigned int no_output_qs;
	667
	668	unsigned char qdioac;
	669
	670	struct ccw1 ccw;
	671
	672	struct ciw equeue;
	673	struct ciw aqueue;
	674
	675	struct qib qib;
	676
	677	void (original_int_handler) (struct ccw_device ,
	678	unsigned long, struct irb *);
	679
	680	/* leave these four members together at the end. won't be cleared in qdio_fill_irq */
	681	struct qdr *qdr;
	682	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
	683	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
	684	struct semaphore setting_up_sema;
	685	};
	686	#endif