Commit | Line | Data |
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779e6e1c JG |
1 | /* |
2 | * linux/drivers/s390/cio/qdio_main.c | |
3 | * | |
4 | * Linux for s390 qdio support, buffer handling, qdio API and module support. | |
5 | * | |
6 | * Copyright 2000,2008 IBM Corp. | |
7 | * Author(s): Utz Bacher <utz.bacher@de.ibm.com> | |
8 | * Jan Glauber <jang@linux.vnet.ibm.com> | |
9 | * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com> | |
10 | */ | |
11 | #include <linux/module.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/timer.h> | |
15 | #include <linux/delay.h> | |
5a0e3ad6 | 16 | #include <linux/gfp.h> |
104ea556 | 17 | #include <linux/io.h> |
60063497 | 18 | #include <linux/atomic.h> |
779e6e1c JG |
19 | #include <asm/debug.h> |
20 | #include <asm/qdio.h> | |
21 | ||
22 | #include "cio.h" | |
23 | #include "css.h" | |
24 | #include "device.h" | |
25 | #include "qdio.h" | |
26 | #include "qdio_debug.h" | |
779e6e1c JG |
27 | |
28 | MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ | |
29 | "Jan Glauber <jang@linux.vnet.ibm.com>"); | |
30 | MODULE_DESCRIPTION("QDIO base support"); | |
31 | MODULE_LICENSE("GPL"); | |
32 | ||
958c0ba4 JG |
33 | static inline int do_siga_sync(unsigned long schid, |
34 | unsigned int out_mask, unsigned int in_mask, | |
35 | unsigned int fc) | |
779e6e1c | 36 | { |
958c0ba4 JG |
37 | register unsigned long __fc asm ("0") = fc; |
38 | register unsigned long __schid asm ("1") = schid; | |
779e6e1c JG |
39 | register unsigned long out asm ("2") = out_mask; |
40 | register unsigned long in asm ("3") = in_mask; | |
41 | int cc; | |
42 | ||
43 | asm volatile( | |
44 | " siga 0\n" | |
45 | " ipm %0\n" | |
46 | " srl %0,28\n" | |
47 | : "=d" (cc) | |
48 | : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); | |
49 | return cc; | |
50 | } | |
51 | ||
958c0ba4 JG |
52 | static inline int do_siga_input(unsigned long schid, unsigned int mask, |
53 | unsigned int fc) | |
779e6e1c | 54 | { |
958c0ba4 JG |
55 | register unsigned long __fc asm ("0") = fc; |
56 | register unsigned long __schid asm ("1") = schid; | |
779e6e1c JG |
57 | register unsigned long __mask asm ("2") = mask; |
58 | int cc; | |
59 | ||
60 | asm volatile( | |
61 | " siga 0\n" | |
62 | " ipm %0\n" | |
63 | " srl %0,28\n" | |
64 | : "=d" (cc) | |
65 | : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory"); | |
66 | return cc; | |
67 | } | |
68 | ||
69 | /** | |
70 | * do_siga_output - perform SIGA-w/wt function | |
71 | * @schid: subchannel id or in case of QEBSM the subchannel token | |
72 | * @mask: which output queues to process | |
73 | * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer | |
74 | * @fc: function code to perform | |
75 | * | |
76 | * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION. | |
77 | * Note: For IQDC unicast queues only the highest priority queue is processed. | |
78 | */ | |
79 | static inline int do_siga_output(unsigned long schid, unsigned long mask, | |
104ea556 | 80 | unsigned int *bb, unsigned int fc, |
81 | unsigned long aob) | |
779e6e1c JG |
82 | { |
83 | register unsigned long __fc asm("0") = fc; | |
84 | register unsigned long __schid asm("1") = schid; | |
85 | register unsigned long __mask asm("2") = mask; | |
104ea556 | 86 | register unsigned long __aob asm("3") = aob; |
779e6e1c JG |
87 | int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION; |
88 | ||
89 | asm volatile( | |
90 | " siga 0\n" | |
91 | "0: ipm %0\n" | |
92 | " srl %0,28\n" | |
93 | "1:\n" | |
94 | EX_TABLE(0b, 1b) | |
104ea556 | 95 | : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask), |
96 | "+d" (__aob) | |
779e6e1c JG |
97 | : : "cc", "memory"); |
98 | *bb = ((unsigned int) __fc) >> 31; | |
99 | return cc; | |
100 | } | |
101 | ||
102 | static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq) | |
103 | { | |
779e6e1c JG |
104 | /* all done or next buffer state different */ |
105 | if (ccq == 0 || ccq == 32) | |
106 | return 0; | |
107 | /* not all buffers processed */ | |
108 | if (ccq == 96 || ccq == 97) | |
109 | return 1; | |
110 | /* notify devices immediately */ | |
22f99347 | 111 | DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); |
779e6e1c JG |
112 | return -EIO; |
113 | } | |
114 | ||
115 | /** | |
116 | * qdio_do_eqbs - extract buffer states for QEBSM | |
117 | * @q: queue to manipulate | |
118 | * @state: state of the extracted buffers | |
119 | * @start: buffer number to start at | |
120 | * @count: count of buffers to examine | |
50f769df | 121 | * @auto_ack: automatically acknowledge buffers |
779e6e1c | 122 | * |
73ac36ea | 123 | * Returns the number of successfully extracted equal buffer states. |
779e6e1c JG |
124 | * Stops processing if a state is different from the last buffers state. |
125 | */ | |
126 | static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state, | |
50f769df | 127 | int start, int count, int auto_ack) |
779e6e1c JG |
128 | { |
129 | unsigned int ccq = 0; | |
130 | int tmp_count = count, tmp_start = start; | |
131 | int nr = q->nr; | |
132 | int rc; | |
779e6e1c JG |
133 | |
134 | BUG_ON(!q->irq_ptr->sch_token); | |
6486cda6 | 135 | qperf_inc(q, eqbs); |
779e6e1c JG |
136 | |
137 | if (!q->is_input_q) | |
138 | nr += q->irq_ptr->nr_input_qs; | |
139 | again: | |
50f769df JG |
140 | ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count, |
141 | auto_ack); | |
779e6e1c JG |
142 | rc = qdio_check_ccq(q, ccq); |
143 | ||
144 | /* At least one buffer was processed, return and extract the remaining | |
145 | * buffers later. | |
146 | */ | |
23589d05 | 147 | if ((ccq == 96) && (count != tmp_count)) { |
6486cda6 | 148 | qperf_inc(q, eqbs_partial); |
779e6e1c | 149 | return (count - tmp_count); |
23589d05 | 150 | } |
22f99347 | 151 | |
779e6e1c | 152 | if (rc == 1) { |
22f99347 | 153 | DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq); |
779e6e1c JG |
154 | goto again; |
155 | } | |
156 | ||
157 | if (rc < 0) { | |
22f99347 JG |
158 | DBF_ERROR("%4x EQBS ERROR", SCH_NO(q)); |
159 | DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); | |
779e6e1c JG |
160 | q->handler(q->irq_ptr->cdev, |
161 | QDIO_ERROR_ACTIVATE_CHECK_CONDITION, | |
dfe5bb50 SS |
162 | q->nr, q->first_to_kick, count, |
163 | q->irq_ptr->int_parm); | |
779e6e1c JG |
164 | return 0; |
165 | } | |
166 | return count - tmp_count; | |
167 | } | |
168 | ||
169 | /** | |
170 | * qdio_do_sqbs - set buffer states for QEBSM | |
171 | * @q: queue to manipulate | |
172 | * @state: new state of the buffers | |
173 | * @start: first buffer number to change | |
174 | * @count: how many buffers to change | |
175 | * | |
176 | * Returns the number of successfully changed buffers. | |
177 | * Does retrying until the specified count of buffer states is set or an | |
178 | * error occurs. | |
179 | */ | |
180 | static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start, | |
181 | int count) | |
182 | { | |
183 | unsigned int ccq = 0; | |
184 | int tmp_count = count, tmp_start = start; | |
185 | int nr = q->nr; | |
186 | int rc; | |
779e6e1c | 187 | |
50f769df JG |
188 | if (!count) |
189 | return 0; | |
190 | ||
779e6e1c | 191 | BUG_ON(!q->irq_ptr->sch_token); |
6486cda6 | 192 | qperf_inc(q, sqbs); |
779e6e1c JG |
193 | |
194 | if (!q->is_input_q) | |
195 | nr += q->irq_ptr->nr_input_qs; | |
196 | again: | |
197 | ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count); | |
198 | rc = qdio_check_ccq(q, ccq); | |
199 | if (rc == 1) { | |
22f99347 | 200 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); |
6486cda6 | 201 | qperf_inc(q, sqbs_partial); |
779e6e1c JG |
202 | goto again; |
203 | } | |
204 | if (rc < 0) { | |
22f99347 JG |
205 | DBF_ERROR("%4x SQBS ERROR", SCH_NO(q)); |
206 | DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); | |
779e6e1c JG |
207 | q->handler(q->irq_ptr->cdev, |
208 | QDIO_ERROR_ACTIVATE_CHECK_CONDITION, | |
dfe5bb50 SS |
209 | q->nr, q->first_to_kick, count, |
210 | q->irq_ptr->int_parm); | |
779e6e1c JG |
211 | return 0; |
212 | } | |
213 | WARN_ON(tmp_count); | |
214 | return count - tmp_count; | |
215 | } | |
216 | ||
217 | /* returns number of examined buffers and their common state in *state */ | |
218 | static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr, | |
50f769df | 219 | unsigned char *state, unsigned int count, |
104ea556 | 220 | int auto_ack, int merge_pending) |
779e6e1c JG |
221 | { |
222 | unsigned char __state = 0; | |
223 | int i; | |
224 | ||
225 | BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); | |
226 | BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); | |
227 | ||
228 | if (is_qebsm(q)) | |
50f769df | 229 | return qdio_do_eqbs(q, state, bufnr, count, auto_ack); |
779e6e1c JG |
230 | |
231 | for (i = 0; i < count; i++) { | |
104ea556 | 232 | if (!__state) { |
779e6e1c | 233 | __state = q->slsb.val[bufnr]; |
104ea556 | 234 | if (merge_pending && __state == SLSB_P_OUTPUT_PENDING) |
235 | __state = SLSB_P_OUTPUT_EMPTY; | |
236 | } else if (merge_pending) { | |
237 | if ((q->slsb.val[bufnr] & __state) != __state) | |
238 | break; | |
239 | } else if (q->slsb.val[bufnr] != __state) | |
779e6e1c JG |
240 | break; |
241 | bufnr = next_buf(bufnr); | |
242 | } | |
243 | *state = __state; | |
244 | return i; | |
245 | } | |
246 | ||
60b5df2f JG |
247 | static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr, |
248 | unsigned char *state, int auto_ack) | |
779e6e1c | 249 | { |
104ea556 | 250 | return get_buf_states(q, bufnr, state, 1, auto_ack, 0); |
779e6e1c JG |
251 | } |
252 | ||
253 | /* wrap-around safe setting of slsb states, returns number of changed buffers */ | |
254 | static inline int set_buf_states(struct qdio_q *q, int bufnr, | |
255 | unsigned char state, int count) | |
256 | { | |
257 | int i; | |
258 | ||
259 | BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); | |
260 | BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); | |
261 | ||
262 | if (is_qebsm(q)) | |
263 | return qdio_do_sqbs(q, state, bufnr, count); | |
264 | ||
265 | for (i = 0; i < count; i++) { | |
266 | xchg(&q->slsb.val[bufnr], state); | |
267 | bufnr = next_buf(bufnr); | |
268 | } | |
269 | return count; | |
270 | } | |
271 | ||
272 | static inline int set_buf_state(struct qdio_q *q, int bufnr, | |
273 | unsigned char state) | |
274 | { | |
275 | return set_buf_states(q, bufnr, state, 1); | |
276 | } | |
277 | ||
278 | /* set slsb states to initial state */ | |
279 | void qdio_init_buf_states(struct qdio_irq *irq_ptr) | |
280 | { | |
281 | struct qdio_q *q; | |
282 | int i; | |
283 | ||
284 | for_each_input_queue(irq_ptr, q, i) | |
285 | set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT, | |
286 | QDIO_MAX_BUFFERS_PER_Q); | |
287 | for_each_output_queue(irq_ptr, q, i) | |
288 | set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT, | |
289 | QDIO_MAX_BUFFERS_PER_Q); | |
290 | } | |
291 | ||
60b5df2f | 292 | static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output, |
779e6e1c JG |
293 | unsigned int input) |
294 | { | |
958c0ba4 JG |
295 | unsigned long schid = *((u32 *) &q->irq_ptr->schid); |
296 | unsigned int fc = QDIO_SIGA_SYNC; | |
779e6e1c JG |
297 | int cc; |
298 | ||
7a0b4cbc | 299 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); |
6486cda6 | 300 | qperf_inc(q, siga_sync); |
779e6e1c | 301 | |
958c0ba4 JG |
302 | if (is_qebsm(q)) { |
303 | schid = q->irq_ptr->sch_token; | |
304 | fc |= QDIO_SIGA_QEBSM_FLAG; | |
305 | } | |
306 | ||
307 | cc = do_siga_sync(schid, output, input, fc); | |
110da317 | 308 | if (unlikely(cc)) |
22f99347 | 309 | DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc); |
779e6e1c JG |
310 | return cc; |
311 | } | |
312 | ||
60b5df2f | 313 | static inline int qdio_siga_sync_q(struct qdio_q *q) |
779e6e1c JG |
314 | { |
315 | if (q->is_input_q) | |
316 | return qdio_siga_sync(q, 0, q->mask); | |
317 | else | |
318 | return qdio_siga_sync(q, q->mask, 0); | |
319 | } | |
320 | ||
104ea556 | 321 | static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit, |
322 | unsigned long aob) | |
779e6e1c | 323 | { |
958c0ba4 JG |
324 | unsigned long schid = *((u32 *) &q->irq_ptr->schid); |
325 | unsigned int fc = QDIO_SIGA_WRITE; | |
7a0b4cbc | 326 | u64 start_time = 0; |
be8d97a5 | 327 | int retries = 0, cc; |
104ea556 | 328 | unsigned long laob = 0; |
329 | ||
330 | if (q->u.out.use_cq && aob != 0) { | |
331 | fc = QDIO_SIGA_WRITEQ; | |
332 | laob = aob; | |
333 | } | |
779e6e1c | 334 | |
7a0b4cbc | 335 | if (is_qebsm(q)) { |
779e6e1c | 336 | schid = q->irq_ptr->sch_token; |
958c0ba4 | 337 | fc |= QDIO_SIGA_QEBSM_FLAG; |
779e6e1c | 338 | } |
779e6e1c | 339 | again: |
104ea556 | 340 | WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) || |
341 | (aob && fc != QDIO_SIGA_WRITEQ)); | |
342 | cc = do_siga_output(schid, q->mask, busy_bit, fc, laob); | |
7a0b4cbc JG |
343 | |
344 | /* hipersocket busy condition */ | |
110da317 | 345 | if (unlikely(*busy_bit)) { |
7a0b4cbc | 346 | WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2); |
be8d97a5 | 347 | retries++; |
58eb27cd | 348 | |
7a0b4cbc | 349 | if (!start_time) { |
3a601bfe | 350 | start_time = get_clock(); |
7a0b4cbc JG |
351 | goto again; |
352 | } | |
3a601bfe | 353 | if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE) |
779e6e1c JG |
354 | goto again; |
355 | } | |
be8d97a5 JG |
356 | if (retries) { |
357 | DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, | |
358 | "%4x cc2 BB1:%1d", SCH_NO(q), q->nr); | |
359 | DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries); | |
360 | } | |
779e6e1c JG |
361 | return cc; |
362 | } | |
363 | ||
364 | static inline int qdio_siga_input(struct qdio_q *q) | |
365 | { | |
958c0ba4 JG |
366 | unsigned long schid = *((u32 *) &q->irq_ptr->schid); |
367 | unsigned int fc = QDIO_SIGA_READ; | |
779e6e1c JG |
368 | int cc; |
369 | ||
22f99347 | 370 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); |
6486cda6 | 371 | qperf_inc(q, siga_read); |
779e6e1c | 372 | |
958c0ba4 JG |
373 | if (is_qebsm(q)) { |
374 | schid = q->irq_ptr->sch_token; | |
375 | fc |= QDIO_SIGA_QEBSM_FLAG; | |
376 | } | |
377 | ||
378 | cc = do_siga_input(schid, q->mask, fc); | |
110da317 | 379 | if (unlikely(cc)) |
22f99347 | 380 | DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc); |
779e6e1c JG |
381 | return cc; |
382 | } | |
383 | ||
90adac58 JG |
384 | #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0) |
385 | #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U) | |
386 | ||
387 | static inline void qdio_sync_queues(struct qdio_q *q) | |
779e6e1c | 388 | { |
90adac58 JG |
389 | /* PCI capable outbound queues will also be scanned so sync them too */ |
390 | if (pci_out_supported(q)) | |
391 | qdio_siga_sync_all(q); | |
392 | else | |
779e6e1c JG |
393 | qdio_siga_sync_q(q); |
394 | } | |
395 | ||
60b5df2f JG |
396 | int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, |
397 | unsigned char *state) | |
398 | { | |
90adac58 JG |
399 | if (need_siga_sync(q)) |
400 | qdio_siga_sync_q(q); | |
104ea556 | 401 | return get_buf_states(q, bufnr, state, 1, 0, 0); |
60b5df2f JG |
402 | } |
403 | ||
404 | static inline void qdio_stop_polling(struct qdio_q *q) | |
779e6e1c | 405 | { |
50f769df | 406 | if (!q->u.in.polling) |
779e6e1c | 407 | return; |
50f769df | 408 | |
779e6e1c | 409 | q->u.in.polling = 0; |
6486cda6 | 410 | qperf_inc(q, stop_polling); |
779e6e1c JG |
411 | |
412 | /* show the card that we are not polling anymore */ | |
50f769df | 413 | if (is_qebsm(q)) { |
e85dea0e | 414 | set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, |
50f769df JG |
415 | q->u.in.ack_count); |
416 | q->u.in.ack_count = 0; | |
417 | } else | |
e85dea0e | 418 | set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); |
779e6e1c JG |
419 | } |
420 | ||
d307297f JG |
421 | static inline void account_sbals(struct qdio_q *q, int count) |
422 | { | |
423 | int pos = 0; | |
424 | ||
425 | q->q_stats.nr_sbal_total += count; | |
426 | if (count == QDIO_MAX_BUFFERS_MASK) { | |
427 | q->q_stats.nr_sbals[7]++; | |
428 | return; | |
429 | } | |
430 | while (count >>= 1) | |
431 | pos++; | |
432 | q->q_stats.nr_sbals[pos]++; | |
433 | } | |
434 | ||
bffbbd2d | 435 | static void process_buffer_error(struct qdio_q *q, int count) |
779e6e1c | 436 | { |
bffbbd2d JG |
437 | unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT : |
438 | SLSB_P_OUTPUT_NOT_INIT; | |
439 | ||
7a0b4cbc | 440 | q->qdio_error |= QDIO_ERROR_SLSB_STATE; |
50f769df JG |
441 | |
442 | /* special handling for no target buffer empty */ | |
443 | if ((!q->is_input_q && | |
3ec90878 | 444 | (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) { |
6486cda6 | 445 | qperf_inc(q, target_full); |
1d7e1500 | 446 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", |
50f769df JG |
447 | q->first_to_check); |
448 | return; | |
449 | } | |
450 | ||
22f99347 JG |
451 | DBF_ERROR("%4x BUF ERROR", SCH_NO(q)); |
452 | DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); | |
50f769df | 453 | DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count); |
22f99347 | 454 | DBF_ERROR("F14:%2x F15:%2x", |
3ec90878 JG |
455 | q->sbal[q->first_to_check]->element[14].sflags, |
456 | q->sbal[q->first_to_check]->element[15].sflags); | |
bffbbd2d JG |
457 | |
458 | /* | |
459 | * Interrupts may be avoided as long as the error is present | |
460 | * so change the buffer state immediately to avoid starvation. | |
461 | */ | |
462 | set_buf_states(q, q->first_to_check, state, count); | |
50f769df | 463 | } |
779e6e1c | 464 | |
50f769df JG |
465 | static inline void inbound_primed(struct qdio_q *q, int count) |
466 | { | |
467 | int new; | |
468 | ||
1d7e1500 | 469 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count); |
50f769df JG |
470 | |
471 | /* for QEBSM the ACK was already set by EQBS */ | |
472 | if (is_qebsm(q)) { | |
473 | if (!q->u.in.polling) { | |
474 | q->u.in.polling = 1; | |
475 | q->u.in.ack_count = count; | |
e85dea0e | 476 | q->u.in.ack_start = q->first_to_check; |
50f769df JG |
477 | return; |
478 | } | |
479 | ||
480 | /* delete the previous ACK's */ | |
e85dea0e | 481 | set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, |
50f769df JG |
482 | q->u.in.ack_count); |
483 | q->u.in.ack_count = count; | |
e85dea0e | 484 | q->u.in.ack_start = q->first_to_check; |
50f769df JG |
485 | return; |
486 | } | |
487 | ||
488 | /* | |
489 | * ACK the newest buffer. The ACK will be removed in qdio_stop_polling | |
490 | * or by the next inbound run. | |
491 | */ | |
492 | new = add_buf(q->first_to_check, count - 1); | |
493 | if (q->u.in.polling) { | |
494 | /* reset the previous ACK but first set the new one */ | |
495 | set_buf_state(q, new, SLSB_P_INPUT_ACK); | |
e85dea0e | 496 | set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); |
3fdf1e18 | 497 | } else { |
50f769df | 498 | q->u.in.polling = 1; |
3fdf1e18 | 499 | set_buf_state(q, new, SLSB_P_INPUT_ACK); |
50f769df JG |
500 | } |
501 | ||
e85dea0e | 502 | q->u.in.ack_start = new; |
50f769df JG |
503 | count--; |
504 | if (!count) | |
505 | return; | |
6541f7b6 JG |
506 | /* need to change ALL buffers to get more interrupts */ |
507 | set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count); | |
779e6e1c JG |
508 | } |
509 | ||
510 | static int get_inbound_buffer_frontier(struct qdio_q *q) | |
511 | { | |
512 | int count, stop; | |
6fa1098a | 513 | unsigned char state = 0; |
779e6e1c | 514 | |
a2b86019 JG |
515 | q->timestamp = get_clock_fast(); |
516 | ||
779e6e1c JG |
517 | /* |
518 | * Don't check 128 buffers, as otherwise qdio_inbound_q_moved | |
519 | * would return 0. | |
520 | */ | |
521 | count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); | |
522 | stop = add_buf(q->first_to_check, count); | |
523 | ||
779e6e1c JG |
524 | if (q->first_to_check == stop) |
525 | goto out; | |
526 | ||
36e3e721 JG |
527 | /* |
528 | * No siga sync here, as a PCI or we after a thin interrupt | |
529 | * already sync'ed the queues. | |
530 | */ | |
104ea556 | 531 | count = get_buf_states(q, q->first_to_check, &state, count, 1, 0); |
779e6e1c JG |
532 | if (!count) |
533 | goto out; | |
534 | ||
535 | switch (state) { | |
536 | case SLSB_P_INPUT_PRIMED: | |
50f769df | 537 | inbound_primed(q, count); |
779e6e1c | 538 | q->first_to_check = add_buf(q->first_to_check, count); |
8bcd9b04 | 539 | if (atomic_sub(count, &q->nr_buf_used) == 0) |
6486cda6 | 540 | qperf_inc(q, inbound_queue_full); |
d307297f JG |
541 | if (q->irq_ptr->perf_stat_enabled) |
542 | account_sbals(q, count); | |
36e3e721 | 543 | break; |
779e6e1c | 544 | case SLSB_P_INPUT_ERROR: |
bffbbd2d | 545 | process_buffer_error(q, count); |
779e6e1c JG |
546 | q->first_to_check = add_buf(q->first_to_check, count); |
547 | atomic_sub(count, &q->nr_buf_used); | |
d307297f JG |
548 | if (q->irq_ptr->perf_stat_enabled) |
549 | account_sbals_error(q, count); | |
779e6e1c JG |
550 | break; |
551 | case SLSB_CU_INPUT_EMPTY: | |
552 | case SLSB_P_INPUT_NOT_INIT: | |
553 | case SLSB_P_INPUT_ACK: | |
d307297f JG |
554 | if (q->irq_ptr->perf_stat_enabled) |
555 | q->q_stats.nr_sbal_nop++; | |
22f99347 | 556 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop"); |
779e6e1c JG |
557 | break; |
558 | default: | |
559 | BUG(); | |
560 | } | |
561 | out: | |
779e6e1c JG |
562 | return q->first_to_check; |
563 | } | |
564 | ||
60b5df2f | 565 | static int qdio_inbound_q_moved(struct qdio_q *q) |
779e6e1c JG |
566 | { |
567 | int bufnr; | |
568 | ||
569 | bufnr = get_inbound_buffer_frontier(q); | |
570 | ||
e85dea0e JG |
571 | if ((bufnr != q->last_move) || q->qdio_error) { |
572 | q->last_move = bufnr; | |
27d71602 | 573 | if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR) |
3a601bfe | 574 | q->u.in.timestamp = get_clock(); |
779e6e1c JG |
575 | return 1; |
576 | } else | |
577 | return 0; | |
578 | } | |
579 | ||
9a2c160a | 580 | static inline int qdio_inbound_q_done(struct qdio_q *q) |
779e6e1c | 581 | { |
9a1ce28a | 582 | unsigned char state = 0; |
779e6e1c JG |
583 | |
584 | if (!atomic_read(&q->nr_buf_used)) | |
585 | return 1; | |
586 | ||
90adac58 JG |
587 | if (need_siga_sync(q)) |
588 | qdio_siga_sync_q(q); | |
50f769df | 589 | get_buf_state(q, q->first_to_check, &state, 0); |
9a2c160a | 590 | |
4c52228d | 591 | if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR) |
9a2c160a | 592 | /* more work coming */ |
779e6e1c JG |
593 | return 0; |
594 | ||
9a2c160a JG |
595 | if (is_thinint_irq(q->irq_ptr)) |
596 | return 1; | |
597 | ||
598 | /* don't poll under z/VM */ | |
599 | if (MACHINE_IS_VM) | |
779e6e1c JG |
600 | return 1; |
601 | ||
602 | /* | |
603 | * At this point we know, that inbound first_to_check | |
604 | * has (probably) not moved (see qdio_inbound_processing). | |
605 | */ | |
3a601bfe | 606 | if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) { |
1d7e1500 | 607 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x", |
22f99347 | 608 | q->first_to_check); |
779e6e1c | 609 | return 1; |
9a2c160a | 610 | } else |
60b5df2f | 611 | return 0; |
60b5df2f JG |
612 | } |
613 | ||
104ea556 | 614 | static inline int contains_aobs(struct qdio_q *q) |
615 | { | |
616 | return !q->is_input_q && q->u.out.use_cq; | |
617 | } | |
618 | ||
619 | static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q, | |
620 | int i, struct qaob *aob) | |
621 | { | |
622 | int tmp; | |
623 | ||
624 | DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i, | |
625 | (unsigned long) virt_to_phys(aob)); | |
626 | DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx", | |
627 | (unsigned long) aob->res0[0]); | |
628 | DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx", | |
629 | (unsigned long) aob->res0[1]); | |
630 | DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx", | |
631 | (unsigned long) aob->res0[2]); | |
632 | DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx", | |
633 | (unsigned long) aob->res0[3]); | |
634 | DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx", | |
635 | (unsigned long) aob->res0[4]); | |
636 | DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx", | |
637 | (unsigned long) aob->res0[5]); | |
638 | DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1); | |
639 | DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2); | |
640 | DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3); | |
641 | DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc); | |
642 | DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags); | |
643 | DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs); | |
644 | DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count); | |
645 | for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) { | |
646 | DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp, | |
647 | (unsigned long) aob->sba[tmp]); | |
648 | DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp, | |
649 | (unsigned long) q->sbal[i]->element[tmp].addr); | |
650 | DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]); | |
651 | DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp, | |
652 | q->sbal[i]->element[tmp].length); | |
653 | } | |
654 | DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0); | |
655 | for (tmp = 0; tmp < 2; ++tmp) { | |
656 | DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp, | |
657 | (unsigned long) aob->res4[tmp]); | |
658 | } | |
659 | DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1); | |
660 | DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2); | |
661 | } | |
662 | ||
663 | static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count) | |
664 | { | |
665 | unsigned char state = 0; | |
666 | int j, b = start; | |
667 | ||
668 | if (!contains_aobs(q)) | |
669 | return; | |
670 | ||
671 | for (j = 0; j < count; ++j) { | |
672 | get_buf_state(q, b, &state, 0); | |
673 | if (state == SLSB_P_OUTPUT_PENDING) { | |
674 | struct qaob *aob = q->u.out.aobs[b]; | |
675 | if (aob == NULL) | |
676 | continue; | |
677 | ||
678 | BUG_ON(q->u.out.sbal_state == NULL); | |
679 | q->u.out.sbal_state[b].flags |= | |
680 | QDIO_OUTBUF_STATE_FLAG_PENDING; | |
681 | q->u.out.aobs[b] = NULL; | |
682 | } else if (state == SLSB_P_OUTPUT_EMPTY) { | |
683 | BUG_ON(q->u.out.sbal_state == NULL); | |
684 | q->u.out.sbal_state[b].aob = NULL; | |
685 | } | |
686 | b = next_buf(b); | |
687 | } | |
688 | } | |
689 | ||
690 | static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q, | |
691 | int bufnr) | |
692 | { | |
693 | unsigned long phys_aob = 0; | |
694 | ||
695 | if (!q->use_cq) | |
696 | goto out; | |
697 | ||
698 | if (!q->aobs[bufnr]) { | |
699 | struct qaob *aob = qdio_allocate_aob(); | |
700 | q->aobs[bufnr] = aob; | |
701 | } | |
702 | if (q->aobs[bufnr]) { | |
703 | BUG_ON(q->sbal_state == NULL); | |
704 | q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE; | |
705 | q->sbal_state[bufnr].aob = q->aobs[bufnr]; | |
706 | q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user; | |
707 | phys_aob = virt_to_phys(q->aobs[bufnr]); | |
708 | BUG_ON(phys_aob & 0xFF); | |
709 | } | |
710 | ||
711 | out: | |
712 | return phys_aob; | |
713 | } | |
714 | ||
60b5df2f | 715 | static void qdio_kick_handler(struct qdio_q *q) |
779e6e1c | 716 | { |
9c8a08d7 JG |
717 | int start = q->first_to_kick; |
718 | int end = q->first_to_check; | |
719 | int count; | |
779e6e1c JG |
720 | |
721 | if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) | |
722 | return; | |
723 | ||
9c8a08d7 JG |
724 | count = sub_buf(end, start); |
725 | ||
726 | if (q->is_input_q) { | |
6486cda6 | 727 | qperf_inc(q, inbound_handler); |
1d7e1500 | 728 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count); |
bd6e8a16 | 729 | } else { |
6486cda6 | 730 | qperf_inc(q, outbound_handler); |
1d7e1500 JG |
731 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", |
732 | start, count); | |
bd6e8a16 | 733 | } |
9c8a08d7 | 734 | |
104ea556 | 735 | qdio_handle_aobs(q, start, count); |
736 | ||
9c8a08d7 JG |
737 | q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count, |
738 | q->irq_ptr->int_parm); | |
779e6e1c JG |
739 | |
740 | /* for the next time */ | |
9c8a08d7 | 741 | q->first_to_kick = end; |
779e6e1c JG |
742 | q->qdio_error = 0; |
743 | } | |
744 | ||
745 | static void __qdio_inbound_processing(struct qdio_q *q) | |
746 | { | |
6486cda6 | 747 | qperf_inc(q, tasklet_inbound); |
f3eb20fa | 748 | |
779e6e1c JG |
749 | if (!qdio_inbound_q_moved(q)) |
750 | return; | |
751 | ||
9c8a08d7 | 752 | qdio_kick_handler(q); |
779e6e1c | 753 | |
6486cda6 | 754 | if (!qdio_inbound_q_done(q)) { |
779e6e1c | 755 | /* means poll time is not yet over */ |
6486cda6 | 756 | qperf_inc(q, tasklet_inbound_resched); |
f3eb20fa JG |
757 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) { |
758 | tasklet_schedule(&q->tasklet); | |
759 | return; | |
760 | } | |
6486cda6 | 761 | } |
779e6e1c JG |
762 | |
763 | qdio_stop_polling(q); | |
764 | /* | |
765 | * We need to check again to not lose initiative after | |
766 | * resetting the ACK state. | |
767 | */ | |
6486cda6 JG |
768 | if (!qdio_inbound_q_done(q)) { |
769 | qperf_inc(q, tasklet_inbound_resched2); | |
f3eb20fa JG |
770 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) |
771 | tasklet_schedule(&q->tasklet); | |
6486cda6 | 772 | } |
779e6e1c JG |
773 | } |
774 | ||
779e6e1c JG |
775 | void qdio_inbound_processing(unsigned long data) |
776 | { | |
777 | struct qdio_q *q = (struct qdio_q *)data; | |
778 | __qdio_inbound_processing(q); | |
779 | } | |
780 | ||
781 | static int get_outbound_buffer_frontier(struct qdio_q *q) | |
782 | { | |
783 | int count, stop; | |
6fa1098a | 784 | unsigned char state = 0; |
779e6e1c | 785 | |
a2b86019 JG |
786 | q->timestamp = get_clock_fast(); |
787 | ||
90adac58 JG |
788 | if (need_siga_sync(q)) |
789 | if (((queue_type(q) != QDIO_IQDIO_QFMT) && | |
790 | !pci_out_supported(q)) || | |
791 | (queue_type(q) == QDIO_IQDIO_QFMT && | |
792 | multicast_outbound(q))) | |
793 | qdio_siga_sync_q(q); | |
779e6e1c JG |
794 | |
795 | /* | |
796 | * Don't check 128 buffers, as otherwise qdio_inbound_q_moved | |
797 | * would return 0. | |
798 | */ | |
799 | count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); | |
800 | stop = add_buf(q->first_to_check, count); | |
779e6e1c | 801 | if (q->first_to_check == stop) |
104ea556 | 802 | goto out; |
779e6e1c | 803 | |
104ea556 | 804 | count = get_buf_states(q, q->first_to_check, &state, count, 0, 1); |
779e6e1c | 805 | if (!count) |
104ea556 | 806 | goto out; |
779e6e1c JG |
807 | |
808 | switch (state) { | |
104ea556 | 809 | case SLSB_P_OUTPUT_PENDING: |
810 | BUG(); | |
779e6e1c JG |
811 | case SLSB_P_OUTPUT_EMPTY: |
812 | /* the adapter got it */ | |
104ea556 | 813 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, |
814 | "out empty:%1d %02x", q->nr, count); | |
779e6e1c JG |
815 | |
816 | atomic_sub(count, &q->nr_buf_used); | |
817 | q->first_to_check = add_buf(q->first_to_check, count); | |
d307297f JG |
818 | if (q->irq_ptr->perf_stat_enabled) |
819 | account_sbals(q, count); | |
104ea556 | 820 | |
36e3e721 | 821 | break; |
779e6e1c | 822 | case SLSB_P_OUTPUT_ERROR: |
bffbbd2d | 823 | process_buffer_error(q, count); |
779e6e1c JG |
824 | q->first_to_check = add_buf(q->first_to_check, count); |
825 | atomic_sub(count, &q->nr_buf_used); | |
d307297f JG |
826 | if (q->irq_ptr->perf_stat_enabled) |
827 | account_sbals_error(q, count); | |
779e6e1c JG |
828 | break; |
829 | case SLSB_CU_OUTPUT_PRIMED: | |
830 | /* the adapter has not fetched the output yet */ | |
d307297f JG |
831 | if (q->irq_ptr->perf_stat_enabled) |
832 | q->q_stats.nr_sbal_nop++; | |
104ea556 | 833 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", |
834 | q->nr); | |
779e6e1c JG |
835 | break; |
836 | case SLSB_P_OUTPUT_NOT_INIT: | |
837 | case SLSB_P_OUTPUT_HALTED: | |
838 | break; | |
839 | default: | |
840 | BUG(); | |
841 | } | |
104ea556 | 842 | |
843 | out: | |
779e6e1c JG |
844 | return q->first_to_check; |
845 | } | |
846 | ||
847 | /* all buffers processed? */ | |
848 | static inline int qdio_outbound_q_done(struct qdio_q *q) | |
849 | { | |
850 | return atomic_read(&q->nr_buf_used) == 0; | |
851 | } | |
852 | ||
853 | static inline int qdio_outbound_q_moved(struct qdio_q *q) | |
854 | { | |
855 | int bufnr; | |
856 | ||
857 | bufnr = get_outbound_buffer_frontier(q); | |
858 | ||
e85dea0e JG |
859 | if ((bufnr != q->last_move) || q->qdio_error) { |
860 | q->last_move = bufnr; | |
22f99347 | 861 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr); |
779e6e1c JG |
862 | return 1; |
863 | } else | |
864 | return 0; | |
865 | } | |
866 | ||
104ea556 | 867 | static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob) |
779e6e1c | 868 | { |
be8d97a5 | 869 | int retries = 0, cc; |
7a0b4cbc | 870 | unsigned int busy_bit; |
779e6e1c JG |
871 | |
872 | if (!need_siga_out(q)) | |
d303b6fd | 873 | return 0; |
779e6e1c | 874 | |
7a0b4cbc | 875 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); |
be8d97a5 | 876 | retry: |
6486cda6 | 877 | qperf_inc(q, siga_write); |
7a0b4cbc | 878 | |
104ea556 | 879 | cc = qdio_siga_output(q, &busy_bit, aob); |
7a0b4cbc | 880 | switch (cc) { |
779e6e1c | 881 | case 0: |
779e6e1c | 882 | break; |
7a0b4cbc JG |
883 | case 2: |
884 | if (busy_bit) { | |
be8d97a5 JG |
885 | while (++retries < QDIO_BUSY_BIT_RETRIES) { |
886 | mdelay(QDIO_BUSY_BIT_RETRY_DELAY); | |
887 | goto retry; | |
888 | } | |
889 | DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr); | |
d303b6fd JG |
890 | cc |= QDIO_ERROR_SIGA_BUSY; |
891 | } else | |
892 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr); | |
7a0b4cbc JG |
893 | break; |
894 | case 1: | |
895 | case 3: | |
896 | DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc); | |
7a0b4cbc | 897 | break; |
779e6e1c | 898 | } |
be8d97a5 JG |
899 | if (retries) { |
900 | DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr); | |
901 | DBF_ERROR("count:%u", retries); | |
902 | } | |
d303b6fd | 903 | return cc; |
779e6e1c JG |
904 | } |
905 | ||
779e6e1c JG |
906 | static void __qdio_outbound_processing(struct qdio_q *q) |
907 | { | |
6486cda6 | 908 | qperf_inc(q, tasklet_outbound); |
779e6e1c JG |
909 | BUG_ON(atomic_read(&q->nr_buf_used) < 0); |
910 | ||
911 | if (qdio_outbound_q_moved(q)) | |
9c8a08d7 | 912 | qdio_kick_handler(q); |
779e6e1c | 913 | |
c38f9608 | 914 | if (queue_type(q) == QDIO_ZFCP_QFMT) |
779e6e1c | 915 | if (!pci_out_supported(q) && !qdio_outbound_q_done(q)) |
c38f9608 | 916 | goto sched; |
779e6e1c JG |
917 | |
918 | /* bail out for HiperSockets unicast queues */ | |
919 | if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) | |
920 | return; | |
921 | ||
4bcb3a37 | 922 | if ((queue_type(q) == QDIO_IQDIO_QFMT) && |
c38f9608 JG |
923 | (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL) |
924 | goto sched; | |
4bcb3a37 | 925 | |
779e6e1c JG |
926 | if (q->u.out.pci_out_enabled) |
927 | return; | |
928 | ||
929 | /* | |
930 | * Now we know that queue type is either qeth without pci enabled | |
931 | * or HiperSockets multicast. Make sure buffer switch from PRIMED to | |
932 | * EMPTY is noticed and outbound_handler is called after some time. | |
933 | */ | |
934 | if (qdio_outbound_q_done(q)) | |
935 | del_timer(&q->u.out.timer); | |
6486cda6 JG |
936 | else |
937 | if (!timer_pending(&q->u.out.timer)) | |
779e6e1c | 938 | mod_timer(&q->u.out.timer, jiffies + 10 * HZ); |
c38f9608 JG |
939 | return; |
940 | ||
941 | sched: | |
942 | if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) | |
943 | return; | |
944 | tasklet_schedule(&q->tasklet); | |
779e6e1c JG |
945 | } |
946 | ||
947 | /* outbound tasklet */ | |
948 | void qdio_outbound_processing(unsigned long data) | |
949 | { | |
950 | struct qdio_q *q = (struct qdio_q *)data; | |
951 | __qdio_outbound_processing(q); | |
952 | } | |
953 | ||
954 | void qdio_outbound_timer(unsigned long data) | |
955 | { | |
956 | struct qdio_q *q = (struct qdio_q *)data; | |
c38f9608 JG |
957 | |
958 | if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) | |
959 | return; | |
779e6e1c JG |
960 | tasklet_schedule(&q->tasklet); |
961 | } | |
962 | ||
60b5df2f | 963 | static inline void qdio_check_outbound_after_thinint(struct qdio_q *q) |
779e6e1c JG |
964 | { |
965 | struct qdio_q *out; | |
966 | int i; | |
967 | ||
968 | if (!pci_out_supported(q)) | |
969 | return; | |
970 | ||
971 | for_each_output_queue(q->irq_ptr, out, i) | |
972 | if (!qdio_outbound_q_done(out)) | |
973 | tasklet_schedule(&out->tasklet); | |
974 | } | |
975 | ||
60b5df2f JG |
976 | static void __tiqdio_inbound_processing(struct qdio_q *q) |
977 | { | |
6486cda6 | 978 | qperf_inc(q, tasklet_inbound); |
90adac58 JG |
979 | if (need_siga_sync(q) && need_siga_sync_after_ai(q)) |
980 | qdio_sync_queues(q); | |
60b5df2f JG |
981 | |
982 | /* | |
983 | * The interrupt could be caused by a PCI request. Check the | |
984 | * PCI capable outbound queues. | |
985 | */ | |
986 | qdio_check_outbound_after_thinint(q); | |
987 | ||
988 | if (!qdio_inbound_q_moved(q)) | |
989 | return; | |
990 | ||
991 | qdio_kick_handler(q); | |
992 | ||
9a2c160a | 993 | if (!qdio_inbound_q_done(q)) { |
6486cda6 | 994 | qperf_inc(q, tasklet_inbound_resched); |
e2910bcf | 995 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) { |
60b5df2f | 996 | tasklet_schedule(&q->tasklet); |
e2910bcf JG |
997 | return; |
998 | } | |
60b5df2f JG |
999 | } |
1000 | ||
1001 | qdio_stop_polling(q); | |
1002 | /* | |
1003 | * We need to check again to not lose initiative after | |
1004 | * resetting the ACK state. | |
1005 | */ | |
9a2c160a | 1006 | if (!qdio_inbound_q_done(q)) { |
6486cda6 | 1007 | qperf_inc(q, tasklet_inbound_resched2); |
60b5df2f JG |
1008 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) |
1009 | tasklet_schedule(&q->tasklet); | |
1010 | } | |
1011 | } | |
1012 | ||
1013 | void tiqdio_inbound_processing(unsigned long data) | |
1014 | { | |
1015 | struct qdio_q *q = (struct qdio_q *)data; | |
1016 | __tiqdio_inbound_processing(q); | |
1017 | } | |
1018 | ||
779e6e1c JG |
1019 | static inline void qdio_set_state(struct qdio_irq *irq_ptr, |
1020 | enum qdio_irq_states state) | |
1021 | { | |
22f99347 | 1022 | DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state); |
779e6e1c JG |
1023 | |
1024 | irq_ptr->state = state; | |
1025 | mb(); | |
1026 | } | |
1027 | ||
22f99347 | 1028 | static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb) |
779e6e1c | 1029 | { |
779e6e1c | 1030 | if (irb->esw.esw0.erw.cons) { |
22f99347 JG |
1031 | DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no); |
1032 | DBF_ERROR_HEX(irb, 64); | |
1033 | DBF_ERROR_HEX(irb->ecw, 64); | |
779e6e1c JG |
1034 | } |
1035 | } | |
1036 | ||
1037 | /* PCI interrupt handler */ | |
1038 | static void qdio_int_handler_pci(struct qdio_irq *irq_ptr) | |
1039 | { | |
1040 | int i; | |
1041 | struct qdio_q *q; | |
1042 | ||
c38f9608 JG |
1043 | if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) |
1044 | return; | |
1045 | ||
d36deae7 JG |
1046 | for_each_input_queue(irq_ptr, q, i) { |
1047 | if (q->u.in.queue_start_poll) { | |
1048 | /* skip if polling is enabled or already in work */ | |
1049 | if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, | |
1050 | &q->u.in.queue_irq_state)) { | |
1051 | qperf_inc(q, int_discarded); | |
1052 | continue; | |
1053 | } | |
1054 | q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr, | |
1055 | q->irq_ptr->int_parm); | |
104ea556 | 1056 | } else { |
d36deae7 | 1057 | tasklet_schedule(&q->tasklet); |
104ea556 | 1058 | } |
d36deae7 | 1059 | } |
779e6e1c | 1060 | |
90adac58 | 1061 | if (!pci_out_supported(q)) |
779e6e1c JG |
1062 | return; |
1063 | ||
1064 | for_each_output_queue(irq_ptr, q, i) { | |
1065 | if (qdio_outbound_q_done(q)) | |
1066 | continue; | |
90adac58 | 1067 | if (need_siga_sync(q) && need_siga_sync_out_after_pci(q)) |
779e6e1c | 1068 | qdio_siga_sync_q(q); |
779e6e1c JG |
1069 | tasklet_schedule(&q->tasklet); |
1070 | } | |
1071 | } | |
1072 | ||
1073 | static void qdio_handle_activate_check(struct ccw_device *cdev, | |
1074 | unsigned long intparm, int cstat, int dstat) | |
1075 | { | |
1076 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1077 | struct qdio_q *q; | |
dfe5bb50 | 1078 | int count; |
779e6e1c | 1079 | |
22f99347 JG |
1080 | DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no); |
1081 | DBF_ERROR("intp :%lx", intparm); | |
1082 | DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); | |
779e6e1c JG |
1083 | |
1084 | if (irq_ptr->nr_input_qs) { | |
1085 | q = irq_ptr->input_qs[0]; | |
1086 | } else if (irq_ptr->nr_output_qs) { | |
1087 | q = irq_ptr->output_qs[0]; | |
1088 | } else { | |
1089 | dump_stack(); | |
1090 | goto no_handler; | |
1091 | } | |
dfe5bb50 SS |
1092 | |
1093 | count = sub_buf(q->first_to_check, q->first_to_kick); | |
779e6e1c | 1094 | q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION, |
dfe5bb50 | 1095 | q->nr, q->first_to_kick, count, irq_ptr->int_parm); |
779e6e1c JG |
1096 | no_handler: |
1097 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); | |
1098 | } | |
1099 | ||
4c575423 JG |
1100 | static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, |
1101 | int dstat) | |
779e6e1c JG |
1102 | { |
1103 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1104 | ||
4c575423 | 1105 | DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq"); |
779e6e1c | 1106 | |
4c575423 | 1107 | if (cstat) |
779e6e1c | 1108 | goto error; |
4c575423 | 1109 | if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END)) |
779e6e1c | 1110 | goto error; |
4c575423 JG |
1111 | if (!(dstat & DEV_STAT_DEV_END)) |
1112 | goto error; | |
1113 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED); | |
1114 | return; | |
1115 | ||
779e6e1c | 1116 | error: |
22f99347 JG |
1117 | DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no); |
1118 | DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); | |
779e6e1c | 1119 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); |
779e6e1c JG |
1120 | } |
1121 | ||
1122 | /* qdio interrupt handler */ | |
1123 | void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, | |
1124 | struct irb *irb) | |
1125 | { | |
1126 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1127 | int cstat, dstat; | |
779e6e1c | 1128 | |
779e6e1c | 1129 | if (!intparm || !irq_ptr) { |
22f99347 | 1130 | DBF_ERROR("qint:%4x", cdev->private->schid.sch_no); |
779e6e1c JG |
1131 | return; |
1132 | } | |
1133 | ||
09a308f3 JG |
1134 | if (irq_ptr->perf_stat_enabled) |
1135 | irq_ptr->perf_stat.qdio_int++; | |
1136 | ||
779e6e1c JG |
1137 | if (IS_ERR(irb)) { |
1138 | switch (PTR_ERR(irb)) { | |
1139 | case -EIO: | |
22f99347 | 1140 | DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no); |
75cb71f3 JG |
1141 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); |
1142 | wake_up(&cdev->private->wait_q); | |
779e6e1c JG |
1143 | return; |
1144 | default: | |
1145 | WARN_ON(1); | |
1146 | return; | |
1147 | } | |
1148 | } | |
22f99347 | 1149 | qdio_irq_check_sense(irq_ptr, irb); |
779e6e1c JG |
1150 | cstat = irb->scsw.cmd.cstat; |
1151 | dstat = irb->scsw.cmd.dstat; | |
1152 | ||
1153 | switch (irq_ptr->state) { | |
1154 | case QDIO_IRQ_STATE_INACTIVE: | |
1155 | qdio_establish_handle_irq(cdev, cstat, dstat); | |
1156 | break; | |
779e6e1c JG |
1157 | case QDIO_IRQ_STATE_CLEANUP: |
1158 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); | |
1159 | break; | |
779e6e1c JG |
1160 | case QDIO_IRQ_STATE_ESTABLISHED: |
1161 | case QDIO_IRQ_STATE_ACTIVE: | |
1162 | if (cstat & SCHN_STAT_PCI) { | |
1163 | qdio_int_handler_pci(irq_ptr); | |
779e6e1c JG |
1164 | return; |
1165 | } | |
4c575423 | 1166 | if (cstat || dstat) |
779e6e1c JG |
1167 | qdio_handle_activate_check(cdev, intparm, cstat, |
1168 | dstat); | |
4c575423 | 1169 | break; |
959153d3 JG |
1170 | case QDIO_IRQ_STATE_STOPPED: |
1171 | break; | |
779e6e1c JG |
1172 | default: |
1173 | WARN_ON(1); | |
1174 | } | |
1175 | wake_up(&cdev->private->wait_q); | |
1176 | } | |
1177 | ||
1178 | /** | |
1179 | * qdio_get_ssqd_desc - get qdio subchannel description | |
1180 | * @cdev: ccw device to get description for | |
bbd50e17 | 1181 | * @data: where to store the ssqd |
779e6e1c | 1182 | * |
bbd50e17 JG |
1183 | * Returns 0 or an error code. The results of the chsc are stored in the |
1184 | * specified structure. | |
779e6e1c | 1185 | */ |
bbd50e17 JG |
1186 | int qdio_get_ssqd_desc(struct ccw_device *cdev, |
1187 | struct qdio_ssqd_desc *data) | |
779e6e1c | 1188 | { |
779e6e1c | 1189 | |
bbd50e17 JG |
1190 | if (!cdev || !cdev->private) |
1191 | return -EINVAL; | |
1192 | ||
22f99347 | 1193 | DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no); |
bbd50e17 | 1194 | return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data); |
779e6e1c JG |
1195 | } |
1196 | EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); | |
1197 | ||
779e6e1c JG |
1198 | static void qdio_shutdown_queues(struct ccw_device *cdev) |
1199 | { | |
1200 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1201 | struct qdio_q *q; | |
1202 | int i; | |
1203 | ||
1204 | for_each_input_queue(irq_ptr, q, i) | |
c38f9608 | 1205 | tasklet_kill(&q->tasklet); |
779e6e1c JG |
1206 | |
1207 | for_each_output_queue(irq_ptr, q, i) { | |
779e6e1c | 1208 | del_timer(&q->u.out.timer); |
c38f9608 | 1209 | tasklet_kill(&q->tasklet); |
779e6e1c JG |
1210 | } |
1211 | } | |
1212 | ||
1213 | /** | |
1214 | * qdio_shutdown - shut down a qdio subchannel | |
1215 | * @cdev: associated ccw device | |
1216 | * @how: use halt or clear to shutdown | |
1217 | */ | |
1218 | int qdio_shutdown(struct ccw_device *cdev, int how) | |
1219 | { | |
22f99347 | 1220 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; |
779e6e1c JG |
1221 | int rc; |
1222 | unsigned long flags; | |
779e6e1c | 1223 | |
779e6e1c JG |
1224 | if (!irq_ptr) |
1225 | return -ENODEV; | |
1226 | ||
b4547402 | 1227 | BUG_ON(irqs_disabled()); |
22f99347 JG |
1228 | DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no); |
1229 | ||
779e6e1c JG |
1230 | mutex_lock(&irq_ptr->setup_mutex); |
1231 | /* | |
1232 | * Subchannel was already shot down. We cannot prevent being called | |
1233 | * twice since cio may trigger a shutdown asynchronously. | |
1234 | */ | |
1235 | if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { | |
1236 | mutex_unlock(&irq_ptr->setup_mutex); | |
1237 | return 0; | |
1238 | } | |
1239 | ||
c38f9608 JG |
1240 | /* |
1241 | * Indicate that the device is going down. Scheduling the queue | |
1242 | * tasklets is forbidden from here on. | |
1243 | */ | |
1244 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); | |
1245 | ||
779e6e1c JG |
1246 | tiqdio_remove_input_queues(irq_ptr); |
1247 | qdio_shutdown_queues(cdev); | |
1248 | qdio_shutdown_debug_entries(irq_ptr, cdev); | |
1249 | ||
1250 | /* cleanup subchannel */ | |
1251 | spin_lock_irqsave(get_ccwdev_lock(cdev), flags); | |
1252 | ||
1253 | if (how & QDIO_FLAG_CLEANUP_USING_CLEAR) | |
1254 | rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP); | |
1255 | else | |
1256 | /* default behaviour is halt */ | |
1257 | rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP); | |
1258 | if (rc) { | |
22f99347 JG |
1259 | DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no); |
1260 | DBF_ERROR("rc:%4d", rc); | |
779e6e1c JG |
1261 | goto no_cleanup; |
1262 | } | |
1263 | ||
1264 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP); | |
1265 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); | |
1266 | wait_event_interruptible_timeout(cdev->private->wait_q, | |
1267 | irq_ptr->state == QDIO_IRQ_STATE_INACTIVE || | |
1268 | irq_ptr->state == QDIO_IRQ_STATE_ERR, | |
1269 | 10 * HZ); | |
1270 | spin_lock_irqsave(get_ccwdev_lock(cdev), flags); | |
1271 | ||
1272 | no_cleanup: | |
1273 | qdio_shutdown_thinint(irq_ptr); | |
1274 | ||
1275 | /* restore interrupt handler */ | |
1276 | if ((void *)cdev->handler == (void *)qdio_int_handler) | |
1277 | cdev->handler = irq_ptr->orig_handler; | |
1278 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); | |
1279 | ||
1280 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); | |
1281 | mutex_unlock(&irq_ptr->setup_mutex); | |
779e6e1c JG |
1282 | if (rc) |
1283 | return rc; | |
1284 | return 0; | |
1285 | } | |
1286 | EXPORT_SYMBOL_GPL(qdio_shutdown); | |
1287 | ||
1288 | /** | |
1289 | * qdio_free - free data structures for a qdio subchannel | |
1290 | * @cdev: associated ccw device | |
1291 | */ | |
1292 | int qdio_free(struct ccw_device *cdev) | |
1293 | { | |
22f99347 | 1294 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; |
58eb27cd | 1295 | |
779e6e1c JG |
1296 | if (!irq_ptr) |
1297 | return -ENODEV; | |
1298 | ||
22f99347 | 1299 | DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no); |
779e6e1c | 1300 | mutex_lock(&irq_ptr->setup_mutex); |
22f99347 JG |
1301 | |
1302 | if (irq_ptr->debug_area != NULL) { | |
1303 | debug_unregister(irq_ptr->debug_area); | |
1304 | irq_ptr->debug_area = NULL; | |
1305 | } | |
779e6e1c JG |
1306 | cdev->private->qdio_data = NULL; |
1307 | mutex_unlock(&irq_ptr->setup_mutex); | |
1308 | ||
1309 | qdio_release_memory(irq_ptr); | |
1310 | return 0; | |
1311 | } | |
1312 | EXPORT_SYMBOL_GPL(qdio_free); | |
1313 | ||
779e6e1c JG |
1314 | /** |
1315 | * qdio_allocate - allocate qdio queues and associated data | |
1316 | * @init_data: initialization data | |
1317 | */ | |
1318 | int qdio_allocate(struct qdio_initialize *init_data) | |
1319 | { | |
1320 | struct qdio_irq *irq_ptr; | |
779e6e1c | 1321 | |
22f99347 | 1322 | DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no); |
779e6e1c JG |
1323 | |
1324 | if ((init_data->no_input_qs && !init_data->input_handler) || | |
1325 | (init_data->no_output_qs && !init_data->output_handler)) | |
1326 | return -EINVAL; | |
1327 | ||
1328 | if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) || | |
1329 | (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ)) | |
1330 | return -EINVAL; | |
1331 | ||
1332 | if ((!init_data->input_sbal_addr_array) || | |
1333 | (!init_data->output_sbal_addr_array)) | |
1334 | return -EINVAL; | |
1335 | ||
779e6e1c JG |
1336 | /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */ |
1337 | irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA); | |
1338 | if (!irq_ptr) | |
1339 | goto out_err; | |
779e6e1c JG |
1340 | |
1341 | mutex_init(&irq_ptr->setup_mutex); | |
22f99347 | 1342 | qdio_allocate_dbf(init_data, irq_ptr); |
779e6e1c JG |
1343 | |
1344 | /* | |
1345 | * Allocate a page for the chsc calls in qdio_establish. | |
1346 | * Must be pre-allocated since a zfcp recovery will call | |
1347 | * qdio_establish. In case of low memory and swap on a zfcp disk | |
1348 | * we may not be able to allocate memory otherwise. | |
1349 | */ | |
1350 | irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL); | |
1351 | if (!irq_ptr->chsc_page) | |
1352 | goto out_rel; | |
1353 | ||
1354 | /* qdr is used in ccw1.cda which is u32 */ | |
3b8e3004 | 1355 | irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA); |
779e6e1c JG |
1356 | if (!irq_ptr->qdr) |
1357 | goto out_rel; | |
1358 | WARN_ON((unsigned long)irq_ptr->qdr & 0xfff); | |
1359 | ||
779e6e1c JG |
1360 | if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs, |
1361 | init_data->no_output_qs)) | |
1362 | goto out_rel; | |
1363 | ||
1364 | init_data->cdev->private->qdio_data = irq_ptr; | |
1365 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); | |
1366 | return 0; | |
1367 | out_rel: | |
1368 | qdio_release_memory(irq_ptr); | |
1369 | out_err: | |
1370 | return -ENOMEM; | |
1371 | } | |
1372 | EXPORT_SYMBOL_GPL(qdio_allocate); | |
1373 | ||
104ea556 | 1374 | static void qdio_detect_hsicq(struct qdio_irq *irq_ptr) |
1375 | { | |
1376 | struct qdio_q *q = irq_ptr->input_qs[0]; | |
1377 | int i, use_cq = 0; | |
1378 | ||
1379 | if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT) | |
1380 | use_cq = 1; | |
1381 | ||
1382 | for_each_output_queue(irq_ptr, q, i) { | |
1383 | if (use_cq) { | |
1384 | if (qdio_enable_async_operation(&q->u.out) < 0) { | |
1385 | use_cq = 0; | |
1386 | continue; | |
1387 | } | |
1388 | } else | |
1389 | qdio_disable_async_operation(&q->u.out); | |
1390 | } | |
1391 | DBF_EVENT("use_cq:%d", use_cq); | |
1392 | } | |
1393 | ||
779e6e1c JG |
1394 | /** |
1395 | * qdio_establish - establish queues on a qdio subchannel | |
1396 | * @init_data: initialization data | |
1397 | */ | |
1398 | int qdio_establish(struct qdio_initialize *init_data) | |
1399 | { | |
779e6e1c JG |
1400 | struct qdio_irq *irq_ptr; |
1401 | struct ccw_device *cdev = init_data->cdev; | |
1402 | unsigned long saveflags; | |
1403 | int rc; | |
1404 | ||
22f99347 | 1405 | DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no); |
58eb27cd | 1406 | |
779e6e1c JG |
1407 | irq_ptr = cdev->private->qdio_data; |
1408 | if (!irq_ptr) | |
1409 | return -ENODEV; | |
1410 | ||
1411 | if (cdev->private->state != DEV_STATE_ONLINE) | |
1412 | return -EINVAL; | |
1413 | ||
779e6e1c JG |
1414 | mutex_lock(&irq_ptr->setup_mutex); |
1415 | qdio_setup_irq(init_data); | |
1416 | ||
1417 | rc = qdio_establish_thinint(irq_ptr); | |
1418 | if (rc) { | |
1419 | mutex_unlock(&irq_ptr->setup_mutex); | |
1420 | qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1421 | return rc; | |
1422 | } | |
1423 | ||
1424 | /* establish q */ | |
1425 | irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd; | |
1426 | irq_ptr->ccw.flags = CCW_FLAG_SLI; | |
1427 | irq_ptr->ccw.count = irq_ptr->equeue.count; | |
1428 | irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr); | |
1429 | ||
1430 | spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); | |
1431 | ccw_device_set_options_mask(cdev, 0); | |
1432 | ||
1433 | rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0); | |
1434 | if (rc) { | |
22f99347 JG |
1435 | DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no); |
1436 | DBF_ERROR("rc:%4x", rc); | |
779e6e1c JG |
1437 | } |
1438 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); | |
1439 | ||
1440 | if (rc) { | |
1441 | mutex_unlock(&irq_ptr->setup_mutex); | |
1442 | qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1443 | return rc; | |
1444 | } | |
1445 | ||
1446 | wait_event_interruptible_timeout(cdev->private->wait_q, | |
1447 | irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED || | |
1448 | irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ); | |
1449 | ||
1450 | if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) { | |
1451 | mutex_unlock(&irq_ptr->setup_mutex); | |
1452 | qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1453 | return -EIO; | |
1454 | } | |
1455 | ||
1456 | qdio_setup_ssqd_info(irq_ptr); | |
22f99347 | 1457 | DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac); |
779e6e1c | 1458 | |
104ea556 | 1459 | qdio_detect_hsicq(irq_ptr); |
1460 | ||
779e6e1c JG |
1461 | /* qebsm is now setup if available, initialize buffer states */ |
1462 | qdio_init_buf_states(irq_ptr); | |
1463 | ||
1464 | mutex_unlock(&irq_ptr->setup_mutex); | |
1465 | qdio_print_subchannel_info(irq_ptr, cdev); | |
1466 | qdio_setup_debug_entries(irq_ptr, cdev); | |
1467 | return 0; | |
1468 | } | |
1469 | EXPORT_SYMBOL_GPL(qdio_establish); | |
1470 | ||
1471 | /** | |
1472 | * qdio_activate - activate queues on a qdio subchannel | |
1473 | * @cdev: associated cdev | |
1474 | */ | |
1475 | int qdio_activate(struct ccw_device *cdev) | |
1476 | { | |
1477 | struct qdio_irq *irq_ptr; | |
1478 | int rc; | |
1479 | unsigned long saveflags; | |
779e6e1c | 1480 | |
22f99347 | 1481 | DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no); |
58eb27cd | 1482 | |
779e6e1c JG |
1483 | irq_ptr = cdev->private->qdio_data; |
1484 | if (!irq_ptr) | |
1485 | return -ENODEV; | |
1486 | ||
1487 | if (cdev->private->state != DEV_STATE_ONLINE) | |
1488 | return -EINVAL; | |
1489 | ||
1490 | mutex_lock(&irq_ptr->setup_mutex); | |
1491 | if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { | |
1492 | rc = -EBUSY; | |
1493 | goto out; | |
1494 | } | |
1495 | ||
779e6e1c JG |
1496 | irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd; |
1497 | irq_ptr->ccw.flags = CCW_FLAG_SLI; | |
1498 | irq_ptr->ccw.count = irq_ptr->aqueue.count; | |
1499 | irq_ptr->ccw.cda = 0; | |
1500 | ||
1501 | spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); | |
1502 | ccw_device_set_options(cdev, CCWDEV_REPORT_ALL); | |
1503 | ||
1504 | rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE, | |
1505 | 0, DOIO_DENY_PREFETCH); | |
1506 | if (rc) { | |
22f99347 JG |
1507 | DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no); |
1508 | DBF_ERROR("rc:%4x", rc); | |
779e6e1c JG |
1509 | } |
1510 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); | |
1511 | ||
1512 | if (rc) | |
1513 | goto out; | |
1514 | ||
1515 | if (is_thinint_irq(irq_ptr)) | |
1516 | tiqdio_add_input_queues(irq_ptr); | |
1517 | ||
1518 | /* wait for subchannel to become active */ | |
1519 | msleep(5); | |
1520 | ||
1521 | switch (irq_ptr->state) { | |
1522 | case QDIO_IRQ_STATE_STOPPED: | |
1523 | case QDIO_IRQ_STATE_ERR: | |
e4c14e20 JG |
1524 | rc = -EIO; |
1525 | break; | |
779e6e1c JG |
1526 | default: |
1527 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE); | |
1528 | rc = 0; | |
1529 | } | |
1530 | out: | |
1531 | mutex_unlock(&irq_ptr->setup_mutex); | |
1532 | return rc; | |
1533 | } | |
1534 | EXPORT_SYMBOL_GPL(qdio_activate); | |
1535 | ||
1536 | static inline int buf_in_between(int bufnr, int start, int count) | |
1537 | { | |
1538 | int end = add_buf(start, count); | |
1539 | ||
1540 | if (end > start) { | |
1541 | if (bufnr >= start && bufnr < end) | |
1542 | return 1; | |
1543 | else | |
1544 | return 0; | |
1545 | } | |
1546 | ||
1547 | /* wrap-around case */ | |
1548 | if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) || | |
1549 | (bufnr < end)) | |
1550 | return 1; | |
1551 | else | |
1552 | return 0; | |
1553 | } | |
1554 | ||
1555 | /** | |
1556 | * handle_inbound - reset processed input buffers | |
1557 | * @q: queue containing the buffers | |
1558 | * @callflags: flags | |
1559 | * @bufnr: first buffer to process | |
1560 | * @count: how many buffers are emptied | |
1561 | */ | |
d303b6fd JG |
1562 | static int handle_inbound(struct qdio_q *q, unsigned int callflags, |
1563 | int bufnr, int count) | |
779e6e1c | 1564 | { |
d303b6fd | 1565 | int used, diff; |
779e6e1c | 1566 | |
6486cda6 JG |
1567 | qperf_inc(q, inbound_call); |
1568 | ||
50f769df JG |
1569 | if (!q->u.in.polling) |
1570 | goto set; | |
1571 | ||
1572 | /* protect against stop polling setting an ACK for an emptied slsb */ | |
1573 | if (count == QDIO_MAX_BUFFERS_PER_Q) { | |
1574 | /* overwriting everything, just delete polling status */ | |
1575 | q->u.in.polling = 0; | |
1576 | q->u.in.ack_count = 0; | |
1577 | goto set; | |
e85dea0e | 1578 | } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) { |
50f769df | 1579 | if (is_qebsm(q)) { |
e85dea0e | 1580 | /* partial overwrite, just update ack_start */ |
50f769df | 1581 | diff = add_buf(bufnr, count); |
e85dea0e | 1582 | diff = sub_buf(diff, q->u.in.ack_start); |
50f769df JG |
1583 | q->u.in.ack_count -= diff; |
1584 | if (q->u.in.ack_count <= 0) { | |
1585 | q->u.in.polling = 0; | |
1586 | q->u.in.ack_count = 0; | |
50f769df JG |
1587 | goto set; |
1588 | } | |
e85dea0e | 1589 | q->u.in.ack_start = add_buf(q->u.in.ack_start, diff); |
50f769df JG |
1590 | } |
1591 | else | |
1592 | /* the only ACK will be deleted, so stop polling */ | |
779e6e1c | 1593 | q->u.in.polling = 0; |
50f769df | 1594 | } |
779e6e1c | 1595 | |
50f769df | 1596 | set: |
779e6e1c | 1597 | count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count); |
779e6e1c JG |
1598 | |
1599 | used = atomic_add_return(count, &q->nr_buf_used) - count; | |
1600 | BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q); | |
1601 | ||
d303b6fd JG |
1602 | if (need_siga_in(q)) |
1603 | return qdio_siga_input(q); | |
9cb7284f | 1604 | |
d303b6fd | 1605 | return 0; |
779e6e1c JG |
1606 | } |
1607 | ||
1608 | /** | |
1609 | * handle_outbound - process filled outbound buffers | |
1610 | * @q: queue containing the buffers | |
1611 | * @callflags: flags | |
1612 | * @bufnr: first buffer to process | |
1613 | * @count: how many buffers are filled | |
1614 | */ | |
d303b6fd JG |
1615 | static int handle_outbound(struct qdio_q *q, unsigned int callflags, |
1616 | int bufnr, int count) | |
779e6e1c | 1617 | { |
c26001d4 | 1618 | unsigned char state = 0; |
d303b6fd | 1619 | int used, rc = 0; |
779e6e1c | 1620 | |
6486cda6 | 1621 | qperf_inc(q, outbound_call); |
779e6e1c JG |
1622 | |
1623 | count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); | |
1624 | used = atomic_add_return(count, &q->nr_buf_used); | |
1625 | BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q); | |
1626 | ||
0195843b JG |
1627 | if (used == QDIO_MAX_BUFFERS_PER_Q) |
1628 | qperf_inc(q, outbound_queue_full); | |
1629 | ||
6486cda6 | 1630 | if (callflags & QDIO_FLAG_PCI_OUT) { |
779e6e1c | 1631 | q->u.out.pci_out_enabled = 1; |
6486cda6 | 1632 | qperf_inc(q, pci_request_int); |
110da317 | 1633 | } else |
779e6e1c JG |
1634 | q->u.out.pci_out_enabled = 0; |
1635 | ||
1636 | if (queue_type(q) == QDIO_IQDIO_QFMT) { | |
104ea556 | 1637 | unsigned long phys_aob = 0; |
1638 | ||
1639 | /* One SIGA-W per buffer required for unicast HSI */ | |
110da317 JG |
1640 | WARN_ON_ONCE(count > 1 && !multicast_outbound(q)); |
1641 | ||
104ea556 | 1642 | phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr); |
1643 | ||
1644 | rc = qdio_kick_outbound_q(q, phys_aob); | |
90adac58 | 1645 | } else if (need_siga_sync(q)) { |
110da317 JG |
1646 | rc = qdio_siga_sync_q(q); |
1647 | } else { | |
1648 | /* try to fast requeue buffers */ | |
1649 | get_buf_state(q, prev_buf(bufnr), &state, 0); | |
1650 | if (state != SLSB_CU_OUTPUT_PRIMED) | |
104ea556 | 1651 | rc = qdio_kick_outbound_q(q, 0); |
779e6e1c | 1652 | else |
110da317 | 1653 | qperf_inc(q, fast_requeue); |
779e6e1c JG |
1654 | } |
1655 | ||
3d6c76ff JG |
1656 | /* in case of SIGA errors we must process the error immediately */ |
1657 | if (used >= q->u.out.scan_threshold || rc) | |
1658 | tasklet_schedule(&q->tasklet); | |
1659 | else | |
1660 | /* free the SBALs in case of no further traffic */ | |
1661 | if (!timer_pending(&q->u.out.timer)) | |
1662 | mod_timer(&q->u.out.timer, jiffies + HZ); | |
d303b6fd | 1663 | return rc; |
779e6e1c JG |
1664 | } |
1665 | ||
1666 | /** | |
1667 | * do_QDIO - process input or output buffers | |
1668 | * @cdev: associated ccw_device for the qdio subchannel | |
1669 | * @callflags: input or output and special flags from the program | |
1670 | * @q_nr: queue number | |
1671 | * @bufnr: buffer number | |
1672 | * @count: how many buffers to process | |
1673 | */ | |
1674 | int do_QDIO(struct ccw_device *cdev, unsigned int callflags, | |
6618241b | 1675 | int q_nr, unsigned int bufnr, unsigned int count) |
779e6e1c JG |
1676 | { |
1677 | struct qdio_irq *irq_ptr; | |
779e6e1c | 1678 | |
104ea556 | 1679 | |
6618241b | 1680 | if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q) |
779e6e1c JG |
1681 | return -EINVAL; |
1682 | ||
779e6e1c JG |
1683 | irq_ptr = cdev->private->qdio_data; |
1684 | if (!irq_ptr) | |
1685 | return -ENODEV; | |
1686 | ||
1d7e1500 JG |
1687 | DBF_DEV_EVENT(DBF_INFO, irq_ptr, |
1688 | "do%02x b:%02x c:%02x", callflags, bufnr, count); | |
779e6e1c JG |
1689 | |
1690 | if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE) | |
1691 | return -EBUSY; | |
9a26513e JG |
1692 | if (!count) |
1693 | return 0; | |
779e6e1c | 1694 | if (callflags & QDIO_FLAG_SYNC_INPUT) |
d303b6fd JG |
1695 | return handle_inbound(irq_ptr->input_qs[q_nr], |
1696 | callflags, bufnr, count); | |
779e6e1c | 1697 | else if (callflags & QDIO_FLAG_SYNC_OUTPUT) |
d303b6fd JG |
1698 | return handle_outbound(irq_ptr->output_qs[q_nr], |
1699 | callflags, bufnr, count); | |
1700 | return -EINVAL; | |
779e6e1c JG |
1701 | } |
1702 | EXPORT_SYMBOL_GPL(do_QDIO); | |
1703 | ||
d36deae7 JG |
1704 | /** |
1705 | * qdio_start_irq - process input buffers | |
1706 | * @cdev: associated ccw_device for the qdio subchannel | |
1707 | * @nr: input queue number | |
1708 | * | |
1709 | * Return codes | |
1710 | * 0 - success | |
1711 | * 1 - irqs not started since new data is available | |
1712 | */ | |
1713 | int qdio_start_irq(struct ccw_device *cdev, int nr) | |
1714 | { | |
1715 | struct qdio_q *q; | |
1716 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1717 | ||
1718 | if (!irq_ptr) | |
1719 | return -ENODEV; | |
1720 | q = irq_ptr->input_qs[nr]; | |
1721 | ||
1722 | WARN_ON(queue_irqs_enabled(q)); | |
1723 | ||
104ea556 | 1724 | if (!shared_ind(q)) |
d36deae7 JG |
1725 | xchg(q->irq_ptr->dsci, 0); |
1726 | ||
1727 | qdio_stop_polling(q); | |
1728 | clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state); | |
1729 | ||
1730 | /* | |
1731 | * We need to check again to not lose initiative after | |
1732 | * resetting the ACK state. | |
1733 | */ | |
104ea556 | 1734 | if (!shared_ind(q) && *q->irq_ptr->dsci) |
d36deae7 JG |
1735 | goto rescan; |
1736 | if (!qdio_inbound_q_done(q)) | |
1737 | goto rescan; | |
1738 | return 0; | |
1739 | ||
1740 | rescan: | |
1741 | if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, | |
1742 | &q->u.in.queue_irq_state)) | |
1743 | return 0; | |
1744 | else | |
1745 | return 1; | |
1746 | ||
1747 | } | |
1748 | EXPORT_SYMBOL(qdio_start_irq); | |
1749 | ||
1750 | /** | |
1751 | * qdio_get_next_buffers - process input buffers | |
1752 | * @cdev: associated ccw_device for the qdio subchannel | |
1753 | * @nr: input queue number | |
1754 | * @bufnr: first filled buffer number | |
1755 | * @error: buffers are in error state | |
1756 | * | |
1757 | * Return codes | |
1758 | * < 0 - error | |
1759 | * = 0 - no new buffers found | |
1760 | * > 0 - number of processed buffers | |
1761 | */ | |
1762 | int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr, | |
1763 | int *error) | |
1764 | { | |
1765 | struct qdio_q *q; | |
1766 | int start, end; | |
1767 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1768 | ||
1769 | if (!irq_ptr) | |
1770 | return -ENODEV; | |
1771 | q = irq_ptr->input_qs[nr]; | |
1772 | WARN_ON(queue_irqs_enabled(q)); | |
1773 | ||
d36deae7 | 1774 | /* |
90adac58 JG |
1775 | * Cannot rely on automatic sync after interrupt since queues may |
1776 | * also be examined without interrupt. | |
d36deae7 | 1777 | */ |
90adac58 JG |
1778 | if (need_siga_sync(q)) |
1779 | qdio_sync_queues(q); | |
1780 | ||
1781 | /* check the PCI capable outbound queues. */ | |
d36deae7 JG |
1782 | qdio_check_outbound_after_thinint(q); |
1783 | ||
1784 | if (!qdio_inbound_q_moved(q)) | |
1785 | return 0; | |
1786 | ||
1787 | /* Note: upper-layer MUST stop processing immediately here ... */ | |
1788 | if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) | |
1789 | return -EIO; | |
1790 | ||
1791 | start = q->first_to_kick; | |
1792 | end = q->first_to_check; | |
1793 | *bufnr = start; | |
1794 | *error = q->qdio_error; | |
1795 | ||
1796 | /* for the next time */ | |
1797 | q->first_to_kick = end; | |
1798 | q->qdio_error = 0; | |
1799 | return sub_buf(end, start); | |
1800 | } | |
1801 | EXPORT_SYMBOL(qdio_get_next_buffers); | |
1802 | ||
1803 | /** | |
1804 | * qdio_stop_irq - disable interrupt processing for the device | |
1805 | * @cdev: associated ccw_device for the qdio subchannel | |
1806 | * @nr: input queue number | |
1807 | * | |
1808 | * Return codes | |
1809 | * 0 - interrupts were already disabled | |
1810 | * 1 - interrupts successfully disabled | |
1811 | */ | |
1812 | int qdio_stop_irq(struct ccw_device *cdev, int nr) | |
1813 | { | |
1814 | struct qdio_q *q; | |
1815 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1816 | ||
1817 | if (!irq_ptr) | |
1818 | return -ENODEV; | |
1819 | q = irq_ptr->input_qs[nr]; | |
1820 | ||
1821 | if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, | |
1822 | &q->u.in.queue_irq_state)) | |
1823 | return 0; | |
1824 | else | |
1825 | return 1; | |
1826 | } | |
1827 | EXPORT_SYMBOL(qdio_stop_irq); | |
1828 | ||
779e6e1c JG |
1829 | static int __init init_QDIO(void) |
1830 | { | |
1831 | int rc; | |
1832 | ||
aa5c8df3 | 1833 | rc = qdio_debug_init(); |
779e6e1c JG |
1834 | if (rc) |
1835 | return rc; | |
aa5c8df3 SO |
1836 | rc = qdio_setup_init(); |
1837 | if (rc) | |
1838 | goto out_debug; | |
779e6e1c JG |
1839 | rc = tiqdio_allocate_memory(); |
1840 | if (rc) | |
1841 | goto out_cache; | |
779e6e1c JG |
1842 | rc = tiqdio_register_thinints(); |
1843 | if (rc) | |
aa5c8df3 | 1844 | goto out_ti; |
779e6e1c JG |
1845 | return 0; |
1846 | ||
779e6e1c JG |
1847 | out_ti: |
1848 | tiqdio_free_memory(); | |
1849 | out_cache: | |
1850 | qdio_setup_exit(); | |
aa5c8df3 SO |
1851 | out_debug: |
1852 | qdio_debug_exit(); | |
779e6e1c JG |
1853 | return rc; |
1854 | } | |
1855 | ||
1856 | static void __exit exit_QDIO(void) | |
1857 | { | |
1858 | tiqdio_unregister_thinints(); | |
1859 | tiqdio_free_memory(); | |
779e6e1c | 1860 | qdio_setup_exit(); |
aa5c8df3 | 1861 | qdio_debug_exit(); |
779e6e1c JG |
1862 | } |
1863 | ||
1864 | module_init(init_QDIO); | |
1865 | module_exit(exit_QDIO); |