[deliverable/linux.git] / drivers / s390 / cio / qdio_setup.c

/*
 * driver/s390/cio/qdio_setup.c
 *
 * qdio queue initialization
 *
 * Copyright (C) IBM Corp. 2008
 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
 */
#include <linux/kernel.h>
#include <linux/slab.h>
#include <asm/qdio.h>

#include "cio.h"
#include "css.h"
#include "device.h"
#include "ioasm.h"
#include "chsc.h"
#include "qdio.h"
#include "qdio_debug.h"

static struct kmem_cache *qdio_q_cache;
static struct kmem_cache *qdio_aob_cache;

struct qaob *qdio_allocate_aob()
{
	struct qaob *aob;

	aob = kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
	return aob;
}
EXPORT_SYMBOL_GPL(qdio_allocate_aob);

void qdio_release_aob(struct qaob *aob)
{
	kmem_cache_free(qdio_aob_cache, aob);
}
EXPORT_SYMBOL_GPL(qdio_release_aob);

/*
 * qebsm is only available under 64bit but the adapter sets the feature
 * flag anyway, so we manually override it.
 */
static inline int qebsm_possible(void)
{
#ifdef CONFIG_64BIT
	return css_general_characteristics.qebsm;
#endif
	return 0;
}

/*
 * qib_param_field: pointer to 128 bytes or NULL, if no param field
 * nr_input_qs: pointer to nr_queues*128 words of data or NULL
 */
static void set_impl_params(struct qdio_irq *irq_ptr,
			    unsigned int qib_param_field_format,
			    unsigned char *qib_param_field,
			    unsigned long *input_slib_elements,
			    unsigned long *output_slib_elements)
{
	struct qdio_q *q;
	int i, j;

	if (!irq_ptr)
		return;

	irq_ptr->qib.pfmt = qib_param_field_format;
	if (qib_param_field)
		memcpy(irq_ptr->qib.parm, qib_param_field,
		       QDIO_MAX_BUFFERS_PER_Q);

	if (!input_slib_elements)
		goto output;

	for_each_input_queue(irq_ptr, q, i) {
		for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
			q->slib->slibe[j].parms =
				input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
	}
output:
	if (!output_slib_elements)
		return;

	for_each_output_queue(irq_ptr, q, i) {
		for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
			q->slib->slibe[j].parms =
				output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
	}
}

static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
{
	struct qdio_q *q;
	int i;

	for (i = 0; i < nr_queues; i++) {
		q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
		if (!q)
			return -ENOMEM;

		q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
		if (!q->slib) {
			kmem_cache_free(qdio_q_cache, q);
			return -ENOMEM;
		}
		irq_ptr_qs[i] = q;
	}
	return 0;
}

int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
{
	int rc;

	rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
	if (rc)
		return rc;
	rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
	return rc;
}

static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
			      qdio_handler_t *handler, int i)
{
	struct slib *slib = q->slib;

	/* queue must be cleared for qdio_establish */
	memset(q, 0, sizeof(*q));
	memset(slib, 0, PAGE_SIZE);
	q->slib = slib;
	q->irq_ptr = irq_ptr;
	q->mask = 1 << (31 - i);
	q->nr = i;
	q->handler = handler;
}

static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
				void **sbals_array, int i)
{
	struct qdio_q *prev;
	int j;

	DBF_HEX(&q, sizeof(void *));
	q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);

	/* fill in sbal */
	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
		q->sbal[j] = *sbals_array++;
		BUG_ON((unsigned long)q->sbal[j] & 0xff);
	}

	/* fill in slib */
	if (i > 0) {
		prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
			: irq_ptr->output_qs[i - 1];
		prev->slib->nsliba = (unsigned long)q->slib;
	}

	q->slib->sla = (unsigned long)q->sl;
	q->slib->slsba = (unsigned long)&q->slsb.val[0];

	/* fill in sl */
	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
		q->sl->element[j].sbal = (unsigned long)q->sbal[j];
}

static void setup_queues(struct qdio_irq *irq_ptr,
			 struct qdio_initialize *qdio_init)
{
	struct qdio_q *q;
	void **input_sbal_array = qdio_init->input_sbal_addr_array;
	void **output_sbal_array = qdio_init->output_sbal_addr_array;
	struct qdio_outbuf_state *output_sbal_state_array =
				  qdio_init->output_sbal_state_array;
	int i;

	for_each_input_queue(irq_ptr, q, i) {
		DBF_EVENT("inq:%1d", i);
		setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);

		q->is_input_q = 1;
		q->u.in.queue_start_poll = qdio_init->queue_start_poll[i];

		setup_storage_lists(q, irq_ptr, input_sbal_array, i);
		input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;

		if (is_thinint_irq(irq_ptr)) {
			tasklet_init(&q->tasklet, tiqdio_inbound_processing,
				     (unsigned long) q);
		} else {
			tasklet_init(&q->tasklet, qdio_inbound_processing,
				     (unsigned long) q);
		}
	}

	for_each_output_queue(irq_ptr, q, i) {
		DBF_EVENT("outq:%1d", i);
		setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);

		q->u.out.sbal_state = output_sbal_state_array;
		output_sbal_state_array += QDIO_MAX_BUFFERS_PER_Q;

		q->is_input_q = 0;
		q->u.out.scan_threshold = qdio_init->scan_threshold;
		setup_storage_lists(q, irq_ptr, output_sbal_array, i);
		output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;

		tasklet_init(&q->tasklet, qdio_outbound_processing,
			     (unsigned long) q);
		setup_timer(&q->u.out.timer, (void(*)(unsigned long))
			    &qdio_outbound_timer, (unsigned long)q);
	}
}

static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
{
	if (qdioac & AC1_SIGA_INPUT_NEEDED)
		irq_ptr->siga_flag.input = 1;
	if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
		irq_ptr->siga_flag.output = 1;
	if (qdioac & AC1_SIGA_SYNC_NEEDED)
		irq_ptr->siga_flag.sync = 1;
	if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_THININT))
		irq_ptr->siga_flag.sync_after_ai = 1;
	if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI))
		irq_ptr->siga_flag.sync_out_after_pci = 1;
}

static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
				  unsigned char qdioac, unsigned long token)
{
	if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
		goto no_qebsm;
	if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
	    (!(qdioac & AC1_SC_QEBSM_ENABLED)))
		goto no_qebsm;

	irq_ptr->sch_token = token;

	DBF_EVENT("V=V:1");
	DBF_EVENT("%8lx", irq_ptr->sch_token);
	return;

no_qebsm:
	irq_ptr->sch_token = 0;
	irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
	DBF_EVENT("noV=V");
}

/*
 * If there is a qdio_irq we use the chsc_page and store the information
 * in the qdio_irq, otherwise we copy it to the specified structure.
 */
int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
			struct subchannel_id *schid,
			struct qdio_ssqd_desc *data)
{
	struct chsc_ssqd_area *ssqd;
	int rc;

	DBF_EVENT("getssqd:%4x", schid->sch_no);
	if (irq_ptr != NULL)
		ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
	else
		ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
	memset(ssqd, 0, PAGE_SIZE);

	ssqd->request = (struct chsc_header) {
		.length = 0x0010,
		.code	= 0x0024,
	};
	ssqd->first_sch = schid->sch_no;
	ssqd->last_sch = schid->sch_no;
	ssqd->ssid = schid->ssid;

	if (chsc(ssqd))
		return -EIO;
	rc = chsc_error_from_response(ssqd->response.code);
	if (rc)
		return rc;

	if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
	    !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
	    (ssqd->qdio_ssqd.sch != schid->sch_no))
		return -EINVAL;

	if (irq_ptr != NULL)
		memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
		       sizeof(struct qdio_ssqd_desc));
	else {
		memcpy(data, &ssqd->qdio_ssqd,
		       sizeof(struct qdio_ssqd_desc));
		free_page((unsigned long)ssqd);
	}
	return 0;
}

void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
{
	unsigned char qdioac;
	int rc;

	rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
	if (rc) {
		DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
		DBF_ERROR("rc:%x", rc);
		/* all flags set, worst case */
		qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
			 AC1_SIGA_SYNC_NEEDED;
	} else
		qdioac = irq_ptr->ssqd_desc.qdioac1;

	check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
	process_ac_flags(irq_ptr, qdioac);
	DBF_EVENT("qdioac:%4x", qdioac);
}

void qdio_release_memory(struct qdio_irq *irq_ptr)
{
	struct qdio_q *q;
	int i;

	/*
	 * Must check queue array manually since irq_ptr->nr_input_queues /
	 * irq_ptr->nr_input_queues may not yet be set.
	 */
	for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
		q = irq_ptr->input_qs[i];
		if (q) {
			free_page((unsigned long) q->slib);
			kmem_cache_free(qdio_q_cache, q);
		}
	}
	for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
		q = irq_ptr->output_qs[i];
		if (q) {
			if (q->u.out.use_cq) {
				int n;

				for (n = 0; n < QDIO_MAX_BUFFERS_PER_Q; ++n) {
					struct qaob *aob = q->u.out.aobs[n];
					if (aob) {
						qdio_release_aob(aob);
						q->u.out.aobs[n] = NULL;
					}
				}

				qdio_disable_async_operation(&q->u.out);
			}
			free_page((unsigned long) q->slib);
			kmem_cache_free(qdio_q_cache, q);
		}
	}
	free_page((unsigned long) irq_ptr->qdr);
	free_page(irq_ptr->chsc_page);
	free_page((unsigned long) irq_ptr);
}

static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
				     struct qdio_q **irq_ptr_qs,
				     int i, int nr)
{
	irq_ptr->qdr->qdf0[i + nr].sliba =
		(unsigned long)irq_ptr_qs[i]->slib;

	irq_ptr->qdr->qdf0[i + nr].sla =
		(unsigned long)irq_ptr_qs[i]->sl;

	irq_ptr->qdr->qdf0[i + nr].slsba =
		(unsigned long)&irq_ptr_qs[i]->slsb.val[0];

	irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4;
	irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4;
	irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4;
	irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4;
}

static void setup_qdr(struct qdio_irq *irq_ptr,
		      struct qdio_initialize *qdio_init)
{
	int i;

	irq_ptr->qdr->qfmt = qdio_init->q_format;
	irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
	irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
	irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
	irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
	irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
	irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;

	for (i = 0; i < qdio_init->no_input_qs; i++)
		__qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);

	for (i = 0; i < qdio_init->no_output_qs; i++)
		__qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
					 qdio_init->no_input_qs);
}

static void setup_qib(struct qdio_irq *irq_ptr,
		      struct qdio_initialize *init_data)
{
	if (qebsm_possible())
		irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;

	irq_ptr->qib.rflags |= init_data->qib_rflags;

	irq_ptr->qib.qfmt = init_data->q_format;
	if (init_data->no_input_qs)
		irq_ptr->qib.isliba =
			(unsigned long)(irq_ptr->input_qs[0]->slib);
	if (init_data->no_output_qs)
		irq_ptr->qib.osliba =
			(unsigned long)(irq_ptr->output_qs[0]->slib);
	memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
}

int qdio_setup_irq(struct qdio_initialize *init_data)
{
	struct ciw *ciw;
	struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
	int rc;

	memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
	memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag));
	memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
	memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
	memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));

	irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL;
	irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0;

	/* wipes qib.ac, required by ar7063 */
	memset(irq_ptr->qdr, 0, sizeof(struct qdr));

	irq_ptr->int_parm = init_data->int_parm;
	irq_ptr->nr_input_qs = init_data->no_input_qs;
	irq_ptr->nr_output_qs = init_data->no_output_qs;

	irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
	irq_ptr->cdev = init_data->cdev;
	setup_queues(irq_ptr, init_data);

	setup_qib(irq_ptr, init_data);
	qdio_setup_thinint(irq_ptr);
	set_impl_params(irq_ptr, init_data->qib_param_field_format,
			init_data->qib_param_field,
			init_data->input_slib_elements,
			init_data->output_slib_elements);

	/* fill input and output descriptors */
	setup_qdr(irq_ptr, init_data);

	/* qdr, qib, sls, slsbs, slibs, sbales are filled now */

	/* get qdio commands */
	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
	if (!ciw) {
		DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
		rc = -EINVAL;
		goto out_err;
	}
	irq_ptr->equeue = *ciw;

	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
	if (!ciw) {
		DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
		rc = -EINVAL;
		goto out_err;
	}
	irq_ptr->aqueue = *ciw;

	/* set new interrupt handler */
	irq_ptr->orig_handler = init_data->cdev->handler;
	init_data->cdev->handler = qdio_int_handler;
	return 0;
out_err:
	qdio_release_memory(irq_ptr);
	return rc;
}

void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
				struct ccw_device *cdev)
{
	char s[80];

	snprintf(s, 80, "qdio: %s %s on SC %x using "
		 "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s\n",
		 dev_name(&cdev->dev),
		 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
			((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
		 irq_ptr->schid.sch_no,
		 is_thinint_irq(irq_ptr),
		 (irq_ptr->sch_token) ? 1 : 0,
		 (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
		 css_general_characteristics.aif_tdd,
		 (irq_ptr->siga_flag.input) ? "R" : " ",
		 (irq_ptr->siga_flag.output) ? "W" : " ",
		 (irq_ptr->siga_flag.sync) ? "S" : " ",
		 (irq_ptr->siga_flag.sync_after_ai) ? "A" : " ",
		 (irq_ptr->siga_flag.sync_out_after_pci) ? "P" : " ");
	printk(KERN_INFO "%s", s);
}

int qdio_enable_async_operation(struct qdio_output_q *outq)
{
	outq->aobs = kzalloc(sizeof(struct qaob *) * QDIO_MAX_BUFFERS_PER_Q,
			     GFP_ATOMIC);
	if (!outq->aobs) {
		outq->use_cq = 0;
		return -ENOMEM;
	}
	outq->use_cq = 1;
	return 0;
}

void qdio_disable_async_operation(struct qdio_output_q *q)
{
	kfree(q->aobs);
	q->aobs = NULL;
	q->use_cq = 0;
}

int __init qdio_setup_init(void)
{
	int rc;

	qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
					 256, 0, NULL);
	if (!qdio_q_cache)
		return -ENOMEM;

	qdio_aob_cache = kmem_cache_create("qdio_aob",
					sizeof(struct qaob),
					sizeof(struct qaob),
					0,
					NULL);
	if (!qdio_aob_cache) {
		rc = -ENOMEM;
		goto free_qdio_q_cache;
	}

	/* Check for OSA/FCP thin interrupts (bit 67). */
	DBF_EVENT("thinint:%1d",
		  (css_general_characteristics.aif_osa) ? 1 : 0);

	/* Check for QEBSM support in general (bit 58). */
	DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
	rc = 0;
out:
	return rc;
free_qdio_q_cache:
	kmem_cache_destroy(qdio_q_cache);
	goto out;
}

void qdio_setup_exit(void)
{
	kmem_cache_destroy(qdio_aob_cache);
	kmem_cache_destroy(qdio_q_cache);
}
Commit	Line	Data
779e6e1c JG	1	/*
	2	* driver/s390/cio/qdio_setup.c
	3	*
	4	* qdio queue initialization
	5	*
	6	* Copyright (C) IBM Corp. 2008
	7	* Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
	8	*/
	9	#include <linux/kernel.h>
	10	#include <linux/slab.h>
	11	#include <asm/qdio.h>
	12
	13	#include "cio.h"
	14	#include "css.h"
	15	#include "device.h"
	16	#include "ioasm.h"
	17	#include "chsc.h"
	18	#include "qdio.h"
	19	#include "qdio_debug.h"
	20
	21	static struct kmem_cache *qdio_q_cache;
104ea556	22	static struct kmem_cache *qdio_aob_cache;
	23
	24	struct qaob *qdio_allocate_aob()
	25	{
	26	struct qaob *aob;
	27
	28	aob = kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
	29	return aob;
	30	}
	31	EXPORT_SYMBOL_GPL(qdio_allocate_aob);
	32
	33	void qdio_release_aob(struct qaob *aob)
	34	{
	35	kmem_cache_free(qdio_aob_cache, aob);
	36	}
	37	EXPORT_SYMBOL_GPL(qdio_release_aob);
779e6e1c JG	38
	39	/*
	40	* qebsm is only available under 64bit but the adapter sets the feature
	41	* flag anyway, so we manually override it.
	42	*/
	43	static inline int qebsm_possible(void)
	44	{
	45	#ifdef CONFIG_64BIT
	46	return css_general_characteristics.qebsm;
	47	#endif
	48	return 0;
	49	}
	50
	51	/*
	52	* qib_param_field: pointer to 128 bytes or NULL, if no param field
	53	* nr_input_qs: pointer to nr_queues*128 words of data or NULL
	54	*/
	55	static void set_impl_params(struct qdio_irq *irq_ptr,
	56	unsigned int qib_param_field_format,
	57	unsigned char *qib_param_field,
	58	unsigned long *input_slib_elements,
	59	unsigned long *output_slib_elements)
	60	{
	61	struct qdio_q *q;
	62	int i, j;
	63
	64	if (!irq_ptr)
	65	return;
	66
779e6e1c JG	67	irq_ptr->qib.pfmt = qib_param_field_format;
	68	if (qib_param_field)
	69	memcpy(irq_ptr->qib.parm, qib_param_field,
	70	QDIO_MAX_BUFFERS_PER_Q);
	71
	72	if (!input_slib_elements)
	73	goto output;
	74
	75	for_each_input_queue(irq_ptr, q, i) {
	76	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
	77	q->slib->slibe[j].parms =
	78	input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
	79	}
	80	output:
	81	if (!output_slib_elements)
	82	return;
	83
	84	for_each_output_queue(irq_ptr, q, i) {
	85	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
	86	q->slib->slibe[j].parms =
	87	output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
	88	}
	89	}
	90
	91	static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
	92	{
	93	struct qdio_q *q;
	94	int i;
	95
	96	for (i = 0; i < nr_queues; i++) {
	97	q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
	98	if (!q)
	99	return -ENOMEM;
779e6e1c JG	100
	101	q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
	102	if (!q->slib) {
	103	kmem_cache_free(qdio_q_cache, q);
	104	return -ENOMEM;
	105	}
779e6e1c JG	106	irq_ptr_qs[i] = q;
	107	}
	108	return 0;
	109	}
	110
	111	int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
	112	{
	113	int rc;
	114
	115	rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
	116	if (rc)
	117	return rc;
	118	rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
	119	return rc;
	120	}
	121
	122	static void setup_queues_misc(struct qdio_q q, struct qdio_irq irq_ptr,
	123	qdio_handler_t *handler, int i)
	124	{
5382fe11	125	struct slib *slib = q->slib;
779e6e1c	126
5382fe11 JG	127	/* queue must be cleared for qdio_establish */
	128	memset(q, 0, sizeof(*q));
	129	memset(slib, 0, PAGE_SIZE);
	130	q->slib = slib;
779e6e1c JG	131	q->irq_ptr = irq_ptr;
	132	q->mask = 1 << (31 - i);
	133	q->nr = i;
	134	q->handler = handler;
	135	}
	136
	137	static void setup_storage_lists(struct qdio_q q, struct qdio_irq irq_ptr,
22f99347	138	void **sbals_array, int i)
779e6e1c JG	139	{
	140	struct qdio_q *prev;
	141	int j;
	142
22f99347	143	DBF_HEX(&q, sizeof(void *));
779e6e1c JG	144	q->sl = (struct sl )((char )q->slib + PAGE_SIZE / 2);
	145
	146	/* fill in sbal */
	147	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
	148	q->sbal[j] = *sbals_array++;
7883097f	149	BUG_ON((unsigned long)q->sbal[j] & 0xff);
779e6e1c JG	150	}
	151
	152	/* fill in slib */
	153	if (i > 0) {
	154	prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
	155	: irq_ptr->output_qs[i - 1];
	156	prev->slib->nsliba = (unsigned long)q->slib;
	157	}
	158
	159	q->slib->sla = (unsigned long)q->sl;
	160	q->slib->slsba = (unsigned long)&q->slsb.val[0];
	161
	162	/* fill in sl */
	163	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
	164	q->sl->element[j].sbal = (unsigned long)q->sbal[j];
779e6e1c JG	165	}
	166
	167	static void setup_queues(struct qdio_irq *irq_ptr,
	168	struct qdio_initialize *qdio_init)
	169	{
779e6e1c JG	170	struct qdio_q *q;
	171	void **input_sbal_array = qdio_init->input_sbal_addr_array;
	172	void **output_sbal_array = qdio_init->output_sbal_addr_array;
104ea556	173	struct qdio_outbuf_state *output_sbal_state_array =
104ea556	174	qdio_init->output_sbal_state_array;
779e6e1c JG	175	int i;
779e6e1c JG	176
779e6e1c	177	for_each_input_queue(irq_ptr, q, i) {
104ea556	178	DBF_EVENT("inq:%1d", i);
779e6e1c JG	179	setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
	180
	181	q->is_input_q = 1;
104ea556	182	q->u.in.queue_start_poll = qdio_init->queue_start_poll[i];
104ea556	183
22f99347	184	setup_storage_lists(q, irq_ptr, input_sbal_array, i);
779e6e1c JG	185	input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
779e6e1c JG	186
104ea556	187	if (is_thinint_irq(irq_ptr)) {
779e6e1c JG	188	tasklet_init(&q->tasklet, tiqdio_inbound_processing,
779e6e1c JG	189	(unsigned long) q);
104ea556	190	} else {
779e6e1c JG	191	tasklet_init(&q->tasklet, qdio_inbound_processing,
779e6e1c JG	192	(unsigned long) q);
104ea556	193	}
779e6e1c JG	194	}
	195
	196	for_each_output_queue(irq_ptr, q, i) {
22f99347	197	DBF_EVENT("outq:%1d", i);
779e6e1c JG	198	setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
779e6e1c JG	199
104ea556	200	q->u.out.sbal_state = output_sbal_state_array;
	201	output_sbal_state_array += QDIO_MAX_BUFFERS_PER_Q;
	202
779e6e1c	203	q->is_input_q = 0;
3d6c76ff	204	q->u.out.scan_threshold = qdio_init->scan_threshold;
22f99347	205	setup_storage_lists(q, irq_ptr, output_sbal_array, i);
779e6e1c JG	206	output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
	207
	208	tasklet_init(&q->tasklet, qdio_outbound_processing,
	209	(unsigned long) q);
	210	setup_timer(&q->u.out.timer, (void(*)(unsigned long))
	211	&qdio_outbound_timer, (unsigned long)q);
	212	}
	213	}
	214
	215	static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
	216	{
	217	if (qdioac & AC1_SIGA_INPUT_NEEDED)
	218	irq_ptr->siga_flag.input = 1;
	219	if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
	220	irq_ptr->siga_flag.output = 1;
	221	if (qdioac & AC1_SIGA_SYNC_NEEDED)
	222	irq_ptr->siga_flag.sync = 1;
90adac58 JG	223	if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_THININT))
	224	irq_ptr->siga_flag.sync_after_ai = 1;
	225	if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI))
	226	irq_ptr->siga_flag.sync_out_after_pci = 1;
779e6e1c JG	227	}
	228
	229	static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
	230	unsigned char qdioac, unsigned long token)
	231	{
779e6e1c JG	232	if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
	233	goto no_qebsm;
	234	if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) \|\|
	235	(!(qdioac & AC1_SC_QEBSM_ENABLED)))
	236	goto no_qebsm;
	237
	238	irq_ptr->sch_token = token;
	239
22f99347 JG	240	DBF_EVENT("V=V:1");
22f99347 JG	241	DBF_EVENT("%8lx", irq_ptr->sch_token);
779e6e1c JG	242	return;
	243
	244	no_qebsm:
	245	irq_ptr->sch_token = 0;
	246	irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
22f99347	247	DBF_EVENT("noV=V");
779e6e1c JG	248	}
779e6e1c JG	249
bbd50e17 JG	250	/*
	251	* If there is a qdio_irq we use the chsc_page and store the information
	252	* in the qdio_irq, otherwise we copy it to the specified structure.
	253	*/
	254	int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
	255	struct subchannel_id *schid,
	256	struct qdio_ssqd_desc *data)
779e6e1c JG	257	{
	258	struct chsc_ssqd_area *ssqd;
	259	int rc;
	260
22f99347	261	DBF_EVENT("getssqd:%4x", schid->sch_no);
bbd50e17 JG	262	if (irq_ptr != NULL)
	263	ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
	264	else
	265	ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
779e6e1c JG	266	memset(ssqd, 0, PAGE_SIZE);
	267
	268	ssqd->request = (struct chsc_header) {
	269	.length = 0x0010,
	270	.code = 0x0024,
	271	};
bbd50e17 JG	272	ssqd->first_sch = schid->sch_no;
	273	ssqd->last_sch = schid->sch_no;
	274	ssqd->ssid = schid->ssid;
779e6e1c JG	275
	276	if (chsc(ssqd))
	277	return -EIO;
	278	rc = chsc_error_from_response(ssqd->response.code);
	279	if (rc)
	280	return rc;
	281
	282	if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) \|\|
	283	!(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) \|\|
bbd50e17	284	(ssqd->qdio_ssqd.sch != schid->sch_no))
779e6e1c JG	285	return -EINVAL;
779e6e1c JG	286
bbd50e17 JG	287	if (irq_ptr != NULL)
	288	memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
	289	sizeof(struct qdio_ssqd_desc));
	290	else {
	291	memcpy(data, &ssqd->qdio_ssqd,
	292	sizeof(struct qdio_ssqd_desc));
	293	free_page((unsigned long)ssqd);
	294	}
779e6e1c JG	295	return 0;
	296	}
	297
	298	void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
	299	{
	300	unsigned char qdioac;
779e6e1c JG	301	int rc;
779e6e1c JG	302
bbd50e17	303	rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
779e6e1c	304	if (rc) {
22f99347 JG	305	DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
22f99347 JG	306	DBF_ERROR("rc:%x", rc);
779e6e1c JG	307	/* all flags set, worst case */
	308	qdioac = AC1_SIGA_INPUT_NEEDED \| AC1_SIGA_OUTPUT_NEEDED \|
	309	AC1_SIGA_SYNC_NEEDED;
	310	} else
	311	qdioac = irq_ptr->ssqd_desc.qdioac1;
	312
	313	check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
	314	process_ac_flags(irq_ptr, qdioac);
22f99347	315	DBF_EVENT("qdioac:%4x", qdioac);
779e6e1c JG	316	}
	317
	318	void qdio_release_memory(struct qdio_irq *irq_ptr)
	319	{
	320	struct qdio_q *q;
	321	int i;
	322
	323	/*
	324	* Must check queue array manually since irq_ptr->nr_input_queues /
	325	* irq_ptr->nr_input_queues may not yet be set.
	326	*/
	327	for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
	328	q = irq_ptr->input_qs[i];
	329	if (q) {
	330	free_page((unsigned long) q->slib);
	331	kmem_cache_free(qdio_q_cache, q);
	332	}
	333	}
	334	for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
	335	q = irq_ptr->output_qs[i];
	336	if (q) {
104ea556	337	if (q->u.out.use_cq) {
	338	int n;
	339
	340	for (n = 0; n < QDIO_MAX_BUFFERS_PER_Q; ++n) {
	341	struct qaob *aob = q->u.out.aobs[n];
	342	if (aob) {
	343	qdio_release_aob(aob);
	344	q->u.out.aobs[n] = NULL;
	345	}
	346	}
	347
	348	qdio_disable_async_operation(&q->u.out);
	349	}
779e6e1c JG	350	free_page((unsigned long) q->slib);
	351	kmem_cache_free(qdio_q_cache, q);
	352	}
	353	}
3b8e3004	354	free_page((unsigned long) irq_ptr->qdr);
779e6e1c JG	355	free_page(irq_ptr->chsc_page);
	356	free_page((unsigned long) irq_ptr);
	357	}
	358
	359	static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
	360	struct qdio_q **irq_ptr_qs,
	361	int i, int nr)
	362	{
	363	irq_ptr->qdr->qdf0[i + nr].sliba =
	364	(unsigned long)irq_ptr_qs[i]->slib;
	365
	366	irq_ptr->qdr->qdf0[i + nr].sla =
	367	(unsigned long)irq_ptr_qs[i]->sl;
	368
	369	irq_ptr->qdr->qdf0[i + nr].slsba =
	370	(unsigned long)&irq_ptr_qs[i]->slsb.val[0];
	371
d1bf8590 HC	372	irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4;
	373	irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4;
	374	irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4;
	375	irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4;
779e6e1c JG	376	}
	377
	378	static void setup_qdr(struct qdio_irq *irq_ptr,
	379	struct qdio_initialize *qdio_init)
	380	{
	381	int i;
	382
	383	irq_ptr->qdr->qfmt = qdio_init->q_format;
	384	irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
	385	irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
	386	irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
	387	irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
	388	irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
d1bf8590	389	irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;
779e6e1c JG	390
	391	for (i = 0; i < qdio_init->no_input_qs; i++)
	392	__qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);
	393
	394	for (i = 0; i < qdio_init->no_output_qs; i++)
	395	__qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
	396	qdio_init->no_input_qs);
	397	}
	398
	399	static void setup_qib(struct qdio_irq *irq_ptr,
	400	struct qdio_initialize *init_data)
	401	{
	402	if (qebsm_possible())
	403	irq_ptr->qib.rflags \|= QIB_RFLAGS_ENABLE_QEBSM;
	404
dcc18f48 CS	405	irq_ptr->qib.rflags \|= init_data->qib_rflags;
dcc18f48 CS	406
779e6e1c JG	407	irq_ptr->qib.qfmt = init_data->q_format;
	408	if (init_data->no_input_qs)
	409	irq_ptr->qib.isliba =
	410	(unsigned long)(irq_ptr->input_qs[0]->slib);
	411	if (init_data->no_output_qs)
	412	irq_ptr->qib.osliba =
	413	(unsigned long)(irq_ptr->output_qs[0]->slib);
	414	memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
	415	}
	416
	417	int qdio_setup_irq(struct qdio_initialize *init_data)
	418	{
	419	struct ciw *ciw;
	420	struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
	421	int rc;
	422
432ac5e0 JG	423	memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
	424	memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag));
	425	memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
	426	memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
	427	memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));
	428
	429	irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL;
	430	irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0;
	431
779e6e1c JG	432	/* wipes qib.ac, required by ar7063 */
	433	memset(irq_ptr->qdr, 0, sizeof(struct qdr));
	434
	435	irq_ptr->int_parm = init_data->int_parm;
	436	irq_ptr->nr_input_qs = init_data->no_input_qs;
	437	irq_ptr->nr_output_qs = init_data->no_output_qs;
	438
	439	irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
	440	irq_ptr->cdev = init_data->cdev;
	441	setup_queues(irq_ptr, init_data);
	442
	443	setup_qib(irq_ptr, init_data);
	444	qdio_setup_thinint(irq_ptr);
	445	set_impl_params(irq_ptr, init_data->qib_param_field_format,
	446	init_data->qib_param_field,
	447	init_data->input_slib_elements,
	448	init_data->output_slib_elements);
	449
	450	/* fill input and output descriptors */
	451	setup_qdr(irq_ptr, init_data);
	452
	453	/* qdr, qib, sls, slsbs, slibs, sbales are filled now */
	454
	455	/* get qdio commands */
	456	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
	457	if (!ciw) {
22f99347	458	DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
779e6e1c JG	459	rc = -EINVAL;
	460	goto out_err;
	461	}
	462	irq_ptr->equeue = *ciw;
	463
	464	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
	465	if (!ciw) {
22f99347	466	DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
779e6e1c JG	467	rc = -EINVAL;
	468	goto out_err;
	469	}
	470	irq_ptr->aqueue = *ciw;
	471
	472	/* set new interrupt handler */
	473	irq_ptr->orig_handler = init_data->cdev->handler;
	474	init_data->cdev->handler = qdio_int_handler;
	475	return 0;
	476	out_err:
	477	qdio_release_memory(irq_ptr);
	478	return rc;
	479	}
	480
	481	void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
	482	struct ccw_device *cdev)
	483	{
	484	char s[80];
	485
22f99347	486	snprintf(s, 80, "qdio: %s %s on SC %x using "
90adac58	487	"AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s\n",
22f99347 JG	488	dev_name(&cdev->dev),
	489	(irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
	490	((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
	491	irq_ptr->schid.sch_no,
	492	is_thinint_irq(irq_ptr),
	493	(irq_ptr->sch_token) ? 1 : 0,
	494	(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
	495	css_general_characteristics.aif_tdd,
	496	(irq_ptr->siga_flag.input) ? "R" : " ",
	497	(irq_ptr->siga_flag.output) ? "W" : " ",
	498	(irq_ptr->siga_flag.sync) ? "S" : " ",
90adac58 JG	499	(irq_ptr->siga_flag.sync_after_ai) ? "A" : " ",
90adac58 JG	500	(irq_ptr->siga_flag.sync_out_after_pci) ? "P" : " ");
75f62761	501	printk(KERN_INFO "%s", s);
779e6e1c JG	502	}
779e6e1c JG	503
104ea556	504	int qdio_enable_async_operation(struct qdio_output_q *outq)
	505	{
	506	outq->aobs = kzalloc(sizeof(struct qaob ) QDIO_MAX_BUFFERS_PER_Q,
	507	GFP_ATOMIC);
	508	if (!outq->aobs) {
	509	outq->use_cq = 0;
	510	return -ENOMEM;
	511	}
	512	outq->use_cq = 1;
	513	return 0;
	514	}
	515
	516	void qdio_disable_async_operation(struct qdio_output_q *q)
	517	{
	518	kfree(q->aobs);
	519	q->aobs = NULL;
	520	q->use_cq = 0;
	521	}
	522
779e6e1c JG	523	int __init qdio_setup_init(void)
779e6e1c JG	524	{
104ea556	525	int rc;
104ea556	526
779e6e1c JG	527	qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
	528	256, 0, NULL);
	529	if (!qdio_q_cache)
	530	return -ENOMEM;
	531
104ea556	532	qdio_aob_cache = kmem_cache_create("qdio_aob",
	533	sizeof(struct qaob),
	534	sizeof(struct qaob),
	535	0,
	536	NULL);
	537	if (!qdio_aob_cache) {
	538	rc = -ENOMEM;
	539	goto free_qdio_q_cache;
	540	}
	541
779e6e1c	542	/* Check for OSA/FCP thin interrupts (bit 67). */
22f99347 JG	543	DBF_EVENT("thinint:%1d",
22f99347 JG	544	(css_general_characteristics.aif_osa) ? 1 : 0);
779e6e1c JG	545
779e6e1c JG	546	/* Check for QEBSM support in general (bit 58). */
22f99347	547	DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
104ea556	548	rc = 0;
	549	out:
	550	return rc;
	551	free_qdio_q_cache:
	552	kmem_cache_destroy(qdio_q_cache);
	553	goto out;
779e6e1c JG	554	}
779e6e1c JG	555
3f1934bc	556	void qdio_setup_exit(void)
779e6e1c	557	{
104ea556	558	kmem_cache_destroy(qdio_aob_cache);
779e6e1c JG	559	kmem_cache_destroy(qdio_q_cache);
779e6e1c JG	560	}