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1da177e4 LT |
1 | #ifndef __QETH_H__ |
2 | #define __QETH_H__ | |
3 | ||
4 | #include <linux/if.h> | |
5 | #include <linux/if_arp.h> | |
6 | ||
7 | #include <linux/if_tr.h> | |
8 | #include <linux/trdevice.h> | |
9 | #include <linux/etherdevice.h> | |
10 | #include <linux/if_vlan.h> | |
11 | ||
12 | #include <net/ipv6.h> | |
13 | #include <linux/in6.h> | |
14 | #include <net/if_inet6.h> | |
15 | #include <net/addrconf.h> | |
16 | ||
17 | ||
18 | #include <linux/bitops.h> | |
19 | ||
20 | #include <asm/debug.h> | |
21 | #include <asm/qdio.h> | |
22 | #include <asm/ccwdev.h> | |
23 | #include <asm/ccwgroup.h> | |
24 | ||
25 | #include "qeth_mpc.h" | |
26 | ||
f3d242e8 | 27 | #define VERSION_QETH_H "$Revision: 1.142 $" |
1da177e4 LT |
28 | |
29 | #ifdef CONFIG_QETH_IPV6 | |
30 | #define QETH_VERSION_IPV6 ":IPv6" | |
31 | #else | |
32 | #define QETH_VERSION_IPV6 "" | |
33 | #endif | |
34 | #ifdef CONFIG_QETH_VLAN | |
35 | #define QETH_VERSION_VLAN ":VLAN" | |
36 | #else | |
37 | #define QETH_VERSION_VLAN "" | |
38 | #endif | |
39 | ||
40 | /** | |
41 | * Debug Facility stuff | |
42 | */ | |
43 | #define QETH_DBF_SETUP_NAME "qeth_setup" | |
44 | #define QETH_DBF_SETUP_LEN 8 | |
66a464db | 45 | #define QETH_DBF_SETUP_PAGES 8 |
1da177e4 LT |
46 | #define QETH_DBF_SETUP_NR_AREAS 1 |
47 | #define QETH_DBF_SETUP_LEVEL 5 | |
48 | ||
49 | #define QETH_DBF_MISC_NAME "qeth_misc" | |
50 | #define QETH_DBF_MISC_LEN 128 | |
66a464db | 51 | #define QETH_DBF_MISC_PAGES 2 |
1da177e4 LT |
52 | #define QETH_DBF_MISC_NR_AREAS 1 |
53 | #define QETH_DBF_MISC_LEVEL 2 | |
54 | ||
55 | #define QETH_DBF_DATA_NAME "qeth_data" | |
56 | #define QETH_DBF_DATA_LEN 96 | |
66a464db | 57 | #define QETH_DBF_DATA_PAGES 8 |
1da177e4 LT |
58 | #define QETH_DBF_DATA_NR_AREAS 1 |
59 | #define QETH_DBF_DATA_LEVEL 2 | |
60 | ||
61 | #define QETH_DBF_CONTROL_NAME "qeth_control" | |
62 | #define QETH_DBF_CONTROL_LEN 256 | |
66a464db | 63 | #define QETH_DBF_CONTROL_PAGES 8 |
1da177e4 LT |
64 | #define QETH_DBF_CONTROL_NR_AREAS 2 |
65 | #define QETH_DBF_CONTROL_LEVEL 5 | |
66 | ||
67 | #define QETH_DBF_TRACE_NAME "qeth_trace" | |
68 | #define QETH_DBF_TRACE_LEN 8 | |
66a464db | 69 | #define QETH_DBF_TRACE_PAGES 4 |
1da177e4 LT |
70 | #define QETH_DBF_TRACE_NR_AREAS 2 |
71 | #define QETH_DBF_TRACE_LEVEL 3 | |
72 | extern debug_info_t *qeth_dbf_trace; | |
73 | ||
74 | #define QETH_DBF_SENSE_NAME "qeth_sense" | |
75 | #define QETH_DBF_SENSE_LEN 64 | |
66a464db | 76 | #define QETH_DBF_SENSE_PAGES 2 |
1da177e4 LT |
77 | #define QETH_DBF_SENSE_NR_AREAS 1 |
78 | #define QETH_DBF_SENSE_LEVEL 2 | |
79 | ||
80 | #define QETH_DBF_QERR_NAME "qeth_qerr" | |
81 | #define QETH_DBF_QERR_LEN 8 | |
66a464db | 82 | #define QETH_DBF_QERR_PAGES 2 |
1da177e4 LT |
83 | #define QETH_DBF_QERR_NR_AREAS 2 |
84 | #define QETH_DBF_QERR_LEVEL 2 | |
85 | ||
86 | #define QETH_DBF_TEXT(name,level,text) \ | |
87 | do { \ | |
88 | debug_text_event(qeth_dbf_##name,level,text); \ | |
89 | } while (0) | |
90 | ||
91 | #define QETH_DBF_HEX(name,level,addr,len) \ | |
92 | do { \ | |
93 | debug_event(qeth_dbf_##name,level,(void*)(addr),len); \ | |
94 | } while (0) | |
95 | ||
96 | DECLARE_PER_CPU(char[256], qeth_dbf_txt_buf); | |
97 | ||
98 | #define QETH_DBF_TEXT_(name,level,text...) \ | |
99 | do { \ | |
100 | char* dbf_txt_buf = get_cpu_var(qeth_dbf_txt_buf); \ | |
101 | sprintf(dbf_txt_buf, text); \ | |
102 | debug_text_event(qeth_dbf_##name,level,dbf_txt_buf); \ | |
103 | put_cpu_var(qeth_dbf_txt_buf); \ | |
104 | } while (0) | |
105 | ||
106 | #define QETH_DBF_SPRINTF(name,level,text...) \ | |
107 | do { \ | |
108 | debug_sprintf_event(qeth_dbf_trace, level, ##text ); \ | |
109 | debug_sprintf_event(qeth_dbf_trace, level, text ); \ | |
110 | } while (0) | |
111 | ||
112 | /** | |
113 | * some more debug stuff | |
114 | */ | |
115 | #define PRINTK_HEADER "qeth: " | |
116 | ||
117 | #define HEXDUMP16(importance,header,ptr) \ | |
118 | PRINT_##importance(header "%02x %02x %02x %02x %02x %02x %02x %02x " \ | |
119 | "%02x %02x %02x %02x %02x %02x %02x %02x\n", \ | |
120 | *(((char*)ptr)),*(((char*)ptr)+1),*(((char*)ptr)+2), \ | |
121 | *(((char*)ptr)+3),*(((char*)ptr)+4),*(((char*)ptr)+5), \ | |
122 | *(((char*)ptr)+6),*(((char*)ptr)+7),*(((char*)ptr)+8), \ | |
123 | *(((char*)ptr)+9),*(((char*)ptr)+10),*(((char*)ptr)+11), \ | |
124 | *(((char*)ptr)+12),*(((char*)ptr)+13), \ | |
125 | *(((char*)ptr)+14),*(((char*)ptr)+15)); \ | |
126 | PRINT_##importance(header "%02x %02x %02x %02x %02x %02x %02x %02x " \ | |
127 | "%02x %02x %02x %02x %02x %02x %02x %02x\n", \ | |
128 | *(((char*)ptr)+16),*(((char*)ptr)+17), \ | |
129 | *(((char*)ptr)+18),*(((char*)ptr)+19), \ | |
130 | *(((char*)ptr)+20),*(((char*)ptr)+21), \ | |
131 | *(((char*)ptr)+22),*(((char*)ptr)+23), \ | |
132 | *(((char*)ptr)+24),*(((char*)ptr)+25), \ | |
133 | *(((char*)ptr)+26),*(((char*)ptr)+27), \ | |
134 | *(((char*)ptr)+28),*(((char*)ptr)+29), \ | |
135 | *(((char*)ptr)+30),*(((char*)ptr)+31)); | |
136 | ||
137 | static inline void | |
138 | qeth_hex_dump(unsigned char *buf, size_t len) | |
139 | { | |
140 | size_t i; | |
141 | ||
142 | for (i = 0; i < len; i++) { | |
143 | if (i && !(i % 16)) | |
144 | printk("\n"); | |
145 | printk("%02x ", *(buf + i)); | |
146 | } | |
147 | printk("\n"); | |
148 | } | |
149 | ||
150 | #define SENSE_COMMAND_REJECT_BYTE 0 | |
151 | #define SENSE_COMMAND_REJECT_FLAG 0x80 | |
152 | #define SENSE_RESETTING_EVENT_BYTE 1 | |
153 | #define SENSE_RESETTING_EVENT_FLAG 0x80 | |
154 | ||
155 | #define atomic_swap(a,b) xchg((int *)a.counter, b) | |
156 | ||
157 | /* | |
158 | * Common IO related definitions | |
159 | */ | |
160 | extern struct device *qeth_root_dev; | |
161 | extern struct ccw_driver qeth_ccw_driver; | |
162 | extern struct ccwgroup_driver qeth_ccwgroup_driver; | |
163 | ||
164 | #define CARD_RDEV(card) card->read.ccwdev | |
165 | #define CARD_WDEV(card) card->write.ccwdev | |
166 | #define CARD_DDEV(card) card->data.ccwdev | |
167 | #define CARD_BUS_ID(card) card->gdev->dev.bus_id | |
168 | #define CARD_RDEV_ID(card) card->read.ccwdev->dev.bus_id | |
169 | #define CARD_WDEV_ID(card) card->write.ccwdev->dev.bus_id | |
170 | #define CARD_DDEV_ID(card) card->data.ccwdev->dev.bus_id | |
171 | #define CHANNEL_ID(channel) channel->ccwdev->dev.bus_id | |
172 | ||
173 | #define CARD_FROM_CDEV(cdev) (struct qeth_card *) \ | |
174 | ((struct ccwgroup_device *)cdev->dev.driver_data)\ | |
175 | ->dev.driver_data; | |
176 | ||
177 | /** | |
178 | * card stuff | |
179 | */ | |
180 | #ifdef CONFIG_QETH_PERF_STATS | |
181 | struct qeth_perf_stats { | |
182 | unsigned int bufs_rec; | |
183 | unsigned int bufs_sent; | |
184 | ||
185 | unsigned int skbs_sent_pack; | |
186 | unsigned int bufs_sent_pack; | |
187 | ||
188 | unsigned int sc_dp_p; | |
189 | unsigned int sc_p_dp; | |
190 | /* qdio_input_handler: number of times called, time spent in */ | |
191 | __u64 inbound_start_time; | |
192 | unsigned int inbound_cnt; | |
193 | unsigned int inbound_time; | |
194 | /* qeth_send_packet: number of times called, time spent in */ | |
195 | __u64 outbound_start_time; | |
196 | unsigned int outbound_cnt; | |
197 | unsigned int outbound_time; | |
198 | /* qdio_output_handler: number of times called, time spent in */ | |
199 | __u64 outbound_handler_start_time; | |
200 | unsigned int outbound_handler_cnt; | |
201 | unsigned int outbound_handler_time; | |
202 | /* number of calls to and time spent in do_QDIO for inbound queue */ | |
203 | __u64 inbound_do_qdio_start_time; | |
204 | unsigned int inbound_do_qdio_cnt; | |
205 | unsigned int inbound_do_qdio_time; | |
206 | /* number of calls to and time spent in do_QDIO for outbound queues */ | |
207 | __u64 outbound_do_qdio_start_time; | |
208 | unsigned int outbound_do_qdio_cnt; | |
209 | unsigned int outbound_do_qdio_time; | |
210 | /* eddp data */ | |
211 | unsigned int large_send_bytes; | |
212 | unsigned int large_send_cnt; | |
213 | unsigned int sg_skbs_sent; | |
214 | unsigned int sg_frags_sent; | |
215 | }; | |
216 | #endif /* CONFIG_QETH_PERF_STATS */ | |
217 | ||
218 | /* Routing stuff */ | |
219 | struct qeth_routing_info { | |
220 | enum qeth_routing_types type; | |
221 | }; | |
222 | ||
223 | /* IPA stuff */ | |
224 | struct qeth_ipa_info { | |
225 | __u32 supported_funcs; | |
226 | __u32 enabled_funcs; | |
227 | }; | |
228 | ||
229 | static inline int | |
230 | qeth_is_ipa_supported(struct qeth_ipa_info *ipa, enum qeth_ipa_funcs func) | |
231 | { | |
232 | return (ipa->supported_funcs & func); | |
233 | } | |
234 | ||
235 | static inline int | |
236 | qeth_is_ipa_enabled(struct qeth_ipa_info *ipa, enum qeth_ipa_funcs func) | |
237 | { | |
238 | return (ipa->supported_funcs & ipa->enabled_funcs & func); | |
239 | } | |
240 | ||
241 | #define qeth_adp_supported(c,f) \ | |
242 | qeth_is_ipa_supported(&c->options.adp, f) | |
243 | #define qeth_adp_enabled(c,f) \ | |
244 | qeth_is_ipa_enabled(&c->options.adp, f) | |
245 | #define qeth_is_supported(c,f) \ | |
246 | qeth_is_ipa_supported(&c->options.ipa4, f) | |
247 | #define qeth_is_enabled(c,f) \ | |
248 | qeth_is_ipa_enabled(&c->options.ipa4, f) | |
249 | #ifdef CONFIG_QETH_IPV6 | |
250 | #define qeth_is_supported6(c,f) \ | |
251 | qeth_is_ipa_supported(&c->options.ipa6, f) | |
252 | #define qeth_is_enabled6(c,f) \ | |
253 | qeth_is_ipa_enabled(&c->options.ipa6, f) | |
254 | #else /* CONFIG_QETH_IPV6 */ | |
255 | #define qeth_is_supported6(c,f) 0 | |
256 | #define qeth_is_enabled6(c,f) 0 | |
257 | #endif /* CONFIG_QETH_IPV6 */ | |
258 | #define qeth_is_ipafunc_supported(c,prot,f) \ | |
259 | (prot==QETH_PROT_IPV6)? qeth_is_supported6(c,f):qeth_is_supported(c,f) | |
260 | #define qeth_is_ipafunc_enabled(c,prot,f) \ | |
261 | (prot==QETH_PROT_IPV6)? qeth_is_enabled6(c,f):qeth_is_enabled(c,f) | |
262 | ||
263 | ||
264 | #define QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT 0x0101 | |
265 | #define QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT 0x0101 | |
266 | #define QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT 0x4108 | |
267 | #define QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT 0x5108 | |
268 | ||
269 | #define QETH_MODELLIST_ARRAY \ | |
270 | {{0x1731,0x01,0x1732,0x01,QETH_CARD_TYPE_OSAE,1, \ | |
271 | QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT, \ | |
272 | QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT, \ | |
273 | QETH_MAX_QUEUES,0}, \ | |
274 | {0x1731,0x05,0x1732,0x05,QETH_CARD_TYPE_IQD,0, \ | |
275 | QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT, \ | |
276 | QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT, \ | |
277 | QETH_MAX_QUEUES,0x103}, \ | |
500f83ab UB |
278 | {0x1731,0x06,0x1732,0x06,QETH_CARD_TYPE_OSN,0, \ |
279 | QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT, \ | |
280 | QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT, \ | |
281 | QETH_MAX_QUEUES,0}, \ | |
1da177e4 LT |
282 | {0,0,0,0,0,0,0,0,0}} |
283 | ||
284 | #define QETH_REAL_CARD 1 | |
285 | #define QETH_VLAN_CARD 2 | |
286 | #define QETH_BUFSIZE 4096 | |
287 | ||
288 | /** | |
289 | * some more defs | |
290 | */ | |
291 | #define IF_NAME_LEN 16 | |
292 | #define QETH_TX_TIMEOUT 100 * HZ | |
293 | #define QETH_HEADER_SIZE 32 | |
294 | #define MAX_PORTNO 15 | |
e23dd9cd FP |
295 | #define QETH_FAKE_LL_LEN_ETH ETH_HLEN |
296 | #define QETH_FAKE_LL_LEN_TR (sizeof(struct trh_hdr)-TR_MAXRIFLEN+sizeof(struct trllc)) | |
1da177e4 LT |
297 | #define QETH_FAKE_LL_V6_ADDR_POS 24 |
298 | ||
299 | /*IPv6 address autoconfiguration stuff*/ | |
300 | #define UNIQUE_ID_IF_CREATE_ADDR_FAILED 0xfffe | |
301 | #define UNIQUE_ID_NOT_BY_CARD 0x10000 | |
302 | ||
303 | /*****************************************************************************/ | |
304 | /* QDIO queue and buffer handling */ | |
305 | /*****************************************************************************/ | |
306 | #define QETH_MAX_QUEUES 4 | |
307 | #define QETH_IN_BUF_SIZE_DEFAULT 65536 | |
308 | #define QETH_IN_BUF_COUNT_DEFAULT 16 | |
309 | #define QETH_IN_BUF_COUNT_MIN 8 | |
310 | #define QETH_IN_BUF_COUNT_MAX 128 | |
311 | #define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12) | |
312 | #define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \ | |
313 | ((card)->qdio.in_buf_pool.buf_count / 2) | |
314 | ||
315 | /* buffers we have to be behind before we get a PCI */ | |
316 | #define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1) | |
317 | /*enqueued free buffers left before we get a PCI*/ | |
318 | #define QETH_PCI_THRESHOLD_B(card) 0 | |
319 | /*not used unless the microcode gets patched*/ | |
320 | #define QETH_PCI_TIMER_VALUE(card) 3 | |
321 | ||
322 | #define QETH_MIN_INPUT_THRESHOLD 1 | |
323 | #define QETH_MAX_INPUT_THRESHOLD 500 | |
324 | #define QETH_MIN_OUTPUT_THRESHOLD 1 | |
325 | #define QETH_MAX_OUTPUT_THRESHOLD 300 | |
326 | ||
327 | /* priority queing */ | |
328 | #define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING | |
329 | #define QETH_DEFAULT_QUEUE 2 | |
330 | #define QETH_NO_PRIO_QUEUEING 0 | |
331 | #define QETH_PRIO_Q_ING_PREC 1 | |
332 | #define QETH_PRIO_Q_ING_TOS 2 | |
333 | #define IP_TOS_LOWDELAY 0x10 | |
334 | #define IP_TOS_HIGHTHROUGHPUT 0x08 | |
335 | #define IP_TOS_HIGHRELIABILITY 0x04 | |
336 | #define IP_TOS_NOTIMPORTANT 0x02 | |
337 | ||
338 | /* Packing */ | |
339 | #define QETH_LOW_WATERMARK_PACK 2 | |
340 | #define QETH_HIGH_WATERMARK_PACK 5 | |
341 | #define QETH_WATERMARK_PACK_FUZZ 1 | |
342 | ||
343 | #define QETH_IP_HEADER_SIZE 40 | |
344 | ||
345 | struct qeth_hdr_layer3 { | |
346 | __u8 id; | |
347 | __u8 flags; | |
348 | __u16 inbound_checksum; /*TSO:__u16 seqno */ | |
349 | __u32 token; /*TSO: __u32 reserved */ | |
350 | __u16 length; | |
351 | __u8 vlan_prio; | |
352 | __u8 ext_flags; | |
353 | __u16 vlan_id; | |
354 | __u16 frame_offset; | |
355 | __u8 dest_addr[16]; | |
356 | } __attribute__ ((packed)); | |
357 | ||
358 | struct qeth_hdr_layer2 { | |
359 | __u8 id; | |
360 | __u8 flags[3]; | |
361 | __u8 port_no; | |
362 | __u8 hdr_length; | |
363 | __u16 pkt_length; | |
364 | __u16 seq_no; | |
365 | __u16 vlan_id; | |
366 | __u32 reserved; | |
367 | __u8 reserved2[16]; | |
368 | } __attribute__ ((packed)); | |
369 | ||
500f83ab UB |
370 | struct qeth_hdr_osn { |
371 | __u8 id; | |
372 | __u8 reserved; | |
373 | __u16 seq_no; | |
374 | __u16 reserved2; | |
375 | __u16 control_flags; | |
376 | __u16 pdu_length; | |
377 | __u8 reserved3[18]; | |
378 | __u32 ccid; | |
379 | } __attribute__ ((packed)); | |
380 | ||
1da177e4 LT |
381 | struct qeth_hdr { |
382 | union { | |
383 | struct qeth_hdr_layer2 l2; | |
384 | struct qeth_hdr_layer3 l3; | |
500f83ab | 385 | struct qeth_hdr_osn osn; |
1da177e4 LT |
386 | } hdr; |
387 | } __attribute__ ((packed)); | |
388 | ||
05e08a2a FP |
389 | /*TCP Segmentation Offload header*/ |
390 | struct qeth_hdr_ext_tso { | |
391 | __u16 hdr_tot_len; | |
392 | __u8 imb_hdr_no; | |
393 | __u8 reserved; | |
394 | __u8 hdr_type; | |
395 | __u8 hdr_version; | |
396 | __u16 hdr_len; | |
397 | __u32 payload_len; | |
398 | __u16 mss; | |
399 | __u16 dg_hdr_len; | |
400 | __u8 padding[16]; | |
401 | } __attribute__ ((packed)); | |
402 | ||
403 | struct qeth_hdr_tso { | |
404 | struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/ | |
405 | struct qeth_hdr_ext_tso ext; | |
406 | } __attribute__ ((packed)); | |
407 | ||
1da177e4 LT |
408 | |
409 | /* flags for qeth_hdr.flags */ | |
410 | #define QETH_HDR_PASSTHRU 0x10 | |
411 | #define QETH_HDR_IPV6 0x80 | |
412 | #define QETH_HDR_CAST_MASK 0x07 | |
413 | enum qeth_cast_flags { | |
414 | QETH_CAST_UNICAST = 0x06, | |
415 | QETH_CAST_MULTICAST = 0x04, | |
416 | QETH_CAST_BROADCAST = 0x05, | |
417 | QETH_CAST_ANYCAST = 0x07, | |
418 | QETH_CAST_NOCAST = 0x00, | |
419 | }; | |
420 | ||
421 | enum qeth_layer2_frame_flags { | |
422 | QETH_LAYER2_FLAG_MULTICAST = 0x01, | |
423 | QETH_LAYER2_FLAG_BROADCAST = 0x02, | |
424 | QETH_LAYER2_FLAG_UNICAST = 0x04, | |
425 | QETH_LAYER2_FLAG_VLAN = 0x10, | |
426 | }; | |
427 | ||
428 | enum qeth_header_ids { | |
429 | QETH_HEADER_TYPE_LAYER3 = 0x01, | |
430 | QETH_HEADER_TYPE_LAYER2 = 0x02, | |
431 | QETH_HEADER_TYPE_TSO = 0x03, | |
500f83ab | 432 | QETH_HEADER_TYPE_OSN = 0x04, |
1da177e4 LT |
433 | }; |
434 | /* flags for qeth_hdr.ext_flags */ | |
435 | #define QETH_HDR_EXT_VLAN_FRAME 0x01 | |
436 | #define QETH_HDR_EXT_TOKEN_ID 0x02 | |
437 | #define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04 | |
438 | #define QETH_HDR_EXT_SRC_MAC_ADDR 0x08 | |
439 | #define QETH_HDR_EXT_CSUM_HDR_REQ 0x10 | |
440 | #define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20 | |
441 | #define QETH_HDR_EXT_UDP_TSO 0x40 /*bit off for TCP*/ | |
442 | ||
443 | static inline int | |
444 | qeth_is_last_sbale(struct qdio_buffer_element *sbale) | |
445 | { | |
446 | return (sbale->flags & SBAL_FLAGS_LAST_ENTRY); | |
447 | } | |
448 | ||
449 | enum qeth_qdio_buffer_states { | |
450 | /* | |
451 | * inbound: read out by driver; owned by hardware in order to be filled | |
452 | * outbound: owned by driver in order to be filled | |
453 | */ | |
454 | QETH_QDIO_BUF_EMPTY, | |
455 | /* | |
456 | * inbound: filled by hardware; owned by driver in order to be read out | |
457 | * outbound: filled by driver; owned by hardware in order to be sent | |
458 | */ | |
459 | QETH_QDIO_BUF_PRIMED, | |
460 | }; | |
461 | ||
462 | enum qeth_qdio_info_states { | |
463 | QETH_QDIO_UNINITIALIZED, | |
464 | QETH_QDIO_ALLOCATED, | |
465 | QETH_QDIO_ESTABLISHED, | |
466 | }; | |
467 | ||
468 | struct qeth_buffer_pool_entry { | |
469 | struct list_head list; | |
470 | struct list_head init_list; | |
471 | void *elements[QDIO_MAX_ELEMENTS_PER_BUFFER]; | |
472 | }; | |
473 | ||
474 | struct qeth_qdio_buffer_pool { | |
475 | struct list_head entry_list; | |
476 | int buf_count; | |
477 | }; | |
478 | ||
479 | struct qeth_qdio_buffer { | |
480 | struct qdio_buffer *buffer; | |
481 | volatile enum qeth_qdio_buffer_states state; | |
482 | /* the buffer pool entry currently associated to this buffer */ | |
483 | struct qeth_buffer_pool_entry *pool_entry; | |
484 | }; | |
485 | ||
486 | struct qeth_qdio_q { | |
487 | struct qdio_buffer qdio_bufs[QDIO_MAX_BUFFERS_PER_Q]; | |
488 | struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q]; | |
489 | /* | |
490 | * buf_to_init means "buffer must be initialized by driver and must | |
491 | * be made available for hardware" -> state is set to EMPTY | |
492 | */ | |
493 | volatile int next_buf_to_init; | |
494 | } __attribute__ ((aligned(256))); | |
495 | ||
496 | /* possible types of qeth large_send support */ | |
497 | enum qeth_large_send_types { | |
498 | QETH_LARGE_SEND_NO, | |
499 | QETH_LARGE_SEND_EDDP, | |
500 | QETH_LARGE_SEND_TSO, | |
501 | }; | |
502 | ||
503 | struct qeth_qdio_out_buffer { | |
504 | struct qdio_buffer *buffer; | |
505 | atomic_t state; | |
506 | volatile int next_element_to_fill; | |
507 | struct sk_buff_head skb_list; | |
508 | struct list_head ctx_list; | |
509 | }; | |
510 | ||
511 | struct qeth_card; | |
512 | ||
513 | enum qeth_out_q_states { | |
514 | QETH_OUT_Q_UNLOCKED, | |
515 | QETH_OUT_Q_LOCKED, | |
516 | QETH_OUT_Q_LOCKED_FLUSH, | |
517 | }; | |
518 | ||
519 | struct qeth_qdio_out_q { | |
520 | struct qdio_buffer qdio_bufs[QDIO_MAX_BUFFERS_PER_Q]; | |
521 | struct qeth_qdio_out_buffer bufs[QDIO_MAX_BUFFERS_PER_Q]; | |
522 | int queue_no; | |
523 | struct qeth_card *card; | |
524 | atomic_t state; | |
525 | volatile int do_pack; | |
526 | /* | |
527 | * index of buffer to be filled by driver; state EMPTY or PACKING | |
528 | */ | |
529 | volatile int next_buf_to_fill; | |
530 | /* | |
531 | * number of buffers that are currently filled (PRIMED) | |
532 | * -> these buffers are hardware-owned | |
533 | */ | |
534 | atomic_t used_buffers; | |
535 | /* indicates whether PCI flag must be set (or if one is outstanding) */ | |
536 | atomic_t set_pci_flags_count; | |
537 | } __attribute__ ((aligned(256))); | |
538 | ||
539 | struct qeth_qdio_info { | |
540 | volatile enum qeth_qdio_info_states state; | |
541 | /* input */ | |
542 | struct qeth_qdio_q *in_q; | |
543 | struct qeth_qdio_buffer_pool in_buf_pool; | |
544 | struct qeth_qdio_buffer_pool init_pool; | |
545 | int in_buf_size; | |
546 | ||
547 | /* output */ | |
548 | int no_out_queues; | |
549 | struct qeth_qdio_out_q **out_qs; | |
550 | ||
551 | /* priority queueing */ | |
552 | int do_prio_queueing; | |
553 | int default_out_queue; | |
554 | }; | |
555 | ||
556 | enum qeth_send_errors { | |
557 | QETH_SEND_ERROR_NONE, | |
558 | QETH_SEND_ERROR_LINK_FAILURE, | |
559 | QETH_SEND_ERROR_RETRY, | |
560 | QETH_SEND_ERROR_KICK_IT, | |
561 | }; | |
562 | ||
563 | #define QETH_ETH_MAC_V4 0x0100 /* like v4 */ | |
564 | #define QETH_ETH_MAC_V6 0x3333 /* like v6 */ | |
565 | /* tr mc mac is longer, but that will be enough to detect mc frames */ | |
566 | #define QETH_TR_MAC_NC 0xc000 /* non-canonical */ | |
567 | #define QETH_TR_MAC_C 0x0300 /* canonical */ | |
568 | ||
569 | #define DEFAULT_ADD_HHLEN 0 | |
570 | #define MAX_ADD_HHLEN 1024 | |
571 | ||
572 | /** | |
573 | * buffer stuff for read channel | |
574 | */ | |
575 | #define QETH_CMD_BUFFER_NO 8 | |
576 | ||
577 | /** | |
578 | * channel state machine | |
579 | */ | |
580 | enum qeth_channel_states { | |
581 | CH_STATE_UP, | |
582 | CH_STATE_DOWN, | |
583 | CH_STATE_ACTIVATING, | |
584 | CH_STATE_HALTED, | |
585 | CH_STATE_STOPPED, | |
586 | }; | |
587 | /** | |
588 | * card state machine | |
589 | */ | |
590 | enum qeth_card_states { | |
591 | CARD_STATE_DOWN, | |
592 | CARD_STATE_HARDSETUP, | |
593 | CARD_STATE_SOFTSETUP, | |
594 | CARD_STATE_UP, | |
595 | CARD_STATE_RECOVER, | |
596 | }; | |
597 | ||
598 | /** | |
599 | * Protocol versions | |
600 | */ | |
601 | enum qeth_prot_versions { | |
1da177e4 LT |
602 | QETH_PROT_IPV4 = 0x0004, |
603 | QETH_PROT_IPV6 = 0x0006, | |
604 | }; | |
605 | ||
606 | enum qeth_ip_types { | |
607 | QETH_IP_TYPE_NORMAL, | |
608 | QETH_IP_TYPE_VIPA, | |
609 | QETH_IP_TYPE_RXIP, | |
610 | QETH_IP_TYPE_DEL_ALL_MC, | |
611 | }; | |
612 | ||
613 | enum qeth_cmd_buffer_state { | |
614 | BUF_STATE_FREE, | |
615 | BUF_STATE_LOCKED, | |
616 | BUF_STATE_PROCESSED, | |
617 | }; | |
618 | /** | |
619 | * IP address and multicast list | |
620 | */ | |
621 | struct qeth_ipaddr { | |
622 | struct list_head entry; | |
623 | enum qeth_ip_types type; | |
624 | enum qeth_ipa_setdelip_flags set_flags; | |
625 | enum qeth_ipa_setdelip_flags del_flags; | |
626 | int is_multicast; | |
627 | volatile int users; | |
628 | enum qeth_prot_versions proto; | |
629 | unsigned char mac[OSA_ADDR_LEN]; | |
630 | union { | |
631 | struct { | |
632 | unsigned int addr; | |
633 | unsigned int mask; | |
634 | } a4; | |
635 | struct { | |
636 | struct in6_addr addr; | |
637 | unsigned int pfxlen; | |
638 | } a6; | |
639 | } u; | |
640 | }; | |
641 | ||
642 | struct qeth_ipato_entry { | |
643 | struct list_head entry; | |
644 | enum qeth_prot_versions proto; | |
645 | char addr[16]; | |
646 | int mask_bits; | |
647 | }; | |
648 | ||
649 | struct qeth_ipato { | |
650 | int enabled; | |
651 | int invert4; | |
652 | int invert6; | |
653 | struct list_head entries; | |
654 | }; | |
655 | ||
656 | struct qeth_channel; | |
657 | ||
658 | struct qeth_cmd_buffer { | |
659 | enum qeth_cmd_buffer_state state; | |
660 | struct qeth_channel *channel; | |
661 | unsigned char *data; | |
662 | int rc; | |
663 | void (*callback) (struct qeth_channel *, struct qeth_cmd_buffer *); | |
664 | }; | |
665 | ||
666 | ||
667 | /** | |
668 | * definition of a qeth channel, used for read and write | |
669 | */ | |
670 | struct qeth_channel { | |
671 | enum qeth_channel_states state; | |
672 | struct ccw1 ccw; | |
673 | spinlock_t iob_lock; | |
674 | wait_queue_head_t wait_q; | |
675 | struct tasklet_struct irq_tasklet; | |
676 | struct ccw_device *ccwdev; | |
677 | /*command buffer for control data*/ | |
678 | struct qeth_cmd_buffer iob[QETH_CMD_BUFFER_NO]; | |
679 | atomic_t irq_pending; | |
680 | volatile int io_buf_no; | |
681 | volatile int buf_no; | |
682 | }; | |
683 | ||
684 | /** | |
685 | * OSA card related definitions | |
686 | */ | |
687 | struct qeth_token { | |
688 | __u32 issuer_rm_w; | |
689 | __u32 issuer_rm_r; | |
690 | __u32 cm_filter_w; | |
691 | __u32 cm_filter_r; | |
692 | __u32 cm_connection_w; | |
693 | __u32 cm_connection_r; | |
694 | __u32 ulp_filter_w; | |
695 | __u32 ulp_filter_r; | |
696 | __u32 ulp_connection_w; | |
697 | __u32 ulp_connection_r; | |
698 | }; | |
699 | ||
700 | struct qeth_seqno { | |
701 | __u32 trans_hdr; | |
702 | __u32 pdu_hdr; | |
703 | __u32 pdu_hdr_ack; | |
704 | __u16 ipa; | |
9123e0d7 | 705 | __u32 pkt_seqno; |
1da177e4 LT |
706 | }; |
707 | ||
708 | struct qeth_reply { | |
709 | struct list_head list; | |
710 | wait_queue_head_t wait_q; | |
711 | int (*callback)(struct qeth_card *,struct qeth_reply *,unsigned long); | |
712 | u32 seqno; | |
713 | unsigned long offset; | |
714 | int received; | |
715 | int rc; | |
716 | void *param; | |
717 | struct qeth_card *card; | |
718 | atomic_t refcnt; | |
719 | }; | |
720 | ||
721 | #define QETH_BROADCAST_WITH_ECHO 1 | |
722 | #define QETH_BROADCAST_WITHOUT_ECHO 2 | |
723 | ||
724 | struct qeth_card_blkt { | |
725 | int time_total; | |
726 | int inter_packet; | |
727 | int inter_packet_jumbo; | |
728 | }; | |
729 | ||
730 | ||
731 | ||
732 | struct qeth_card_info { | |
733 | unsigned short unit_addr2; | |
734 | unsigned short cula; | |
735 | unsigned short chpid; | |
736 | __u16 func_level; | |
737 | char mcl_level[QETH_MCL_LENGTH + 1]; | |
738 | int guestlan; | |
739 | int layer2_mac_registered; | |
740 | int portname_required; | |
741 | int portno; | |
742 | char portname[9]; | |
743 | enum qeth_card_types type; | |
744 | enum qeth_link_types link_type; | |
745 | int is_multicast_different; | |
746 | int initial_mtu; | |
747 | int max_mtu; | |
748 | int broadcast_capable; | |
749 | int unique_id; | |
750 | struct qeth_card_blkt blkt; | |
751 | __u32 csum_mask; | |
752 | }; | |
753 | ||
754 | struct qeth_card_options { | |
755 | struct qeth_routing_info route4; | |
756 | struct qeth_ipa_info ipa4; | |
757 | struct qeth_ipa_info adp; /*Adapter parameters*/ | |
758 | #ifdef CONFIG_QETH_IPV6 | |
759 | struct qeth_routing_info route6; | |
760 | struct qeth_ipa_info ipa6; | |
761 | #endif /* QETH_IPV6 */ | |
762 | enum qeth_checksum_types checksum_type; | |
763 | int broadcast_mode; | |
764 | int macaddr_mode; | |
765 | int fake_broadcast; | |
766 | int add_hhlen; | |
767 | int fake_ll; | |
768 | int layer2; | |
769 | enum qeth_large_send_types large_send; | |
770 | }; | |
771 | ||
772 | /* | |
773 | * thread bits for qeth_card thread masks | |
774 | */ | |
775 | enum qeth_threads { | |
776 | QETH_SET_IP_THREAD = 1, | |
777 | QETH_RECOVER_THREAD = 2, | |
778 | }; | |
779 | ||
500f83ab UB |
780 | struct qeth_osn_info { |
781 | int (*assist_cb)(struct net_device *dev, void *data); | |
782 | int (*data_cb)(struct sk_buff *skb); | |
783 | }; | |
784 | ||
1da177e4 LT |
785 | struct qeth_card { |
786 | struct list_head list; | |
787 | enum qeth_card_states state; | |
788 | int lan_online; | |
789 | spinlock_t lock; | |
790 | /*hardware and sysfs stuff*/ | |
791 | struct ccwgroup_device *gdev; | |
792 | struct qeth_channel read; | |
793 | struct qeth_channel write; | |
794 | struct qeth_channel data; | |
795 | ||
796 | struct net_device *dev; | |
797 | struct net_device_stats stats; | |
798 | ||
799 | struct qeth_card_info info; | |
800 | struct qeth_token token; | |
801 | struct qeth_seqno seqno; | |
802 | struct qeth_card_options options; | |
803 | ||
804 | wait_queue_head_t wait_q; | |
805 | #ifdef CONFIG_QETH_VLAN | |
806 | spinlock_t vlanlock; | |
807 | struct vlan_group *vlangrp; | |
808 | #endif | |
809 | struct work_struct kernel_thread_starter; | |
810 | spinlock_t thread_mask_lock; | |
811 | volatile unsigned long thread_start_mask; | |
812 | volatile unsigned long thread_allowed_mask; | |
813 | volatile unsigned long thread_running_mask; | |
814 | spinlock_t ip_lock; | |
815 | struct list_head ip_list; | |
816 | struct list_head *ip_tbd_list; | |
817 | struct qeth_ipato ipato; | |
818 | struct list_head cmd_waiter_list; | |
819 | /* QDIO buffer handling */ | |
820 | struct qeth_qdio_info qdio; | |
821 | #ifdef CONFIG_QETH_PERF_STATS | |
822 | struct qeth_perf_stats perf_stats; | |
823 | #endif /* CONFIG_QETH_PERF_STATS */ | |
824 | int use_hard_stop; | |
825 | int (*orig_hard_header)(struct sk_buff *,struct net_device *, | |
826 | unsigned short,void *,void *,unsigned); | |
500f83ab | 827 | struct qeth_osn_info osn_info; |
1da177e4 LT |
828 | }; |
829 | ||
830 | struct qeth_card_list_struct { | |
831 | struct list_head list; | |
832 | rwlock_t rwlock; | |
833 | }; | |
834 | ||
835 | extern struct qeth_card_list_struct qeth_card_list; | |
836 | ||
837 | /*notifier list */ | |
838 | struct qeth_notify_list_struct { | |
839 | struct list_head list; | |
840 | struct task_struct *task; | |
841 | int signum; | |
842 | }; | |
843 | extern spinlock_t qeth_notify_lock; | |
844 | extern struct list_head qeth_notify_list; | |
845 | ||
846 | /*some helper functions*/ | |
847 | ||
848 | #define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "") | |
849 | ||
77933d72 | 850 | static inline __u8 |
1da177e4 LT |
851 | qeth_get_ipa_adp_type(enum qeth_link_types link_type) |
852 | { | |
853 | switch (link_type) { | |
854 | case QETH_LINK_TYPE_HSTR: | |
855 | return 2; | |
856 | default: | |
857 | return 1; | |
858 | } | |
859 | } | |
860 | ||
77933d72 | 861 | static inline int |
1da177e4 LT |
862 | qeth_realloc_headroom(struct qeth_card *card, struct sk_buff **skb, int size) |
863 | { | |
864 | struct sk_buff *new_skb = NULL; | |
865 | ||
866 | if (skb_headroom(*skb) < size){ | |
867 | new_skb = skb_realloc_headroom(*skb, size); | |
868 | if (!new_skb) { | |
869 | PRINT_ERR("qeth_prepare_skb: could " | |
870 | "not realloc headroom for qeth_hdr " | |
871 | "on interface %s", QETH_CARD_IFNAME(card)); | |
872 | return -ENOMEM; | |
873 | } | |
9123e0d7 | 874 | kfree_skb(*skb); |
1da177e4 LT |
875 | *skb = new_skb; |
876 | } | |
877 | return 0; | |
878 | } | |
77933d72 | 879 | |
1da177e4 LT |
880 | static inline struct sk_buff * |
881 | qeth_pskb_unshare(struct sk_buff *skb, int pri) | |
882 | { | |
883 | struct sk_buff *nskb; | |
884 | if (!skb_cloned(skb)) | |
885 | return skb; | |
886 | nskb = skb_copy(skb, pri); | |
887 | kfree_skb(skb); /* free our shared copy */ | |
888 | return nskb; | |
889 | } | |
890 | ||
77933d72 | 891 | static inline void * |
1da177e4 LT |
892 | qeth_push_skb(struct qeth_card *card, struct sk_buff **skb, int size) |
893 | { | |
894 | void *hdr; | |
895 | ||
896 | hdr = (void *) skb_push(*skb, size); | |
897 | /* | |
898 | * sanity check, the Linux memory allocation scheme should | |
899 | * never present us cases like this one (the qdio header size plus | |
900 | * the first 40 bytes of the paket cross a 4k boundary) | |
901 | */ | |
902 | if ((((unsigned long) hdr) & (~(PAGE_SIZE - 1))) != | |
903 | (((unsigned long) hdr + size + | |
904 | QETH_IP_HEADER_SIZE) & (~(PAGE_SIZE - 1)))) { | |
905 | PRINT_ERR("qeth_prepare_skb: misaligned " | |
906 | "packet on interface %s. Discarded.", | |
907 | QETH_CARD_IFNAME(card)); | |
908 | return NULL; | |
909 | } | |
910 | return hdr; | |
911 | } | |
912 | ||
d801145d | 913 | |
77933d72 | 914 | static inline int |
1da177e4 LT |
915 | qeth_get_hlen(__u8 link_type) |
916 | { | |
917 | #ifdef CONFIG_QETH_IPV6 | |
918 | switch (link_type) { | |
919 | case QETH_LINK_TYPE_HSTR: | |
920 | case QETH_LINK_TYPE_LANE_TR: | |
05e08a2a | 921 | return sizeof(struct qeth_hdr_tso) + TR_HLEN; |
1da177e4 LT |
922 | default: |
923 | #ifdef CONFIG_QETH_VLAN | |
05e08a2a | 924 | return sizeof(struct qeth_hdr_tso) + VLAN_ETH_HLEN; |
1da177e4 | 925 | #else |
05e08a2a | 926 | return sizeof(struct qeth_hdr_tso) + ETH_HLEN; |
1da177e4 LT |
927 | #endif |
928 | } | |
929 | #else /* CONFIG_QETH_IPV6 */ | |
930 | #ifdef CONFIG_QETH_VLAN | |
05e08a2a | 931 | return sizeof(struct qeth_hdr_tso) + VLAN_HLEN; |
1da177e4 | 932 | #else |
05e08a2a | 933 | return sizeof(struct qeth_hdr_tso); |
1da177e4 LT |
934 | #endif |
935 | #endif /* CONFIG_QETH_IPV6 */ | |
936 | } | |
937 | ||
77933d72 | 938 | static inline unsigned short |
1da177e4 LT |
939 | qeth_get_netdev_flags(struct qeth_card *card) |
940 | { | |
500f83ab UB |
941 | if (card->options.layer2 && |
942 | (card->info.type == QETH_CARD_TYPE_OSAE)) | |
1da177e4 LT |
943 | return 0; |
944 | switch (card->info.type) { | |
945 | case QETH_CARD_TYPE_IQD: | |
500f83ab | 946 | case QETH_CARD_TYPE_OSN: |
1da177e4 LT |
947 | return IFF_NOARP; |
948 | #ifdef CONFIG_QETH_IPV6 | |
949 | default: | |
950 | return 0; | |
951 | #else | |
952 | default: | |
953 | return IFF_NOARP; | |
954 | #endif | |
955 | } | |
956 | } | |
957 | ||
77933d72 | 958 | static inline int |
1da177e4 LT |
959 | qeth_get_initial_mtu_for_card(struct qeth_card * card) |
960 | { | |
961 | switch (card->info.type) { | |
962 | case QETH_CARD_TYPE_UNKNOWN: | |
963 | return 1500; | |
964 | case QETH_CARD_TYPE_IQD: | |
965 | return card->info.max_mtu; | |
966 | case QETH_CARD_TYPE_OSAE: | |
967 | switch (card->info.link_type) { | |
968 | case QETH_LINK_TYPE_HSTR: | |
969 | case QETH_LINK_TYPE_LANE_TR: | |
970 | return 2000; | |
971 | default: | |
972 | return 1492; | |
973 | } | |
974 | default: | |
975 | return 1500; | |
976 | } | |
977 | } | |
978 | ||
77933d72 | 979 | static inline int |
1da177e4 LT |
980 | qeth_get_max_mtu_for_card(int cardtype) |
981 | { | |
982 | switch (cardtype) { | |
500f83ab | 983 | |
1da177e4 | 984 | case QETH_CARD_TYPE_UNKNOWN: |
1da177e4 | 985 | case QETH_CARD_TYPE_OSAE: |
500f83ab | 986 | case QETH_CARD_TYPE_OSN: |
1da177e4 LT |
987 | return 61440; |
988 | case QETH_CARD_TYPE_IQD: | |
989 | return 57344; | |
990 | default: | |
991 | return 1500; | |
992 | } | |
993 | } | |
994 | ||
77933d72 | 995 | static inline int |
1da177e4 LT |
996 | qeth_get_mtu_out_of_mpc(int cardtype) |
997 | { | |
998 | switch (cardtype) { | |
999 | case QETH_CARD_TYPE_IQD: | |
1000 | return 1; | |
1001 | default: | |
1002 | return 0; | |
1003 | } | |
1004 | } | |
1005 | ||
77933d72 | 1006 | static inline int |
1da177e4 LT |
1007 | qeth_get_mtu_outof_framesize(int framesize) |
1008 | { | |
1009 | switch (framesize) { | |
1010 | case 0x4000: | |
1011 | return 8192; | |
1012 | case 0x6000: | |
1013 | return 16384; | |
1014 | case 0xa000: | |
1015 | return 32768; | |
1016 | case 0xffff: | |
1017 | return 57344; | |
1018 | default: | |
1019 | return 0; | |
1020 | } | |
1021 | } | |
1022 | ||
77933d72 | 1023 | static inline int |
1da177e4 LT |
1024 | qeth_mtu_is_valid(struct qeth_card * card, int mtu) |
1025 | { | |
1026 | switch (card->info.type) { | |
1027 | case QETH_CARD_TYPE_OSAE: | |
1028 | return ((mtu >= 576) && (mtu <= 61440)); | |
1029 | case QETH_CARD_TYPE_IQD: | |
1030 | return ((mtu >= 576) && | |
1031 | (mtu <= card->info.max_mtu + 4096 - 32)); | |
500f83ab | 1032 | case QETH_CARD_TYPE_OSN: |
1da177e4 LT |
1033 | case QETH_CARD_TYPE_UNKNOWN: |
1034 | default: | |
1035 | return 1; | |
1036 | } | |
1037 | } | |
1038 | ||
77933d72 | 1039 | static inline int |
1da177e4 LT |
1040 | qeth_get_arphdr_type(int cardtype, int linktype) |
1041 | { | |
1042 | switch (cardtype) { | |
1043 | case QETH_CARD_TYPE_OSAE: | |
500f83ab | 1044 | case QETH_CARD_TYPE_OSN: |
1da177e4 LT |
1045 | switch (linktype) { |
1046 | case QETH_LINK_TYPE_LANE_TR: | |
1047 | case QETH_LINK_TYPE_HSTR: | |
1048 | return ARPHRD_IEEE802_TR; | |
1049 | default: | |
1050 | return ARPHRD_ETHER; | |
1051 | } | |
1052 | case QETH_CARD_TYPE_IQD: | |
1053 | default: | |
1054 | return ARPHRD_ETHER; | |
1055 | } | |
1056 | } | |
1057 | ||
1058 | #ifdef CONFIG_QETH_PERF_STATS | |
77933d72 | 1059 | static inline int |
1da177e4 LT |
1060 | qeth_get_micros(void) |
1061 | { | |
1062 | return (int) (get_clock() >> 12); | |
1063 | } | |
1064 | #endif | |
1065 | ||
1066 | static inline int | |
1067 | qeth_get_qdio_q_format(struct qeth_card *card) | |
1068 | { | |
1069 | switch (card->info.type) { | |
1070 | case QETH_CARD_TYPE_IQD: | |
1071 | return 2; | |
1072 | default: | |
1073 | return 0; | |
1074 | } | |
1075 | } | |
1076 | ||
1077 | static inline void | |
1078 | qeth_ipaddr4_to_string(const __u8 *addr, char *buf) | |
1079 | { | |
1080 | sprintf(buf, "%i.%i.%i.%i", addr[0], addr[1], addr[2], addr[3]); | |
1081 | } | |
1082 | ||
1083 | static inline int | |
1084 | qeth_string_to_ipaddr4(const char *buf, __u8 *addr) | |
1085 | { | |
1086 | const char *start, *end; | |
1087 | char abuf[4]; | |
1088 | char *tmp; | |
1089 | int len; | |
1090 | int i; | |
1091 | ||
1092 | start = buf; | |
1093 | for (i = 0; i < 3; i++) { | |
1094 | if (!(end = strchr(start, '.'))) | |
1095 | return -EINVAL; | |
1096 | len = end - start; | |
1097 | memset(abuf, 0, 4); | |
1098 | strncpy(abuf, start, len); | |
1099 | addr[i] = simple_strtoul(abuf, &tmp, 10); | |
1100 | start = end + 1; | |
1101 | } | |
1102 | memset(abuf, 0, 4); | |
1103 | strcpy(abuf, start); | |
1104 | addr[3] = simple_strtoul(abuf, &tmp, 10); | |
1105 | return 0; | |
1106 | } | |
1107 | ||
1108 | static inline void | |
1109 | qeth_ipaddr6_to_string(const __u8 *addr, char *buf) | |
1110 | { | |
1111 | sprintf(buf, "%02x%02x:%02x%02x:%02x%02x:%02x%02x" | |
1112 | ":%02x%02x:%02x%02x:%02x%02x:%02x%02x", | |
1113 | addr[0], addr[1], addr[2], addr[3], | |
1114 | addr[4], addr[5], addr[6], addr[7], | |
1115 | addr[8], addr[9], addr[10], addr[11], | |
1116 | addr[12], addr[13], addr[14], addr[15]); | |
1117 | } | |
1118 | ||
1119 | static inline int | |
1120 | qeth_string_to_ipaddr6(const char *buf, __u8 *addr) | |
1121 | { | |
1122 | const char *start, *end; | |
1123 | u16 *tmp_addr; | |
1124 | char abuf[5]; | |
1125 | char *tmp; | |
1126 | int len; | |
1127 | int i; | |
1128 | ||
1129 | tmp_addr = (u16 *)addr; | |
1130 | start = buf; | |
1131 | for (i = 0; i < 7; i++) { | |
1132 | if (!(end = strchr(start, ':'))) | |
1133 | return -EINVAL; | |
1134 | len = end - start; | |
1135 | memset(abuf, 0, 5); | |
1136 | strncpy(abuf, start, len); | |
1137 | tmp_addr[i] = simple_strtoul(abuf, &tmp, 16); | |
1138 | start = end + 1; | |
1139 | } | |
1140 | memset(abuf, 0, 5); | |
1141 | strcpy(abuf, start); | |
1142 | tmp_addr[7] = simple_strtoul(abuf, &tmp, 16); | |
1143 | return 0; | |
1144 | } | |
1145 | ||
1146 | static inline void | |
1147 | qeth_ipaddr_to_string(enum qeth_prot_versions proto, const __u8 *addr, | |
1148 | char *buf) | |
1149 | { | |
1150 | if (proto == QETH_PROT_IPV4) | |
1151 | return qeth_ipaddr4_to_string(addr, buf); | |
1152 | else if (proto == QETH_PROT_IPV6) | |
1153 | return qeth_ipaddr6_to_string(addr, buf); | |
1154 | } | |
1155 | ||
1156 | static inline int | |
1157 | qeth_string_to_ipaddr(const char *buf, enum qeth_prot_versions proto, | |
1158 | __u8 *addr) | |
1159 | { | |
1160 | if (proto == QETH_PROT_IPV4) | |
1161 | return qeth_string_to_ipaddr4(buf, addr); | |
1162 | else if (proto == QETH_PROT_IPV6) | |
1163 | return qeth_string_to_ipaddr6(buf, addr); | |
1164 | else | |
1165 | return -EINVAL; | |
1166 | } | |
1167 | ||
1168 | extern int | |
1169 | qeth_setrouting_v4(struct qeth_card *); | |
1170 | extern int | |
1171 | qeth_setrouting_v6(struct qeth_card *); | |
1172 | ||
1173 | extern int | |
1174 | qeth_add_ipato_entry(struct qeth_card *, struct qeth_ipato_entry *); | |
1175 | ||
1176 | extern void | |
1177 | qeth_del_ipato_entry(struct qeth_card *, enum qeth_prot_versions, u8 *, int); | |
1178 | ||
1179 | extern int | |
1180 | qeth_add_vipa(struct qeth_card *, enum qeth_prot_versions, const u8 *); | |
1181 | ||
1182 | extern void | |
1183 | qeth_del_vipa(struct qeth_card *, enum qeth_prot_versions, const u8 *); | |
1184 | ||
1185 | extern int | |
1186 | qeth_add_rxip(struct qeth_card *, enum qeth_prot_versions, const u8 *); | |
1187 | ||
1188 | extern void | |
1189 | qeth_del_rxip(struct qeth_card *, enum qeth_prot_versions, const u8 *); | |
1190 | ||
1191 | extern int | |
1192 | qeth_notifier_register(struct task_struct *, int ); | |
1193 | ||
1194 | extern int | |
1195 | qeth_notifier_unregister(struct task_struct * ); | |
1196 | ||
1197 | extern void | |
1198 | qeth_schedule_recovery(struct qeth_card *); | |
1199 | ||
1200 | extern int | |
1201 | qeth_realloc_buffer_pool(struct qeth_card *, int); | |
1202 | ||
1203 | extern int | |
9cb90de8 | 1204 | qeth_set_large_send(struct qeth_card *, enum qeth_large_send_types); |
1da177e4 LT |
1205 | |
1206 | extern void | |
1207 | qeth_fill_header(struct qeth_card *, struct qeth_hdr *, | |
1208 | struct sk_buff *, int, int); | |
1209 | extern void | |
1210 | qeth_flush_buffers(struct qeth_qdio_out_q *, int, int, int); | |
1211 | ||
500f83ab UB |
1212 | extern int |
1213 | qeth_osn_assist(struct net_device *, void *, int); | |
1214 | ||
1215 | extern int | |
1216 | qeth_osn_register(unsigned char *read_dev_no, | |
1217 | struct net_device **, | |
1218 | int (*assist_cb)(struct net_device *, void *), | |
1219 | int (*data_cb)(struct sk_buff *)); | |
1220 | ||
1221 | extern void | |
1222 | qeth_osn_deregister(struct net_device *); | |
1223 | ||
1da177e4 | 1224 | #endif /* __QETH_H__ */ |