Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/s390/s390mach.c | |
3 | * S/390 machine check handler | |
4 | * | |
5 | * S390 version | |
6 | * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
7 | * Author(s): Ingo Adlung (adlung@de.ibm.com) | |
8 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
9 | */ | |
10 | ||
1da177e4 LT |
11 | #include <linux/init.h> |
12 | #include <linux/sched.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/workqueue.h> | |
022e4fc0 | 15 | #include <linux/time.h> |
84d11c5d | 16 | #include <linux/kthread.h> |
1da177e4 LT |
17 | |
18 | #include <asm/lowcore.h> | |
19 | ||
20 | #include "s390mach.h" | |
21 | ||
1da177e4 LT |
22 | static struct semaphore m_sem; |
23 | ||
fb6958a5 | 24 | extern int css_process_crw(int, int); |
1da177e4 LT |
25 | extern int chsc_process_crw(void); |
26 | extern int chp_process_crw(int, int); | |
27 | extern void css_reiterate_subchannels(void); | |
28 | ||
29 | extern struct workqueue_struct *slow_path_wq; | |
30 | extern struct work_struct slow_path_work; | |
31 | ||
77fa2245 | 32 | static NORET_TYPE void |
1da177e4 LT |
33 | s390_handle_damage(char *msg) |
34 | { | |
1da177e4 LT |
35 | #ifdef CONFIG_SMP |
36 | smp_send_stop(); | |
37 | #endif | |
38 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
77fa2245 | 39 | for(;;); |
1da177e4 LT |
40 | } |
41 | ||
42 | /* | |
43 | * Retrieve CRWs and call function to handle event. | |
44 | * | |
45 | * Note : we currently process CRWs for io and chsc subchannels only | |
46 | */ | |
47 | static int | |
48 | s390_collect_crw_info(void *param) | |
49 | { | |
fb6958a5 | 50 | struct crw crw[2]; |
1da177e4 LT |
51 | int ccode, ret, slow; |
52 | struct semaphore *sem; | |
fb6958a5 | 53 | unsigned int chain; |
1da177e4 LT |
54 | |
55 | sem = (struct semaphore *)param; | |
1da177e4 LT |
56 | repeat: |
57 | down_interruptible(sem); | |
58 | slow = 0; | |
fb6958a5 | 59 | chain = 0; |
1da177e4 | 60 | while (1) { |
fb6958a5 CH |
61 | if (unlikely(chain > 1)) { |
62 | struct crw tmp_crw; | |
63 | ||
64 | printk(KERN_WARNING"%s: Code does not support more " | |
65 | "than two chained crws; please report to " | |
66 | "linux390@de.ibm.com!\n", __FUNCTION__); | |
67 | ccode = stcrw(&tmp_crw); | |
68 | printk(KERN_WARNING"%s: crw reports slct=%d, oflw=%d, " | |
69 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
70 | __FUNCTION__, tmp_crw.slct, tmp_crw.oflw, | |
71 | tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc, | |
72 | tmp_crw.erc, tmp_crw.rsid); | |
73 | printk(KERN_WARNING"%s: This was crw number %x in the " | |
74 | "chain\n", __FUNCTION__, chain); | |
75 | if (ccode != 0) | |
76 | break; | |
77 | chain = tmp_crw.chn ? chain + 1 : 0; | |
78 | continue; | |
79 | } | |
80 | ccode = stcrw(&crw[chain]); | |
1da177e4 LT |
81 | if (ccode != 0) |
82 | break; | |
250b2dc8 CH |
83 | printk(KERN_DEBUG "crw_info : CRW reports slct=%d, oflw=%d, " |
84 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
85 | crw[chain].slct, crw[chain].oflw, crw[chain].chn, | |
86 | crw[chain].rsc, crw[chain].anc, crw[chain].erc, | |
87 | crw[chain].rsid); | |
1da177e4 | 88 | /* Check for overflows. */ |
fb6958a5 | 89 | if (crw[chain].oflw) { |
1da177e4 LT |
90 | pr_debug("%s: crw overflow detected!\n", __FUNCTION__); |
91 | css_reiterate_subchannels(); | |
fb6958a5 | 92 | chain = 0; |
1da177e4 LT |
93 | slow = 1; |
94 | continue; | |
95 | } | |
fb6958a5 | 96 | switch (crw[chain].rsc) { |
1da177e4 | 97 | case CRW_RSC_SCH: |
fb6958a5 CH |
98 | if (crw[0].chn && !chain) |
99 | break; | |
100 | pr_debug("source is subchannel %04X\n", crw[0].rsid); | |
101 | ret = css_process_crw (crw[0].rsid, | |
102 | chain ? crw[1].rsid : 0); | |
1da177e4 LT |
103 | if (ret == -EAGAIN) |
104 | slow = 1; | |
105 | break; | |
106 | case CRW_RSC_MONITOR: | |
107 | pr_debug("source is monitoring facility\n"); | |
108 | break; | |
109 | case CRW_RSC_CPATH: | |
fb6958a5 | 110 | pr_debug("source is channel path %02X\n", crw[0].rsid); |
7e560814 CH |
111 | /* |
112 | * Check for solicited machine checks. These are | |
113 | * created by reset channel path and need not be | |
114 | * reported to the common I/O layer. | |
115 | */ | |
116 | if (crw[chain].slct) { | |
250b2dc8 CH |
117 | pr_debug("solicited machine check for " |
118 | "channel path %02X\n", crw[0].rsid); | |
7e560814 CH |
119 | break; |
120 | } | |
fb6958a5 | 121 | switch (crw[0].erc) { |
1da177e4 | 122 | case CRW_ERC_IPARM: /* Path has come. */ |
fb6958a5 | 123 | ret = chp_process_crw(crw[0].rsid, 1); |
1da177e4 LT |
124 | break; |
125 | case CRW_ERC_PERRI: /* Path has gone. */ | |
126 | case CRW_ERC_PERRN: | |
fb6958a5 | 127 | ret = chp_process_crw(crw[0].rsid, 0); |
1da177e4 LT |
128 | break; |
129 | default: | |
130 | pr_debug("Don't know how to handle erc=%x\n", | |
fb6958a5 | 131 | crw[0].erc); |
1da177e4 LT |
132 | ret = 0; |
133 | } | |
134 | if (ret == -EAGAIN) | |
135 | slow = 1; | |
136 | break; | |
137 | case CRW_RSC_CONFIG: | |
138 | pr_debug("source is configuration-alert facility\n"); | |
139 | break; | |
140 | case CRW_RSC_CSS: | |
141 | pr_debug("source is channel subsystem\n"); | |
142 | ret = chsc_process_crw(); | |
143 | if (ret == -EAGAIN) | |
144 | slow = 1; | |
145 | break; | |
146 | default: | |
147 | pr_debug("unknown source\n"); | |
148 | break; | |
149 | } | |
fb6958a5 CH |
150 | /* chain is always 0 or 1 here. */ |
151 | chain = crw[chain].chn ? chain + 1 : 0; | |
1da177e4 LT |
152 | } |
153 | if (slow) | |
154 | queue_work(slow_path_wq, &slow_path_work); | |
155 | goto repeat; | |
156 | return 0; | |
157 | } | |
158 | ||
77fa2245 HC |
159 | struct mcck_struct { |
160 | int kill_task; | |
161 | int channel_report; | |
162 | int warning; | |
163 | unsigned long long mcck_code; | |
164 | }; | |
165 | ||
166 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
167 | ||
1da177e4 | 168 | /* |
77fa2245 HC |
169 | * Main machine check handler function. Will be called with interrupts enabled |
170 | * or disabled and machine checks enabled or disabled. | |
1da177e4 LT |
171 | */ |
172 | void | |
77fa2245 | 173 | s390_handle_mcck(void) |
1da177e4 | 174 | { |
77fa2245 HC |
175 | unsigned long flags; |
176 | struct mcck_struct mcck; | |
1da177e4 | 177 | |
77fa2245 HC |
178 | /* |
179 | * Disable machine checks and get the current state of accumulated | |
180 | * machine checks. Afterwards delete the old state and enable machine | |
181 | * checks again. | |
182 | */ | |
183 | local_irq_save(flags); | |
184 | local_mcck_disable(); | |
185 | mcck = __get_cpu_var(cpu_mcck); | |
186 | memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct)); | |
187 | clear_thread_flag(TIF_MCCK_PENDING); | |
188 | local_mcck_enable(); | |
189 | local_irq_restore(flags); | |
1da177e4 | 190 | |
77fa2245 | 191 | if (mcck.channel_report) |
1da177e4 LT |
192 | up(&m_sem); |
193 | ||
194 | #ifdef CONFIG_MACHCHK_WARNING | |
195 | /* | |
196 | * The warning may remain for a prolonged period on the bare iron. | |
197 | * (actually till the machine is powered off, or until the problem is gone) | |
198 | * So we just stop listening for the WARNING MCH and prevent continuously | |
199 | * being interrupted. One caveat is however, that we must do this per | |
200 | * processor and cannot use the smp version of ctl_clear_bit(). | |
201 | * On VM we only get one interrupt per virtally presented machinecheck. | |
202 | * Though one suffices, we may get one interrupt per (virtual) processor. | |
203 | */ | |
77fa2245 | 204 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 LT |
205 | static int mchchk_wng_posted = 0; |
206 | /* | |
207 | * Use single machine clear, as we cannot handle smp right now | |
208 | */ | |
209 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ | |
210 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
211 | kill_proc(1, SIGPWR, 1); | |
212 | } | |
213 | #endif | |
77fa2245 HC |
214 | |
215 | if (mcck.kill_task) { | |
216 | local_irq_enable(); | |
217 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
218 | "malfunction (code 0x%016llx).\n", mcck.mcck_code); | |
219 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", | |
220 | current->comm, current->pid); | |
221 | do_exit(SIGSEGV); | |
222 | } | |
223 | } | |
224 | ||
225 | /* | |
226 | * returns 0 if all registers could be validated | |
227 | * returns 1 otherwise | |
228 | */ | |
229 | static int | |
230 | s390_revalidate_registers(struct mci *mci) | |
231 | { | |
232 | int kill_task; | |
233 | u64 tmpclock; | |
234 | u64 zero; | |
235 | void *fpt_save_area, *fpt_creg_save_area; | |
236 | ||
237 | kill_task = 0; | |
238 | zero = 0; | |
239 | /* General purpose registers */ | |
240 | if (!mci->gr) | |
241 | /* | |
242 | * General purpose registers couldn't be restored and have | |
243 | * unknown contents. Process needs to be terminated. | |
244 | */ | |
245 | kill_task = 1; | |
246 | ||
247 | /* Revalidate floating point registers */ | |
248 | if (!mci->fp) | |
249 | /* | |
250 | * Floating point registers can't be restored and | |
251 | * therefore the process needs to be terminated. | |
252 | */ | |
253 | kill_task = 1; | |
254 | ||
347a8dc3 | 255 | #ifndef CONFIG_64BIT |
94c12cc7 MS |
256 | asm volatile( |
257 | " ld 0,0(%0)\n" | |
258 | " ld 2,8(%0)\n" | |
259 | " ld 4,16(%0)\n" | |
260 | " ld 6,24(%0)" | |
261 | : : "a" (&S390_lowcore.floating_pt_save_area)); | |
77fa2245 HC |
262 | #endif |
263 | ||
264 | if (MACHINE_HAS_IEEE) { | |
347a8dc3 | 265 | #ifdef CONFIG_64BIT |
77fa2245 HC |
266 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
267 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; | |
268 | #else | |
269 | fpt_save_area = (void *) S390_lowcore.extended_save_area_addr; | |
270 | fpt_creg_save_area = fpt_save_area+128; | |
271 | #endif | |
272 | /* Floating point control register */ | |
273 | if (!mci->fc) { | |
274 | /* | |
275 | * Floating point control register can't be restored. | |
276 | * Task will be terminated. | |
277 | */ | |
94c12cc7 | 278 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
77fa2245 HC |
279 | kill_task = 1; |
280 | ||
94c12cc7 MS |
281 | } else |
282 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); | |
77fa2245 | 283 | |
94c12cc7 MS |
284 | asm volatile( |
285 | " ld 0,0(%0)\n" | |
286 | " ld 1,8(%0)\n" | |
287 | " ld 2,16(%0)\n" | |
288 | " ld 3,24(%0)\n" | |
289 | " ld 4,32(%0)\n" | |
290 | " ld 5,40(%0)\n" | |
291 | " ld 6,48(%0)\n" | |
292 | " ld 7,56(%0)\n" | |
293 | " ld 8,64(%0)\n" | |
294 | " ld 9,72(%0)\n" | |
295 | " ld 10,80(%0)\n" | |
296 | " ld 11,88(%0)\n" | |
297 | " ld 12,96(%0)\n" | |
298 | " ld 13,104(%0)\n" | |
299 | " ld 14,112(%0)\n" | |
300 | " ld 15,120(%0)\n" | |
301 | : : "a" (fpt_save_area)); | |
77fa2245 HC |
302 | } |
303 | ||
304 | /* Revalidate access registers */ | |
94c12cc7 MS |
305 | asm volatile( |
306 | " lam 0,15,0(%0)" | |
307 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
77fa2245 HC |
308 | if (!mci->ar) |
309 | /* | |
310 | * Access registers have unknown contents. | |
311 | * Terminating task. | |
312 | */ | |
313 | kill_task = 1; | |
314 | ||
315 | /* Revalidate control registers */ | |
316 | if (!mci->cr) | |
317 | /* | |
318 | * Control registers have unknown contents. | |
319 | * Can't recover and therefore stopping machine. | |
320 | */ | |
321 | s390_handle_damage("invalid control registers."); | |
322 | else | |
347a8dc3 | 323 | #ifdef CONFIG_64BIT |
94c12cc7 MS |
324 | asm volatile( |
325 | " lctlg 0,15,0(%0)" | |
326 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 | 327 | #else |
94c12cc7 MS |
328 | asm volatile( |
329 | " lctl 0,15,0(%0)" | |
330 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 HC |
331 | #endif |
332 | ||
333 | /* | |
334 | * We don't even try to revalidate the TOD register, since we simply | |
335 | * can't write something sensible into that register. | |
336 | */ | |
337 | ||
347a8dc3 | 338 | #ifdef CONFIG_64BIT |
77fa2245 HC |
339 | /* |
340 | * See if we can revalidate the TOD programmable register with its | |
341 | * old contents (should be zero) otherwise set it to zero. | |
342 | */ | |
343 | if (!mci->pr) | |
94c12cc7 MS |
344 | asm volatile( |
345 | " sr 0,0\n" | |
346 | " sckpf" | |
347 | : : : "0", "cc"); | |
77fa2245 HC |
348 | else |
349 | asm volatile( | |
94c12cc7 MS |
350 | " l 0,0(%0)\n" |
351 | " sckpf" | |
352 | : : "a" (&S390_lowcore.tod_progreg_save_area) | |
353 | : "0", "cc"); | |
77fa2245 HC |
354 | #endif |
355 | ||
356 | /* Revalidate clock comparator register */ | |
94c12cc7 MS |
357 | asm volatile( |
358 | " stck 0(%1)\n" | |
359 | " sckc 0(%1)" | |
360 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | |
77fa2245 HC |
361 | |
362 | /* Check if old PSW is valid */ | |
363 | if (!mci->wp) | |
364 | /* | |
365 | * Can't tell if we come from user or kernel mode | |
366 | * -> stopping machine. | |
367 | */ | |
368 | s390_handle_damage("old psw invalid."); | |
369 | ||
370 | if (!mci->ms || !mci->pm || !mci->ia) | |
371 | kill_task = 1; | |
372 | ||
373 | return kill_task; | |
374 | } | |
375 | ||
b73d40c6 | 376 | #define MAX_IPD_COUNT 29 |
022e4fc0 | 377 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
b73d40c6 | 378 | |
77fa2245 HC |
379 | /* |
380 | * machine check handler. | |
381 | */ | |
382 | void | |
383 | s390_do_machine_check(struct pt_regs *regs) | |
384 | { | |
b73d40c6 HC |
385 | static DEFINE_SPINLOCK(ipd_lock); |
386 | static unsigned long long last_ipd; | |
387 | static int ipd_count; | |
388 | unsigned long long tmp; | |
77fa2245 HC |
389 | struct mci *mci; |
390 | struct mcck_struct *mcck; | |
391 | int umode; | |
392 | ||
8e9ccae6 HC |
393 | lockdep_off(); |
394 | ||
77fa2245 HC |
395 | mci = (struct mci *) &S390_lowcore.mcck_interruption_code; |
396 | mcck = &__get_cpu_var(cpu_mcck); | |
397 | umode = user_mode(regs); | |
398 | ||
399 | if (mci->sd) | |
400 | /* System damage -> stopping machine */ | |
401 | s390_handle_damage("received system damage machine check."); | |
402 | ||
403 | if (mci->pd) { | |
404 | if (mci->b) { | |
405 | /* Processing backup -> verify if we can survive this */ | |
406 | u64 z_mcic, o_mcic, t_mcic; | |
347a8dc3 | 407 | #ifdef CONFIG_64BIT |
77fa2245 HC |
408 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
409 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
410 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
411 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
412 | 1ULL<<16); | |
413 | #else | |
414 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 | | |
415 | 1ULL<<29); | |
416 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
417 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
418 | 1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16); | |
419 | #endif | |
420 | t_mcic = *(u64 *)mci; | |
421 | ||
422 | if (((t_mcic & z_mcic) != 0) || | |
423 | ((t_mcic & o_mcic) != o_mcic)) { | |
424 | s390_handle_damage("processing backup machine " | |
425 | "check with damage."); | |
426 | } | |
b73d40c6 HC |
427 | |
428 | /* | |
429 | * Nullifying exigent condition, therefore we might | |
430 | * retry this instruction. | |
431 | */ | |
432 | ||
433 | spin_lock(&ipd_lock); | |
434 | ||
435 | tmp = get_clock(); | |
436 | ||
437 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) | |
438 | ipd_count++; | |
439 | else | |
440 | ipd_count = 1; | |
441 | ||
442 | last_ipd = tmp; | |
443 | ||
444 | if (ipd_count == MAX_IPD_COUNT) | |
445 | s390_handle_damage("too many ipd retries."); | |
446 | ||
447 | spin_unlock(&ipd_lock); | |
77fa2245 HC |
448 | } |
449 | else { | |
450 | /* Processing damage -> stopping machine */ | |
451 | s390_handle_damage("received instruction processing " | |
452 | "damage machine check."); | |
453 | } | |
454 | } | |
455 | if (s390_revalidate_registers(mci)) { | |
456 | if (umode) { | |
457 | /* | |
458 | * Couldn't restore all register contents while in | |
459 | * user mode -> mark task for termination. | |
460 | */ | |
461 | mcck->kill_task = 1; | |
462 | mcck->mcck_code = *(unsigned long long *) mci; | |
463 | set_thread_flag(TIF_MCCK_PENDING); | |
464 | } | |
465 | else | |
466 | /* | |
467 | * Couldn't restore all register contents while in | |
468 | * kernel mode -> stopping machine. | |
469 | */ | |
470 | s390_handle_damage("unable to revalidate registers."); | |
471 | } | |
472 | ||
473 | if (mci->se) | |
474 | /* Storage error uncorrected */ | |
475 | s390_handle_damage("received storage error uncorrected " | |
476 | "machine check."); | |
477 | ||
478 | if (mci->ke) | |
479 | /* Storage key-error uncorrected */ | |
480 | s390_handle_damage("received storage key-error uncorrected " | |
481 | "machine check."); | |
482 | ||
483 | if (mci->ds && mci->fa) | |
484 | /* Storage degradation */ | |
485 | s390_handle_damage("received storage degradation machine " | |
486 | "check."); | |
487 | ||
488 | if (mci->cp) { | |
489 | /* Channel report word pending */ | |
490 | mcck->channel_report = 1; | |
491 | set_thread_flag(TIF_MCCK_PENDING); | |
492 | } | |
493 | ||
494 | if (mci->w) { | |
495 | /* Warning pending */ | |
496 | mcck->warning = 1; | |
497 | set_thread_flag(TIF_MCCK_PENDING); | |
498 | } | |
8e9ccae6 | 499 | lockdep_on(); |
1da177e4 LT |
500 | } |
501 | ||
502 | /* | |
503 | * s390_init_machine_check | |
504 | * | |
505 | * initialize machine check handling | |
506 | */ | |
507 | static int | |
508 | machine_check_init(void) | |
509 | { | |
510 | init_MUTEX_LOCKED(&m_sem); | |
77fa2245 HC |
511 | ctl_clear_bit(14, 25); /* disable external damage MCH */ |
512 | ctl_set_bit(14, 27); /* enable system recovery MCH */ | |
1da177e4 LT |
513 | #ifdef CONFIG_MACHCHK_WARNING |
514 | ctl_set_bit(14, 24); /* enable warning MCH */ | |
515 | #endif | |
516 | return 0; | |
517 | } | |
518 | ||
519 | /* | |
520 | * Initialize the machine check handler really early to be able to | |
521 | * catch all machine checks that happen during boot | |
522 | */ | |
523 | arch_initcall(machine_check_init); | |
524 | ||
525 | /* | |
526 | * Machine checks for the channel subsystem must be enabled | |
527 | * after the channel subsystem is initialized | |
528 | */ | |
529 | static int __init | |
530 | machine_check_crw_init (void) | |
531 | { | |
84d11c5d | 532 | kthread_run(s390_collect_crw_info, &m_sem, "kmcheck"); |
1da177e4 LT |
533 | ctl_set_bit(14, 28); /* enable channel report MCH */ |
534 | return 0; | |
535 | } | |
536 | ||
537 | device_initcall (machine_check_crw_init); |