Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/s390/s390mach.c | |
3 | * S/390 machine check handler | |
4 | * | |
5 | * S390 version | |
6 | * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
7 | * Author(s): Ingo Adlung (adlung@de.ibm.com) | |
8 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
9 | */ | |
10 | ||
11 | #include <linux/config.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/sched.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/workqueue.h> | |
16 | ||
17 | #include <asm/lowcore.h> | |
18 | ||
19 | #include "s390mach.h" | |
20 | ||
21 | #define DBG printk | |
22 | // #define DBG(args,...) do {} while (0); | |
23 | ||
24 | static struct semaphore m_sem; | |
25 | ||
fb6958a5 | 26 | extern int css_process_crw(int, int); |
1da177e4 LT |
27 | extern int chsc_process_crw(void); |
28 | extern int chp_process_crw(int, int); | |
29 | extern void css_reiterate_subchannels(void); | |
30 | ||
31 | extern struct workqueue_struct *slow_path_wq; | |
32 | extern struct work_struct slow_path_work; | |
33 | ||
77fa2245 | 34 | static NORET_TYPE void |
1da177e4 LT |
35 | s390_handle_damage(char *msg) |
36 | { | |
1da177e4 LT |
37 | #ifdef CONFIG_SMP |
38 | smp_send_stop(); | |
39 | #endif | |
40 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
77fa2245 | 41 | for(;;); |
1da177e4 LT |
42 | } |
43 | ||
44 | /* | |
45 | * Retrieve CRWs and call function to handle event. | |
46 | * | |
47 | * Note : we currently process CRWs for io and chsc subchannels only | |
48 | */ | |
49 | static int | |
50 | s390_collect_crw_info(void *param) | |
51 | { | |
fb6958a5 | 52 | struct crw crw[2]; |
1da177e4 LT |
53 | int ccode, ret, slow; |
54 | struct semaphore *sem; | |
fb6958a5 | 55 | unsigned int chain; |
1da177e4 LT |
56 | |
57 | sem = (struct semaphore *)param; | |
58 | /* Set a nice name. */ | |
59 | daemonize("kmcheck"); | |
60 | repeat: | |
61 | down_interruptible(sem); | |
62 | slow = 0; | |
fb6958a5 | 63 | chain = 0; |
1da177e4 | 64 | while (1) { |
fb6958a5 CH |
65 | if (unlikely(chain > 1)) { |
66 | struct crw tmp_crw; | |
67 | ||
68 | printk(KERN_WARNING"%s: Code does not support more " | |
69 | "than two chained crws; please report to " | |
70 | "linux390@de.ibm.com!\n", __FUNCTION__); | |
71 | ccode = stcrw(&tmp_crw); | |
72 | printk(KERN_WARNING"%s: crw reports slct=%d, oflw=%d, " | |
73 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
74 | __FUNCTION__, tmp_crw.slct, tmp_crw.oflw, | |
75 | tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc, | |
76 | tmp_crw.erc, tmp_crw.rsid); | |
77 | printk(KERN_WARNING"%s: This was crw number %x in the " | |
78 | "chain\n", __FUNCTION__, chain); | |
79 | if (ccode != 0) | |
80 | break; | |
81 | chain = tmp_crw.chn ? chain + 1 : 0; | |
82 | continue; | |
83 | } | |
84 | ccode = stcrw(&crw[chain]); | |
1da177e4 LT |
85 | if (ccode != 0) |
86 | break; | |
87 | DBG(KERN_DEBUG "crw_info : CRW reports slct=%d, oflw=%d, " | |
88 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
fb6958a5 CH |
89 | crw[chain].slct, crw[chain].oflw, crw[chain].chn, |
90 | crw[chain].rsc, crw[chain].anc, crw[chain].erc, | |
91 | crw[chain].rsid); | |
1da177e4 | 92 | /* Check for overflows. */ |
fb6958a5 | 93 | if (crw[chain].oflw) { |
1da177e4 LT |
94 | pr_debug("%s: crw overflow detected!\n", __FUNCTION__); |
95 | css_reiterate_subchannels(); | |
fb6958a5 | 96 | chain = 0; |
1da177e4 LT |
97 | slow = 1; |
98 | continue; | |
99 | } | |
fb6958a5 | 100 | switch (crw[chain].rsc) { |
1da177e4 | 101 | case CRW_RSC_SCH: |
fb6958a5 CH |
102 | if (crw[0].chn && !chain) |
103 | break; | |
104 | pr_debug("source is subchannel %04X\n", crw[0].rsid); | |
105 | ret = css_process_crw (crw[0].rsid, | |
106 | chain ? crw[1].rsid : 0); | |
1da177e4 LT |
107 | if (ret == -EAGAIN) |
108 | slow = 1; | |
109 | break; | |
110 | case CRW_RSC_MONITOR: | |
111 | pr_debug("source is monitoring facility\n"); | |
112 | break; | |
113 | case CRW_RSC_CPATH: | |
fb6958a5 CH |
114 | pr_debug("source is channel path %02X\n", crw[0].rsid); |
115 | switch (crw[0].erc) { | |
1da177e4 | 116 | case CRW_ERC_IPARM: /* Path has come. */ |
fb6958a5 | 117 | ret = chp_process_crw(crw[0].rsid, 1); |
1da177e4 LT |
118 | break; |
119 | case CRW_ERC_PERRI: /* Path has gone. */ | |
120 | case CRW_ERC_PERRN: | |
fb6958a5 | 121 | ret = chp_process_crw(crw[0].rsid, 0); |
1da177e4 LT |
122 | break; |
123 | default: | |
124 | pr_debug("Don't know how to handle erc=%x\n", | |
fb6958a5 | 125 | crw[0].erc); |
1da177e4 LT |
126 | ret = 0; |
127 | } | |
128 | if (ret == -EAGAIN) | |
129 | slow = 1; | |
130 | break; | |
131 | case CRW_RSC_CONFIG: | |
132 | pr_debug("source is configuration-alert facility\n"); | |
133 | break; | |
134 | case CRW_RSC_CSS: | |
135 | pr_debug("source is channel subsystem\n"); | |
136 | ret = chsc_process_crw(); | |
137 | if (ret == -EAGAIN) | |
138 | slow = 1; | |
139 | break; | |
140 | default: | |
141 | pr_debug("unknown source\n"); | |
142 | break; | |
143 | } | |
fb6958a5 CH |
144 | /* chain is always 0 or 1 here. */ |
145 | chain = crw[chain].chn ? chain + 1 : 0; | |
1da177e4 LT |
146 | } |
147 | if (slow) | |
148 | queue_work(slow_path_wq, &slow_path_work); | |
149 | goto repeat; | |
150 | return 0; | |
151 | } | |
152 | ||
77fa2245 HC |
153 | struct mcck_struct { |
154 | int kill_task; | |
155 | int channel_report; | |
156 | int warning; | |
157 | unsigned long long mcck_code; | |
158 | }; | |
159 | ||
160 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
161 | ||
1da177e4 | 162 | /* |
77fa2245 HC |
163 | * Main machine check handler function. Will be called with interrupts enabled |
164 | * or disabled and machine checks enabled or disabled. | |
1da177e4 LT |
165 | */ |
166 | void | |
77fa2245 | 167 | s390_handle_mcck(void) |
1da177e4 | 168 | { |
77fa2245 HC |
169 | unsigned long flags; |
170 | struct mcck_struct mcck; | |
1da177e4 | 171 | |
77fa2245 HC |
172 | /* |
173 | * Disable machine checks and get the current state of accumulated | |
174 | * machine checks. Afterwards delete the old state and enable machine | |
175 | * checks again. | |
176 | */ | |
177 | local_irq_save(flags); | |
178 | local_mcck_disable(); | |
179 | mcck = __get_cpu_var(cpu_mcck); | |
180 | memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct)); | |
181 | clear_thread_flag(TIF_MCCK_PENDING); | |
182 | local_mcck_enable(); | |
183 | local_irq_restore(flags); | |
1da177e4 | 184 | |
77fa2245 | 185 | if (mcck.channel_report) |
1da177e4 LT |
186 | up(&m_sem); |
187 | ||
188 | #ifdef CONFIG_MACHCHK_WARNING | |
189 | /* | |
190 | * The warning may remain for a prolonged period on the bare iron. | |
191 | * (actually till the machine is powered off, or until the problem is gone) | |
192 | * So we just stop listening for the WARNING MCH and prevent continuously | |
193 | * being interrupted. One caveat is however, that we must do this per | |
194 | * processor and cannot use the smp version of ctl_clear_bit(). | |
195 | * On VM we only get one interrupt per virtally presented machinecheck. | |
196 | * Though one suffices, we may get one interrupt per (virtual) processor. | |
197 | */ | |
77fa2245 | 198 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 LT |
199 | static int mchchk_wng_posted = 0; |
200 | /* | |
201 | * Use single machine clear, as we cannot handle smp right now | |
202 | */ | |
203 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ | |
204 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
205 | kill_proc(1, SIGPWR, 1); | |
206 | } | |
207 | #endif | |
77fa2245 HC |
208 | |
209 | if (mcck.kill_task) { | |
210 | local_irq_enable(); | |
211 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
212 | "malfunction (code 0x%016llx).\n", mcck.mcck_code); | |
213 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", | |
214 | current->comm, current->pid); | |
215 | do_exit(SIGSEGV); | |
216 | } | |
217 | } | |
218 | ||
219 | /* | |
220 | * returns 0 if all registers could be validated | |
221 | * returns 1 otherwise | |
222 | */ | |
223 | static int | |
224 | s390_revalidate_registers(struct mci *mci) | |
225 | { | |
226 | int kill_task; | |
227 | u64 tmpclock; | |
228 | u64 zero; | |
229 | void *fpt_save_area, *fpt_creg_save_area; | |
230 | ||
231 | kill_task = 0; | |
232 | zero = 0; | |
233 | /* General purpose registers */ | |
234 | if (!mci->gr) | |
235 | /* | |
236 | * General purpose registers couldn't be restored and have | |
237 | * unknown contents. Process needs to be terminated. | |
238 | */ | |
239 | kill_task = 1; | |
240 | ||
241 | /* Revalidate floating point registers */ | |
242 | if (!mci->fp) | |
243 | /* | |
244 | * Floating point registers can't be restored and | |
245 | * therefore the process needs to be terminated. | |
246 | */ | |
247 | kill_task = 1; | |
248 | ||
249 | #ifndef __s390x__ | |
250 | asm volatile("ld 0,0(%0)\n" | |
251 | "ld 2,8(%0)\n" | |
252 | "ld 4,16(%0)\n" | |
253 | "ld 6,24(%0)" | |
254 | : : "a" (&S390_lowcore.floating_pt_save_area)); | |
255 | #endif | |
256 | ||
257 | if (MACHINE_HAS_IEEE) { | |
258 | #ifdef __s390x__ | |
259 | fpt_save_area = &S390_lowcore.floating_pt_save_area; | |
260 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; | |
261 | #else | |
262 | fpt_save_area = (void *) S390_lowcore.extended_save_area_addr; | |
263 | fpt_creg_save_area = fpt_save_area+128; | |
264 | #endif | |
265 | /* Floating point control register */ | |
266 | if (!mci->fc) { | |
267 | /* | |
268 | * Floating point control register can't be restored. | |
269 | * Task will be terminated. | |
270 | */ | |
ae6aa2ea | 271 | asm volatile ("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
77fa2245 HC |
272 | kill_task = 1; |
273 | ||
274 | } | |
275 | else | |
276 | asm volatile ( | |
277 | "lfpc 0(%0)" | |
278 | : : "a" (fpt_creg_save_area)); | |
279 | ||
280 | asm volatile("ld 0,0(%0)\n" | |
281 | "ld 1,8(%0)\n" | |
282 | "ld 2,16(%0)\n" | |
283 | "ld 3,24(%0)\n" | |
284 | "ld 4,32(%0)\n" | |
285 | "ld 5,40(%0)\n" | |
286 | "ld 6,48(%0)\n" | |
287 | "ld 7,56(%0)\n" | |
288 | "ld 8,64(%0)\n" | |
289 | "ld 9,72(%0)\n" | |
290 | "ld 10,80(%0)\n" | |
291 | "ld 11,88(%0)\n" | |
292 | "ld 12,96(%0)\n" | |
293 | "ld 13,104(%0)\n" | |
294 | "ld 14,112(%0)\n" | |
295 | "ld 15,120(%0)\n" | |
296 | : : "a" (fpt_save_area)); | |
297 | } | |
298 | ||
299 | /* Revalidate access registers */ | |
300 | asm volatile("lam 0,15,0(%0)" | |
301 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
302 | if (!mci->ar) | |
303 | /* | |
304 | * Access registers have unknown contents. | |
305 | * Terminating task. | |
306 | */ | |
307 | kill_task = 1; | |
308 | ||
309 | /* Revalidate control registers */ | |
310 | if (!mci->cr) | |
311 | /* | |
312 | * Control registers have unknown contents. | |
313 | * Can't recover and therefore stopping machine. | |
314 | */ | |
315 | s390_handle_damage("invalid control registers."); | |
316 | else | |
317 | #ifdef __s390x__ | |
318 | asm volatile("lctlg 0,15,0(%0)" | |
319 | : : "a" (&S390_lowcore.cregs_save_area)); | |
320 | #else | |
321 | asm volatile("lctl 0,15,0(%0)" | |
322 | : : "a" (&S390_lowcore.cregs_save_area)); | |
323 | #endif | |
324 | ||
325 | /* | |
326 | * We don't even try to revalidate the TOD register, since we simply | |
327 | * can't write something sensible into that register. | |
328 | */ | |
329 | ||
330 | #ifdef __s390x__ | |
331 | /* | |
332 | * See if we can revalidate the TOD programmable register with its | |
333 | * old contents (should be zero) otherwise set it to zero. | |
334 | */ | |
335 | if (!mci->pr) | |
336 | asm volatile("sr 0,0\n" | |
337 | "sckpf" | |
338 | : : : "0", "cc"); | |
339 | else | |
340 | asm volatile( | |
341 | "l 0,0(%0)\n" | |
342 | "sckpf" | |
343 | : : "a" (&S390_lowcore.tod_progreg_save_area) : "0", "cc"); | |
344 | #endif | |
345 | ||
346 | /* Revalidate clock comparator register */ | |
347 | asm volatile ("stck 0(%1)\n" | |
348 | "sckc 0(%1)" | |
349 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | |
350 | ||
351 | /* Check if old PSW is valid */ | |
352 | if (!mci->wp) | |
353 | /* | |
354 | * Can't tell if we come from user or kernel mode | |
355 | * -> stopping machine. | |
356 | */ | |
357 | s390_handle_damage("old psw invalid."); | |
358 | ||
359 | if (!mci->ms || !mci->pm || !mci->ia) | |
360 | kill_task = 1; | |
361 | ||
362 | return kill_task; | |
363 | } | |
364 | ||
365 | /* | |
366 | * machine check handler. | |
367 | */ | |
368 | void | |
369 | s390_do_machine_check(struct pt_regs *regs) | |
370 | { | |
371 | struct mci *mci; | |
372 | struct mcck_struct *mcck; | |
373 | int umode; | |
374 | ||
375 | mci = (struct mci *) &S390_lowcore.mcck_interruption_code; | |
376 | mcck = &__get_cpu_var(cpu_mcck); | |
377 | umode = user_mode(regs); | |
378 | ||
379 | if (mci->sd) | |
380 | /* System damage -> stopping machine */ | |
381 | s390_handle_damage("received system damage machine check."); | |
382 | ||
383 | if (mci->pd) { | |
384 | if (mci->b) { | |
385 | /* Processing backup -> verify if we can survive this */ | |
386 | u64 z_mcic, o_mcic, t_mcic; | |
387 | #ifdef __s390x__ | |
388 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); | |
389 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
390 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
391 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
392 | 1ULL<<16); | |
393 | #else | |
394 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 | | |
395 | 1ULL<<29); | |
396 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
397 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
398 | 1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16); | |
399 | #endif | |
400 | t_mcic = *(u64 *)mci; | |
401 | ||
402 | if (((t_mcic & z_mcic) != 0) || | |
403 | ((t_mcic & o_mcic) != o_mcic)) { | |
404 | s390_handle_damage("processing backup machine " | |
405 | "check with damage."); | |
406 | } | |
407 | if (!umode) | |
408 | s390_handle_damage("processing backup machine " | |
409 | "check in kernel mode."); | |
410 | mcck->kill_task = 1; | |
411 | mcck->mcck_code = *(unsigned long long *) mci; | |
412 | } | |
413 | else { | |
414 | /* Processing damage -> stopping machine */ | |
415 | s390_handle_damage("received instruction processing " | |
416 | "damage machine check."); | |
417 | } | |
418 | } | |
419 | if (s390_revalidate_registers(mci)) { | |
420 | if (umode) { | |
421 | /* | |
422 | * Couldn't restore all register contents while in | |
423 | * user mode -> mark task for termination. | |
424 | */ | |
425 | mcck->kill_task = 1; | |
426 | mcck->mcck_code = *(unsigned long long *) mci; | |
427 | set_thread_flag(TIF_MCCK_PENDING); | |
428 | } | |
429 | else | |
430 | /* | |
431 | * Couldn't restore all register contents while in | |
432 | * kernel mode -> stopping machine. | |
433 | */ | |
434 | s390_handle_damage("unable to revalidate registers."); | |
435 | } | |
436 | ||
437 | if (mci->se) | |
438 | /* Storage error uncorrected */ | |
439 | s390_handle_damage("received storage error uncorrected " | |
440 | "machine check."); | |
441 | ||
442 | if (mci->ke) | |
443 | /* Storage key-error uncorrected */ | |
444 | s390_handle_damage("received storage key-error uncorrected " | |
445 | "machine check."); | |
446 | ||
447 | if (mci->ds && mci->fa) | |
448 | /* Storage degradation */ | |
449 | s390_handle_damage("received storage degradation machine " | |
450 | "check."); | |
451 | ||
452 | if (mci->cp) { | |
453 | /* Channel report word pending */ | |
454 | mcck->channel_report = 1; | |
455 | set_thread_flag(TIF_MCCK_PENDING); | |
456 | } | |
457 | ||
458 | if (mci->w) { | |
459 | /* Warning pending */ | |
460 | mcck->warning = 1; | |
461 | set_thread_flag(TIF_MCCK_PENDING); | |
462 | } | |
1da177e4 LT |
463 | } |
464 | ||
465 | /* | |
466 | * s390_init_machine_check | |
467 | * | |
468 | * initialize machine check handling | |
469 | */ | |
470 | static int | |
471 | machine_check_init(void) | |
472 | { | |
473 | init_MUTEX_LOCKED(&m_sem); | |
77fa2245 HC |
474 | ctl_clear_bit(14, 25); /* disable external damage MCH */ |
475 | ctl_set_bit(14, 27); /* enable system recovery MCH */ | |
1da177e4 LT |
476 | #ifdef CONFIG_MACHCHK_WARNING |
477 | ctl_set_bit(14, 24); /* enable warning MCH */ | |
478 | #endif | |
479 | return 0; | |
480 | } | |
481 | ||
482 | /* | |
483 | * Initialize the machine check handler really early to be able to | |
484 | * catch all machine checks that happen during boot | |
485 | */ | |
486 | arch_initcall(machine_check_init); | |
487 | ||
488 | /* | |
489 | * Machine checks for the channel subsystem must be enabled | |
490 | * after the channel subsystem is initialized | |
491 | */ | |
492 | static int __init | |
493 | machine_check_crw_init (void) | |
494 | { | |
495 | kernel_thread(s390_collect_crw_info, &m_sem, CLONE_FS|CLONE_FILES); | |
496 | ctl_set_bit(14, 28); /* enable channel report MCH */ | |
497 | return 0; | |
498 | } | |
499 | ||
500 | device_initcall (machine_check_crw_init); |