ncr5380: Fix EH during arbitration and selection
[deliverable/linux.git] / drivers / scsi / NCR5380.c
CommitLineData
1da177e4
LT
1/*
2 * NCR 5380 generic driver routines. These should make it *trivial*
3 * to implement 5380 SCSI drivers under Linux with a non-trantor
4 * architecture.
5 *
6 * Note that these routines also work with NR53c400 family chips.
7 *
8 * Copyright 1993, Drew Eckhardt
9 * Visionary Computing
10 * (Unix and Linux consulting and custom programming)
11 * drew@colorado.edu
12 * +1 (303) 666-5836
13 *
1da177e4
LT
14 * For more information, please consult
15 *
16 * NCR 5380 Family
17 * SCSI Protocol Controller
18 * Databook
19 *
20 * NCR Microelectronics
21 * 1635 Aeroplaza Drive
22 * Colorado Springs, CO 80916
23 * 1+ (719) 578-3400
24 * 1+ (800) 334-5454
25 */
26
27/*
1da177e4 28 * Revision 1.10 1998/9/2 Alan Cox
fa195afe 29 * (alan@lxorguk.ukuu.org.uk)
1da177e4
LT
30 * Fixed up the timer lockups reported so far. Things still suck. Looking
31 * forward to 2.3 and per device request queues. Then it'll be possible to
32 * SMP thread this beast and improve life no end.
33
34 * Revision 1.9 1997/7/27 Ronald van Cuijlenborg
35 * (ronald.van.cuijlenborg@tip.nl or nutty@dds.nl)
36 * (hopefully) fixed and enhanced USLEEP
37 * added support for DTC3181E card (for Mustek scanner)
38 *
39
40 * Revision 1.8 Ingmar Baumgart
41 * (ingmar@gonzo.schwaben.de)
42 * added support for NCR53C400a card
43 *
44
45 * Revision 1.7 1996/3/2 Ray Van Tassle (rayvt@comm.mot.com)
46 * added proc_info
47 * added support needed for DTC 3180/3280
48 * fixed a couple of bugs
49 *
50
51 * Revision 1.5 1994/01/19 09:14:57 drew
52 * Fixed udelay() hack that was being used on DATAOUT phases
53 * instead of a proper wait for the final handshake.
54 *
55 * Revision 1.4 1994/01/19 06:44:25 drew
56 * *** empty log message ***
57 *
58 * Revision 1.3 1994/01/19 05:24:40 drew
59 * Added support for TCR LAST_BYTE_SENT bit.
60 *
61 * Revision 1.2 1994/01/15 06:14:11 drew
62 * REAL DMA support, bug fixes.
63 *
64 * Revision 1.1 1994/01/15 06:00:54 drew
65 * Initial revision
66 *
67 */
68
69/*
70 * Further development / testing that should be done :
71 * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete
72 * code so that everything does the same thing that's done at the
73 * end of a pseudo-DMA read operation.
74 *
75 * 2. Fix REAL_DMA (interrupt driven, polled works fine) -
76 * basically, transfer size needs to be reduced by one
77 * and the last byte read as is done with PSEUDO_DMA.
78 *
79 * 4. Test SCSI-II tagged queueing (I have no devices which support
80 * tagged queueing)
1da177e4
LT
81 */
82
1da177e4 83#ifndef notyet
1da177e4
LT
84#undef REAL_DMA
85#endif
86
1da177e4
LT
87#ifdef BOARD_REQUIRES_NO_DELAY
88#define io_recovery_delay(x)
89#else
90#define io_recovery_delay(x) udelay(x)
91#endif
92
93/*
94 * Design
95 *
96 * This is a generic 5380 driver. To use it on a different platform,
97 * one simply writes appropriate system specific macros (ie, data
98 * transfer - some PC's will use the I/O bus, 68K's must use
99 * memory mapped) and drops this file in their 'C' wrapper.
100 *
101 * (Note from hch: unfortunately it was not enough for the different
102 * m68k folks and instead of improving this driver they copied it
103 * and hacked it up for their needs. As a consequence they lost
104 * most updates to this driver. Maybe someone will fix all these
105 * drivers to use a common core one day..)
106 *
107 * As far as command queueing, two queues are maintained for
108 * each 5380 in the system - commands that haven't been issued yet,
109 * and commands that are currently executing. This means that an
110 * unlimited number of commands may be queued, letting
111 * more commands propagate from the higher driver levels giving higher
112 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
113 * allowing multiple commands to propagate all the way to a SCSI-II device
114 * while a command is already executing.
115 *
116 *
117 * Issues specific to the NCR5380 :
118 *
119 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
120 * piece of hardware that requires you to sit in a loop polling for
121 * the REQ signal as long as you are connected. Some devices are
122 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
686f3990 123 * while doing long seek operations. [...] These
1da177e4
LT
124 * broken devices are the exception rather than the rule and I'd rather
125 * spend my time optimizing for the normal case.
126 *
127 * Architecture :
128 *
129 * At the heart of the design is a coroutine, NCR5380_main,
130 * which is started from a workqueue for each NCR5380 host in the
131 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
132 * removing the commands from the issue queue and calling
133 * NCR5380_select() if a nexus is not established.
134 *
135 * Once a nexus is established, the NCR5380_information_transfer()
136 * phase goes through the various phases as instructed by the target.
137 * if the target goes into MSG IN and sends a DISCONNECT message,
138 * the command structure is placed into the per instance disconnected
139 * queue, and NCR5380_main tries to find more work. If the target is
140 * idle for too long, the system will try to sleep.
141 *
142 * If a command has disconnected, eventually an interrupt will trigger,
143 * calling NCR5380_intr() which will in turn call NCR5380_reselect
144 * to reestablish a nexus. This will run main if necessary.
145 *
146 * On command termination, the done function will be called as
147 * appropriate.
148 *
149 * SCSI pointers are maintained in the SCp field of SCSI command
150 * structures, being initialized after the command is connected
151 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
152 * Note that in violation of the standard, an implicit SAVE POINTERS operation
153 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
154 */
155
156/*
157 * Using this file :
158 * This file a skeleton Linux SCSI driver for the NCR 5380 series
159 * of chips. To use it, you write an architecture specific functions
160 * and macros and include this file in your driver.
161 *
162 * These macros control options :
163 * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be
164 * defined.
165 *
166 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
167 * for commands that return with a CHECK CONDITION status.
168 *
169 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
170 * transceivers.
171 *
172 * DONT_USE_INTR - if defined, never use interrupts, even if we probe or
173 * override-configure an IRQ.
174 *
1da177e4
LT
175 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
176 *
177 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
178 *
179 * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't
180 * rely on phase mismatch and EOP interrupts to determine end
181 * of phase.
182 *
1da177e4
LT
183 * Defaults for these will be provided although the user may want to adjust
184 * these to allocate CPU resources to the SCSI driver or "real" code.
185 *
1da177e4 186 * These macros MUST be defined :
1da177e4
LT
187 *
188 * NCR5380_read(register) - read from the specified register
189 *
190 * NCR5380_write(register, value) - write to the specific register
191 *
192 * NCR5380_implementation_fields - additional fields needed for this
193 * specific implementation of the NCR5380
194 *
195 * Either real DMA *or* pseudo DMA may be implemented
196 * REAL functions :
197 * NCR5380_REAL_DMA should be defined if real DMA is to be used.
198 * Note that the DMA setup functions should return the number of bytes
199 * that they were able to program the controller for.
200 *
201 * Also note that generic i386/PC versions of these macros are
202 * available as NCR5380_i386_dma_write_setup,
203 * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual.
204 *
205 * NCR5380_dma_write_setup(instance, src, count) - initialize
206 * NCR5380_dma_read_setup(instance, dst, count) - initialize
207 * NCR5380_dma_residual(instance); - residual count
208 *
209 * PSEUDO functions :
210 * NCR5380_pwrite(instance, src, count)
211 * NCR5380_pread(instance, dst, count);
212 *
213 * The generic driver is initialized by calling NCR5380_init(instance),
214 * after setting the appropriate host specific fields and ID. If the
215 * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance,
216 * possible) function may be used.
217 */
218
54d8fe44
FT
219static int do_abort(struct Scsi_Host *);
220static void do_reset(struct Scsi_Host *);
1da177e4
LT
221
222/*
223 * initialize_SCp - init the scsi pointer field
224 * @cmd: command block to set up
225 *
226 * Set up the internal fields in the SCSI command.
227 */
228
710ddd0d 229static inline void initialize_SCp(struct scsi_cmnd *cmd)
1da177e4
LT
230{
231 /*
232 * Initialize the Scsi Pointer field so that all of the commands in the
233 * various queues are valid.
234 */
235
9e0fe44d
BH
236 if (scsi_bufflen(cmd)) {
237 cmd->SCp.buffer = scsi_sglist(cmd);
238 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
45711f1a 239 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4
LT
240 cmd->SCp.this_residual = cmd->SCp.buffer->length;
241 } else {
242 cmd->SCp.buffer = NULL;
243 cmd->SCp.buffers_residual = 0;
9e0fe44d
BH
244 cmd->SCp.ptr = NULL;
245 cmd->SCp.this_residual = 0;
1da177e4 246 }
f27db8eb
FT
247
248 cmd->SCp.Status = 0;
249 cmd->SCp.Message = 0;
1da177e4
LT
250}
251
252/**
b32ade12 253 * NCR5380_poll_politely2 - wait for two chip register values
2f854b82 254 * @instance: controller to poll
b32ade12
FT
255 * @reg1: 5380 register to poll
256 * @bit1: Bitmask to check
257 * @val1: Expected value
258 * @reg2: Second 5380 register to poll
259 * @bit2: Second bitmask to check
260 * @val2: Second expected value
2f854b82
FT
261 * @wait: Time-out in jiffies
262 *
263 * Polls the chip in a reasonably efficient manner waiting for an
264 * event to occur. After a short quick poll we begin to yield the CPU
265 * (if possible). In irq contexts the time-out is arbitrarily limited.
266 * Callers may hold locks as long as they are held in irq mode.
267 *
b32ade12 268 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
1da177e4 269 */
2f854b82 270
b32ade12
FT
271static int NCR5380_poll_politely2(struct Scsi_Host *instance,
272 int reg1, int bit1, int val1,
273 int reg2, int bit2, int val2, int wait)
1da177e4 274{
2f854b82
FT
275 struct NCR5380_hostdata *hostdata = shost_priv(instance);
276 unsigned long deadline = jiffies + wait;
277 unsigned long n;
278
279 /* Busy-wait for up to 10 ms */
280 n = min(10000U, jiffies_to_usecs(wait));
281 n *= hostdata->accesses_per_ms;
b32ade12 282 n /= 2000;
2f854b82 283 do {
b32ade12
FT
284 if ((NCR5380_read(reg1) & bit1) == val1)
285 return 0;
286 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4
LT
287 return 0;
288 cpu_relax();
2f854b82
FT
289 } while (n--);
290
291 if (irqs_disabled() || in_interrupt())
292 return -ETIMEDOUT;
293
294 /* Repeatedly sleep for 1 ms until deadline */
295 while (time_is_after_jiffies(deadline)) {
296 schedule_timeout_uninterruptible(1);
b32ade12
FT
297 if ((NCR5380_read(reg1) & bit1) == val1)
298 return 0;
299 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4 300 return 0;
1da177e4 301 }
2f854b82 302
1da177e4
LT
303 return -ETIMEDOUT;
304}
305
b32ade12
FT
306static inline int NCR5380_poll_politely(struct Scsi_Host *instance,
307 int reg, int bit, int val, int wait)
308{
309 return NCR5380_poll_politely2(instance, reg, bit, val,
310 reg, bit, val, wait);
311}
312
1da177e4
LT
313static struct {
314 unsigned char value;
315 const char *name;
702809ce 316} phases[] __maybe_unused = {
1da177e4
LT
317 {PHASE_DATAOUT, "DATAOUT"},
318 {PHASE_DATAIN, "DATAIN"},
319 {PHASE_CMDOUT, "CMDOUT"},
320 {PHASE_STATIN, "STATIN"},
321 {PHASE_MSGOUT, "MSGOUT"},
322 {PHASE_MSGIN, "MSGIN"},
323 {PHASE_UNKNOWN, "UNKNOWN"}
324};
325
185a7a1c 326#if NDEBUG
1da177e4
LT
327static struct {
328 unsigned char mask;
329 const char *name;
330} signals[] = {
331 {SR_DBP, "PARITY"},
332 {SR_RST, "RST"},
333 {SR_BSY, "BSY"},
334 {SR_REQ, "REQ"},
335 {SR_MSG, "MSG"},
336 {SR_CD, "CD"},
337 {SR_IO, "IO"},
338 {SR_SEL, "SEL"},
339 {0, NULL}
340},
341basrs[] = {
342 {BASR_ATN, "ATN"},
343 {BASR_ACK, "ACK"},
344 {0, NULL}
345},
346icrs[] = {
347 {ICR_ASSERT_RST, "ASSERT RST"},
348 {ICR_ASSERT_ACK, "ASSERT ACK"},
349 {ICR_ASSERT_BSY, "ASSERT BSY"},
350 {ICR_ASSERT_SEL, "ASSERT SEL"},
351 {ICR_ASSERT_ATN, "ASSERT ATN"},
352 {ICR_ASSERT_DATA, "ASSERT DATA"},
353 {0, NULL}
354},
355mrs[] = {
356 {MR_BLOCK_DMA_MODE, "MODE BLOCK DMA"},
357 {MR_TARGET, "MODE TARGET"},
358 {MR_ENABLE_PAR_CHECK, "MODE PARITY CHECK"},
359 {MR_ENABLE_PAR_INTR, "MODE PARITY INTR"},
360 {MR_MONITOR_BSY, "MODE MONITOR BSY"},
361 {MR_DMA_MODE, "MODE DMA"},
362 {MR_ARBITRATE, "MODE ARBITRATION"},
363 {0, NULL}
364};
365
366/**
367 * NCR5380_print - print scsi bus signals
368 * @instance: adapter state to dump
369 *
370 * Print the SCSI bus signals for debugging purposes
371 *
372 * Locks: caller holds hostdata lock (not essential)
373 */
374
375static void NCR5380_print(struct Scsi_Host *instance)
376{
1da177e4 377 unsigned char status, data, basr, mr, icr, i;
1da177e4
LT
378
379 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
380 status = NCR5380_read(STATUS_REG);
381 mr = NCR5380_read(MODE_REG);
382 icr = NCR5380_read(INITIATOR_COMMAND_REG);
383 basr = NCR5380_read(BUS_AND_STATUS_REG);
384
385 printk("STATUS_REG: %02x ", status);
386 for (i = 0; signals[i].mask; ++i)
387 if (status & signals[i].mask)
388 printk(",%s", signals[i].name);
389 printk("\nBASR: %02x ", basr);
390 for (i = 0; basrs[i].mask; ++i)
391 if (basr & basrs[i].mask)
392 printk(",%s", basrs[i].name);
393 printk("\nICR: %02x ", icr);
394 for (i = 0; icrs[i].mask; ++i)
395 if (icr & icrs[i].mask)
396 printk(",%s", icrs[i].name);
397 printk("\nMODE: %02x ", mr);
398 for (i = 0; mrs[i].mask; ++i)
399 if (mr & mrs[i].mask)
400 printk(",%s", mrs[i].name);
401 printk("\n");
402}
403
404
405/*
406 * NCR5380_print_phase - show SCSI phase
407 * @instance: adapter to dump
408 *
409 * Print the current SCSI phase for debugging purposes
410 *
411 * Locks: none
412 */
413
414static void NCR5380_print_phase(struct Scsi_Host *instance)
415{
1da177e4
LT
416 unsigned char status;
417 int i;
1da177e4
LT
418
419 status = NCR5380_read(STATUS_REG);
420 if (!(status & SR_REQ))
421 printk("scsi%d : REQ not asserted, phase unknown.\n", instance->host_no);
422 else {
423 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && (phases[i].value != (status & PHASE_MASK)); ++i);
424 printk("scsi%d : phase %s\n", instance->host_no, phases[i].name);
425 }
426}
427#endif
428
1da177e4 429
d5f7e65d 430static int probe_irq __initdata;
1da177e4
LT
431
432/**
433 * probe_intr - helper for IRQ autoprobe
434 * @irq: interrupt number
435 * @dev_id: unused
436 * @regs: unused
437 *
438 * Set a flag to indicate the IRQ in question was received. This is
439 * used by the IRQ probe code.
440 */
441
7d12e780 442static irqreturn_t __init probe_intr(int irq, void *dev_id)
1da177e4
LT
443{
444 probe_irq = irq;
445 return IRQ_HANDLED;
446}
447
448/**
449 * NCR5380_probe_irq - find the IRQ of an NCR5380
450 * @instance: NCR5380 controller
451 * @possible: bitmask of ISA IRQ lines
452 *
453 * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ
454 * and then looking to see what interrupt actually turned up.
455 *
456 * Locks: none, irqs must be enabled on entry
457 */
458
702809ce
AM
459static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance,
460 int possible)
1da177e4 461{
e8a60144 462 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
463 unsigned long timeout;
464 int trying_irqs, i, mask;
1da177e4 465
22f5f10d 466 for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1)
4909cc2b 467 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0))
1da177e4
LT
468 trying_irqs |= mask;
469
4e5a800c 470 timeout = jiffies + msecs_to_jiffies(250);
22f5f10d 471 probe_irq = NO_IRQ;
1da177e4
LT
472
473 /*
474 * A interrupt is triggered whenever BSY = false, SEL = true
475 * and a bit set in the SELECT_ENABLE_REG is asserted on the
476 * SCSI bus.
477 *
478 * Note that the bus is only driven when the phase control signals
479 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that
480 * to zero.
481 */
482
483 NCR5380_write(TARGET_COMMAND_REG, 0);
484 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
485 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
486 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
487
22f5f10d 488 while (probe_irq == NO_IRQ && time_before(jiffies, timeout))
a9a3047d 489 schedule_timeout_uninterruptible(1);
1da177e4
LT
490
491 NCR5380_write(SELECT_ENABLE_REG, 0);
492 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
493
22f5f10d 494 for (i = 1, mask = 2; i < 16; ++i, mask <<= 1)
1da177e4
LT
495 if (trying_irqs & mask)
496 free_irq(i, NULL);
497
498 return probe_irq;
499}
500
501/**
8c32513b
FT
502 * NCR58380_info - report driver and host information
503 * @instance: relevant scsi host instance
1da177e4 504 *
8c32513b 505 * For use as the host template info() handler.
1da177e4
LT
506 *
507 * Locks: none
508 */
509
8c32513b 510static const char *NCR5380_info(struct Scsi_Host *instance)
1da177e4 511{
8c32513b
FT
512 struct NCR5380_hostdata *hostdata = shost_priv(instance);
513
514 return hostdata->info;
515}
516
517static void prepare_info(struct Scsi_Host *instance)
518{
519 struct NCR5380_hostdata *hostdata = shost_priv(instance);
520
521 snprintf(hostdata->info, sizeof(hostdata->info),
522 "%s, io_port 0x%lx, n_io_port %d, "
523 "base 0x%lx, irq %d, "
524 "can_queue %d, cmd_per_lun %d, "
525 "sg_tablesize %d, this_id %d, "
be3f4121 526 "flags { %s%s%s}, "
8c32513b
FT
527 "options { %s} ",
528 instance->hostt->name, instance->io_port, instance->n_io_port,
529 instance->base, instance->irq,
530 instance->can_queue, instance->cmd_per_lun,
531 instance->sg_tablesize, instance->this_id,
55181be8 532 hostdata->flags & FLAG_NO_DMA_FIXUP ? "NO_DMA_FIXUP " : "",
8c32513b 533 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
9c3f0e2b 534 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "",
1da177e4 535#ifdef AUTOPROBE_IRQ
8c32513b 536 "AUTOPROBE_IRQ "
1da177e4 537#endif
1da177e4 538#ifdef DIFFERENTIAL
8c32513b 539 "DIFFERENTIAL "
1da177e4
LT
540#endif
541#ifdef REAL_DMA
8c32513b 542 "REAL_DMA "
1da177e4
LT
543#endif
544#ifdef REAL_DMA_POLL
8c32513b 545 "REAL_DMA_POLL "
1da177e4
LT
546#endif
547#ifdef PARITY
8c32513b 548 "PARITY "
1da177e4
LT
549#endif
550#ifdef PSEUDO_DMA
8c32513b 551 "PSEUDO_DMA "
8c32513b
FT
552#endif
553 "");
1da177e4
LT
554}
555
a9c2dc43 556#ifdef PSEUDO_DMA
1da177e4
LT
557/******************************************/
558/*
559 * /proc/scsi/[dtc pas16 t128 generic]/[0-ASC_NUM_BOARD_SUPPORTED]
560 *
561 * *buffer: I/O buffer
562 * **start: if inout == FALSE pointer into buffer where user read should start
563 * offset: current offset
564 * length: length of buffer
565 * hostno: Scsi_Host host_no
566 * inout: TRUE - user is writing; FALSE - user is reading
567 *
568 * Return the number of bytes read from or written
569 */
570
dd7ab71b
AV
571static int __maybe_unused NCR5380_write_info(struct Scsi_Host *instance,
572 char *buffer, int length)
573{
a9c2dc43
FT
574 struct NCR5380_hostdata *hostdata = shost_priv(instance);
575
576 hostdata->spin_max_r = 0;
577 hostdata->spin_max_w = 0;
578 return 0;
dd7ab71b 579}
1da177e4 580
dd7ab71b
AV
581static int __maybe_unused NCR5380_show_info(struct seq_file *m,
582 struct Scsi_Host *instance)
1da177e4 583{
e8a60144 584 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 585
0c3de38f 586 seq_printf(m, "Highwater I/O busy spin counts: write %d, read %d\n",
a9c2dc43 587 hostdata->spin_max_w, hostdata->spin_max_r);
dd7ab71b 588 return 0;
1da177e4 589}
e5c3fddf 590#endif
1da177e4
LT
591
592/**
593 * NCR5380_init - initialise an NCR5380
594 * @instance: adapter to configure
595 * @flags: control flags
596 *
597 * Initializes *instance and corresponding 5380 chip,
598 * with flags OR'd into the initial flags value.
599 *
600 * Notes : I assume that the host, hostno, and id bits have been
601 * set correctly. I don't care about the irq and other fields.
602 *
603 * Returns 0 for success
604 *
605 * Locks: interrupts must be enabled when we are called
606 */
607
6f039790 608static int NCR5380_init(struct Scsi_Host *instance, int flags)
1da177e4 609{
e8a60144 610 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 611 int i;
2f854b82 612 unsigned long deadline;
1da177e4
LT
613
614 if(in_interrupt())
615 printk(KERN_ERR "NCR5380_init called with interrupts off!\n");
1da177e4 616
1da177e4
LT
617 hostdata->id_mask = 1 << instance->this_id;
618 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
619 if (i > hostdata->id_mask)
620 hostdata->id_higher_mask |= i;
621 for (i = 0; i < 8; ++i)
622 hostdata->busy[i] = 0;
623#ifdef REAL_DMA
624 hostdata->dmalen = 0;
625#endif
11d2f63b 626 spin_lock_init(&hostdata->lock);
1da177e4 627 hostdata->connected = NULL;
f27db8eb
FT
628 hostdata->sensing = NULL;
629 INIT_LIST_HEAD(&hostdata->autosense);
32b26a10
FT
630 INIT_LIST_HEAD(&hostdata->unissued);
631 INIT_LIST_HEAD(&hostdata->disconnected);
632
55181be8 633 hostdata->flags = flags;
1da177e4 634
8d8601a7 635 INIT_WORK(&hostdata->main_task, NCR5380_main);
0ad0eff9
FT
636 hostdata->work_q = alloc_workqueue("ncr5380_%d",
637 WQ_UNBOUND | WQ_MEM_RECLAIM,
638 1, instance->host_no);
639 if (!hostdata->work_q)
640 return -ENOMEM;
641
1da177e4 642 hostdata->host = instance;
1da177e4 643
8c32513b
FT
644 prepare_info(instance);
645
1da177e4
LT
646 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
647 NCR5380_write(MODE_REG, MR_BASE);
648 NCR5380_write(TARGET_COMMAND_REG, 0);
649 NCR5380_write(SELECT_ENABLE_REG, 0);
2f854b82
FT
650
651 /* Calibrate register polling loop */
652 i = 0;
653 deadline = jiffies + 1;
654 do {
655 cpu_relax();
656 } while (time_is_after_jiffies(deadline));
657 deadline += msecs_to_jiffies(256);
658 do {
659 NCR5380_read(STATUS_REG);
660 ++i;
661 cpu_relax();
662 } while (time_is_after_jiffies(deadline));
663 hostdata->accesses_per_ms = i / 256;
664
b6488f97
FT
665 return 0;
666}
1da177e4 667
b6488f97
FT
668/**
669 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
670 * @instance: adapter to check
671 *
672 * If the system crashed, it may have crashed with a connected target and
673 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
674 * currently established nexus, which we know nothing about. Failing that
675 * do a bus reset.
676 *
677 * Note that a bus reset will cause the chip to assert IRQ.
678 *
679 * Returns 0 if successful, otherwise -ENXIO.
680 */
681
682static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
683{
9c3f0e2b 684 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 685 int pass;
1da177e4
LT
686
687 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
688 switch (pass) {
689 case 1:
690 case 3:
691 case 5:
636b1ec8
FT
692 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
693 NCR5380_poll_politely(instance,
694 STATUS_REG, SR_BSY, 0, 5 * HZ);
1da177e4
LT
695 break;
696 case 2:
636b1ec8 697 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
1da177e4
LT
698 do_abort(instance);
699 break;
700 case 4:
636b1ec8 701 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
1da177e4 702 do_reset(instance);
9c3f0e2b
FT
703 /* Wait after a reset; the SCSI standard calls for
704 * 250ms, we wait 500ms to be on the safe side.
705 * But some Toshiba CD-ROMs need ten times that.
706 */
707 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
708 msleep(2500);
709 else
710 msleep(500);
1da177e4
LT
711 break;
712 case 6:
636b1ec8 713 shost_printk(KERN_ERR, instance, "bus locked solid\n");
1da177e4
LT
714 return -ENXIO;
715 }
716 }
717 return 0;
718}
719
720/**
721 * NCR5380_exit - remove an NCR5380
722 * @instance: adapter to remove
723 */
724
a43cf0f3 725static void NCR5380_exit(struct Scsi_Host *instance)
1da177e4 726{
e8a60144 727 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 728
8d8601a7 729 cancel_work_sync(&hostdata->main_task);
0ad0eff9 730 destroy_workqueue(hostdata->work_q);
1da177e4
LT
731}
732
677e0194
FT
733/**
734 * complete_cmd - finish processing a command and return it to the SCSI ML
735 * @instance: the host instance
736 * @cmd: command to complete
737 */
738
739static void complete_cmd(struct Scsi_Host *instance,
740 struct scsi_cmnd *cmd)
741{
742 struct NCR5380_hostdata *hostdata = shost_priv(instance);
743
744 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
745
f27db8eb
FT
746 if (hostdata->sensing == cmd) {
747 /* Autosense processing ends here */
748 if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
749 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
750 set_host_byte(cmd, DID_ERROR);
751 } else
752 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
753 hostdata->sensing = NULL;
754 }
755
677e0194
FT
756 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
757
758 cmd->scsi_done(cmd);
759}
760
1da177e4 761/**
1bb40589
FT
762 * NCR5380_queue_command - queue a command
763 * @instance: the relevant SCSI adapter
764 * @cmd: SCSI command
1da177e4 765 *
1bb40589
FT
766 * cmd is added to the per-instance issue queue, with minor
767 * twiddling done to the host specific fields of cmd. If the
768 * main coroutine is not running, it is restarted.
1da177e4
LT
769 */
770
1bb40589
FT
771static int NCR5380_queue_command(struct Scsi_Host *instance,
772 struct scsi_cmnd *cmd)
1da177e4 773{
1bb40589 774 struct NCR5380_hostdata *hostdata = shost_priv(instance);
32b26a10 775 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1bb40589 776 unsigned long flags;
1da177e4
LT
777
778#if (NDEBUG & NDEBUG_NO_WRITE)
779 switch (cmd->cmnd[0]) {
780 case WRITE_6:
781 case WRITE_10:
dbb6b350 782 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
1da177e4 783 cmd->result = (DID_ERROR << 16);
1bb40589 784 cmd->scsi_done(cmd);
1da177e4
LT
785 return 0;
786 }
787#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
788
1da177e4
LT
789 cmd->result = 0;
790
11d2f63b 791 spin_lock_irqsave(&hostdata->lock, flags);
1bb40589 792
1da177e4
LT
793 /*
794 * Insert the cmd into the issue queue. Note that REQUEST SENSE
795 * commands are added to the head of the queue since any command will
796 * clear the contingent allegiance condition that exists and the
797 * sense data is only guaranteed to be valid while the condition exists.
798 */
799
32b26a10
FT
800 if (cmd->cmnd[0] == REQUEST_SENSE)
801 list_add(&ncmd->list, &hostdata->unissued);
802 else
803 list_add_tail(&ncmd->list, &hostdata->unissued);
804
11d2f63b 805 spin_unlock_irqrestore(&hostdata->lock, flags);
1bb40589 806
dbb6b350
FT
807 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
808 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
1da177e4 809
1da177e4 810 /* Kick off command processing */
8d8601a7 811 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4
LT
812 return 0;
813}
814
f27db8eb
FT
815/**
816 * dequeue_next_cmd - dequeue a command for processing
817 * @instance: the scsi host instance
818 *
819 * Priority is given to commands on the autosense queue. These commands
820 * need autosense because of a CHECK CONDITION result.
821 *
822 * Returns a command pointer if a command is found for a target that is
823 * not already busy. Otherwise returns NULL.
824 */
825
826static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
827{
828 struct NCR5380_hostdata *hostdata = shost_priv(instance);
829 struct NCR5380_cmd *ncmd;
830 struct scsi_cmnd *cmd;
831
832 if (list_empty(&hostdata->autosense)) {
833 list_for_each_entry(ncmd, &hostdata->unissued, list) {
834 cmd = NCR5380_to_scmd(ncmd);
835 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
836 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
837
838 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
839 list_del(&ncmd->list);
840 dsprintk(NDEBUG_QUEUES, instance,
841 "dequeue: removed %p from issue queue\n", cmd);
842 return cmd;
843 }
844 }
845 } else {
846 /* Autosense processing begins here */
847 ncmd = list_first_entry(&hostdata->autosense,
848 struct NCR5380_cmd, list);
849 list_del(&ncmd->list);
850 cmd = NCR5380_to_scmd(ncmd);
851 dsprintk(NDEBUG_QUEUES, instance,
852 "dequeue: removed %p from autosense queue\n", cmd);
853 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
854 hostdata->sensing = cmd;
855 return cmd;
856 }
857 return NULL;
858}
859
860static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
861{
862 struct NCR5380_hostdata *hostdata = shost_priv(instance);
863 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
864
865 if (hostdata->sensing) {
866 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
867 list_add(&ncmd->list, &hostdata->autosense);
868 hostdata->sensing = NULL;
869 } else
870 list_add(&ncmd->list, &hostdata->unissued);
871}
872
1da177e4
LT
873/**
874 * NCR5380_main - NCR state machines
875 *
876 * NCR5380_main is a coroutine that runs as long as more work can
877 * be done on the NCR5380 host adapters in a system. Both
878 * NCR5380_queue_command() and NCR5380_intr() will try to start it
879 * in case it is not running.
880 *
881 * Locks: called as its own thread with no locks held. Takes the
882 * host lock and called routines may take the isa dma lock.
883 */
884
c4028958 885static void NCR5380_main(struct work_struct *work)
1da177e4 886{
c4028958 887 struct NCR5380_hostdata *hostdata =
8d8601a7 888 container_of(work, struct NCR5380_hostdata, main_task);
1da177e4 889 struct Scsi_Host *instance = hostdata->host;
f27db8eb 890 struct scsi_cmnd *cmd;
1da177e4
LT
891 int done;
892
11d2f63b 893 spin_lock_irq(&hostdata->lock);
1da177e4 894 do {
1da177e4 895 done = 1;
11d2f63b 896
f27db8eb
FT
897 while (!hostdata->connected &&
898 (cmd = dequeue_next_cmd(instance))) {
1da177e4 899
f27db8eb 900 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
76f13b93 901
f27db8eb
FT
902 /*
903 * Attempt to establish an I_T_L nexus here.
904 * On success, instance->hostdata->connected is set.
905 * On failure, we must add the command back to the
906 * issue queue so we can keep trying.
907 */
908 /*
909 * REQUEST SENSE commands are issued without tagged
910 * queueing, even on SCSI-II devices because the
911 * contingent allegiance condition exists for the
912 * entire unit.
913 */
11d2f63b 914
707d62b3
FT
915 cmd = NCR5380_select(instance, cmd);
916 if (!cmd) {
917 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
f27db8eb
FT
918 } else {
919 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
920 "main: select failed, returning %p to queue\n", cmd);
921 requeue_cmd(instance, cmd);
922 }
923 }
1da177e4
LT
924 if (hostdata->connected
925#ifdef REAL_DMA
926 && !hostdata->dmalen
927#endif
1da177e4 928 ) {
52a6a1cb 929 dprintk(NDEBUG_MAIN, "scsi%d : main() : performing information transfer\n", instance->host_no);
1da177e4 930 NCR5380_information_transfer(instance);
52a6a1cb 931 dprintk(NDEBUG_MAIN, "scsi%d : main() : done set false\n", instance->host_no);
1da177e4 932 done = 0;
1d3db59d 933 }
1da177e4 934 } while (!done);
11d2f63b 935 spin_unlock_irq(&hostdata->lock);
1da177e4
LT
936}
937
938#ifndef DONT_USE_INTR
939
940/**
cd400825
FT
941 * NCR5380_intr - generic NCR5380 irq handler
942 * @irq: interrupt number
943 * @dev_id: device info
944 *
945 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
946 * from the disconnected queue, and restarting NCR5380_main()
947 * as required.
948 *
949 * The chip can assert IRQ in any of six different conditions. The IRQ flag
950 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
951 * Three of these six conditions are latched in the Bus and Status Register:
952 * - End of DMA (cleared by ending DMA Mode)
953 * - Parity error (cleared by reading RPIR)
954 * - Loss of BSY (cleared by reading RPIR)
955 * Two conditions have flag bits that are not latched:
956 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
957 * - Bus reset (non-maskable)
958 * The remaining condition has no flag bit at all:
959 * - Selection/reselection
960 *
961 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
962 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
963 * claimed that "the design of the [DP8490] interrupt logic ensures
964 * interrupts will not be lost (they can be on the DP5380)."
965 * The L5380/53C80 datasheet from LOGIC Devices has more details.
966 *
967 * Checking for bus reset by reading RST is futile because of interrupt
968 * latency, but a bus reset will reset chip logic. Checking for parity error
969 * is unnecessary because that interrupt is never enabled. A Loss of BSY
970 * condition will clear DMA Mode. We can tell when this occurs because the
971 * the Busy Monitor interrupt is enabled together with DMA Mode.
1da177e4
LT
972 */
973
cd400825 974static irqreturn_t NCR5380_intr(int irq, void *dev_id)
1da177e4 975{
baa9aac6 976 struct Scsi_Host *instance = dev_id;
cd400825
FT
977 struct NCR5380_hostdata *hostdata = shost_priv(instance);
978 int handled = 0;
1da177e4
LT
979 unsigned char basr;
980 unsigned long flags;
981
11d2f63b 982 spin_lock_irqsave(&hostdata->lock, flags);
cd400825
FT
983
984 basr = NCR5380_read(BUS_AND_STATUS_REG);
985 if (basr & BASR_IRQ) {
986 unsigned char mr = NCR5380_read(MODE_REG);
987 unsigned char sr = NCR5380_read(STATUS_REG);
988
989 dprintk(NDEBUG_INTR, "scsi%d: IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
990 instance->host_no, irq, basr, sr, mr);
1da177e4 991
1da177e4 992#if defined(REAL_DMA)
cd400825
FT
993 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
994 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
995 * We ack IRQ after clearing Mode Register. Workarounds
996 * for End of DMA errata need to happen in DMA Mode.
997 */
1da177e4 998
cd400825 999 dprintk(NDEBUG_INTR, "scsi%d: interrupt in DMA mode\n", intance->host_no);
1da177e4 1000
cd400825 1001 int transferred;
1da177e4 1002
cd400825
FT
1003 if (!hostdata->connected)
1004 panic("scsi%d : DMA interrupt with no connected cmd\n",
1005 instance->hostno);
1da177e4 1006
cd400825
FT
1007 transferred = hostdata->dmalen - NCR5380_dma_residual(instance);
1008 hostdata->connected->SCp.this_residual -= transferred;
1009 hostdata->connected->SCp.ptr += transferred;
1010 hostdata->dmalen = 0;
1da177e4 1011
cd400825
FT
1012 /* FIXME: we need to poll briefly then defer a workqueue task ! */
1013 NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2 * HZ);
1014
1015 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1016 NCR5380_write(MODE_REG, MR_BASE);
1017 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1018 } else
1019#endif /* REAL_DMA */
1020 if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
1021 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
1022 /* Probably reselected */
1023 NCR5380_write(SELECT_ENABLE_REG, 0);
1024 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1025
1026 dprintk(NDEBUG_INTR, "scsi%d: interrupt with SEL and IO\n",
1027 instance->host_no);
1028
1029 if (!hostdata->connected) {
1030 NCR5380_reselect(instance);
1031 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4 1032 }
cd400825
FT
1033 if (!hostdata->connected)
1034 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1035 } else {
1036 /* Probably Bus Reset */
1037 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1038
1039 dprintk(NDEBUG_INTR, "scsi%d: unknown interrupt\n", instance->host_no);
1040 }
1041 handled = 1;
1042 } else {
1043 shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n");
1044 }
1045
11d2f63b 1046 spin_unlock_irqrestore(&hostdata->lock, flags);
cd400825
FT
1047
1048 return IRQ_RETVAL(handled);
1da177e4
LT
1049}
1050
1051#endif
1052
1da177e4 1053/*
710ddd0d
FT
1054 * Function : int NCR5380_select(struct Scsi_Host *instance,
1055 * struct scsi_cmnd *cmd)
1da177e4
LT
1056 *
1057 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
1058 * including ARBITRATION, SELECTION, and initial message out for
1059 * IDENTIFY and queue messages.
1060 *
1061 * Inputs : instance - instantiation of the 5380 driver on which this
76f13b93 1062 * target lives, cmd - SCSI command to execute.
1da177e4 1063 *
707d62b3
FT
1064 * Returns cmd if selection failed but should be retried,
1065 * NULL if selection failed and should not be retried, or
1066 * NULL if selection succeeded (hostdata->connected == cmd).
1da177e4
LT
1067 *
1068 * Side effects :
1069 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
1070 * with registers as they should have been on entry - ie
1071 * SELECT_ENABLE will be set appropriately, the NCR5380
1072 * will cease to drive any SCSI bus signals.
1073 *
1074 * If successful : I_T_L or I_T_L_Q nexus will be established,
1075 * instance->connected will be set to cmd.
1076 * SELECT interrupt will be disabled.
1077 *
1078 * If failed (no target) : cmd->scsi_done() will be called, and the
1079 * cmd->result host byte set to DID_BAD_TARGET.
1080 *
1081 * Locks: caller holds hostdata lock in IRQ mode
1082 */
1083
707d62b3
FT
1084static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
1085 struct scsi_cmnd *cmd)
1da177e4 1086{
e8a60144 1087 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1088 unsigned char tmp[3], phase;
1089 unsigned char *data;
1090 int len;
1da177e4 1091 int err;
1da177e4 1092
1da177e4 1093 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
52a6a1cb 1094 dprintk(NDEBUG_ARBITRATION, "scsi%d : starting arbitration, id = %d\n", instance->host_no, instance->this_id);
1da177e4 1095
707d62b3
FT
1096 /*
1097 * Arbitration and selection phases are slow and involve dropping the
1098 * lock, so we have to watch out for EH. An exception handler may
1099 * change 'selecting' to NULL. This function will then return NULL
1100 * so that the caller will forget about 'cmd'. (During information
1101 * transfer phases, EH may change 'connected' to NULL.)
1102 */
1103 hostdata->selecting = cmd;
1104
1da177e4
LT
1105 /*
1106 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1107 * data bus during SELECTION.
1108 */
1109
1110 NCR5380_write(TARGET_COMMAND_REG, 0);
1111
1112 /*
1113 * Start arbitration.
1114 */
1115
1116 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1117 NCR5380_write(MODE_REG, MR_ARBITRATE);
1118
55500d9b
FT
1119 /* The chip now waits for BUS FREE phase. Then after the 800 ns
1120 * Bus Free Delay, arbitration will begin.
1121 */
1da177e4 1122
11d2f63b 1123 spin_unlock_irq(&hostdata->lock);
b32ade12
FT
1124 err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0,
1125 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1126 ICR_ARBITRATION_PROGRESS, HZ);
11d2f63b 1127 spin_lock_irq(&hostdata->lock);
b32ade12
FT
1128 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1129 /* Reselection interrupt */
707d62b3 1130 goto out;
b32ade12
FT
1131 }
1132 if (err < 0) {
1133 NCR5380_write(MODE_REG, MR_BASE);
1134 shost_printk(KERN_ERR, instance,
1135 "select: arbitration timeout\n");
707d62b3 1136 goto out;
1da177e4 1137 }
11d2f63b 1138 spin_unlock_irq(&hostdata->lock);
1da177e4 1139
55500d9b 1140 /* The SCSI-2 arbitration delay is 2.4 us */
1da177e4
LT
1141 udelay(3);
1142
1143 /* Check for lost arbitration */
1144 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1145 NCR5380_write(MODE_REG, MR_BASE);
52a6a1cb 1146 dprintk(NDEBUG_ARBITRATION, "scsi%d : lost arbitration, deasserting MR_ARBITRATE\n", instance->host_no);
11d2f63b 1147 spin_lock_irq(&hostdata->lock);
707d62b3 1148 goto out;
1da177e4 1149 }
cf13b083
FT
1150
1151 /* After/during arbitration, BSY should be asserted.
1152 * IBM DPES-31080 Version S31Q works now
1153 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1154 */
1155 NCR5380_write(INITIATOR_COMMAND_REG,
1156 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1da177e4 1157
1da177e4
LT
1158 /*
1159 * Again, bus clear + bus settle time is 1.2us, however, this is
1160 * a minimum so we'll udelay ceil(1.2)
1161 */
1162
9c3f0e2b
FT
1163 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1164 udelay(15);
1165 else
1166 udelay(2);
1da177e4 1167
11d2f63b
FT
1168 spin_lock_irq(&hostdata->lock);
1169
72064a78
FT
1170 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1171 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
707d62b3
FT
1172 goto out;
1173
1174 if (!hostdata->selecting) {
1175 NCR5380_write(MODE_REG, MR_BASE);
1176 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1177 goto out;
1178 }
72064a78 1179
52a6a1cb 1180 dprintk(NDEBUG_ARBITRATION, "scsi%d : won arbitration\n", instance->host_no);
1da177e4
LT
1181
1182 /*
1183 * Now that we have won arbitration, start Selection process, asserting
1184 * the host and target ID's on the SCSI bus.
1185 */
1186
422c0d61 1187 NCR5380_write(OUTPUT_DATA_REG, (hostdata->id_mask | (1 << scmd_id(cmd))));
1da177e4
LT
1188
1189 /*
1190 * Raise ATN while SEL is true before BSY goes false from arbitration,
1191 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1192 * phase immediately after selection.
1193 */
1194
1195 NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_BSY | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL));
1196 NCR5380_write(MODE_REG, MR_BASE);
1197
1198 /*
1199 * Reselect interrupts must be turned off prior to the dropping of BSY,
1200 * otherwise we will trigger an interrupt.
1201 */
1202 NCR5380_write(SELECT_ENABLE_REG, 0);
1203
11d2f63b
FT
1204 spin_unlock_irq(&hostdata->lock);
1205
1da177e4
LT
1206 /*
1207 * The initiator shall then wait at least two deskew delays and release
1208 * the BSY signal.
1209 */
1210 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1211
1212 /* Reset BSY */
1213 NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL));
1214
1215 /*
1216 * Something weird happens when we cease to drive BSY - looks
1217 * like the board/chip is letting us do another read before the
1218 * appropriate propagation delay has expired, and we're confusing
1219 * a BSY signal from ourselves as the target's response to SELECTION.
1220 *
1221 * A small delay (the 'C++' frontend breaks the pipeline with an
1222 * unnecessary jump, making it work on my 386-33/Trantor T128, the
1223 * tighter 'C' code breaks and requires this) solves the problem -
1224 * the 1 us delay is arbitrary, and only used because this delay will
1225 * be the same on other platforms and since it works here, it should
1226 * work there.
1227 *
1228 * wingel suggests that this could be due to failing to wait
1229 * one deskew delay.
1230 */
1231
1232 udelay(1);
1233
52a6a1cb 1234 dprintk(NDEBUG_SELECTION, "scsi%d : selecting target %d\n", instance->host_no, scmd_id(cmd));
1da177e4
LT
1235
1236 /*
1237 * The SCSI specification calls for a 250 ms timeout for the actual
1238 * selection.
1239 */
1240
ae753a33
FT
1241 err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY,
1242 msecs_to_jiffies(250));
1da177e4 1243
1da177e4 1244 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
11d2f63b 1245 spin_lock_irq(&hostdata->lock);
1da177e4
LT
1246 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1247 NCR5380_reselect(instance);
cd400825
FT
1248 if (!hostdata->connected)
1249 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1da177e4 1250 printk("scsi%d : reselection after won arbitration?\n", instance->host_no);
707d62b3 1251 goto out;
1da177e4 1252 }
ae753a33
FT
1253
1254 if (err < 0) {
11d2f63b 1255 spin_lock_irq(&hostdata->lock);
ae753a33 1256 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
ae753a33 1257 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1258 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1259 if (hostdata->selecting) {
1260 cmd->result = DID_BAD_TARGET << 16;
1261 complete_cmd(instance, cmd);
1262 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1263 cmd = NULL;
1264 }
1265 goto out;
ae753a33
FT
1266 }
1267
1da177e4
LT
1268 /*
1269 * No less than two deskew delays after the initiator detects the
1270 * BSY signal is true, it shall release the SEL signal and may
1271 * change the DATA BUS. -wingel
1272 */
1273
1274 udelay(1);
1275
1276 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1277
1da177e4
LT
1278 /*
1279 * Since we followed the SCSI spec, and raised ATN while SEL
1280 * was true but before BSY was false during selection, the information
1281 * transfer phase should be a MESSAGE OUT phase so that we can send the
1282 * IDENTIFY message.
1283 *
1284 * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG
1285 * message (2 bytes) with a tag ID that we increment with every command
1286 * until it wraps back to 0.
1287 *
1288 * XXX - it turns out that there are some broken SCSI-II devices,
1289 * which claim to support tagged queuing but fail when more than
1290 * some number of commands are issued at once.
1291 */
1292
1293 /* Wait for start of REQ/ACK handshake */
1294
1da177e4 1295 err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 1296 spin_lock_irq(&hostdata->lock);
1cc160e1 1297 if (err < 0) {
55500d9b
FT
1298 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1299 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1da177e4 1300 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1301 goto out;
1302 }
1303 if (!hostdata->selecting) {
1304 do_abort(instance);
1305 goto out;
1da177e4
LT
1306 }
1307
52a6a1cb 1308 dprintk(NDEBUG_SELECTION, "scsi%d : target %d selected, going into MESSAGE OUT phase.\n", instance->host_no, cmd->device->id);
22f5f10d 1309 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1da177e4
LT
1310
1311 len = 1;
1312 cmd->tag = 0;
1313
1314 /* Send message(s) */
1315 data = tmp;
1316 phase = PHASE_MSGOUT;
1317 NCR5380_transfer_pio(instance, &phase, &len, &data);
52a6a1cb 1318 dprintk(NDEBUG_SELECTION, "scsi%d : nexus established.\n", instance->host_no);
1da177e4 1319 /* XXX need to handle errors here */
11d2f63b 1320
1da177e4 1321 hostdata->connected = cmd;
9cb78c16 1322 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4 1323
28424d3a 1324 initialize_SCp(cmd);
1da177e4 1325
707d62b3
FT
1326 cmd = NULL;
1327
1328out:
1329 if (!hostdata->selecting)
1330 return NULL;
1331 hostdata->selecting = NULL;
1332 return cmd;
1da177e4
LT
1333}
1334
1335/*
1336 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1337 * unsigned char *phase, int *count, unsigned char **data)
1338 *
1339 * Purpose : transfers data in given phase using polled I/O
1340 *
1341 * Inputs : instance - instance of driver, *phase - pointer to
1342 * what phase is expected, *count - pointer to number of
1343 * bytes to transfer, **data - pointer to data pointer.
1344 *
1345 * Returns : -1 when different phase is entered without transferring
25985edc 1346 * maximum number of bytes, 0 if all bytes or transferred or exit
1da177e4
LT
1347 * is in same phase.
1348 *
1349 * Also, *phase, *count, *data are modified in place.
1350 *
1351 * XXX Note : handling for bus free may be useful.
1352 */
1353
1354/*
1355 * Note : this code is not as quick as it could be, however it
1356 * IS 100% reliable, and for the actual data transfer where speed
1357 * counts, we will always do a pseudo DMA or DMA transfer.
1358 */
1359
1360static int NCR5380_transfer_pio(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data) {
1da177e4
LT
1361 unsigned char p = *phase, tmp;
1362 int c = *count;
1363 unsigned char *d = *data;
1da177e4
LT
1364
1365 if (!(p & SR_IO))
52a6a1cb 1366 dprintk(NDEBUG_PIO, "scsi%d : pio write %d bytes\n", instance->host_no, c);
1da177e4 1367 else
52a6a1cb 1368 dprintk(NDEBUG_PIO, "scsi%d : pio read %d bytes\n", instance->host_no, c);
1da177e4
LT
1369
1370 /*
1371 * The NCR5380 chip will only drive the SCSI bus when the
1372 * phase specified in the appropriate bits of the TARGET COMMAND
1373 * REGISTER match the STATUS REGISTER
1374 */
1375
1376 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1377
1da177e4
LT
1378 do {
1379 /*
1380 * Wait for assertion of REQ, after which the phase bits will be
1381 * valid
1382 */
1383
686f3990 1384 if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1da177e4 1385 break;
1da177e4 1386
52a6a1cb 1387 dprintk(NDEBUG_HANDSHAKE, "scsi%d : REQ detected\n", instance->host_no);
1da177e4
LT
1388
1389 /* Check for phase mismatch */
686f3990 1390 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
52a6a1cb 1391 dprintk(NDEBUG_HANDSHAKE, "scsi%d : phase mismatch\n", instance->host_no);
1da177e4
LT
1392 NCR5380_dprint_phase(NDEBUG_HANDSHAKE, instance);
1393 break;
1394 }
1395 /* Do actual transfer from SCSI bus to / from memory */
1396 if (!(p & SR_IO))
1397 NCR5380_write(OUTPUT_DATA_REG, *d);
1398 else
1399 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1400
1401 ++d;
1402
1403 /*
1404 * The SCSI standard suggests that in MSGOUT phase, the initiator
1405 * should drop ATN on the last byte of the message phase
1406 * after REQ has been asserted for the handshake but before
1407 * the initiator raises ACK.
1408 */
1409
1410 if (!(p & SR_IO)) {
1411 if (!((p & SR_MSG) && c > 1)) {
1412 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1413 NCR5380_dprint(NDEBUG_PIO, instance);
1414 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1415 } else {
1416 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1417 NCR5380_dprint(NDEBUG_PIO, instance);
1418 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1419 }
1420 } else {
1421 NCR5380_dprint(NDEBUG_PIO, instance);
1422 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1423 }
1424
a2edc4a6
FT
1425 if (NCR5380_poll_politely(instance,
1426 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1427 break;
1428
52a6a1cb 1429 dprintk(NDEBUG_HANDSHAKE, "scsi%d : req false, handshake complete\n", instance->host_no);
1da177e4
LT
1430
1431/*
1432 * We have several special cases to consider during REQ/ACK handshaking :
1433 * 1. We were in MSGOUT phase, and we are on the last byte of the
1434 * message. ATN must be dropped as ACK is dropped.
1435 *
1436 * 2. We are in a MSGIN phase, and we are on the last byte of the
1437 * message. We must exit with ACK asserted, so that the calling
1438 * code may raise ATN before dropping ACK to reject the message.
1439 *
1440 * 3. ACK and ATN are clear and the target may proceed as normal.
1441 */
1442 if (!(p == PHASE_MSGIN && c == 1)) {
1443 if (p == PHASE_MSGOUT && c > 1)
1444 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1445 else
1446 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1447 }
1448 } while (--c);
1449
52a6a1cb 1450 dprintk(NDEBUG_PIO, "scsi%d : residual %d\n", instance->host_no, c);
1da177e4
LT
1451
1452 *count = c;
1453 *data = d;
1454 tmp = NCR5380_read(STATUS_REG);
a2edc4a6
FT
1455 /* The phase read from the bus is valid if either REQ is (already)
1456 * asserted or if ACK hasn't been released yet. The latter applies if
1457 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1458 */
1459 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1da177e4
LT
1460 *phase = tmp & PHASE_MASK;
1461 else
1462 *phase = PHASE_UNKNOWN;
1463
1464 if (!c || (*phase == p))
1465 return 0;
1466 else
1467 return -1;
1468}
1469
1470/**
636b1ec8
FT
1471 * do_reset - issue a reset command
1472 * @instance: adapter to reset
1da177e4 1473 *
636b1ec8
FT
1474 * Issue a reset sequence to the NCR5380 and try and get the bus
1475 * back into sane shape.
1da177e4 1476 *
636b1ec8
FT
1477 * This clears the reset interrupt flag because there may be no handler for
1478 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1479 * been installed. And when in EH we may have released the ST DMA interrupt.
1da177e4
LT
1480 */
1481
54d8fe44
FT
1482static void do_reset(struct Scsi_Host *instance)
1483{
636b1ec8
FT
1484 unsigned long flags;
1485
1486 local_irq_save(flags);
1487 NCR5380_write(TARGET_COMMAND_REG,
1488 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1da177e4 1489 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
636b1ec8 1490 udelay(50);
1da177e4 1491 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
636b1ec8
FT
1492 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1493 local_irq_restore(flags);
1da177e4
LT
1494}
1495
80d3eb6d
FT
1496/**
1497 * do_abort - abort the currently established nexus by going to
1498 * MESSAGE OUT phase and sending an ABORT message.
1499 * @instance: relevant scsi host instance
1da177e4 1500 *
80d3eb6d 1501 * Returns 0 on success, -1 on failure.
1da177e4
LT
1502 */
1503
54d8fe44
FT
1504static int do_abort(struct Scsi_Host *instance)
1505{
1da177e4
LT
1506 unsigned char *msgptr, phase, tmp;
1507 int len;
1508 int rc;
1da177e4
LT
1509
1510 /* Request message out phase */
1511 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1512
1513 /*
1514 * Wait for the target to indicate a valid phase by asserting
1515 * REQ. Once this happens, we'll have either a MSGOUT phase
1516 * and can immediately send the ABORT message, or we'll have some
1517 * other phase and will have to source/sink data.
1518 *
1519 * We really don't care what value was on the bus or what value
1520 * the target sees, so we just handshake.
1521 */
1522
80d3eb6d 1523 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1cc160e1 1524 if (rc < 0)
80d3eb6d 1525 goto timeout;
1da177e4 1526
f35d3474 1527 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1da177e4
LT
1528
1529 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1530
f35d3474 1531 if (tmp != PHASE_MSGOUT) {
1da177e4 1532 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
54d8fe44 1533 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ);
1cc160e1 1534 if (rc < 0)
80d3eb6d
FT
1535 goto timeout;
1536 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1da177e4
LT
1537 }
1538 tmp = ABORT;
1539 msgptr = &tmp;
1540 len = 1;
1541 phase = PHASE_MSGOUT;
54d8fe44 1542 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1da177e4
LT
1543
1544 /*
1545 * If we got here, and the command completed successfully,
1546 * we're about to go into bus free state.
1547 */
1548
1549 return len ? -1 : 0;
80d3eb6d
FT
1550
1551timeout:
1552 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1553 return -1;
1da177e4
LT
1554}
1555
1556#if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL)
1557/*
1558 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1559 * unsigned char *phase, int *count, unsigned char **data)
1560 *
1561 * Purpose : transfers data in given phase using either real
1562 * or pseudo DMA.
1563 *
1564 * Inputs : instance - instance of driver, *phase - pointer to
1565 * what phase is expected, *count - pointer to number of
1566 * bytes to transfer, **data - pointer to data pointer.
1567 *
1568 * Returns : -1 when different phase is entered without transferring
25985edc 1569 * maximum number of bytes, 0 if all bytes or transferred or exit
1da177e4
LT
1570 * is in same phase.
1571 *
1572 * Also, *phase, *count, *data are modified in place.
1573 *
1574 * Locks: io_request lock held by caller
1575 */
1576
1577
1578static int NCR5380_transfer_dma(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data) {
1da177e4
LT
1579 register int c = *count;
1580 register unsigned char p = *phase;
1581 register unsigned char *d = *data;
1582 unsigned char tmp;
1583 int foo;
1584#if defined(REAL_DMA_POLL)
1585 int cnt, toPIO;
1586 unsigned char saved_data = 0, overrun = 0, residue;
1587#endif
1588
e8a60144 1589 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 1590
1da177e4
LT
1591 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1592 *phase = tmp;
1593 return -1;
1594 }
1595#if defined(REAL_DMA) || defined(REAL_DMA_POLL)
1da177e4 1596 if (p & SR_IO) {
9db6024e
FT
1597 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS))
1598 c -= 2;
1da177e4 1599 }
52a6a1cb 1600 dprintk(NDEBUG_DMA, "scsi%d : initializing DMA channel %d for %s, %d bytes %s %0x\n", instance->host_no, instance->dma_channel, (p & SR_IO) ? "reading" : "writing", c, (p & SR_IO) ? "to" : "from", (unsigned) d);
1da177e4
LT
1601 hostdata->dma_len = (p & SR_IO) ? NCR5380_dma_read_setup(instance, d, c) : NCR5380_dma_write_setup(instance, d, c);
1602#endif
1603
1604 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1605
1606#ifdef REAL_DMA
cd400825
FT
1607 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1608 MR_ENABLE_EOP_INTR);
1da177e4 1609#elif defined(REAL_DMA_POLL)
cd400825 1610 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1611#else
1612 /*
1613 * Note : on my sample board, watch-dog timeouts occurred when interrupts
1614 * were not disabled for the duration of a single DMA transfer, from
1615 * before the setting of DMA mode to after transfer of the last byte.
1616 */
1617
55181be8 1618 if (hostdata->flags & FLAG_NO_DMA_FIXUP)
cd400825
FT
1619 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1620 MR_ENABLE_EOP_INTR);
1da177e4 1621 else
cd400825 1622 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1623#endif /* def REAL_DMA */
1624
52a6a1cb 1625 dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG));
1da177e4
LT
1626
1627 /*
1628 * On the PAS16 at least I/O recovery delays are not needed here.
1629 * Everyone else seems to want them.
1630 */
1631
1632 if (p & SR_IO) {
1633 io_recovery_delay(1);
1634 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1635 } else {
1636 io_recovery_delay(1);
1637 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1638 io_recovery_delay(1);
1639 NCR5380_write(START_DMA_SEND_REG, 0);
1640 io_recovery_delay(1);
1641 }
1642
1643#if defined(REAL_DMA_POLL)
1644 do {
1645 tmp = NCR5380_read(BUS_AND_STATUS_REG);
1646 } while ((tmp & BASR_PHASE_MATCH) && !(tmp & (BASR_BUSY_ERROR | BASR_END_DMA_TRANSFER)));
1647
1648/*
1649 At this point, either we've completed DMA, or we have a phase mismatch,
1650 or we've unexpectedly lost BUSY (which is a real error).
1651
1652 For write DMAs, we want to wait until the last byte has been
1653 transferred out over the bus before we turn off DMA mode. Alas, there
1654 seems to be no terribly good way of doing this on a 5380 under all
1655 conditions. For non-scatter-gather operations, we can wait until REQ
1656 and ACK both go false, or until a phase mismatch occurs. Gather-writes
1657 are nastier, since the device will be expecting more data than we
1658 are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1659 could test LAST BIT SENT to assure transfer (I imagine this is precisely
1660 why this signal was added to the newer chips) but on the older 538[01]
1661 this signal does not exist. The workaround for this lack is a watchdog;
1662 we bail out of the wait-loop after a modest amount of wait-time if
1663 the usual exit conditions are not met. Not a terribly clean or
1664 correct solution :-%
1665
1666 Reads are equally tricky due to a nasty characteristic of the NCR5380.
1667 If the chip is in DMA mode for an READ, it will respond to a target's
1668 REQ by latching the SCSI data into the INPUT DATA register and asserting
1669 ACK, even if it has _already_ been notified by the DMA controller that
1670 the current DMA transfer has completed! If the NCR5380 is then taken
1671 out of DMA mode, this already-acknowledged byte is lost.
1672
1673 This is not a problem for "one DMA transfer per command" reads, because
1674 the situation will never arise... either all of the data is DMA'ed
1675 properly, or the target switches to MESSAGE IN phase to signal a
1676 disconnection (either operation bringing the DMA to a clean halt).
1677 However, in order to handle scatter-reads, we must work around the
1678 problem. The chosen fix is to DMA N-2 bytes, then check for the
1679 condition before taking the NCR5380 out of DMA mode. One or two extra
1680 bytes are transferred via PIO as necessary to fill out the original
1681 request.
1682 */
1683
1684 if (p & SR_IO) {
9db6024e
FT
1685 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) {
1686 udelay(10);
1687 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
1688 (BASR_PHASE_MATCH | BASR_ACK)) {
1689 saved_data = NCR5380_read(INPUT_DATA_REGISTER);
1690 overrun = 1;
1691 }
1da177e4 1692 }
1da177e4
LT
1693 } else {
1694 int limit = 100;
1695 while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) {
1696 if (!(tmp & BASR_PHASE_MATCH))
1697 break;
1698 if (--limit < 0)
1699 break;
1700 }
1701 }
1702
52a6a1cb 1703 dprintk(NDEBUG_DMA, "scsi%d : polled DMA transfer complete, basr 0x%X, sr 0x%X\n", instance->host_no, tmp, NCR5380_read(STATUS_REG));
1da177e4
LT
1704
1705 NCR5380_write(MODE_REG, MR_BASE);
1706 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1707
1708 residue = NCR5380_dma_residual(instance);
1709 c -= residue;
1710 *count -= c;
1711 *data += c;
1712 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1713
9db6024e
FT
1714 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS) &&
1715 *phase == p && (p & SR_IO) && residue == 0) {
1da177e4 1716 if (overrun) {
52a6a1cb 1717 dprintk(NDEBUG_DMA, "Got an input overrun, using saved byte\n");
1da177e4
LT
1718 **data = saved_data;
1719 *data += 1;
1720 *count -= 1;
1721 cnt = toPIO = 1;
1722 } else {
1723 printk("No overrun??\n");
1724 cnt = toPIO = 2;
1725 }
52a6a1cb 1726 dprintk(NDEBUG_DMA, "Doing %d-byte PIO to 0x%X\n", cnt, *data);
1da177e4
LT
1727 NCR5380_transfer_pio(instance, phase, &cnt, data);
1728 *count -= toPIO - cnt;
1729 }
1da177e4 1730
52a6a1cb 1731 dprintk(NDEBUG_DMA, "Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n", *data, *count, *(*data + *count - 1), *(*data + *count));
1da177e4
LT
1732 return 0;
1733
1734#elif defined(REAL_DMA)
1735 return 0;
1736#else /* defined(REAL_DMA_POLL) */
1737 if (p & SR_IO) {
55181be8
FT
1738 foo = NCR5380_pread(instance, d,
1739 hostdata->flags & FLAG_NO_DMA_FIXUP ? c : c - 1);
1740 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4
LT
1741 /*
1742 * We can't disable DMA mode after successfully transferring
1743 * what we plan to be the last byte, since that would open up
1744 * a race condition where if the target asserted REQ before
1745 * we got the DMA mode reset, the NCR5380 would have latched
1746 * an additional byte into the INPUT DATA register and we'd
1747 * have dropped it.
1748 *
1749 * The workaround was to transfer one fewer bytes than we
1750 * intended to with the pseudo-DMA read function, wait for
1751 * the chip to latch the last byte, read it, and then disable
1752 * pseudo-DMA mode.
1753 *
1754 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1755 * REQ is deasserted when ACK is asserted, and not reasserted
1756 * until ACK goes false. Since the NCR5380 won't lower ACK
1757 * until DACK is asserted, which won't happen unless we twiddle
1758 * the DMA port or we take the NCR5380 out of DMA mode, we
1759 * can guarantee that we won't handshake another extra
1760 * byte.
1761 */
1762
55181be8
FT
1763 if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG,
1764 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1765 foo = -1;
1766 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1767 }
1768 if (NCR5380_poll_politely(instance, STATUS_REG,
1769 SR_REQ, 0, HZ) < 0) {
1770 foo = -1;
1771 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1da177e4 1772 }
55181be8 1773 d[c - 1] = NCR5380_read(INPUT_DATA_REG);
1da177e4 1774 }
1da177e4 1775 } else {
1da177e4 1776 foo = NCR5380_pwrite(instance, d, c);
55181be8 1777 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4
LT
1778 /*
1779 * Wait for the last byte to be sent. If REQ is being asserted for
1780 * the byte we're interested, we'll ACK it and it will go false.
1781 */
55181be8
FT
1782 if (NCR5380_poll_politely2(instance,
1783 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1784 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1785 foo = -1;
1786 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1da177e4
LT
1787 }
1788 }
1da177e4
LT
1789 }
1790 NCR5380_write(MODE_REG, MR_BASE);
1791 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
cd400825 1792 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1da177e4
LT
1793 *data = d + c;
1794 *count = 0;
1795 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1da177e4
LT
1796 return foo;
1797#endif /* def REAL_DMA */
1798}
1799#endif /* defined(REAL_DMA) | defined(PSEUDO_DMA) */
1800
1801/*
1802 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1803 *
1804 * Purpose : run through the various SCSI phases and do as the target
1805 * directs us to. Operates on the currently connected command,
1806 * instance->connected.
1807 *
1808 * Inputs : instance, instance for which we are doing commands
1809 *
1810 * Side effects : SCSI things happen, the disconnected queue will be
1811 * modified if a command disconnects, *instance->connected will
1812 * change.
1813 *
1814 * XXX Note : we need to watch for bus free or a reset condition here
1815 * to recover from an unexpected bus free condition.
1816 *
1817 * Locks: io_request_lock held by caller in IRQ mode
1818 */
1819
1820static void NCR5380_information_transfer(struct Scsi_Host *instance) {
e8a60144 1821 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1822 unsigned char msgout = NOP;
1823 int sink = 0;
1824 int len;
1825#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
1826 int transfersize;
1827#endif
1828 unsigned char *data;
1829 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
11d2f63b 1830 struct scsi_cmnd *cmd;
1da177e4 1831
11d2f63b 1832 while ((cmd = hostdata->connected)) {
32b26a10
FT
1833 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1834
1da177e4
LT
1835 tmp = NCR5380_read(STATUS_REG);
1836 /* We only have a valid SCSI phase when REQ is asserted */
1837 if (tmp & SR_REQ) {
1838 phase = (tmp & PHASE_MASK);
1839 if (phase != old_phase) {
1840 old_phase = phase;
1841 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1842 }
1843 if (sink && (phase != PHASE_MSGOUT)) {
1844 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1845
1846 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1847 while (NCR5380_read(STATUS_REG) & SR_REQ);
1848 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1849 sink = 0;
1850 continue;
1851 }
1852 switch (phase) {
1da177e4
LT
1853 case PHASE_DATAOUT:
1854#if (NDEBUG & NDEBUG_NO_DATAOUT)
1855 printk("scsi%d : NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n", instance->host_no);
1856 sink = 1;
1857 do_abort(instance);
1858 cmd->result = DID_ERROR << 16;
677e0194 1859 complete_cmd(instance, cmd);
1da177e4
LT
1860 return;
1861#endif
bf1a0c6f 1862 case PHASE_DATAIN:
1da177e4
LT
1863 /*
1864 * If there is no room left in the current buffer in the
1865 * scatter-gather list, move onto the next one.
1866 */
1867
1868 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1869 ++cmd->SCp.buffer;
1870 --cmd->SCp.buffers_residual;
1871 cmd->SCp.this_residual = cmd->SCp.buffer->length;
45711f1a 1872 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
52a6a1cb 1873 dprintk(NDEBUG_INFORMATION, "scsi%d : %d bytes and %d buffers left\n", instance->host_no, cmd->SCp.this_residual, cmd->SCp.buffers_residual);
1da177e4
LT
1874 }
1875 /*
1876 * The preferred transfer method is going to be
1877 * PSEUDO-DMA for systems that are strictly PIO,
1878 * since we can let the hardware do the handshaking.
1879 *
1880 * For this to work, we need to know the transfersize
1881 * ahead of time, since the pseudo-DMA code will sit
1882 * in an unconditional loop.
1883 */
1884
1885#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
ff3d4578
FT
1886 transfersize = 0;
1887 if (!cmd->device->borken &&
1888 !(hostdata->flags & FLAG_NO_PSEUDO_DMA))
1889 transfersize = NCR5380_dma_xfer_len(instance, cmd, phase);
1890
1891 if (transfersize) {
1da177e4
LT
1892 len = transfersize;
1893 if (NCR5380_transfer_dma(instance, &phase, &len, (unsigned char **) &cmd->SCp.ptr)) {
1894 /*
1895 * If the watchdog timer fires, all future accesses to this
1896 * device will use the polled-IO.
1897 */
017560fc
JG
1898 scmd_printk(KERN_INFO, cmd,
1899 "switching to slow handshake\n");
1da177e4 1900 cmd->device->borken = 1;
1da177e4
LT
1901 sink = 1;
1902 do_abort(instance);
1903 cmd->result = DID_ERROR << 16;
677e0194 1904 complete_cmd(instance, cmd);
1da177e4
LT
1905 /* XXX - need to source or sink data here, as appropriate */
1906 } else
1907 cmd->SCp.this_residual -= transfersize - len;
1908 } else
1909#endif /* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */
11d2f63b
FT
1910 {
1911 spin_unlock_irq(&hostdata->lock);
1da177e4
LT
1912 NCR5380_transfer_pio(instance, &phase, (int *) &cmd->SCp.this_residual, (unsigned char **)
1913 &cmd->SCp.ptr);
11d2f63b
FT
1914 spin_lock_irq(&hostdata->lock);
1915 }
1da177e4
LT
1916 break;
1917 case PHASE_MSGIN:
1918 len = 1;
1919 data = &tmp;
1920 NCR5380_transfer_pio(instance, &phase, &len, &data);
1921 cmd->SCp.Message = tmp;
1922
1923 switch (tmp) {
1da177e4
LT
1924 case ABORT:
1925 case COMMAND_COMPLETE:
1926 /* Accept message by clearing ACK */
1927 sink = 1;
1928 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0d3d9a42
FT
1929 dsprintk(NDEBUG_QUEUES, instance,
1930 "COMMAND COMPLETE %p target %d lun %llu\n",
1931 cmd, scmd_id(cmd), cmd->device->lun);
1932
1da177e4 1933 hostdata->connected = NULL;
1da177e4 1934
f27db8eb
FT
1935 cmd->result &= ~0xffff;
1936 cmd->result |= cmd->SCp.Status;
1937 cmd->result |= cmd->SCp.Message << 8;
28424d3a 1938
f27db8eb 1939 if (cmd->cmnd[0] == REQUEST_SENSE)
677e0194 1940 complete_cmd(instance, cmd);
f27db8eb
FT
1941 else {
1942 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1943 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1944 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1945 cmd);
1946 list_add_tail(&ncmd->list,
1947 &hostdata->autosense);
1948 } else
1949 complete_cmd(instance, cmd);
1da177e4
LT
1950 }
1951
1da177e4
LT
1952 /*
1953 * Restore phase bits to 0 so an interrupted selection,
1954 * arbitration can resume.
1955 */
1956 NCR5380_write(TARGET_COMMAND_REG, 0);
72064a78
FT
1957
1958 /* Enable reselect interrupts */
1959 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1da177e4
LT
1960 return;
1961 case MESSAGE_REJECT:
1962 /* Accept message by clearing ACK */
1963 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1964 switch (hostdata->last_message) {
1965 case HEAD_OF_QUEUE_TAG:
1966 case ORDERED_QUEUE_TAG:
1967 case SIMPLE_QUEUE_TAG:
1968 cmd->device->simple_tags = 0;
9cb78c16 1969 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4
LT
1970 break;
1971 default:
1972 break;
1973 }
340b9612 1974 break;
1da177e4
LT
1975 case DISCONNECT:{
1976 /* Accept message by clearing ACK */
1977 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1da177e4 1978 hostdata->connected = NULL;
32b26a10 1979 list_add(&ncmd->list, &hostdata->disconnected);
0d3d9a42
FT
1980 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1981 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1982 cmd, scmd_id(cmd), cmd->device->lun);
1983
1da177e4
LT
1984 /*
1985 * Restore phase bits to 0 so an interrupted selection,
1986 * arbitration can resume.
1987 */
1988 NCR5380_write(TARGET_COMMAND_REG, 0);
1989
1990 /* Enable reselect interrupts */
1991 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1da177e4
LT
1992 return;
1993 }
1994 /*
1995 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1996 * operation, in violation of the SCSI spec so we can safely
1997 * ignore SAVE/RESTORE pointers calls.
1998 *
1999 * Unfortunately, some disks violate the SCSI spec and
2000 * don't issue the required SAVE_POINTERS message before
2001 * disconnecting, and we have to break spec to remain
2002 * compatible.
2003 */
2004 case SAVE_POINTERS:
2005 case RESTORE_POINTERS:
2006 /* Accept message by clearing ACK */
2007 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2008 break;
2009 case EXTENDED_MESSAGE:
2010/*
2011 * Extended messages are sent in the following format :
2012 * Byte
2013 * 0 EXTENDED_MESSAGE == 1
2014 * 1 length (includes one byte for code, doesn't
2015 * include first two bytes)
2016 * 2 code
2017 * 3..length+1 arguments
2018 *
2019 * Start the extended message buffer with the EXTENDED_MESSAGE
1abfd370 2020 * byte, since spi_print_msg() wants the whole thing.
1da177e4
LT
2021 */
2022 extended_msg[0] = EXTENDED_MESSAGE;
2023 /* Accept first byte by clearing ACK */
2024 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
11d2f63b
FT
2025
2026 spin_unlock_irq(&hostdata->lock);
2027
52a6a1cb 2028 dprintk(NDEBUG_EXTENDED, "scsi%d : receiving extended message\n", instance->host_no);
1da177e4
LT
2029
2030 len = 2;
2031 data = extended_msg + 1;
2032 phase = PHASE_MSGIN;
2033 NCR5380_transfer_pio(instance, &phase, &len, &data);
2034
52a6a1cb 2035 dprintk(NDEBUG_EXTENDED, "scsi%d : length=%d, code=0x%02x\n", instance->host_no, (int) extended_msg[1], (int) extended_msg[2]);
1da177e4 2036
e0783ed3
FT
2037 if (!len && extended_msg[1] > 0 &&
2038 extended_msg[1] <= sizeof(extended_msg) - 2) {
1da177e4
LT
2039 /* Accept third byte by clearing ACK */
2040 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2041 len = extended_msg[1] - 1;
2042 data = extended_msg + 3;
2043 phase = PHASE_MSGIN;
2044
2045 NCR5380_transfer_pio(instance, &phase, &len, &data);
52a6a1cb 2046 dprintk(NDEBUG_EXTENDED, "scsi%d : message received, residual %d\n", instance->host_no, len);
1da177e4
LT
2047
2048 switch (extended_msg[2]) {
2049 case EXTENDED_SDTR:
2050 case EXTENDED_WDTR:
2051 case EXTENDED_MODIFY_DATA_POINTER:
2052 case EXTENDED_EXTENDED_IDENTIFY:
2053 tmp = 0;
2054 }
2055 } else if (len) {
2056 printk("scsi%d: error receiving extended message\n", instance->host_no);
2057 tmp = 0;
2058 } else {
2059 printk("scsi%d: extended message code %02x length %d is too long\n", instance->host_no, extended_msg[2], extended_msg[1]);
2060 tmp = 0;
2061 }
11d2f63b
FT
2062
2063 spin_lock_irq(&hostdata->lock);
2064 if (!hostdata->connected)
2065 return;
2066
1da177e4
LT
2067 /* Fall through to reject message */
2068
2069 /*
2070 * If we get something weird that we aren't expecting,
2071 * reject it.
2072 */
2073 default:
2074 if (!tmp) {
2075 printk("scsi%d: rejecting message ", instance->host_no);
1abfd370 2076 spi_print_msg(extended_msg);
1da177e4
LT
2077 printk("\n");
2078 } else if (tmp != EXTENDED_MESSAGE)
017560fc
JG
2079 scmd_printk(KERN_INFO, cmd,
2080 "rejecting unknown message %02x\n",tmp);
1da177e4 2081 else
017560fc
JG
2082 scmd_printk(KERN_INFO, cmd,
2083 "rejecting unknown extended message code %02x, length %d\n", extended_msg[1], extended_msg[0]);
1da177e4
LT
2084
2085 msgout = MESSAGE_REJECT;
2086 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
2087 break;
2088 } /* switch (tmp) */
2089 break;
2090 case PHASE_MSGOUT:
2091 len = 1;
2092 data = &msgout;
2093 hostdata->last_message = msgout;
2094 NCR5380_transfer_pio(instance, &phase, &len, &data);
2095 if (msgout == ABORT) {
1da177e4
LT
2096 hostdata->connected = NULL;
2097 cmd->result = DID_ERROR << 16;
677e0194 2098 complete_cmd(instance, cmd);
1da177e4
LT
2099 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
2100 return;
2101 }
2102 msgout = NOP;
2103 break;
2104 case PHASE_CMDOUT:
2105 len = cmd->cmd_len;
2106 data = cmd->cmnd;
2107 /*
2108 * XXX for performance reasons, on machines with a
2109 * PSEUDO-DMA architecture we should probably
2110 * use the dma transfer function.
2111 */
2112 NCR5380_transfer_pio(instance, &phase, &len, &data);
1da177e4
LT
2113 break;
2114 case PHASE_STATIN:
2115 len = 1;
2116 data = &tmp;
2117 NCR5380_transfer_pio(instance, &phase, &len, &data);
2118 cmd->SCp.Status = tmp;
2119 break;
2120 default:
2121 printk("scsi%d : unknown phase\n", instance->host_no);
4dde8f7d 2122 NCR5380_dprint(NDEBUG_ANY, instance);
1da177e4 2123 } /* switch(phase) */
686f3990 2124 } else {
11d2f63b 2125 spin_unlock_irq(&hostdata->lock);
686f3990 2126 NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 2127 spin_lock_irq(&hostdata->lock);
1da177e4 2128 }
11d2f63b 2129 }
1da177e4
LT
2130}
2131
2132/*
2133 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2134 *
2135 * Purpose : does reselection, initializing the instance->connected
710ddd0d 2136 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
1da177e4
LT
2137 * nexus has been reestablished,
2138 *
2139 * Inputs : instance - this instance of the NCR5380.
2140 *
2141 * Locks: io_request_lock held by caller if IRQ driven
2142 */
2143
2144static void NCR5380_reselect(struct Scsi_Host *instance) {
e8a60144 2145 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
2146 unsigned char target_mask;
2147 unsigned char lun, phase;
2148 int len;
2149 unsigned char msg[3];
2150 unsigned char *data;
32b26a10
FT
2151 struct NCR5380_cmd *ncmd;
2152 struct scsi_cmnd *tmp;
1da177e4
LT
2153
2154 /*
2155 * Disable arbitration, etc. since the host adapter obviously
2156 * lost, and tell an interrupted NCR5380_select() to restart.
2157 */
2158
2159 NCR5380_write(MODE_REG, MR_BASE);
1da177e4
LT
2160
2161 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
72064a78 2162 dprintk(NDEBUG_RESELECTION, "scsi%d : reselect\n", instance->host_no);
1da177e4
LT
2163
2164 /*
2165 * At this point, we have detected that our SCSI ID is on the bus,
2166 * SEL is true and BSY was false for at least one bus settle delay
2167 * (400 ns).
2168 *
2169 * We must assert BSY ourselves, until the target drops the SEL
2170 * signal.
2171 */
2172
2173 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
72064a78
FT
2174 if (NCR5380_poll_politely(instance,
2175 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2176 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2177 return;
2178 }
1da177e4
LT
2179 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2180
2181 /*
2182 * Wait for target to go into MSGIN.
1da177e4
LT
2183 */
2184
1cc160e1 2185 if (NCR5380_poll_politely(instance,
72064a78
FT
2186 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2187 do_abort(instance);
2188 return;
2189 }
1da177e4
LT
2190
2191 len = 1;
2192 data = msg;
2193 phase = PHASE_MSGIN;
2194 NCR5380_transfer_pio(instance, &phase, &len, &data);
2195
72064a78
FT
2196 if (len) {
2197 do_abort(instance);
2198 return;
2199 }
2200
1da177e4 2201 if (!(msg[0] & 0x80)) {
72064a78 2202 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
1abfd370 2203 spi_print_msg(msg);
72064a78
FT
2204 printk("\n");
2205 do_abort(instance);
2206 return;
2207 }
2208 lun = msg[0] & 0x07;
1da177e4 2209
72064a78
FT
2210 /*
2211 * We need to add code for SCSI-II to track which devices have
2212 * I_T_L_Q nexuses established, and which have simple I_T_L
2213 * nexuses so we can chose to do additional data transfer.
2214 */
1da177e4 2215
72064a78
FT
2216 /*
2217 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2218 * just reestablished, and remove it from the disconnected queue.
2219 */
1da177e4 2220
32b26a10
FT
2221 tmp = NULL;
2222 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2223 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2224
2225 if (target_mask == (1 << scmd_id(cmd)) &&
2226 lun == (u8)cmd->device->lun) {
2227 list_del(&ncmd->list);
2228 tmp = cmd;
72064a78 2229 break;
1da177e4
LT
2230 }
2231 }
0d3d9a42
FT
2232
2233 if (tmp) {
2234 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2235 "reselect: removed %p from disconnected queue\n", tmp);
2236 } else {
72064a78
FT
2237 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2238 target_mask, lun);
2239 /*
2240 * Since we have an established nexus that we can't do anything with,
2241 * we must abort it.
2242 */
1da177e4 2243 do_abort(instance);
72064a78 2244 return;
1da177e4 2245 }
72064a78
FT
2246
2247 /* Accept message by clearing ACK */
2248 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2249
2250 hostdata->connected = tmp;
2251 dprintk(NDEBUG_RESELECTION, "scsi%d : nexus established, target = %d, lun = %llu, tag = %d\n",
2252 instance->host_no, tmp->device->id, tmp->device->lun, tmp->tag);
1da177e4
LT
2253}
2254
2255/*
2256 * Function : void NCR5380_dma_complete (struct Scsi_Host *instance)
2257 *
2258 * Purpose : called by interrupt handler when DMA finishes or a phase
2259 * mismatch occurs (which would finish the DMA transfer).
2260 *
2261 * Inputs : instance - this instance of the NCR5380.
2262 *
710ddd0d 2263 * Returns : pointer to the scsi_cmnd structure for which the I_T_L
1da177e4
LT
2264 * nexus has been reestablished, on failure NULL is returned.
2265 */
2266
2267#ifdef REAL_DMA
2268static void NCR5380_dma_complete(NCR5380_instance * instance) {
e8a60144 2269 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 2270 int transferred;
1da177e4
LT
2271
2272 /*
2273 * XXX this might not be right.
2274 *
2275 * Wait for final byte to transfer, ie wait for ACK to go false.
2276 *
2277 * We should use the Last Byte Sent bit, unfortunately this is
2278 * not available on the 5380/5381 (only the various CMOS chips)
2279 *
2280 * FIXME: timeout, and need to handle long timeout/irq case
2281 */
2282
2283 NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ);
2284
1da177e4
LT
2285 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2286
2287 /*
2288 * The only places we should see a phase mismatch and have to send
2289 * data from the same set of pointers will be the data transfer
2290 * phases. So, residual, requested length are only important here.
2291 */
2292
2293 if (!(hostdata->connected->SCp.phase & SR_CD)) {
2294 transferred = instance->dmalen - NCR5380_dma_residual();
2295 hostdata->connected->SCp.this_residual -= transferred;
2296 hostdata->connected->SCp.ptr += transferred;
2297 }
2298}
2299#endif /* def REAL_DMA */
2300
8b00c3d5
FT
2301/**
2302 * list_find_cmd - test for presence of a command in a linked list
2303 * @haystack: list of commands
2304 * @needle: command to search for
2305 */
2306
2307static bool list_find_cmd(struct list_head *haystack,
2308 struct scsi_cmnd *needle)
2309{
2310 struct NCR5380_cmd *ncmd;
2311
2312 list_for_each_entry(ncmd, haystack, list)
2313 if (NCR5380_to_scmd(ncmd) == needle)
2314 return true;
2315 return false;
2316}
2317
2318/**
2319 * list_remove_cmd - remove a command from linked list
2320 * @haystack: list of commands
2321 * @needle: command to remove
2322 */
2323
2324static bool list_del_cmd(struct list_head *haystack,
2325 struct scsi_cmnd *needle)
2326{
2327 if (list_find_cmd(haystack, needle)) {
2328 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2329
2330 list_del(&ncmd->list);
2331 return true;
2332 }
2333 return false;
2334}
2335
2336/**
2337 * NCR5380_abort - scsi host eh_abort_handler() method
2338 * @cmd: the command to be aborted
2339 *
2340 * Try to abort a given command by removing it from queues and/or sending
2341 * the target an abort message. This may not succeed in causing a target
2342 * to abort the command. Nonetheless, the low-level driver must forget about
2343 * the command because the mid-layer reclaims it and it may be re-issued.
2344 *
2345 * The normal path taken by a command is as follows. For EH we trace this
2346 * same path to locate and abort the command.
2347 *
2348 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2349 * [disconnected -> connected ->]...
2350 * [autosense -> connected ->] done
2351 *
2352 * If cmd is unissued then just remove it.
2353 * If cmd is disconnected, try to select the target.
2354 * If cmd is connected, try to send an abort message.
2355 * If cmd is waiting for autosense, give it a chance to complete but check
2356 * that it isn't left connected.
2357 * If cmd was not found at all then presumably it has already been completed,
2358 * in which case return SUCCESS to try to avoid further EH measures.
2359 * If the command has not completed yet, we must not fail to find it.
1da177e4
LT
2360 */
2361
710ddd0d
FT
2362static int NCR5380_abort(struct scsi_cmnd *cmd)
2363{
1da177e4 2364 struct Scsi_Host *instance = cmd->device->host;
e8a60144 2365 struct NCR5380_hostdata *hostdata = shost_priv(instance);
11d2f63b 2366 unsigned long flags;
8b00c3d5 2367 int result = SUCCESS;
1fa6b5fb 2368
11d2f63b
FT
2369 spin_lock_irqsave(&hostdata->lock, flags);
2370
32b26a10 2371#if (NDEBUG & NDEBUG_ANY)
8b00c3d5 2372 scmd_printk(KERN_INFO, cmd, __func__);
32b26a10 2373#endif
e5c3fddf
FT
2374 NCR5380_dprint(NDEBUG_ANY, instance);
2375 NCR5380_dprint_phase(NDEBUG_ANY, instance);
1da177e4 2376
8b00c3d5
FT
2377 if (list_del_cmd(&hostdata->unissued, cmd)) {
2378 dsprintk(NDEBUG_ABORT, instance,
2379 "abort: removed %p from issue queue\n", cmd);
2380 cmd->result = DID_ABORT << 16;
2381 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2382 }
2383
707d62b3
FT
2384 if (hostdata->selecting == cmd) {
2385 dsprintk(NDEBUG_ABORT, instance,
2386 "abort: cmd %p == selecting\n", cmd);
2387 hostdata->selecting = NULL;
2388 cmd->result = DID_ABORT << 16;
2389 complete_cmd(instance, cmd);
2390 goto out;
2391 }
2392
8b00c3d5
FT
2393 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2394 dsprintk(NDEBUG_ABORT, instance,
2395 "abort: removed %p from disconnected list\n", cmd);
2396 cmd->result = DID_ERROR << 16;
2397 if (!hostdata->connected)
2398 NCR5380_select(instance, cmd);
2399 if (hostdata->connected != cmd) {
2400 complete_cmd(instance, cmd);
2401 result = FAILED;
2402 goto out;
2403 }
2404 }
2405
2406 if (hostdata->connected == cmd) {
2407 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2408 hostdata->connected = NULL;
2409 if (do_abort(instance)) {
2410 set_host_byte(cmd, DID_ERROR);
2411 complete_cmd(instance, cmd);
2412 result = FAILED;
2413 goto out;
2414 }
2415 set_host_byte(cmd, DID_ABORT);
2416#ifdef REAL_DMA
2417 hostdata->dma_len = 0;
2418#endif
2419 if (cmd->cmnd[0] == REQUEST_SENSE)
2420 complete_cmd(instance, cmd);
2421 else {
2422 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
2423
2424 /* Perform autosense for this command */
2425 list_add(&ncmd->list, &hostdata->autosense);
2426 }
2427 }
2428
2429 if (list_find_cmd(&hostdata->autosense, cmd)) {
2430 dsprintk(NDEBUG_ABORT, instance,
2431 "abort: found %p on sense queue\n", cmd);
2432 spin_unlock_irqrestore(&hostdata->lock, flags);
2433 queue_work(hostdata->work_q, &hostdata->main_task);
2434 msleep(1000);
2435 spin_lock_irqsave(&hostdata->lock, flags);
2436 if (list_del_cmd(&hostdata->autosense, cmd)) {
2437 dsprintk(NDEBUG_ABORT, instance,
2438 "abort: removed %p from sense queue\n", cmd);
2439 set_host_byte(cmd, DID_ABORT);
2440 complete_cmd(instance, cmd);
2441 goto out;
2442 }
2443 }
2444
2445 if (hostdata->connected == cmd) {
2446 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2447 hostdata->connected = NULL;
2448 if (do_abort(instance)) {
2449 set_host_byte(cmd, DID_ERROR);
2450 complete_cmd(instance, cmd);
2451 result = FAILED;
2452 goto out;
2453 }
2454 set_host_byte(cmd, DID_ABORT);
2455#ifdef REAL_DMA
2456 hostdata->dma_len = 0;
2457#endif
2458 complete_cmd(instance, cmd);
2459 }
2460
2461out:
2462 if (result == FAILED)
2463 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2464 else
2465 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2466
2467 queue_work(hostdata->work_q, &hostdata->main_task);
11d2f63b 2468 spin_unlock_irqrestore(&hostdata->lock, flags);
32b26a10 2469
8b00c3d5 2470 return result;
1da177e4
LT
2471}
2472
2473
3be1b3ea
FT
2474/**
2475 * NCR5380_bus_reset - reset the SCSI bus
2476 * @cmd: SCSI command undergoing EH
1da177e4 2477 *
3be1b3ea 2478 * Returns SUCCESS
1da177e4
LT
2479 */
2480
710ddd0d 2481static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
68b3aa7c
JG
2482{
2483 struct Scsi_Host *instance = cmd->device->host;
11d2f63b
FT
2484 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2485 unsigned long flags;
68b3aa7c 2486
11d2f63b 2487 spin_lock_irqsave(&hostdata->lock, flags);
3be1b3ea
FT
2488
2489#if (NDEBUG & NDEBUG_ANY)
2490 scmd_printk(KERN_INFO, cmd, "performing bus reset\n");
3be1b3ea 2491#endif
e5c3fddf
FT
2492 NCR5380_dprint(NDEBUG_ANY, instance);
2493 NCR5380_dprint_phase(NDEBUG_ANY, instance);
68b3aa7c 2494
68b3aa7c 2495 do_reset(instance);
3be1b3ea 2496
11d2f63b 2497 spin_unlock_irqrestore(&hostdata->lock, flags);
1da177e4 2498
1da177e4
LT
2499 return SUCCESS;
2500}
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