[SCSI] ipr: Driver version 2.3.0
[deliverable/linux.git] / drivers / scsi / aacraid / commsup.c
CommitLineData
1da177e4
LT
1/*
2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
8 * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2, or (at your option)
13 * any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; see the file COPYING. If not, write to
22 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 * Module Name:
25 * commsup.c
26 *
27 * Abstract: Contain all routines that are required for FSA host/adapter
7c00ffa3 28 * communication.
1da177e4
LT
29 *
30 */
31
32#include <linux/kernel.h>
33#include <linux/init.h>
34#include <linux/types.h>
35#include <linux/sched.h>
36#include <linux/pci.h>
37#include <linux/spinlock.h>
38#include <linux/slab.h>
39#include <linux/completion.h>
40#include <linux/blkdev.h>
164006da 41#include <linux/delay.h>
fe27381d 42#include <linux/kthread.h>
6a3670c4 43#include <linux/interrupt.h>
8c867b25 44#include <scsi/scsi.h>
7c00ffa3 45#include <scsi/scsi_host.h>
131256cf 46#include <scsi/scsi_device.h>
8c867b25 47#include <scsi/scsi_cmnd.h>
1da177e4
LT
48#include <asm/semaphore.h>
49
50#include "aacraid.h"
51
52/**
53 * fib_map_alloc - allocate the fib objects
54 * @dev: Adapter to allocate for
55 *
56 * Allocate and map the shared PCI space for the FIB blocks used to
57 * talk to the Adaptec firmware.
58 */
59
60static int fib_map_alloc(struct aac_dev *dev)
61{
7c00ffa3
MH
62 dprintk((KERN_INFO
63 "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
64 dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue,
65 AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
66 if((dev->hw_fib_va = pci_alloc_consistent(dev->pdev, dev->max_fib_size
67 * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB),
68 &dev->hw_fib_pa))==NULL)
1da177e4
LT
69 return -ENOMEM;
70 return 0;
71}
72
73/**
bfb35aa8 74 * aac_fib_map_free - free the fib objects
1da177e4
LT
75 * @dev: Adapter to free
76 *
77 * Free the PCI mappings and the memory allocated for FIB blocks
78 * on this adapter.
79 */
80
bfb35aa8 81void aac_fib_map_free(struct aac_dev *dev)
1da177e4 82{
7c00ffa3 83 pci_free_consistent(dev->pdev, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), dev->hw_fib_va, dev->hw_fib_pa);
1da177e4
LT
84}
85
86/**
bfb35aa8 87 * aac_fib_setup - setup the fibs
1da177e4
LT
88 * @dev: Adapter to set up
89 *
90 * Allocate the PCI space for the fibs, map it and then intialise the
91 * fib area, the unmapped fib data and also the free list
92 */
93
bfb35aa8 94int aac_fib_setup(struct aac_dev * dev)
1da177e4
LT
95{
96 struct fib *fibptr;
97 struct hw_fib *hw_fib_va;
98 dma_addr_t hw_fib_pa;
99 int i;
7c00ffa3
MH
100
101 while (((i = fib_map_alloc(dev)) == -ENOMEM)
102 && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
103 dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1);
104 dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB;
105 }
106 if (i<0)
1da177e4
LT
107 return -ENOMEM;
108
109 hw_fib_va = dev->hw_fib_va;
110 hw_fib_pa = dev->hw_fib_pa;
7c00ffa3 111 memset(hw_fib_va, 0, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
1da177e4
LT
112 /*
113 * Initialise the fibs
114 */
7c00ffa3 115 for (i = 0, fibptr = &dev->fibs[i]; i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); i++, fibptr++)
1da177e4
LT
116 {
117 fibptr->dev = dev;
118 fibptr->hw_fib = hw_fib_va;
119 fibptr->data = (void *) fibptr->hw_fib->data;
120 fibptr->next = fibptr+1; /* Forward chain the fibs */
121 init_MUTEX_LOCKED(&fibptr->event_wait);
122 spin_lock_init(&fibptr->event_lock);
56b58712 123 hw_fib_va->header.XferState = cpu_to_le32(0xffffffff);
7c00ffa3 124 hw_fib_va->header.SenderSize = cpu_to_le16(dev->max_fib_size);
1da177e4 125 fibptr->hw_fib_pa = hw_fib_pa;
7c00ffa3
MH
126 hw_fib_va = (struct hw_fib *)((unsigned char *)hw_fib_va + dev->max_fib_size);
127 hw_fib_pa = hw_fib_pa + dev->max_fib_size;
1da177e4
LT
128 }
129 /*
130 * Add the fib chain to the free list
131 */
7c00ffa3 132 dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
1da177e4
LT
133 /*
134 * Enable this to debug out of queue space
135 */
136 dev->free_fib = &dev->fibs[0];
137 return 0;
138}
139
140/**
bfb35aa8 141 * aac_fib_alloc - allocate a fib
1da177e4
LT
142 * @dev: Adapter to allocate the fib for
143 *
144 * Allocate a fib from the adapter fib pool. If the pool is empty we
7c00ffa3 145 * return NULL.
1da177e4
LT
146 */
147
bfb35aa8 148struct fib *aac_fib_alloc(struct aac_dev *dev)
1da177e4
LT
149{
150 struct fib * fibptr;
151 unsigned long flags;
152 spin_lock_irqsave(&dev->fib_lock, flags);
153 fibptr = dev->free_fib;
7c00ffa3
MH
154 if(!fibptr){
155 spin_unlock_irqrestore(&dev->fib_lock, flags);
156 return fibptr;
157 }
1da177e4
LT
158 dev->free_fib = fibptr->next;
159 spin_unlock_irqrestore(&dev->fib_lock, flags);
160 /*
161 * Set the proper node type code and node byte size
162 */
163 fibptr->type = FSAFS_NTC_FIB_CONTEXT;
164 fibptr->size = sizeof(struct fib);
165 /*
166 * Null out fields that depend on being zero at the start of
167 * each I/O
168 */
169 fibptr->hw_fib->header.XferState = 0;
170 fibptr->callback = NULL;
171 fibptr->callback_data = NULL;
172
173 return fibptr;
174}
175
176/**
bfb35aa8 177 * aac_fib_free - free a fib
1da177e4
LT
178 * @fibptr: fib to free up
179 *
180 * Frees up a fib and places it on the appropriate queue
181 * (either free or timed out)
182 */
183
bfb35aa8 184void aac_fib_free(struct fib *fibptr)
1da177e4
LT
185{
186 unsigned long flags;
187
188 spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
189 if (fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT) {
190 aac_config.fib_timeouts++;
191 fibptr->next = fibptr->dev->timeout_fib;
192 fibptr->dev->timeout_fib = fibptr;
193 } else {
194 if (fibptr->hw_fib->header.XferState != 0) {
bfb35aa8 195 printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
1da177e4
LT
196 (void*)fibptr,
197 le32_to_cpu(fibptr->hw_fib->header.XferState));
198 }
199 fibptr->next = fibptr->dev->free_fib;
200 fibptr->dev->free_fib = fibptr;
201 }
202 spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
203}
204
205/**
bfb35aa8 206 * aac_fib_init - initialise a fib
1da177e4
LT
207 * @fibptr: The fib to initialize
208 *
209 * Set up the generic fib fields ready for use
210 */
211
bfb35aa8 212void aac_fib_init(struct fib *fibptr)
1da177e4
LT
213{
214 struct hw_fib *hw_fib = fibptr->hw_fib;
215
216 hw_fib->header.StructType = FIB_MAGIC;
7c00ffa3
MH
217 hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
218 hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
8e0c5ebd 219 hw_fib->header.SenderFibAddress = 0; /* Filled in later if needed */
1da177e4 220 hw_fib->header.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
7c00ffa3 221 hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
1da177e4
LT
222}
223
224/**
225 * fib_deallocate - deallocate a fib
226 * @fibptr: fib to deallocate
227 *
228 * Will deallocate and return to the free pool the FIB pointed to by the
229 * caller.
230 */
231
4833869e 232static void fib_dealloc(struct fib * fibptr)
1da177e4
LT
233{
234 struct hw_fib *hw_fib = fibptr->hw_fib;
125e1874 235 BUG_ON(hw_fib->header.StructType != FIB_MAGIC);
1da177e4
LT
236 hw_fib->header.XferState = 0;
237}
238
239/*
240 * Commuication primitives define and support the queuing method we use to
241 * support host to adapter commuication. All queue accesses happen through
242 * these routines and are the only routines which have a knowledge of the
243 * how these queues are implemented.
244 */
245
246/**
247 * aac_get_entry - get a queue entry
248 * @dev: Adapter
249 * @qid: Queue Number
250 * @entry: Entry return
251 * @index: Index return
252 * @nonotify: notification control
253 *
254 * With a priority the routine returns a queue entry if the queue has free entries. If the queue
255 * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
256 * returned.
257 */
258
259static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
260{
261 struct aac_queue * q;
bed30de4 262 unsigned long idx;
1da177e4
LT
263
264 /*
265 * All of the queues wrap when they reach the end, so we check
266 * to see if they have reached the end and if they have we just
267 * set the index back to zero. This is a wrap. You could or off
268 * the high bits in all updates but this is a bit faster I think.
269 */
270
271 q = &dev->queues->queue[qid];
bed30de4
MH
272
273 idx = *index = le32_to_cpu(*(q->headers.producer));
274 /* Interrupt Moderation, only interrupt for first two entries */
275 if (idx != le32_to_cpu(*(q->headers.consumer))) {
276 if (--idx == 0) {
1640a2c3 277 if (qid == AdapNormCmdQueue)
bed30de4 278 idx = ADAP_NORM_CMD_ENTRIES;
1640a2c3 279 else
bed30de4
MH
280 idx = ADAP_NORM_RESP_ENTRIES;
281 }
282 if (idx != le32_to_cpu(*(q->headers.consumer)))
1da177e4 283 *nonotify = 1;
bed30de4 284 }
1da177e4 285
1640a2c3 286 if (qid == AdapNormCmdQueue) {
1da177e4
LT
287 if (*index >= ADAP_NORM_CMD_ENTRIES)
288 *index = 0; /* Wrap to front of the Producer Queue. */
1640a2c3 289 } else {
1da177e4
LT
290 if (*index >= ADAP_NORM_RESP_ENTRIES)
291 *index = 0; /* Wrap to front of the Producer Queue. */
292 }
1da177e4
LT
293
294 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */
7c00ffa3 295 printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
1da177e4
LT
296 qid, q->numpending);
297 return 0;
298 } else {
299 *entry = q->base + *index;
300 return 1;
301 }
302}
303
304/**
305 * aac_queue_get - get the next free QE
306 * @dev: Adapter
307 * @index: Returned index
308 * @priority: Priority of fib
309 * @fib: Fib to associate with the queue entry
310 * @wait: Wait if queue full
311 * @fibptr: Driver fib object to go with fib
312 * @nonotify: Don't notify the adapter
313 *
314 * Gets the next free QE off the requested priorty adapter command
315 * queue and associates the Fib with the QE. The QE represented by
316 * index is ready to insert on the queue when this routine returns
317 * success.
318 */
319
320static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
321{
322 struct aac_entry * entry = NULL;
323 int map = 0;
1da177e4 324
1640a2c3 325 if (qid == AdapNormCmdQueue) {
1da177e4
LT
326 /* if no entries wait for some if caller wants to */
327 while (!aac_get_entry(dev, qid, &entry, index, nonotify))
328 {
329 printk(KERN_ERR "GetEntries failed\n");
330 }
331 /*
332 * Setup queue entry with a command, status and fib mapped
333 */
334 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
335 map = 1;
1640a2c3 336 } else {
1da177e4
LT
337 while(!aac_get_entry(dev, qid, &entry, index, nonotify))
338 {
339 /* if no entries wait for some if caller wants to */
340 }
341 /*
342 * Setup queue entry with command, status and fib mapped
343 */
344 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
345 entry->addr = hw_fib->header.SenderFibAddress;
346 /* Restore adapters pointer to the FIB */
347 hw_fib->header.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
348 map = 0;
349 }
350 /*
351 * If MapFib is true than we need to map the Fib and put pointers
352 * in the queue entry.
353 */
354 if (map)
355 entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
356 return 0;
357}
358
1da177e4
LT
359/*
360 * Define the highest level of host to adapter communication routines.
361 * These routines will support host to adapter FS commuication. These
362 * routines have no knowledge of the commuication method used. This level
363 * sends and receives FIBs. This level has no knowledge of how these FIBs
364 * get passed back and forth.
365 */
366
367/**
bfb35aa8 368 * aac_fib_send - send a fib to the adapter
1da177e4
LT
369 * @command: Command to send
370 * @fibptr: The fib
371 * @size: Size of fib data area
372 * @priority: Priority of Fib
373 * @wait: Async/sync select
374 * @reply: True if a reply is wanted
375 * @callback: Called with reply
376 * @callback_data: Passed to callback
377 *
378 * Sends the requested FIB to the adapter and optionally will wait for a
379 * response FIB. If the caller does not wish to wait for a response than
380 * an event to wait on must be supplied. This event will be set when a
381 * response FIB is received from the adapter.
382 */
383
bfb35aa8
MH
384int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
385 int priority, int wait, int reply, fib_callback callback,
386 void *callback_data)
1da177e4 387{
1da177e4 388 struct aac_dev * dev = fibptr->dev;
1da177e4
LT
389 struct hw_fib * hw_fib = fibptr->hw_fib;
390 struct aac_queue * q;
391 unsigned long flags = 0;
1640a2c3
MH
392 unsigned long qflags;
393
1da177e4
LT
394 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
395 return -EBUSY;
396 /*
397 * There are 5 cases with the wait and reponse requested flags.
398 * The only invalid cases are if the caller requests to wait and
399 * does not request a response and if the caller does not want a
400 * response and the Fib is not allocated from pool. If a response
401 * is not requesed the Fib will just be deallocaed by the DPC
402 * routine when the response comes back from the adapter. No
403 * further processing will be done besides deleting the Fib. We
404 * will have a debug mode where the adapter can notify the host
405 * it had a problem and the host can log that fact.
406 */
407 if (wait && !reply) {
408 return -EINVAL;
409 } else if (!wait && reply) {
410 hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
411 FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
412 } else if (!wait && !reply) {
413 hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
414 FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
415 } else if (wait && reply) {
416 hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
417 FIB_COUNTER_INCREMENT(aac_config.NormalSent);
418 }
419 /*
420 * Map the fib into 32bits by using the fib number
421 */
422
8e0c5ebd 423 hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
1da177e4
LT
424 hw_fib->header.SenderData = (u32)(fibptr - dev->fibs);
425 /*
426 * Set FIB state to indicate where it came from and if we want a
427 * response from the adapter. Also load the command from the
428 * caller.
429 *
430 * Map the hw fib pointer as a 32bit value
431 */
432 hw_fib->header.Command = cpu_to_le16(command);
433 hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
434 fibptr->hw_fib->header.Flags = 0; /* 0 the flags field - internal only*/
435 /*
436 * Set the size of the Fib we want to send to the adapter
437 */
438 hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
439 if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
440 return -EMSGSIZE;
441 }
442 /*
443 * Get a queue entry connect the FIB to it and send an notify
444 * the adapter a command is ready.
445 */
1640a2c3 446 hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
1da177e4 447
1da177e4
LT
448 /*
449 * Fill in the Callback and CallbackContext if we are not
450 * going to wait.
451 */
452 if (!wait) {
453 fibptr->callback = callback;
454 fibptr->callback_data = callback_data;
455 }
1da177e4
LT
456
457 fibptr->done = 0;
458 fibptr->flags = 0;
459
1640a2c3
MH
460 FIB_COUNTER_INCREMENT(aac_config.FibsSent);
461
1640a2c3 462 dprintk((KERN_DEBUG "Fib contents:.\n"));
8e0c5ebd
MH
463 dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
464 dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
465 dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
1640a2c3
MH
466 dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib));
467 dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
468 dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
469
c8f7b073 470 if (!dev->queues)
65101355 471 return -EBUSY;
1640a2c3
MH
472 q = &dev->queues->queue[AdapNormCmdQueue];
473
474 if(wait)
475 spin_lock_irqsave(&fibptr->event_lock, flags);
476 spin_lock_irqsave(q->lock, qflags);
8e0c5ebd
MH
477 if (dev->new_comm_interface) {
478 unsigned long count = 10000000L; /* 50 seconds */
8e0c5ebd
MH
479 q->numpending++;
480 spin_unlock_irqrestore(q->lock, qflags);
481 while (aac_adapter_send(fibptr) != 0) {
482 if (--count == 0) {
483 if (wait)
484 spin_unlock_irqrestore(&fibptr->event_lock, flags);
485 spin_lock_irqsave(q->lock, qflags);
486 q->numpending--;
8e0c5ebd
MH
487 spin_unlock_irqrestore(q->lock, qflags);
488 return -ETIMEDOUT;
489 }
490 udelay(5);
491 }
492 } else {
493 u32 index;
494 unsigned long nointr = 0;
495 aac_queue_get( dev, &index, AdapNormCmdQueue, hw_fib, 1, fibptr, &nointr);
496
8e0c5ebd
MH
497 q->numpending++;
498 *(q->headers.producer) = cpu_to_le32(index + 1);
499 spin_unlock_irqrestore(q->lock, qflags);
bfb35aa8 500 dprintk((KERN_DEBUG "aac_fib_send: inserting a queue entry at index %d.\n",index));
8e0c5ebd
MH
501 if (!(nointr & aac_config.irq_mod))
502 aac_adapter_notify(dev, AdapNormCmdQueue);
503 }
504
1da177e4
LT
505 /*
506 * If the caller wanted us to wait for response wait now.
507 */
508
509 if (wait) {
510 spin_unlock_irqrestore(&fibptr->event_lock, flags);
9203344c
MH
511 /* Only set for first known interruptable command */
512 if (wait < 0) {
513 /*
514 * *VERY* Dangerous to time out a command, the
515 * assumption is made that we have no hope of
516 * functioning because an interrupt routing or other
517 * hardware failure has occurred.
518 */
519 unsigned long count = 36000000L; /* 3 minutes */
9203344c
MH
520 while (down_trylock(&fibptr->event_wait)) {
521 if (--count == 0) {
522 spin_lock_irqsave(q->lock, qflags);
523 q->numpending--;
9203344c
MH
524 spin_unlock_irqrestore(q->lock, qflags);
525 if (wait == -1) {
bfb35aa8 526 printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
9203344c
MH
527 "Usually a result of a PCI interrupt routing problem;\n"
528 "update mother board BIOS or consider utilizing one of\n"
529 "the SAFE mode kernel options (acpi, apic etc)\n");
530 }
531 return -ETIMEDOUT;
532 }
533 udelay(5);
534 }
c8f7b073
MH
535 } else if (down_interruptible(&fibptr->event_wait)) {
536 spin_lock_irqsave(&fibptr->event_lock, flags);
537 if (fibptr->done == 0) {
538 fibptr->done = 2; /* Tell interrupt we aborted */
539 spin_unlock_irqrestore(&fibptr->event_lock, flags);
540 return -EINTR;
541 }
542 spin_unlock_irqrestore(&fibptr->event_lock, flags);
543 }
125e1874 544 BUG_ON(fibptr->done == 0);
1da177e4
LT
545
546 if((fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)){
547 return -ETIMEDOUT;
548 } else {
549 return 0;
550 }
551 }
552 /*
553 * If the user does not want a response than return success otherwise
554 * return pending
555 */
556 if (reply)
557 return -EINPROGRESS;
558 else
559 return 0;
560}
561
562/**
563 * aac_consumer_get - get the top of the queue
564 * @dev: Adapter
565 * @q: Queue
566 * @entry: Return entry
567 *
568 * Will return a pointer to the entry on the top of the queue requested that
569 * we are a consumer of, and return the address of the queue entry. It does
570 * not change the state of the queue.
571 */
572
573int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
574{
575 u32 index;
576 int status;
577 if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
578 status = 0;
579 } else {
580 /*
581 * The consumer index must be wrapped if we have reached
582 * the end of the queue, else we just use the entry
583 * pointed to by the header index
584 */
585 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
586 index = 0;
587 else
588 index = le32_to_cpu(*q->headers.consumer);
589 *entry = q->base + index;
590 status = 1;
591 }
592 return(status);
593}
594
595/**
596 * aac_consumer_free - free consumer entry
597 * @dev: Adapter
598 * @q: Queue
599 * @qid: Queue ident
600 *
601 * Frees up the current top of the queue we are a consumer of. If the
602 * queue was full notify the producer that the queue is no longer full.
603 */
604
605void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
606{
607 int wasfull = 0;
608 u32 notify;
609
610 if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
611 wasfull = 1;
612
613 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
614 *q->headers.consumer = cpu_to_le32(1);
615 else
616 *q->headers.consumer = cpu_to_le32(le32_to_cpu(*q->headers.consumer)+1);
617
618 if (wasfull) {
619 switch (qid) {
620
621 case HostNormCmdQueue:
622 notify = HostNormCmdNotFull;
623 break;
1da177e4
LT
624 case HostNormRespQueue:
625 notify = HostNormRespNotFull;
626 break;
1da177e4
LT
627 default:
628 BUG();
629 return;
630 }
631 aac_adapter_notify(dev, notify);
632 }
633}
634
635/**
bfb35aa8 636 * aac_fib_adapter_complete - complete adapter issued fib
1da177e4
LT
637 * @fibptr: fib to complete
638 * @size: size of fib
639 *
640 * Will do all necessary work to complete a FIB that was sent from
641 * the adapter.
642 */
643
bfb35aa8 644int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
1da177e4
LT
645{
646 struct hw_fib * hw_fib = fibptr->hw_fib;
647 struct aac_dev * dev = fibptr->dev;
1640a2c3 648 struct aac_queue * q;
1da177e4 649 unsigned long nointr = 0;
1640a2c3
MH
650 unsigned long qflags;
651
652 if (hw_fib->header.XferState == 0) {
8e0c5ebd
MH
653 if (dev->new_comm_interface)
654 kfree (hw_fib);
1da177e4 655 return 0;
1640a2c3 656 }
1da177e4
LT
657 /*
658 * If we plan to do anything check the structure type first.
659 */
660 if ( hw_fib->header.StructType != FIB_MAGIC ) {
8e0c5ebd
MH
661 if (dev->new_comm_interface)
662 kfree (hw_fib);
1da177e4
LT
663 return -EINVAL;
664 }
665 /*
666 * This block handles the case where the adapter had sent us a
667 * command and we have finished processing the command. We
668 * call completeFib when we are done processing the command
669 * and want to send a response back to the adapter. This will
670 * send the completed cdb to the adapter.
671 */
672 if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
8e0c5ebd
MH
673 if (dev->new_comm_interface) {
674 kfree (hw_fib);
675 } else {
676 u32 index;
677 hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
678 if (size) {
679 size += sizeof(struct aac_fibhdr);
680 if (size > le16_to_cpu(hw_fib->header.SenderSize))
681 return -EMSGSIZE;
682 hw_fib->header.Size = cpu_to_le16(size);
683 }
684 q = &dev->queues->queue[AdapNormRespQueue];
685 spin_lock_irqsave(q->lock, qflags);
686 aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
687 *(q->headers.producer) = cpu_to_le32(index + 1);
688 spin_unlock_irqrestore(q->lock, qflags);
689 if (!(nointr & (int)aac_config.irq_mod))
690 aac_adapter_notify(dev, AdapNormRespQueue);
1da177e4
LT
691 }
692 }
693 else
694 {
bfb35aa8 695 printk(KERN_WARNING "aac_fib_adapter_complete: Unknown xferstate detected.\n");
1da177e4
LT
696 BUG();
697 }
698 return 0;
699}
700
701/**
bfb35aa8 702 * aac_fib_complete - fib completion handler
1da177e4
LT
703 * @fib: FIB to complete
704 *
705 * Will do all necessary work to complete a FIB.
706 */
707
bfb35aa8 708int aac_fib_complete(struct fib *fibptr)
1da177e4
LT
709{
710 struct hw_fib * hw_fib = fibptr->hw_fib;
711
712 /*
713 * Check for a fib which has already been completed
714 */
715
716 if (hw_fib->header.XferState == 0)
717 return 0;
718 /*
719 * If we plan to do anything check the structure type first.
720 */
721
722 if (hw_fib->header.StructType != FIB_MAGIC)
723 return -EINVAL;
724 /*
725 * This block completes a cdb which orginated on the host and we
726 * just need to deallocate the cdb or reinit it. At this point the
727 * command is complete that we had sent to the adapter and this
728 * cdb could be reused.
729 */
730 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
731 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
732 {
733 fib_dealloc(fibptr);
734 }
735 else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
736 {
737 /*
738 * This handles the case when the host has aborted the I/O
739 * to the adapter because the adapter is not responding
740 */
741 fib_dealloc(fibptr);
742 } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
743 fib_dealloc(fibptr);
744 } else {
745 BUG();
746 }
747 return 0;
748}
749
750/**
751 * aac_printf - handle printf from firmware
752 * @dev: Adapter
753 * @val: Message info
754 *
755 * Print a message passed to us by the controller firmware on the
756 * Adaptec board
757 */
758
759void aac_printf(struct aac_dev *dev, u32 val)
760{
1da177e4 761 char *cp = dev->printfbuf;
7c00ffa3
MH
762 if (dev->printf_enabled)
763 {
764 int length = val & 0xffff;
765 int level = (val >> 16) & 0xffff;
766
767 /*
768 * The size of the printfbuf is set in port.c
769 * There is no variable or define for it
770 */
771 if (length > 255)
772 length = 255;
773 if (cp[length] != 0)
774 cp[length] = 0;
775 if (level == LOG_AAC_HIGH_ERROR)
1241f359 776 printk(KERN_WARNING "%s:%s", dev->name, cp);
7c00ffa3 777 else
1241f359 778 printk(KERN_INFO "%s:%s", dev->name, cp);
7c00ffa3 779 }
1da177e4
LT
780 memset(cp, 0, 256);
781}
782
131256cf
MH
783
784/**
785 * aac_handle_aif - Handle a message from the firmware
786 * @dev: Which adapter this fib is from
787 * @fibptr: Pointer to fibptr from adapter
788 *
789 * This routine handles a driver notify fib from the adapter and
790 * dispatches it to the appropriate routine for handling.
791 */
792
31876f32 793#define AIF_SNIFF_TIMEOUT (30*HZ)
131256cf
MH
794static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
795{
796 struct hw_fib * hw_fib = fibptr->hw_fib;
797 struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
798 int busy;
799 u32 container;
800 struct scsi_device *device;
801 enum {
802 NOTHING,
803 DELETE,
804 ADD,
805 CHANGE
806 } device_config_needed;
807
808 /* Sniff for container changes */
809
c8f7b073 810 if (!dev || !dev->fsa_dev)
131256cf
MH
811 return;
812 container = (u32)-1;
813
814 /*
815 * We have set this up to try and minimize the number of
816 * re-configures that take place. As a result of this when
817 * certain AIF's come in we will set a flag waiting for another
818 * type of AIF before setting the re-config flag.
819 */
820 switch (le32_to_cpu(aifcmd->command)) {
821 case AifCmdDriverNotify:
822 switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
823 /*
824 * Morph or Expand complete
825 */
826 case AifDenMorphComplete:
827 case AifDenVolumeExtendComplete:
828 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
829 if (container >= dev->maximum_num_containers)
830 break;
831
832 /*
f64a181d 833 * Find the scsi_device associated with the SCSI
131256cf
MH
834 * address. Make sure we have the right array, and if
835 * so set the flag to initiate a new re-config once we
836 * see an AifEnConfigChange AIF come through.
837 */
838
839 if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
840 device = scsi_device_lookup(dev->scsi_host_ptr,
841 CONTAINER_TO_CHANNEL(container),
842 CONTAINER_TO_ID(container),
843 CONTAINER_TO_LUN(container));
844 if (device) {
845 dev->fsa_dev[container].config_needed = CHANGE;
846 dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
31876f32 847 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
848 scsi_device_put(device);
849 }
850 }
851 }
852
853 /*
854 * If we are waiting on something and this happens to be
855 * that thing then set the re-configure flag.
856 */
857 if (container != (u32)-1) {
858 if (container >= dev->maximum_num_containers)
859 break;
31876f32
MH
860 if ((dev->fsa_dev[container].config_waiting_on ==
861 le32_to_cpu(*(u32 *)aifcmd->data)) &&
862 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
863 dev->fsa_dev[container].config_waiting_on = 0;
864 } else for (container = 0;
865 container < dev->maximum_num_containers; ++container) {
31876f32
MH
866 if ((dev->fsa_dev[container].config_waiting_on ==
867 le32_to_cpu(*(u32 *)aifcmd->data)) &&
868 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
869 dev->fsa_dev[container].config_waiting_on = 0;
870 }
871 break;
872
873 case AifCmdEventNotify:
874 switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
875 /*
876 * Add an Array.
877 */
878 case AifEnAddContainer:
879 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
880 if (container >= dev->maximum_num_containers)
881 break;
882 dev->fsa_dev[container].config_needed = ADD;
883 dev->fsa_dev[container].config_waiting_on =
884 AifEnConfigChange;
31876f32 885 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
886 break;
887
888 /*
889 * Delete an Array.
890 */
891 case AifEnDeleteContainer:
892 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
893 if (container >= dev->maximum_num_containers)
894 break;
895 dev->fsa_dev[container].config_needed = DELETE;
896 dev->fsa_dev[container].config_waiting_on =
897 AifEnConfigChange;
31876f32 898 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
899 break;
900
901 /*
902 * Container change detected. If we currently are not
903 * waiting on something else, setup to wait on a Config Change.
904 */
905 case AifEnContainerChange:
906 container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
907 if (container >= dev->maximum_num_containers)
908 break;
31876f32
MH
909 if (dev->fsa_dev[container].config_waiting_on &&
910 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
911 break;
912 dev->fsa_dev[container].config_needed = CHANGE;
913 dev->fsa_dev[container].config_waiting_on =
914 AifEnConfigChange;
31876f32 915 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
916 break;
917
918 case AifEnConfigChange:
919 break;
920
921 }
922
923 /*
924 * If we are waiting on something and this happens to be
925 * that thing then set the re-configure flag.
926 */
927 if (container != (u32)-1) {
928 if (container >= dev->maximum_num_containers)
929 break;
31876f32
MH
930 if ((dev->fsa_dev[container].config_waiting_on ==
931 le32_to_cpu(*(u32 *)aifcmd->data)) &&
932 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
933 dev->fsa_dev[container].config_waiting_on = 0;
934 } else for (container = 0;
935 container < dev->maximum_num_containers; ++container) {
31876f32
MH
936 if ((dev->fsa_dev[container].config_waiting_on ==
937 le32_to_cpu(*(u32 *)aifcmd->data)) &&
938 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
939 dev->fsa_dev[container].config_waiting_on = 0;
940 }
941 break;
942
943 case AifCmdJobProgress:
944 /*
945 * These are job progress AIF's. When a Clear is being
946 * done on a container it is initially created then hidden from
947 * the OS. When the clear completes we don't get a config
948 * change so we monitor the job status complete on a clear then
949 * wait for a container change.
950 */
951
952 if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
953 && ((((u32 *)aifcmd->data)[6] == ((u32 *)aifcmd->data)[5])
954 || (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess)))) {
955 for (container = 0;
956 container < dev->maximum_num_containers;
957 ++container) {
958 /*
959 * Stomp on all config sequencing for all
960 * containers?
961 */
962 dev->fsa_dev[container].config_waiting_on =
963 AifEnContainerChange;
964 dev->fsa_dev[container].config_needed = ADD;
31876f32
MH
965 dev->fsa_dev[container].config_waiting_stamp =
966 jiffies;
131256cf
MH
967 }
968 }
969 if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
970 && (((u32 *)aifcmd->data)[6] == 0)
971 && (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning))) {
972 for (container = 0;
973 container < dev->maximum_num_containers;
974 ++container) {
975 /*
976 * Stomp on all config sequencing for all
977 * containers?
978 */
979 dev->fsa_dev[container].config_waiting_on =
980 AifEnContainerChange;
981 dev->fsa_dev[container].config_needed = DELETE;
31876f32
MH
982 dev->fsa_dev[container].config_waiting_stamp =
983 jiffies;
131256cf
MH
984 }
985 }
986 break;
987 }
988
989 device_config_needed = NOTHING;
990 for (container = 0; container < dev->maximum_num_containers;
991 ++container) {
31876f32
MH
992 if ((dev->fsa_dev[container].config_waiting_on == 0) &&
993 (dev->fsa_dev[container].config_needed != NOTHING) &&
994 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
131256cf
MH
995 device_config_needed =
996 dev->fsa_dev[container].config_needed;
997 dev->fsa_dev[container].config_needed = NOTHING;
998 break;
999 }
1000 }
1001 if (device_config_needed == NOTHING)
1002 return;
1003
1004 /*
1005 * If we decided that a re-configuration needs to be done,
1006 * schedule it here on the way out the door, please close the door
1007 * behind you.
1008 */
1009
1010 busy = 0;
1011
1012
1013 /*
f64a181d 1014 * Find the scsi_device associated with the SCSI address,
131256cf
MH
1015 * and mark it as changed, invalidating the cache. This deals
1016 * with changes to existing device IDs.
1017 */
1018
1019 if (!dev || !dev->scsi_host_ptr)
1020 return;
1021 /*
bfb35aa8 1022 * force reload of disk info via aac_probe_container
131256cf
MH
1023 */
1024 if ((device_config_needed == CHANGE)
1025 && (dev->fsa_dev[container].valid == 1))
1026 dev->fsa_dev[container].valid = 2;
1027 if ((device_config_needed == CHANGE) ||
1028 (device_config_needed == ADD))
bfb35aa8 1029 aac_probe_container(dev, container);
131256cf
MH
1030 device = scsi_device_lookup(dev->scsi_host_ptr,
1031 CONTAINER_TO_CHANNEL(container),
1032 CONTAINER_TO_ID(container),
1033 CONTAINER_TO_LUN(container));
1034 if (device) {
1035 switch (device_config_needed) {
1036 case DELETE:
131256cf 1037 case CHANGE:
131256cf
MH
1038 scsi_rescan_device(&device->sdev_gendev);
1039
1040 default:
1041 break;
1042 }
1043 scsi_device_put(device);
1044 }
1045 if (device_config_needed == ADD) {
1046 scsi_add_device(dev->scsi_host_ptr,
1047 CONTAINER_TO_CHANNEL(container),
1048 CONTAINER_TO_ID(container),
1049 CONTAINER_TO_LUN(container));
1050 }
1051
1052}
1053
8c867b25
MH
1054static int _aac_reset_adapter(struct aac_dev *aac)
1055{
1056 int index, quirks;
1057 u32 ret;
1058 int retval;
1059 struct Scsi_Host *host;
1060 struct scsi_device *dev;
1061 struct scsi_cmnd *command;
1062 struct scsi_cmnd *command_list;
1063
1064 /*
1065 * Assumptions:
1066 * - host is locked.
1067 * - in_reset is asserted, so no new i/o is getting to the
1068 * card.
1069 * - The card is dead.
1070 */
1071 host = aac->scsi_host_ptr;
1072 scsi_block_requests(host);
1073 aac_adapter_disable_int(aac);
1074 spin_unlock_irq(host->host_lock);
1075 kthread_stop(aac->thread);
1076
1077 /*
1078 * If a positive health, means in a known DEAD PANIC
1079 * state and the adapter could be reset to `try again'.
1080 */
1081 retval = aac_adapter_check_health(aac);
1082 if (retval == 0)
1083 retval = aac_adapter_sync_cmd(aac, IOP_RESET_ALWAYS,
1084 0, 0, 0, 0, 0, 0, &ret, NULL, NULL, NULL, NULL);
1085 if (retval)
1086 retval = aac_adapter_sync_cmd(aac, IOP_RESET,
1087 0, 0, 0, 0, 0, 0, &ret, NULL, NULL, NULL, NULL);
1088
1089 if (retval)
1090 goto out;
1091 if (ret != 0x00000001) {
1092 retval = -ENODEV;
1093 goto out;
1094 }
1095
1096 index = aac->cardtype;
1097
1098 /*
1099 * Re-initialize the adapter, first free resources, then carefully
1100 * apply the initialization sequence to come back again. Only risk
1101 * is a change in Firmware dropping cache, it is assumed the caller
1102 * will ensure that i/o is queisced and the card is flushed in that
1103 * case.
1104 */
1105 aac_fib_map_free(aac);
1106 aac->hw_fib_va = NULL;
1107 aac->hw_fib_pa = 0;
1108 pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
1109 aac->comm_addr = NULL;
1110 aac->comm_phys = 0;
1111 kfree(aac->queues);
1112 aac->queues = NULL;
1113 free_irq(aac->pdev->irq, aac);
1114 kfree(aac->fsa_dev);
1115 aac->fsa_dev = NULL;
1116 if (aac_get_driver_ident(index)->quirks & AAC_QUIRK_31BIT) {
1117 if (((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK))) ||
1118 ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_32BIT_MASK))))
1119 goto out;
1120 } else {
1121 if (((retval = pci_set_dma_mask(aac->pdev, 0x7FFFFFFFULL))) ||
1122 ((retval = pci_set_consistent_dma_mask(aac->pdev, 0x7FFFFFFFULL))))
1123 goto out;
1124 }
1125 if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
1126 goto out;
1127 if (aac_get_driver_ident(index)->quirks & AAC_QUIRK_31BIT)
1128 if ((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK)))
1129 goto out;
1130 aac->thread = kthread_run(aac_command_thread, aac, aac->name);
1131 if (IS_ERR(aac->thread)) {
1132 retval = PTR_ERR(aac->thread);
1133 goto out;
1134 }
1135 (void)aac_get_adapter_info(aac);
1136 quirks = aac_get_driver_ident(index)->quirks;
1137 if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
1138 host->sg_tablesize = 34;
1139 host->max_sectors = (host->sg_tablesize * 8) + 112;
1140 }
1141 if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
1142 host->sg_tablesize = 17;
1143 host->max_sectors = (host->sg_tablesize * 8) + 112;
1144 }
1145 aac_get_config_status(aac, 1);
1146 aac_get_containers(aac);
1147 /*
1148 * This is where the assumption that the Adapter is quiesced
1149 * is important.
1150 */
1151 command_list = NULL;
1152 __shost_for_each_device(dev, host) {
1153 unsigned long flags;
1154 spin_lock_irqsave(&dev->list_lock, flags);
1155 list_for_each_entry(command, &dev->cmd_list, list)
1156 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1157 command->SCp.buffer = (struct scatterlist *)command_list;
1158 command_list = command;
1159 }
1160 spin_unlock_irqrestore(&dev->list_lock, flags);
1161 }
1162 while ((command = command_list)) {
1163 command_list = (struct scsi_cmnd *)command->SCp.buffer;
1164 command->SCp.buffer = NULL;
1165 command->result = DID_OK << 16
1166 | COMMAND_COMPLETE << 8
1167 | SAM_STAT_TASK_SET_FULL;
1168 command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
1169 command->scsi_done(command);
1170 }
1171 retval = 0;
1172
1173out:
1174 aac->in_reset = 0;
1175 scsi_unblock_requests(host);
1176 spin_lock_irq(host->host_lock);
1177 return retval;
1178}
1179
1180int aac_check_health(struct aac_dev * aac)
1181{
1182 int BlinkLED;
1183 unsigned long time_now, flagv = 0;
1184 struct list_head * entry;
1185 struct Scsi_Host * host;
1186
1187 /* Extending the scope of fib_lock slightly to protect aac->in_reset */
1188 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1189 return 0;
1190
1191 if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
1192 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1193 return 0; /* OK */
1194 }
1195
1196 aac->in_reset = 1;
1197
1198 /* Fake up an AIF:
1199 * aac_aifcmd.command = AifCmdEventNotify = 1
1200 * aac_aifcmd.seqnum = 0xFFFFFFFF
1201 * aac_aifcmd.data[0] = AifEnExpEvent = 23
1202 * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
1203 * aac.aifcmd.data[2] = AifHighPriority = 3
1204 * aac.aifcmd.data[3] = BlinkLED
1205 */
1206
1207 time_now = jiffies/HZ;
1208 entry = aac->fib_list.next;
1209
1210 /*
1211 * For each Context that is on the
1212 * fibctxList, make a copy of the
1213 * fib, and then set the event to wake up the
1214 * thread that is waiting for it.
1215 */
1216 while (entry != &aac->fib_list) {
1217 /*
1218 * Extract the fibctx
1219 */
1220 struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
1221 struct hw_fib * hw_fib;
1222 struct fib * fib;
1223 /*
1224 * Check if the queue is getting
1225 * backlogged
1226 */
1227 if (fibctx->count > 20) {
1228 /*
1229 * It's *not* jiffies folks,
1230 * but jiffies / HZ, so do not
1231 * panic ...
1232 */
1233 u32 time_last = fibctx->jiffies;
1234 /*
1235 * Has it been > 2 minutes
1236 * since the last read off
1237 * the queue?
1238 */
1239 if ((time_now - time_last) > aif_timeout) {
1240 entry = entry->next;
1241 aac_close_fib_context(aac, fibctx);
1242 continue;
1243 }
1244 }
1245 /*
1246 * Warning: no sleep allowed while
1247 * holding spinlock
1248 */
1249 hw_fib = kmalloc(sizeof(struct hw_fib), GFP_ATOMIC);
1250 fib = kmalloc(sizeof(struct fib), GFP_ATOMIC);
1251 if (fib && hw_fib) {
1252 struct aac_aifcmd * aif;
1253
1254 memset(hw_fib, 0, sizeof(struct hw_fib));
1255 memset(fib, 0, sizeof(struct fib));
1256 fib->hw_fib = hw_fib;
1257 fib->dev = aac;
1258 aac_fib_init(fib);
1259 fib->type = FSAFS_NTC_FIB_CONTEXT;
1260 fib->size = sizeof (struct fib);
1261 fib->data = hw_fib->data;
1262 aif = (struct aac_aifcmd *)hw_fib->data;
1263 aif->command = cpu_to_le32(AifCmdEventNotify);
1264 aif->seqnum = cpu_to_le32(0xFFFFFFFF);
1265 aif->data[0] = cpu_to_le32(AifEnExpEvent);
1266 aif->data[1] = cpu_to_le32(AifExeFirmwarePanic);
1267 aif->data[2] = cpu_to_le32(AifHighPriority);
1268 aif->data[3] = cpu_to_le32(BlinkLED);
1269
1270 /*
1271 * Put the FIB onto the
1272 * fibctx's fibs
1273 */
1274 list_add_tail(&fib->fiblink, &fibctx->fib_list);
1275 fibctx->count++;
1276 /*
1277 * Set the event to wake up the
1278 * thread that will waiting.
1279 */
1280 up(&fibctx->wait_sem);
1281 } else {
1282 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1283 kfree(fib);
1284 kfree(hw_fib);
1285 }
1286 entry = entry->next;
1287 }
1288
1289 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1290
1291 if (BlinkLED < 0) {
1292 printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED);
1293 goto out;
1294 }
1295
1296 printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
1297
1298 host = aac->scsi_host_ptr;
1299 spin_lock_irqsave(host->host_lock, flagv);
1300 BlinkLED = _aac_reset_adapter(aac);
1301 spin_unlock_irqrestore(host->host_lock, flagv);
1302 return BlinkLED;
1303
1304out:
1305 aac->in_reset = 0;
1306 return BlinkLED;
1307}
1308
1309
1da177e4
LT
1310/**
1311 * aac_command_thread - command processing thread
1312 * @dev: Adapter to monitor
1313 *
1314 * Waits on the commandready event in it's queue. When the event gets set
1315 * it will pull FIBs off it's queue. It will continue to pull FIBs off
1316 * until the queue is empty. When the queue is empty it will wait for
1317 * more FIBs.
1318 */
1319
fe27381d 1320int aac_command_thread(void *data)
1da177e4 1321{
fe27381d 1322 struct aac_dev *dev = data;
1da177e4
LT
1323 struct hw_fib *hw_fib, *hw_newfib;
1324 struct fib *fib, *newfib;
1da177e4
LT
1325 struct aac_fib_context *fibctx;
1326 unsigned long flags;
1327 DECLARE_WAITQUEUE(wait, current);
1328
1329 /*
1330 * We can only have one thread per adapter for AIF's.
1331 */
1332 if (dev->aif_thread)
1333 return -EINVAL;
fe27381d 1334
1da177e4
LT
1335 /*
1336 * Let the DPC know it has a place to send the AIF's to.
1337 */
1338 dev->aif_thread = 1;
2f130980 1339 add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 1340 set_current_state(TASK_INTERRUPTIBLE);
2f130980 1341 dprintk ((KERN_INFO "aac_command_thread start\n"));
1da177e4
LT
1342 while(1)
1343 {
2f130980
MH
1344 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
1345 while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
1da177e4
LT
1346 struct list_head *entry;
1347 struct aac_aifcmd * aifcmd;
1348
1349 set_current_state(TASK_RUNNING);
2f130980
MH
1350
1351 entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
1da177e4 1352 list_del(entry);
2f130980
MH
1353
1354 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
1da177e4
LT
1355 fib = list_entry(entry, struct fib, fiblink);
1356 /*
1357 * We will process the FIB here or pass it to a
1358 * worker thread that is TBD. We Really can't
1359 * do anything at this point since we don't have
1360 * anything defined for this thread to do.
1361 */
1362 hw_fib = fib->hw_fib;
1363 memset(fib, 0, sizeof(struct fib));
1364 fib->type = FSAFS_NTC_FIB_CONTEXT;
1365 fib->size = sizeof( struct fib );
1366 fib->hw_fib = hw_fib;
1367 fib->data = hw_fib->data;
1368 fib->dev = dev;
1369 /*
1370 * We only handle AifRequest fibs from the adapter.
1371 */
1372 aifcmd = (struct aac_aifcmd *) hw_fib->data;
1373 if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
1374 /* Handle Driver Notify Events */
131256cf 1375 aac_handle_aif(dev, fib);
56b58712 1376 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
bfb35aa8 1377 aac_fib_adapter_complete(fib, (u16)sizeof(u32));
1da177e4
LT
1378 } else {
1379 struct list_head *entry;
1380 /* The u32 here is important and intended. We are using
1381 32bit wrapping time to fit the adapter field */
1382
1383 u32 time_now, time_last;
1384 unsigned long flagv;
2f130980
MH
1385 unsigned num;
1386 struct hw_fib ** hw_fib_pool, ** hw_fib_p;
1387 struct fib ** fib_pool, ** fib_p;
131256cf
MH
1388
1389 /* Sniff events */
1390 if ((aifcmd->command ==
1391 cpu_to_le32(AifCmdEventNotify)) ||
1392 (aifcmd->command ==
1393 cpu_to_le32(AifCmdJobProgress))) {
1394 aac_handle_aif(dev, fib);
1395 }
1396
1da177e4
LT
1397 time_now = jiffies/HZ;
1398
2f130980
MH
1399 /*
1400 * Warning: no sleep allowed while
1401 * holding spinlock. We take the estimate
1402 * and pre-allocate a set of fibs outside the
1403 * lock.
1404 */
1405 num = le32_to_cpu(dev->init->AdapterFibsSize)
1406 / sizeof(struct hw_fib); /* some extra */
1407 spin_lock_irqsave(&dev->fib_lock, flagv);
1408 entry = dev->fib_list.next;
1409 while (entry != &dev->fib_list) {
1410 entry = entry->next;
1411 ++num;
1412 }
1413 spin_unlock_irqrestore(&dev->fib_lock, flagv);
1414 hw_fib_pool = NULL;
1415 fib_pool = NULL;
1416 if (num
1417 && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
1418 && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
1419 hw_fib_p = hw_fib_pool;
1420 fib_p = fib_pool;
1421 while (hw_fib_p < &hw_fib_pool[num]) {
1422 if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
1423 --hw_fib_p;
1424 break;
1425 }
1426 if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
1427 kfree(*(--hw_fib_p));
1428 break;
1429 }
1430 }
1431 if ((num = hw_fib_p - hw_fib_pool) == 0) {
1432 kfree(fib_pool);
1433 fib_pool = NULL;
1434 kfree(hw_fib_pool);
1435 hw_fib_pool = NULL;
1436 }
c9475cb0 1437 } else {
2f130980
MH
1438 kfree(hw_fib_pool);
1439 hw_fib_pool = NULL;
1440 }
1da177e4
LT
1441 spin_lock_irqsave(&dev->fib_lock, flagv);
1442 entry = dev->fib_list.next;
1443 /*
1444 * For each Context that is on the
1445 * fibctxList, make a copy of the
1446 * fib, and then set the event to wake up the
1447 * thread that is waiting for it.
1448 */
2f130980
MH
1449 hw_fib_p = hw_fib_pool;
1450 fib_p = fib_pool;
1da177e4
LT
1451 while (entry != &dev->fib_list) {
1452 /*
1453 * Extract the fibctx
1454 */
1455 fibctx = list_entry(entry, struct aac_fib_context, next);
1456 /*
1457 * Check if the queue is getting
1458 * backlogged
1459 */
1460 if (fibctx->count > 20)
1461 {
1462 /*
1463 * It's *not* jiffies folks,
1464 * but jiffies / HZ so do not
1465 * panic ...
1466 */
1467 time_last = fibctx->jiffies;
1468 /*
1469 * Has it been > 2 minutes
1470 * since the last read off
1471 * the queue?
1472 */
404d9a90 1473 if ((time_now - time_last) > aif_timeout) {
1da177e4
LT
1474 entry = entry->next;
1475 aac_close_fib_context(dev, fibctx);
1476 continue;
1477 }
1478 }
1479 /*
1480 * Warning: no sleep allowed while
1481 * holding spinlock
1482 */
2f130980
MH
1483 if (hw_fib_p < &hw_fib_pool[num]) {
1484 hw_newfib = *hw_fib_p;
1485 *(hw_fib_p++) = NULL;
1486 newfib = *fib_p;
1487 *(fib_p++) = NULL;
1da177e4
LT
1488 /*
1489 * Make the copy of the FIB
1490 */
1491 memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
1492 memcpy(newfib, fib, sizeof(struct fib));
1493 newfib->hw_fib = hw_newfib;
1494 /*
1495 * Put the FIB onto the
1496 * fibctx's fibs
1497 */
1498 list_add_tail(&newfib->fiblink, &fibctx->fib_list);
1499 fibctx->count++;
1500 /*
1501 * Set the event to wake up the
2f130980 1502 * thread that is waiting.
1da177e4
LT
1503 */
1504 up(&fibctx->wait_sem);
1505 } else {
1506 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1da177e4
LT
1507 }
1508 entry = entry->next;
1509 }
1510 /*
1511 * Set the status of this FIB
1512 */
56b58712 1513 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
bfb35aa8 1514 aac_fib_adapter_complete(fib, sizeof(u32));
1da177e4 1515 spin_unlock_irqrestore(&dev->fib_lock, flagv);
2f130980
MH
1516 /* Free up the remaining resources */
1517 hw_fib_p = hw_fib_pool;
1518 fib_p = fib_pool;
1519 while (hw_fib_p < &hw_fib_pool[num]) {
c9475cb0
JJ
1520 kfree(*hw_fib_p);
1521 kfree(*fib_p);
2f130980
MH
1522 ++fib_p;
1523 ++hw_fib_p;
1524 }
c9475cb0
JJ
1525 kfree(hw_fib_pool);
1526 kfree(fib_pool);
1da177e4 1527 }
1da177e4 1528 kfree(fib);
2f130980 1529 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
1da177e4
LT
1530 }
1531 /*
1532 * There are no more AIF's
1533 */
2f130980 1534 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
1da177e4
LT
1535 schedule();
1536
fe27381d 1537 if (kthread_should_stop())
1da177e4
LT
1538 break;
1539 set_current_state(TASK_INTERRUPTIBLE);
1540 }
2f130980
MH
1541 if (dev->queues)
1542 remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 1543 dev->aif_thread = 0;
2f130980 1544 return 0;
1da177e4 1545}
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