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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
3 | * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com> | |
4 | * | |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
8 | * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2, or (at your option) | |
13 | * any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; see the file COPYING. If not, write to | |
22 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | * | |
24 | * Module Name: | |
25 | * commsup.c | |
26 | * | |
27 | * Abstract: Contain all routines that are required for FSA host/adapter | |
7c00ffa3 | 28 | * communication. |
1da177e4 LT |
29 | * |
30 | */ | |
31 | ||
32 | #include <linux/kernel.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/types.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/pci.h> | |
37 | #include <linux/spinlock.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/completion.h> | |
40 | #include <linux/blkdev.h> | |
164006da | 41 | #include <linux/delay.h> |
7c00ffa3 | 42 | #include <scsi/scsi_host.h> |
131256cf | 43 | #include <scsi/scsi_device.h> |
1da177e4 LT |
44 | #include <asm/semaphore.h> |
45 | ||
46 | #include "aacraid.h" | |
47 | ||
48 | /** | |
49 | * fib_map_alloc - allocate the fib objects | |
50 | * @dev: Adapter to allocate for | |
51 | * | |
52 | * Allocate and map the shared PCI space for the FIB blocks used to | |
53 | * talk to the Adaptec firmware. | |
54 | */ | |
55 | ||
56 | static int fib_map_alloc(struct aac_dev *dev) | |
57 | { | |
7c00ffa3 MH |
58 | dprintk((KERN_INFO |
59 | "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n", | |
60 | dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue, | |
61 | AAC_NUM_MGT_FIB, &dev->hw_fib_pa)); | |
62 | if((dev->hw_fib_va = pci_alloc_consistent(dev->pdev, dev->max_fib_size | |
63 | * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), | |
64 | &dev->hw_fib_pa))==NULL) | |
1da177e4 LT |
65 | return -ENOMEM; |
66 | return 0; | |
67 | } | |
68 | ||
69 | /** | |
bfb35aa8 | 70 | * aac_fib_map_free - free the fib objects |
1da177e4 LT |
71 | * @dev: Adapter to free |
72 | * | |
73 | * Free the PCI mappings and the memory allocated for FIB blocks | |
74 | * on this adapter. | |
75 | */ | |
76 | ||
bfb35aa8 | 77 | void aac_fib_map_free(struct aac_dev *dev) |
1da177e4 | 78 | { |
7c00ffa3 | 79 | pci_free_consistent(dev->pdev, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), dev->hw_fib_va, dev->hw_fib_pa); |
1da177e4 LT |
80 | } |
81 | ||
82 | /** | |
bfb35aa8 | 83 | * aac_fib_setup - setup the fibs |
1da177e4 LT |
84 | * @dev: Adapter to set up |
85 | * | |
86 | * Allocate the PCI space for the fibs, map it and then intialise the | |
87 | * fib area, the unmapped fib data and also the free list | |
88 | */ | |
89 | ||
bfb35aa8 | 90 | int aac_fib_setup(struct aac_dev * dev) |
1da177e4 LT |
91 | { |
92 | struct fib *fibptr; | |
93 | struct hw_fib *hw_fib_va; | |
94 | dma_addr_t hw_fib_pa; | |
95 | int i; | |
7c00ffa3 MH |
96 | |
97 | while (((i = fib_map_alloc(dev)) == -ENOMEM) | |
98 | && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) { | |
99 | dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1); | |
100 | dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB; | |
101 | } | |
102 | if (i<0) | |
1da177e4 LT |
103 | return -ENOMEM; |
104 | ||
105 | hw_fib_va = dev->hw_fib_va; | |
106 | hw_fib_pa = dev->hw_fib_pa; | |
7c00ffa3 | 107 | memset(hw_fib_va, 0, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)); |
1da177e4 LT |
108 | /* |
109 | * Initialise the fibs | |
110 | */ | |
7c00ffa3 | 111 | for (i = 0, fibptr = &dev->fibs[i]; i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); i++, fibptr++) |
1da177e4 LT |
112 | { |
113 | fibptr->dev = dev; | |
114 | fibptr->hw_fib = hw_fib_va; | |
115 | fibptr->data = (void *) fibptr->hw_fib->data; | |
116 | fibptr->next = fibptr+1; /* Forward chain the fibs */ | |
117 | init_MUTEX_LOCKED(&fibptr->event_wait); | |
118 | spin_lock_init(&fibptr->event_lock); | |
56b58712 | 119 | hw_fib_va->header.XferState = cpu_to_le32(0xffffffff); |
7c00ffa3 | 120 | hw_fib_va->header.SenderSize = cpu_to_le16(dev->max_fib_size); |
1da177e4 | 121 | fibptr->hw_fib_pa = hw_fib_pa; |
7c00ffa3 MH |
122 | hw_fib_va = (struct hw_fib *)((unsigned char *)hw_fib_va + dev->max_fib_size); |
123 | hw_fib_pa = hw_fib_pa + dev->max_fib_size; | |
1da177e4 LT |
124 | } |
125 | /* | |
126 | * Add the fib chain to the free list | |
127 | */ | |
7c00ffa3 | 128 | dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL; |
1da177e4 LT |
129 | /* |
130 | * Enable this to debug out of queue space | |
131 | */ | |
132 | dev->free_fib = &dev->fibs[0]; | |
133 | return 0; | |
134 | } | |
135 | ||
136 | /** | |
bfb35aa8 | 137 | * aac_fib_alloc - allocate a fib |
1da177e4 LT |
138 | * @dev: Adapter to allocate the fib for |
139 | * | |
140 | * Allocate a fib from the adapter fib pool. If the pool is empty we | |
7c00ffa3 | 141 | * return NULL. |
1da177e4 LT |
142 | */ |
143 | ||
bfb35aa8 | 144 | struct fib *aac_fib_alloc(struct aac_dev *dev) |
1da177e4 LT |
145 | { |
146 | struct fib * fibptr; | |
147 | unsigned long flags; | |
148 | spin_lock_irqsave(&dev->fib_lock, flags); | |
149 | fibptr = dev->free_fib; | |
7c00ffa3 MH |
150 | if(!fibptr){ |
151 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
152 | return fibptr; | |
153 | } | |
1da177e4 LT |
154 | dev->free_fib = fibptr->next; |
155 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
156 | /* | |
157 | * Set the proper node type code and node byte size | |
158 | */ | |
159 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
160 | fibptr->size = sizeof(struct fib); | |
161 | /* | |
162 | * Null out fields that depend on being zero at the start of | |
163 | * each I/O | |
164 | */ | |
165 | fibptr->hw_fib->header.XferState = 0; | |
166 | fibptr->callback = NULL; | |
167 | fibptr->callback_data = NULL; | |
168 | ||
169 | return fibptr; | |
170 | } | |
171 | ||
172 | /** | |
bfb35aa8 | 173 | * aac_fib_free - free a fib |
1da177e4 LT |
174 | * @fibptr: fib to free up |
175 | * | |
176 | * Frees up a fib and places it on the appropriate queue | |
177 | * (either free or timed out) | |
178 | */ | |
179 | ||
bfb35aa8 | 180 | void aac_fib_free(struct fib *fibptr) |
1da177e4 LT |
181 | { |
182 | unsigned long flags; | |
183 | ||
184 | spin_lock_irqsave(&fibptr->dev->fib_lock, flags); | |
185 | if (fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT) { | |
186 | aac_config.fib_timeouts++; | |
187 | fibptr->next = fibptr->dev->timeout_fib; | |
188 | fibptr->dev->timeout_fib = fibptr; | |
189 | } else { | |
190 | if (fibptr->hw_fib->header.XferState != 0) { | |
bfb35aa8 | 191 | printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n", |
1da177e4 LT |
192 | (void*)fibptr, |
193 | le32_to_cpu(fibptr->hw_fib->header.XferState)); | |
194 | } | |
195 | fibptr->next = fibptr->dev->free_fib; | |
196 | fibptr->dev->free_fib = fibptr; | |
197 | } | |
198 | spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags); | |
199 | } | |
200 | ||
201 | /** | |
bfb35aa8 | 202 | * aac_fib_init - initialise a fib |
1da177e4 LT |
203 | * @fibptr: The fib to initialize |
204 | * | |
205 | * Set up the generic fib fields ready for use | |
206 | */ | |
207 | ||
bfb35aa8 | 208 | void aac_fib_init(struct fib *fibptr) |
1da177e4 LT |
209 | { |
210 | struct hw_fib *hw_fib = fibptr->hw_fib; | |
211 | ||
212 | hw_fib->header.StructType = FIB_MAGIC; | |
7c00ffa3 MH |
213 | hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size); |
214 | hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable); | |
8e0c5ebd | 215 | hw_fib->header.SenderFibAddress = 0; /* Filled in later if needed */ |
1da177e4 | 216 | hw_fib->header.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa); |
7c00ffa3 | 217 | hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size); |
1da177e4 LT |
218 | } |
219 | ||
220 | /** | |
221 | * fib_deallocate - deallocate a fib | |
222 | * @fibptr: fib to deallocate | |
223 | * | |
224 | * Will deallocate and return to the free pool the FIB pointed to by the | |
225 | * caller. | |
226 | */ | |
227 | ||
4833869e | 228 | static void fib_dealloc(struct fib * fibptr) |
1da177e4 LT |
229 | { |
230 | struct hw_fib *hw_fib = fibptr->hw_fib; | |
231 | if(hw_fib->header.StructType != FIB_MAGIC) | |
232 | BUG(); | |
233 | hw_fib->header.XferState = 0; | |
234 | } | |
235 | ||
236 | /* | |
237 | * Commuication primitives define and support the queuing method we use to | |
238 | * support host to adapter commuication. All queue accesses happen through | |
239 | * these routines and are the only routines which have a knowledge of the | |
240 | * how these queues are implemented. | |
241 | */ | |
242 | ||
243 | /** | |
244 | * aac_get_entry - get a queue entry | |
245 | * @dev: Adapter | |
246 | * @qid: Queue Number | |
247 | * @entry: Entry return | |
248 | * @index: Index return | |
249 | * @nonotify: notification control | |
250 | * | |
251 | * With a priority the routine returns a queue entry if the queue has free entries. If the queue | |
252 | * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is | |
253 | * returned. | |
254 | */ | |
255 | ||
256 | static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify) | |
257 | { | |
258 | struct aac_queue * q; | |
bed30de4 | 259 | unsigned long idx; |
1da177e4 LT |
260 | |
261 | /* | |
262 | * All of the queues wrap when they reach the end, so we check | |
263 | * to see if they have reached the end and if they have we just | |
264 | * set the index back to zero. This is a wrap. You could or off | |
265 | * the high bits in all updates but this is a bit faster I think. | |
266 | */ | |
267 | ||
268 | q = &dev->queues->queue[qid]; | |
bed30de4 MH |
269 | |
270 | idx = *index = le32_to_cpu(*(q->headers.producer)); | |
271 | /* Interrupt Moderation, only interrupt for first two entries */ | |
272 | if (idx != le32_to_cpu(*(q->headers.consumer))) { | |
273 | if (--idx == 0) { | |
1640a2c3 | 274 | if (qid == AdapNormCmdQueue) |
bed30de4 | 275 | idx = ADAP_NORM_CMD_ENTRIES; |
1640a2c3 | 276 | else |
bed30de4 MH |
277 | idx = ADAP_NORM_RESP_ENTRIES; |
278 | } | |
279 | if (idx != le32_to_cpu(*(q->headers.consumer))) | |
1da177e4 | 280 | *nonotify = 1; |
bed30de4 | 281 | } |
1da177e4 | 282 | |
1640a2c3 | 283 | if (qid == AdapNormCmdQueue) { |
1da177e4 LT |
284 | if (*index >= ADAP_NORM_CMD_ENTRIES) |
285 | *index = 0; /* Wrap to front of the Producer Queue. */ | |
1640a2c3 | 286 | } else { |
1da177e4 LT |
287 | if (*index >= ADAP_NORM_RESP_ENTRIES) |
288 | *index = 0; /* Wrap to front of the Producer Queue. */ | |
289 | } | |
1da177e4 LT |
290 | |
291 | if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */ | |
7c00ffa3 | 292 | printk(KERN_WARNING "Queue %d full, %u outstanding.\n", |
1da177e4 LT |
293 | qid, q->numpending); |
294 | return 0; | |
295 | } else { | |
296 | *entry = q->base + *index; | |
297 | return 1; | |
298 | } | |
299 | } | |
300 | ||
301 | /** | |
302 | * aac_queue_get - get the next free QE | |
303 | * @dev: Adapter | |
304 | * @index: Returned index | |
305 | * @priority: Priority of fib | |
306 | * @fib: Fib to associate with the queue entry | |
307 | * @wait: Wait if queue full | |
308 | * @fibptr: Driver fib object to go with fib | |
309 | * @nonotify: Don't notify the adapter | |
310 | * | |
311 | * Gets the next free QE off the requested priorty adapter command | |
312 | * queue and associates the Fib with the QE. The QE represented by | |
313 | * index is ready to insert on the queue when this routine returns | |
314 | * success. | |
315 | */ | |
316 | ||
317 | static int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify) | |
318 | { | |
319 | struct aac_entry * entry = NULL; | |
320 | int map = 0; | |
1da177e4 | 321 | |
1640a2c3 | 322 | if (qid == AdapNormCmdQueue) { |
1da177e4 LT |
323 | /* if no entries wait for some if caller wants to */ |
324 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) | |
325 | { | |
326 | printk(KERN_ERR "GetEntries failed\n"); | |
327 | } | |
328 | /* | |
329 | * Setup queue entry with a command, status and fib mapped | |
330 | */ | |
331 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
332 | map = 1; | |
1640a2c3 | 333 | } else { |
1da177e4 LT |
334 | while(!aac_get_entry(dev, qid, &entry, index, nonotify)) |
335 | { | |
336 | /* if no entries wait for some if caller wants to */ | |
337 | } | |
338 | /* | |
339 | * Setup queue entry with command, status and fib mapped | |
340 | */ | |
341 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
342 | entry->addr = hw_fib->header.SenderFibAddress; | |
343 | /* Restore adapters pointer to the FIB */ | |
344 | hw_fib->header.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */ | |
345 | map = 0; | |
346 | } | |
347 | /* | |
348 | * If MapFib is true than we need to map the Fib and put pointers | |
349 | * in the queue entry. | |
350 | */ | |
351 | if (map) | |
352 | entry->addr = cpu_to_le32(fibptr->hw_fib_pa); | |
353 | return 0; | |
354 | } | |
355 | ||
1da177e4 LT |
356 | /* |
357 | * Define the highest level of host to adapter communication routines. | |
358 | * These routines will support host to adapter FS commuication. These | |
359 | * routines have no knowledge of the commuication method used. This level | |
360 | * sends and receives FIBs. This level has no knowledge of how these FIBs | |
361 | * get passed back and forth. | |
362 | */ | |
363 | ||
364 | /** | |
bfb35aa8 | 365 | * aac_fib_send - send a fib to the adapter |
1da177e4 LT |
366 | * @command: Command to send |
367 | * @fibptr: The fib | |
368 | * @size: Size of fib data area | |
369 | * @priority: Priority of Fib | |
370 | * @wait: Async/sync select | |
371 | * @reply: True if a reply is wanted | |
372 | * @callback: Called with reply | |
373 | * @callback_data: Passed to callback | |
374 | * | |
375 | * Sends the requested FIB to the adapter and optionally will wait for a | |
376 | * response FIB. If the caller does not wish to wait for a response than | |
377 | * an event to wait on must be supplied. This event will be set when a | |
378 | * response FIB is received from the adapter. | |
379 | */ | |
380 | ||
bfb35aa8 MH |
381 | int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size, |
382 | int priority, int wait, int reply, fib_callback callback, | |
383 | void *callback_data) | |
1da177e4 | 384 | { |
1da177e4 | 385 | struct aac_dev * dev = fibptr->dev; |
1da177e4 LT |
386 | struct hw_fib * hw_fib = fibptr->hw_fib; |
387 | struct aac_queue * q; | |
388 | unsigned long flags = 0; | |
1640a2c3 MH |
389 | unsigned long qflags; |
390 | ||
1da177e4 LT |
391 | if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned))) |
392 | return -EBUSY; | |
393 | /* | |
394 | * There are 5 cases with the wait and reponse requested flags. | |
395 | * The only invalid cases are if the caller requests to wait and | |
396 | * does not request a response and if the caller does not want a | |
397 | * response and the Fib is not allocated from pool. If a response | |
398 | * is not requesed the Fib will just be deallocaed by the DPC | |
399 | * routine when the response comes back from the adapter. No | |
400 | * further processing will be done besides deleting the Fib. We | |
401 | * will have a debug mode where the adapter can notify the host | |
402 | * it had a problem and the host can log that fact. | |
403 | */ | |
404 | if (wait && !reply) { | |
405 | return -EINVAL; | |
406 | } else if (!wait && reply) { | |
407 | hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected); | |
408 | FIB_COUNTER_INCREMENT(aac_config.AsyncSent); | |
409 | } else if (!wait && !reply) { | |
410 | hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected); | |
411 | FIB_COUNTER_INCREMENT(aac_config.NoResponseSent); | |
412 | } else if (wait && reply) { | |
413 | hw_fib->header.XferState |= cpu_to_le32(ResponseExpected); | |
414 | FIB_COUNTER_INCREMENT(aac_config.NormalSent); | |
415 | } | |
416 | /* | |
417 | * Map the fib into 32bits by using the fib number | |
418 | */ | |
419 | ||
8e0c5ebd | 420 | hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2); |
1da177e4 LT |
421 | hw_fib->header.SenderData = (u32)(fibptr - dev->fibs); |
422 | /* | |
423 | * Set FIB state to indicate where it came from and if we want a | |
424 | * response from the adapter. Also load the command from the | |
425 | * caller. | |
426 | * | |
427 | * Map the hw fib pointer as a 32bit value | |
428 | */ | |
429 | hw_fib->header.Command = cpu_to_le16(command); | |
430 | hw_fib->header.XferState |= cpu_to_le32(SentFromHost); | |
431 | fibptr->hw_fib->header.Flags = 0; /* 0 the flags field - internal only*/ | |
432 | /* | |
433 | * Set the size of the Fib we want to send to the adapter | |
434 | */ | |
435 | hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size); | |
436 | if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) { | |
437 | return -EMSGSIZE; | |
438 | } | |
439 | /* | |
440 | * Get a queue entry connect the FIB to it and send an notify | |
441 | * the adapter a command is ready. | |
442 | */ | |
1640a2c3 | 443 | hw_fib->header.XferState |= cpu_to_le32(NormalPriority); |
1da177e4 | 444 | |
1da177e4 LT |
445 | /* |
446 | * Fill in the Callback and CallbackContext if we are not | |
447 | * going to wait. | |
448 | */ | |
449 | if (!wait) { | |
450 | fibptr->callback = callback; | |
451 | fibptr->callback_data = callback_data; | |
452 | } | |
1da177e4 LT |
453 | |
454 | fibptr->done = 0; | |
455 | fibptr->flags = 0; | |
456 | ||
1640a2c3 MH |
457 | FIB_COUNTER_INCREMENT(aac_config.FibsSent); |
458 | ||
1640a2c3 | 459 | dprintk((KERN_DEBUG "Fib contents:.\n")); |
8e0c5ebd MH |
460 | dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command))); |
461 | dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command))); | |
462 | dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState))); | |
1640a2c3 MH |
463 | dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib)); |
464 | dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa)); | |
465 | dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr)); | |
466 | ||
467 | q = &dev->queues->queue[AdapNormCmdQueue]; | |
468 | ||
469 | if(wait) | |
470 | spin_lock_irqsave(&fibptr->event_lock, flags); | |
471 | spin_lock_irqsave(q->lock, qflags); | |
8e0c5ebd MH |
472 | if (dev->new_comm_interface) { |
473 | unsigned long count = 10000000L; /* 50 seconds */ | |
474 | list_add_tail(&fibptr->queue, &q->pendingq); | |
475 | q->numpending++; | |
476 | spin_unlock_irqrestore(q->lock, qflags); | |
477 | while (aac_adapter_send(fibptr) != 0) { | |
478 | if (--count == 0) { | |
479 | if (wait) | |
480 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
481 | spin_lock_irqsave(q->lock, qflags); | |
482 | q->numpending--; | |
483 | list_del(&fibptr->queue); | |
484 | spin_unlock_irqrestore(q->lock, qflags); | |
485 | return -ETIMEDOUT; | |
486 | } | |
487 | udelay(5); | |
488 | } | |
489 | } else { | |
490 | u32 index; | |
491 | unsigned long nointr = 0; | |
492 | aac_queue_get( dev, &index, AdapNormCmdQueue, hw_fib, 1, fibptr, &nointr); | |
493 | ||
494 | list_add_tail(&fibptr->queue, &q->pendingq); | |
495 | q->numpending++; | |
496 | *(q->headers.producer) = cpu_to_le32(index + 1); | |
497 | spin_unlock_irqrestore(q->lock, qflags); | |
bfb35aa8 | 498 | dprintk((KERN_DEBUG "aac_fib_send: inserting a queue entry at index %d.\n",index)); |
8e0c5ebd MH |
499 | if (!(nointr & aac_config.irq_mod)) |
500 | aac_adapter_notify(dev, AdapNormCmdQueue); | |
501 | } | |
502 | ||
1da177e4 LT |
503 | /* |
504 | * If the caller wanted us to wait for response wait now. | |
505 | */ | |
506 | ||
507 | if (wait) { | |
508 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
9203344c MH |
509 | /* Only set for first known interruptable command */ |
510 | if (wait < 0) { | |
511 | /* | |
512 | * *VERY* Dangerous to time out a command, the | |
513 | * assumption is made that we have no hope of | |
514 | * functioning because an interrupt routing or other | |
515 | * hardware failure has occurred. | |
516 | */ | |
517 | unsigned long count = 36000000L; /* 3 minutes */ | |
9203344c MH |
518 | while (down_trylock(&fibptr->event_wait)) { |
519 | if (--count == 0) { | |
520 | spin_lock_irqsave(q->lock, qflags); | |
521 | q->numpending--; | |
522 | list_del(&fibptr->queue); | |
523 | spin_unlock_irqrestore(q->lock, qflags); | |
524 | if (wait == -1) { | |
bfb35aa8 | 525 | printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n" |
9203344c MH |
526 | "Usually a result of a PCI interrupt routing problem;\n" |
527 | "update mother board BIOS or consider utilizing one of\n" | |
528 | "the SAFE mode kernel options (acpi, apic etc)\n"); | |
529 | } | |
530 | return -ETIMEDOUT; | |
531 | } | |
532 | udelay(5); | |
533 | } | |
534 | } else | |
535 | down(&fibptr->event_wait); | |
1da177e4 LT |
536 | if(fibptr->done == 0) |
537 | BUG(); | |
538 | ||
539 | if((fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)){ | |
540 | return -ETIMEDOUT; | |
541 | } else { | |
542 | return 0; | |
543 | } | |
544 | } | |
545 | /* | |
546 | * If the user does not want a response than return success otherwise | |
547 | * return pending | |
548 | */ | |
549 | if (reply) | |
550 | return -EINPROGRESS; | |
551 | else | |
552 | return 0; | |
553 | } | |
554 | ||
555 | /** | |
556 | * aac_consumer_get - get the top of the queue | |
557 | * @dev: Adapter | |
558 | * @q: Queue | |
559 | * @entry: Return entry | |
560 | * | |
561 | * Will return a pointer to the entry on the top of the queue requested that | |
562 | * we are a consumer of, and return the address of the queue entry. It does | |
563 | * not change the state of the queue. | |
564 | */ | |
565 | ||
566 | int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry) | |
567 | { | |
568 | u32 index; | |
569 | int status; | |
570 | if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) { | |
571 | status = 0; | |
572 | } else { | |
573 | /* | |
574 | * The consumer index must be wrapped if we have reached | |
575 | * the end of the queue, else we just use the entry | |
576 | * pointed to by the header index | |
577 | */ | |
578 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) | |
579 | index = 0; | |
580 | else | |
581 | index = le32_to_cpu(*q->headers.consumer); | |
582 | *entry = q->base + index; | |
583 | status = 1; | |
584 | } | |
585 | return(status); | |
586 | } | |
587 | ||
588 | /** | |
589 | * aac_consumer_free - free consumer entry | |
590 | * @dev: Adapter | |
591 | * @q: Queue | |
592 | * @qid: Queue ident | |
593 | * | |
594 | * Frees up the current top of the queue we are a consumer of. If the | |
595 | * queue was full notify the producer that the queue is no longer full. | |
596 | */ | |
597 | ||
598 | void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid) | |
599 | { | |
600 | int wasfull = 0; | |
601 | u32 notify; | |
602 | ||
603 | if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer)) | |
604 | wasfull = 1; | |
605 | ||
606 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) | |
607 | *q->headers.consumer = cpu_to_le32(1); | |
608 | else | |
609 | *q->headers.consumer = cpu_to_le32(le32_to_cpu(*q->headers.consumer)+1); | |
610 | ||
611 | if (wasfull) { | |
612 | switch (qid) { | |
613 | ||
614 | case HostNormCmdQueue: | |
615 | notify = HostNormCmdNotFull; | |
616 | break; | |
1da177e4 LT |
617 | case HostNormRespQueue: |
618 | notify = HostNormRespNotFull; | |
619 | break; | |
1da177e4 LT |
620 | default: |
621 | BUG(); | |
622 | return; | |
623 | } | |
624 | aac_adapter_notify(dev, notify); | |
625 | } | |
626 | } | |
627 | ||
628 | /** | |
bfb35aa8 | 629 | * aac_fib_adapter_complete - complete adapter issued fib |
1da177e4 LT |
630 | * @fibptr: fib to complete |
631 | * @size: size of fib | |
632 | * | |
633 | * Will do all necessary work to complete a FIB that was sent from | |
634 | * the adapter. | |
635 | */ | |
636 | ||
bfb35aa8 | 637 | int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size) |
1da177e4 LT |
638 | { |
639 | struct hw_fib * hw_fib = fibptr->hw_fib; | |
640 | struct aac_dev * dev = fibptr->dev; | |
1640a2c3 | 641 | struct aac_queue * q; |
1da177e4 | 642 | unsigned long nointr = 0; |
1640a2c3 MH |
643 | unsigned long qflags; |
644 | ||
645 | if (hw_fib->header.XferState == 0) { | |
8e0c5ebd MH |
646 | if (dev->new_comm_interface) |
647 | kfree (hw_fib); | |
1da177e4 | 648 | return 0; |
1640a2c3 | 649 | } |
1da177e4 LT |
650 | /* |
651 | * If we plan to do anything check the structure type first. | |
652 | */ | |
653 | if ( hw_fib->header.StructType != FIB_MAGIC ) { | |
8e0c5ebd MH |
654 | if (dev->new_comm_interface) |
655 | kfree (hw_fib); | |
1da177e4 LT |
656 | return -EINVAL; |
657 | } | |
658 | /* | |
659 | * This block handles the case where the adapter had sent us a | |
660 | * command and we have finished processing the command. We | |
661 | * call completeFib when we are done processing the command | |
662 | * and want to send a response back to the adapter. This will | |
663 | * send the completed cdb to the adapter. | |
664 | */ | |
665 | if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) { | |
8e0c5ebd MH |
666 | if (dev->new_comm_interface) { |
667 | kfree (hw_fib); | |
668 | } else { | |
669 | u32 index; | |
670 | hw_fib->header.XferState |= cpu_to_le32(HostProcessed); | |
671 | if (size) { | |
672 | size += sizeof(struct aac_fibhdr); | |
673 | if (size > le16_to_cpu(hw_fib->header.SenderSize)) | |
674 | return -EMSGSIZE; | |
675 | hw_fib->header.Size = cpu_to_le16(size); | |
676 | } | |
677 | q = &dev->queues->queue[AdapNormRespQueue]; | |
678 | spin_lock_irqsave(q->lock, qflags); | |
679 | aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr); | |
680 | *(q->headers.producer) = cpu_to_le32(index + 1); | |
681 | spin_unlock_irqrestore(q->lock, qflags); | |
682 | if (!(nointr & (int)aac_config.irq_mod)) | |
683 | aac_adapter_notify(dev, AdapNormRespQueue); | |
1da177e4 LT |
684 | } |
685 | } | |
686 | else | |
687 | { | |
bfb35aa8 | 688 | printk(KERN_WARNING "aac_fib_adapter_complete: Unknown xferstate detected.\n"); |
1da177e4 LT |
689 | BUG(); |
690 | } | |
691 | return 0; | |
692 | } | |
693 | ||
694 | /** | |
bfb35aa8 | 695 | * aac_fib_complete - fib completion handler |
1da177e4 LT |
696 | * @fib: FIB to complete |
697 | * | |
698 | * Will do all necessary work to complete a FIB. | |
699 | */ | |
700 | ||
bfb35aa8 | 701 | int aac_fib_complete(struct fib *fibptr) |
1da177e4 LT |
702 | { |
703 | struct hw_fib * hw_fib = fibptr->hw_fib; | |
704 | ||
705 | /* | |
706 | * Check for a fib which has already been completed | |
707 | */ | |
708 | ||
709 | if (hw_fib->header.XferState == 0) | |
710 | return 0; | |
711 | /* | |
712 | * If we plan to do anything check the structure type first. | |
713 | */ | |
714 | ||
715 | if (hw_fib->header.StructType != FIB_MAGIC) | |
716 | return -EINVAL; | |
717 | /* | |
718 | * This block completes a cdb which orginated on the host and we | |
719 | * just need to deallocate the cdb or reinit it. At this point the | |
720 | * command is complete that we had sent to the adapter and this | |
721 | * cdb could be reused. | |
722 | */ | |
723 | if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) && | |
724 | (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))) | |
725 | { | |
726 | fib_dealloc(fibptr); | |
727 | } | |
728 | else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost)) | |
729 | { | |
730 | /* | |
731 | * This handles the case when the host has aborted the I/O | |
732 | * to the adapter because the adapter is not responding | |
733 | */ | |
734 | fib_dealloc(fibptr); | |
735 | } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) { | |
736 | fib_dealloc(fibptr); | |
737 | } else { | |
738 | BUG(); | |
739 | } | |
740 | return 0; | |
741 | } | |
742 | ||
743 | /** | |
744 | * aac_printf - handle printf from firmware | |
745 | * @dev: Adapter | |
746 | * @val: Message info | |
747 | * | |
748 | * Print a message passed to us by the controller firmware on the | |
749 | * Adaptec board | |
750 | */ | |
751 | ||
752 | void aac_printf(struct aac_dev *dev, u32 val) | |
753 | { | |
1da177e4 | 754 | char *cp = dev->printfbuf; |
7c00ffa3 MH |
755 | if (dev->printf_enabled) |
756 | { | |
757 | int length = val & 0xffff; | |
758 | int level = (val >> 16) & 0xffff; | |
759 | ||
760 | /* | |
761 | * The size of the printfbuf is set in port.c | |
762 | * There is no variable or define for it | |
763 | */ | |
764 | if (length > 255) | |
765 | length = 255; | |
766 | if (cp[length] != 0) | |
767 | cp[length] = 0; | |
768 | if (level == LOG_AAC_HIGH_ERROR) | |
769 | printk(KERN_WARNING "aacraid:%s", cp); | |
770 | else | |
771 | printk(KERN_INFO "aacraid:%s", cp); | |
772 | } | |
1da177e4 LT |
773 | memset(cp, 0, 256); |
774 | } | |
775 | ||
131256cf MH |
776 | |
777 | /** | |
778 | * aac_handle_aif - Handle a message from the firmware | |
779 | * @dev: Which adapter this fib is from | |
780 | * @fibptr: Pointer to fibptr from adapter | |
781 | * | |
782 | * This routine handles a driver notify fib from the adapter and | |
783 | * dispatches it to the appropriate routine for handling. | |
784 | */ | |
785 | ||
786 | static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr) | |
787 | { | |
788 | struct hw_fib * hw_fib = fibptr->hw_fib; | |
789 | struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data; | |
790 | int busy; | |
791 | u32 container; | |
792 | struct scsi_device *device; | |
793 | enum { | |
794 | NOTHING, | |
795 | DELETE, | |
796 | ADD, | |
797 | CHANGE | |
798 | } device_config_needed; | |
799 | ||
800 | /* Sniff for container changes */ | |
801 | ||
802 | if (!dev) | |
803 | return; | |
804 | container = (u32)-1; | |
805 | ||
806 | /* | |
807 | * We have set this up to try and minimize the number of | |
808 | * re-configures that take place. As a result of this when | |
809 | * certain AIF's come in we will set a flag waiting for another | |
810 | * type of AIF before setting the re-config flag. | |
811 | */ | |
812 | switch (le32_to_cpu(aifcmd->command)) { | |
813 | case AifCmdDriverNotify: | |
814 | switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) { | |
815 | /* | |
816 | * Morph or Expand complete | |
817 | */ | |
818 | case AifDenMorphComplete: | |
819 | case AifDenVolumeExtendComplete: | |
820 | container = le32_to_cpu(((u32 *)aifcmd->data)[1]); | |
821 | if (container >= dev->maximum_num_containers) | |
822 | break; | |
823 | ||
824 | /* | |
f64a181d | 825 | * Find the scsi_device associated with the SCSI |
131256cf MH |
826 | * address. Make sure we have the right array, and if |
827 | * so set the flag to initiate a new re-config once we | |
828 | * see an AifEnConfigChange AIF come through. | |
829 | */ | |
830 | ||
831 | if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) { | |
832 | device = scsi_device_lookup(dev->scsi_host_ptr, | |
833 | CONTAINER_TO_CHANNEL(container), | |
834 | CONTAINER_TO_ID(container), | |
835 | CONTAINER_TO_LUN(container)); | |
836 | if (device) { | |
837 | dev->fsa_dev[container].config_needed = CHANGE; | |
838 | dev->fsa_dev[container].config_waiting_on = AifEnConfigChange; | |
839 | scsi_device_put(device); | |
840 | } | |
841 | } | |
842 | } | |
843 | ||
844 | /* | |
845 | * If we are waiting on something and this happens to be | |
846 | * that thing then set the re-configure flag. | |
847 | */ | |
848 | if (container != (u32)-1) { | |
849 | if (container >= dev->maximum_num_containers) | |
850 | break; | |
851 | if (dev->fsa_dev[container].config_waiting_on == | |
852 | le32_to_cpu(*(u32 *)aifcmd->data)) | |
853 | dev->fsa_dev[container].config_waiting_on = 0; | |
854 | } else for (container = 0; | |
855 | container < dev->maximum_num_containers; ++container) { | |
856 | if (dev->fsa_dev[container].config_waiting_on == | |
857 | le32_to_cpu(*(u32 *)aifcmd->data)) | |
858 | dev->fsa_dev[container].config_waiting_on = 0; | |
859 | } | |
860 | break; | |
861 | ||
862 | case AifCmdEventNotify: | |
863 | switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) { | |
864 | /* | |
865 | * Add an Array. | |
866 | */ | |
867 | case AifEnAddContainer: | |
868 | container = le32_to_cpu(((u32 *)aifcmd->data)[1]); | |
869 | if (container >= dev->maximum_num_containers) | |
870 | break; | |
871 | dev->fsa_dev[container].config_needed = ADD; | |
872 | dev->fsa_dev[container].config_waiting_on = | |
873 | AifEnConfigChange; | |
874 | break; | |
875 | ||
876 | /* | |
877 | * Delete an Array. | |
878 | */ | |
879 | case AifEnDeleteContainer: | |
880 | container = le32_to_cpu(((u32 *)aifcmd->data)[1]); | |
881 | if (container >= dev->maximum_num_containers) | |
882 | break; | |
883 | dev->fsa_dev[container].config_needed = DELETE; | |
884 | dev->fsa_dev[container].config_waiting_on = | |
885 | AifEnConfigChange; | |
886 | break; | |
887 | ||
888 | /* | |
889 | * Container change detected. If we currently are not | |
890 | * waiting on something else, setup to wait on a Config Change. | |
891 | */ | |
892 | case AifEnContainerChange: | |
893 | container = le32_to_cpu(((u32 *)aifcmd->data)[1]); | |
894 | if (container >= dev->maximum_num_containers) | |
895 | break; | |
896 | if (dev->fsa_dev[container].config_waiting_on) | |
897 | break; | |
898 | dev->fsa_dev[container].config_needed = CHANGE; | |
899 | dev->fsa_dev[container].config_waiting_on = | |
900 | AifEnConfigChange; | |
901 | break; | |
902 | ||
903 | case AifEnConfigChange: | |
904 | break; | |
905 | ||
906 | } | |
907 | ||
908 | /* | |
909 | * If we are waiting on something and this happens to be | |
910 | * that thing then set the re-configure flag. | |
911 | */ | |
912 | if (container != (u32)-1) { | |
913 | if (container >= dev->maximum_num_containers) | |
914 | break; | |
915 | if (dev->fsa_dev[container].config_waiting_on == | |
916 | le32_to_cpu(*(u32 *)aifcmd->data)) | |
917 | dev->fsa_dev[container].config_waiting_on = 0; | |
918 | } else for (container = 0; | |
919 | container < dev->maximum_num_containers; ++container) { | |
920 | if (dev->fsa_dev[container].config_waiting_on == | |
921 | le32_to_cpu(*(u32 *)aifcmd->data)) | |
922 | dev->fsa_dev[container].config_waiting_on = 0; | |
923 | } | |
924 | break; | |
925 | ||
926 | case AifCmdJobProgress: | |
927 | /* | |
928 | * These are job progress AIF's. When a Clear is being | |
929 | * done on a container it is initially created then hidden from | |
930 | * the OS. When the clear completes we don't get a config | |
931 | * change so we monitor the job status complete on a clear then | |
932 | * wait for a container change. | |
933 | */ | |
934 | ||
935 | if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero)) | |
936 | && ((((u32 *)aifcmd->data)[6] == ((u32 *)aifcmd->data)[5]) | |
937 | || (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess)))) { | |
938 | for (container = 0; | |
939 | container < dev->maximum_num_containers; | |
940 | ++container) { | |
941 | /* | |
942 | * Stomp on all config sequencing for all | |
943 | * containers? | |
944 | */ | |
945 | dev->fsa_dev[container].config_waiting_on = | |
946 | AifEnContainerChange; | |
947 | dev->fsa_dev[container].config_needed = ADD; | |
948 | } | |
949 | } | |
950 | if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero)) | |
951 | && (((u32 *)aifcmd->data)[6] == 0) | |
952 | && (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning))) { | |
953 | for (container = 0; | |
954 | container < dev->maximum_num_containers; | |
955 | ++container) { | |
956 | /* | |
957 | * Stomp on all config sequencing for all | |
958 | * containers? | |
959 | */ | |
960 | dev->fsa_dev[container].config_waiting_on = | |
961 | AifEnContainerChange; | |
962 | dev->fsa_dev[container].config_needed = DELETE; | |
963 | } | |
964 | } | |
965 | break; | |
966 | } | |
967 | ||
968 | device_config_needed = NOTHING; | |
969 | for (container = 0; container < dev->maximum_num_containers; | |
970 | ++container) { | |
971 | if ((dev->fsa_dev[container].config_waiting_on == 0) | |
972 | && (dev->fsa_dev[container].config_needed != NOTHING)) { | |
973 | device_config_needed = | |
974 | dev->fsa_dev[container].config_needed; | |
975 | dev->fsa_dev[container].config_needed = NOTHING; | |
976 | break; | |
977 | } | |
978 | } | |
979 | if (device_config_needed == NOTHING) | |
980 | return; | |
981 | ||
982 | /* | |
983 | * If we decided that a re-configuration needs to be done, | |
984 | * schedule it here on the way out the door, please close the door | |
985 | * behind you. | |
986 | */ | |
987 | ||
988 | busy = 0; | |
989 | ||
990 | ||
991 | /* | |
f64a181d | 992 | * Find the scsi_device associated with the SCSI address, |
131256cf MH |
993 | * and mark it as changed, invalidating the cache. This deals |
994 | * with changes to existing device IDs. | |
995 | */ | |
996 | ||
997 | if (!dev || !dev->scsi_host_ptr) | |
998 | return; | |
999 | /* | |
bfb35aa8 | 1000 | * force reload of disk info via aac_probe_container |
131256cf MH |
1001 | */ |
1002 | if ((device_config_needed == CHANGE) | |
1003 | && (dev->fsa_dev[container].valid == 1)) | |
1004 | dev->fsa_dev[container].valid = 2; | |
1005 | if ((device_config_needed == CHANGE) || | |
1006 | (device_config_needed == ADD)) | |
bfb35aa8 | 1007 | aac_probe_container(dev, container); |
131256cf MH |
1008 | device = scsi_device_lookup(dev->scsi_host_ptr, |
1009 | CONTAINER_TO_CHANNEL(container), | |
1010 | CONTAINER_TO_ID(container), | |
1011 | CONTAINER_TO_LUN(container)); | |
1012 | if (device) { | |
1013 | switch (device_config_needed) { | |
1014 | case DELETE: | |
1015 | scsi_remove_device(device); | |
1016 | break; | |
1017 | case CHANGE: | |
1018 | if (!dev->fsa_dev[container].valid) { | |
1019 | scsi_remove_device(device); | |
1020 | break; | |
1021 | } | |
1022 | scsi_rescan_device(&device->sdev_gendev); | |
1023 | ||
1024 | default: | |
1025 | break; | |
1026 | } | |
1027 | scsi_device_put(device); | |
1028 | } | |
1029 | if (device_config_needed == ADD) { | |
1030 | scsi_add_device(dev->scsi_host_ptr, | |
1031 | CONTAINER_TO_CHANNEL(container), | |
1032 | CONTAINER_TO_ID(container), | |
1033 | CONTAINER_TO_LUN(container)); | |
1034 | } | |
1035 | ||
1036 | } | |
1037 | ||
1da177e4 LT |
1038 | /** |
1039 | * aac_command_thread - command processing thread | |
1040 | * @dev: Adapter to monitor | |
1041 | * | |
1042 | * Waits on the commandready event in it's queue. When the event gets set | |
1043 | * it will pull FIBs off it's queue. It will continue to pull FIBs off | |
1044 | * until the queue is empty. When the queue is empty it will wait for | |
1045 | * more FIBs. | |
1046 | */ | |
1047 | ||
1048 | int aac_command_thread(struct aac_dev * dev) | |
1049 | { | |
1050 | struct hw_fib *hw_fib, *hw_newfib; | |
1051 | struct fib *fib, *newfib; | |
1da177e4 LT |
1052 | struct aac_fib_context *fibctx; |
1053 | unsigned long flags; | |
1054 | DECLARE_WAITQUEUE(wait, current); | |
1055 | ||
1056 | /* | |
1057 | * We can only have one thread per adapter for AIF's. | |
1058 | */ | |
1059 | if (dev->aif_thread) | |
1060 | return -EINVAL; | |
1061 | /* | |
1062 | * Set up the name that will appear in 'ps' | |
1063 | * stored in task_struct.comm[16]. | |
1064 | */ | |
1065 | daemonize("aacraid"); | |
1066 | allow_signal(SIGKILL); | |
1067 | /* | |
1068 | * Let the DPC know it has a place to send the AIF's to. | |
1069 | */ | |
1070 | dev->aif_thread = 1; | |
2f130980 | 1071 | add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); |
1da177e4 | 1072 | set_current_state(TASK_INTERRUPTIBLE); |
2f130980 | 1073 | dprintk ((KERN_INFO "aac_command_thread start\n")); |
1da177e4 LT |
1074 | while(1) |
1075 | { | |
2f130980 MH |
1076 | spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags); |
1077 | while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) { | |
1da177e4 LT |
1078 | struct list_head *entry; |
1079 | struct aac_aifcmd * aifcmd; | |
1080 | ||
1081 | set_current_state(TASK_RUNNING); | |
2f130980 MH |
1082 | |
1083 | entry = dev->queues->queue[HostNormCmdQueue].cmdq.next; | |
1da177e4 | 1084 | list_del(entry); |
2f130980 MH |
1085 | |
1086 | spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags); | |
1da177e4 LT |
1087 | fib = list_entry(entry, struct fib, fiblink); |
1088 | /* | |
1089 | * We will process the FIB here or pass it to a | |
1090 | * worker thread that is TBD. We Really can't | |
1091 | * do anything at this point since we don't have | |
1092 | * anything defined for this thread to do. | |
1093 | */ | |
1094 | hw_fib = fib->hw_fib; | |
1095 | memset(fib, 0, sizeof(struct fib)); | |
1096 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
1097 | fib->size = sizeof( struct fib ); | |
1098 | fib->hw_fib = hw_fib; | |
1099 | fib->data = hw_fib->data; | |
1100 | fib->dev = dev; | |
1101 | /* | |
1102 | * We only handle AifRequest fibs from the adapter. | |
1103 | */ | |
1104 | aifcmd = (struct aac_aifcmd *) hw_fib->data; | |
1105 | if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) { | |
1106 | /* Handle Driver Notify Events */ | |
131256cf | 1107 | aac_handle_aif(dev, fib); |
56b58712 | 1108 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); |
bfb35aa8 | 1109 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); |
1da177e4 LT |
1110 | } else { |
1111 | struct list_head *entry; | |
1112 | /* The u32 here is important and intended. We are using | |
1113 | 32bit wrapping time to fit the adapter field */ | |
1114 | ||
1115 | u32 time_now, time_last; | |
1116 | unsigned long flagv; | |
2f130980 MH |
1117 | unsigned num; |
1118 | struct hw_fib ** hw_fib_pool, ** hw_fib_p; | |
1119 | struct fib ** fib_pool, ** fib_p; | |
131256cf MH |
1120 | |
1121 | /* Sniff events */ | |
1122 | if ((aifcmd->command == | |
1123 | cpu_to_le32(AifCmdEventNotify)) || | |
1124 | (aifcmd->command == | |
1125 | cpu_to_le32(AifCmdJobProgress))) { | |
1126 | aac_handle_aif(dev, fib); | |
1127 | } | |
1128 | ||
1da177e4 LT |
1129 | time_now = jiffies/HZ; |
1130 | ||
2f130980 MH |
1131 | /* |
1132 | * Warning: no sleep allowed while | |
1133 | * holding spinlock. We take the estimate | |
1134 | * and pre-allocate a set of fibs outside the | |
1135 | * lock. | |
1136 | */ | |
1137 | num = le32_to_cpu(dev->init->AdapterFibsSize) | |
1138 | / sizeof(struct hw_fib); /* some extra */ | |
1139 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
1140 | entry = dev->fib_list.next; | |
1141 | while (entry != &dev->fib_list) { | |
1142 | entry = entry->next; | |
1143 | ++num; | |
1144 | } | |
1145 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
1146 | hw_fib_pool = NULL; | |
1147 | fib_pool = NULL; | |
1148 | if (num | |
1149 | && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL))) | |
1150 | && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) { | |
1151 | hw_fib_p = hw_fib_pool; | |
1152 | fib_p = fib_pool; | |
1153 | while (hw_fib_p < &hw_fib_pool[num]) { | |
1154 | if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) { | |
1155 | --hw_fib_p; | |
1156 | break; | |
1157 | } | |
1158 | if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) { | |
1159 | kfree(*(--hw_fib_p)); | |
1160 | break; | |
1161 | } | |
1162 | } | |
1163 | if ((num = hw_fib_p - hw_fib_pool) == 0) { | |
1164 | kfree(fib_pool); | |
1165 | fib_pool = NULL; | |
1166 | kfree(hw_fib_pool); | |
1167 | hw_fib_pool = NULL; | |
1168 | } | |
c9475cb0 | 1169 | } else { |
2f130980 MH |
1170 | kfree(hw_fib_pool); |
1171 | hw_fib_pool = NULL; | |
1172 | } | |
1da177e4 LT |
1173 | spin_lock_irqsave(&dev->fib_lock, flagv); |
1174 | entry = dev->fib_list.next; | |
1175 | /* | |
1176 | * For each Context that is on the | |
1177 | * fibctxList, make a copy of the | |
1178 | * fib, and then set the event to wake up the | |
1179 | * thread that is waiting for it. | |
1180 | */ | |
2f130980 MH |
1181 | hw_fib_p = hw_fib_pool; |
1182 | fib_p = fib_pool; | |
1da177e4 LT |
1183 | while (entry != &dev->fib_list) { |
1184 | /* | |
1185 | * Extract the fibctx | |
1186 | */ | |
1187 | fibctx = list_entry(entry, struct aac_fib_context, next); | |
1188 | /* | |
1189 | * Check if the queue is getting | |
1190 | * backlogged | |
1191 | */ | |
1192 | if (fibctx->count > 20) | |
1193 | { | |
1194 | /* | |
1195 | * It's *not* jiffies folks, | |
1196 | * but jiffies / HZ so do not | |
1197 | * panic ... | |
1198 | */ | |
1199 | time_last = fibctx->jiffies; | |
1200 | /* | |
1201 | * Has it been > 2 minutes | |
1202 | * since the last read off | |
1203 | * the queue? | |
1204 | */ | |
1205 | if ((time_now - time_last) > 120) { | |
1206 | entry = entry->next; | |
1207 | aac_close_fib_context(dev, fibctx); | |
1208 | continue; | |
1209 | } | |
1210 | } | |
1211 | /* | |
1212 | * Warning: no sleep allowed while | |
1213 | * holding spinlock | |
1214 | */ | |
2f130980 MH |
1215 | if (hw_fib_p < &hw_fib_pool[num]) { |
1216 | hw_newfib = *hw_fib_p; | |
1217 | *(hw_fib_p++) = NULL; | |
1218 | newfib = *fib_p; | |
1219 | *(fib_p++) = NULL; | |
1da177e4 LT |
1220 | /* |
1221 | * Make the copy of the FIB | |
1222 | */ | |
1223 | memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib)); | |
1224 | memcpy(newfib, fib, sizeof(struct fib)); | |
1225 | newfib->hw_fib = hw_newfib; | |
1226 | /* | |
1227 | * Put the FIB onto the | |
1228 | * fibctx's fibs | |
1229 | */ | |
1230 | list_add_tail(&newfib->fiblink, &fibctx->fib_list); | |
1231 | fibctx->count++; | |
1232 | /* | |
1233 | * Set the event to wake up the | |
2f130980 | 1234 | * thread that is waiting. |
1da177e4 LT |
1235 | */ |
1236 | up(&fibctx->wait_sem); | |
1237 | } else { | |
1238 | printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); | |
1da177e4 LT |
1239 | } |
1240 | entry = entry->next; | |
1241 | } | |
1242 | /* | |
1243 | * Set the status of this FIB | |
1244 | */ | |
56b58712 | 1245 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); |
bfb35aa8 | 1246 | aac_fib_adapter_complete(fib, sizeof(u32)); |
1da177e4 | 1247 | spin_unlock_irqrestore(&dev->fib_lock, flagv); |
2f130980 MH |
1248 | /* Free up the remaining resources */ |
1249 | hw_fib_p = hw_fib_pool; | |
1250 | fib_p = fib_pool; | |
1251 | while (hw_fib_p < &hw_fib_pool[num]) { | |
c9475cb0 JJ |
1252 | kfree(*hw_fib_p); |
1253 | kfree(*fib_p); | |
2f130980 MH |
1254 | ++fib_p; |
1255 | ++hw_fib_p; | |
1256 | } | |
c9475cb0 JJ |
1257 | kfree(hw_fib_pool); |
1258 | kfree(fib_pool); | |
1da177e4 | 1259 | } |
1da177e4 | 1260 | kfree(fib); |
2f130980 | 1261 | spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags); |
1da177e4 LT |
1262 | } |
1263 | /* | |
1264 | * There are no more AIF's | |
1265 | */ | |
2f130980 | 1266 | spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags); |
1da177e4 LT |
1267 | schedule(); |
1268 | ||
1269 | if(signal_pending(current)) | |
1270 | break; | |
1271 | set_current_state(TASK_INTERRUPTIBLE); | |
1272 | } | |
2f130980 MH |
1273 | if (dev->queues) |
1274 | remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); | |
1da177e4 LT |
1275 | dev->aif_thread = 0; |
1276 | complete_and_exit(&dev->aif_completion, 0); | |
2f130980 | 1277 | return 0; |
1da177e4 | 1278 | } |