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atp870u: Remove ugly gotos #4
[deliverable/linux.git] / drivers / scsi / atp870u.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (C) 1997 Wu Ching Chen
3 * 2.1.x update (C) 1998 Krzysztof G. Baranowski
fa195afe
AC		 4 * 2.5.x update (C) 2002 Red Hat
5 * 2.6.x update (C) 2004 Red Hat
1da177e4
LT		 6 *
7 * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
8 *
9 * Wu Ching Chen : NULL pointer fixes 2000/06/02
10 * support atp876 chip
11 * enable 32 bit fifo transfer
12 * support cdrom & remove device run ultra speed
13 * fix disconnect bug 2000/12/21
14 * support atp880 chip lvd u160 2001/05/15
15 * fix prd table bug 2001/09/12 (7.1)
16 *
17 * atp885 support add by ACARD Hao Ping Lian 2005/01/05
18 */
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/string.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/proc_fs.h>
28#include <linux/spinlock.h>
29#include <linux/pci.h>
30#include <linux/blkdev.h>
910638ae 31#include <linux/dma-mapping.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT		 33#include <asm/io.h>
34
35#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_device.h>
38#include <scsi/scsi_host.h>
39
40#include "atp870u.h"
41
42static struct scsi_host_template atp870u_template;
43static void send_s870(struct atp_unit *dev,unsigned char c);
44static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c);
45static void tscam_885(void);
46
7d12e780 47static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
1da177e4
LT		 48{
49 unsigned long flags;
bc0fe4c9 50 unsigned short int id;
1da177e4
LT		 51 unsigned char i, j, c, target_id, lun,cmdp;
52 unsigned char *prd;
53 struct scsi_cmnd *workreq;
1da177e4
LT		 54 unsigned long adrcnt, k;
55#ifdef ED_DBGP
56 unsigned long l;
57#endif
1da177e4
LT		 58 struct Scsi_Host *host = dev_id;
59 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
60
61 for (c = 0; c < 2; c++) {
3a38e53e 62 j = inb(dev->ioport[c] + 0x1f);
1da177e4 63 if ((j & 0x80) != 0)
78614ecd 64 break;
1da177e4
LT		 65 dev->in_int[c] = 0;
66 }
78614ecd
OZ		 67 if ((j & 0x80) == 0)
68 return IRQ_NONE;
1da177e4
LT		 69#ifdef ED_DBGP
70 printk("atp870u_intr_handle enter\n");
71#endif
72 dev->in_int[c] = 1;
73 cmdp = inb(dev->ioport[c] + 0x10);
1da177e4
LT		 74 if (dev->working[c] != 0) {
75 if (dev->dev_id == ATP885_DEVID) {
b4263b3c
OZ		 76 if ((inb(dev->ioport[c] + 0x16) & 0x80) == 0)
77 outb((inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
1da177e4 78 }
bc0fe4c9 79 if ((inb(dev->pciport[c]) & 0x08) != 0)
1da177e4 80 {
1da177e4 81 for (k=0; k < 1000; k++) {
78614ecd
OZ		 82 if ((inb(dev->pciport[c] + 2) & 0x08) == 0)
83 break;
84 if ((inb(dev->pciport[c] + 2) & 0x01) == 0)
85 break;
1da177e4
LT		 86 }
87 }
bc0fe4c9 88 outb(0x00, dev->pciport[c]);
1da177e4 89
3a38e53e 90 i = inb(dev->ioport[c] + 0x17);
1da177e4 91
bc0fe4c9
OZ		 92 if (dev->dev_id == ATP885_DEVID)
93 outb(0x06, dev->pciport[c] + 2);
1da177e4 94
3a38e53e 95 target_id = inb(dev->ioport[c] + 0x15);
1da177e4
LT		 96
97 /*
98 * Remap wide devices onto id numbers
99 */
100
101 if ((target_id & 0x40) != 0) {
102 target_id = (target_id & 0x07) | 0x08;
103 } else {
104 target_id &= 0x07;
105 }
106
107 if ((j & 0x40) != 0) {
108 if (dev->last_cmd[c] == 0xff) {
109 dev->last_cmd[c] = target_id;
110 }
111 dev->last_cmd[c] |= 0x40;
112 }
113 if (dev->dev_id == ATP885_DEVID)
114 dev->r1f[c][target_id] |= j;
115#ifdef ED_DBGP
116 printk("atp870u_intr_handle status = %x\n",i);
117#endif
118 if (i == 0x85) {
119 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
120 dev->last_cmd[c] = 0xff;
121 }
122 if (dev->dev_id == ATP885_DEVID) {
1da177e4 123 adrcnt = 0;
3a38e53e
OZ		 124 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
125 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
126 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 127 if (dev->id[c][target_id].last_len != adrcnt)
128 {
129 k = dev->id[c][target_id].last_len;
130 k -= adrcnt;
131 dev->id[c][target_id].tran_len = k;
132 dev->id[c][target_id].last_len = adrcnt;
133 }
134#ifdef ED_DBGP
3a38e53e 135 printk("dev->id[c][target_id].last_len = %d dev->id[c][target_id].tran_len = %d\n",dev->id[c][target_id].last_len,dev->id[c][target_id].tran_len);
1da177e4
LT		 136#endif
137 }
138
139 /*
140 * Flip wide
141 */
142 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 143 outb(0x01, dev->ioport[c] + 0x1b);
144 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
145 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 146 }
147 }
148 /*
149 * Issue more commands
150 */
151 spin_lock_irqsave(dev->host->host_lock, flags);
152 if (((dev->quhd[c] != dev->quend[c]) || (dev->last_cmd[c] != 0xff)) &&
153 (dev->in_snd[c] == 0)) {
154#ifdef ED_DBGP
155 printk("Call sent_s870\n");
156#endif
157 send_s870(dev,c);
158 }
159 spin_unlock_irqrestore(dev->host->host_lock, flags);
160 /*
161 * Done
162 */
163 dev->in_int[c] = 0;
164#ifdef ED_DBGP
165 printk("Status 0x85 return\n");
166#endif
78614ecd 167 return IRQ_HANDLED;
1da177e4
LT		 168 }
169
170 if (i == 0x40) {
171 dev->last_cmd[c] |= 0x40;
172 dev->in_int[c] = 0;
78614ecd 173 return IRQ_HANDLED;
1da177e4
LT		 174 }
175
176 if (i == 0x21) {
177 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
178 dev->last_cmd[c] = 0xff;
179 }
1da177e4 180 adrcnt = 0;
3a38e53e
OZ		 181 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
182 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
183 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 184 k = dev->id[c][target_id].last_len;
185 k -= adrcnt;
186 dev->id[c][target_id].tran_len = k;
187 dev->id[c][target_id].last_len = adrcnt;
3a38e53e
OZ		 188 outb(0x41, dev->ioport[c] + 0x10);
189 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 190 dev->in_int[c] = 0;
78614ecd 191 return IRQ_HANDLED;
1da177e4
LT		 192 }
193
194 if (dev->dev_id == ATP885_DEVID) {
195 if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
196 if ((i == 0x4c) || (i == 0x8c))
197 i=0x48;
198 else
199 i=0x49;
200 }
201
202 }
203 if ((i == 0x80) || (i == 0x8f)) {
204#ifdef ED_DBGP
205 printk(KERN_DEBUG "Device reselect\n");
206#endif
207 lun = 0;
1da177e4 208 if (cmdp == 0x44 || i==0x80) {
3a38e53e 209 lun = inb(dev->ioport[c] + 0x1d) & 0x07;
1da177e4
LT		 210 } else {
211 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
212 dev->last_cmd[c] = 0xff;
213 }
214 if (cmdp == 0x41) {
215#ifdef ED_DBGP
216 printk("cmdp = 0x41\n");
217#endif
1da177e4 218 adrcnt = 0;
3a38e53e
OZ		 219 ((unsigned char *) &adrcnt)[2] = inb(dev->ioport[c] + 0x12);
220 ((unsigned char *) &adrcnt)[1] = inb(dev->ioport[c] + 0x13);
221 ((unsigned char *) &adrcnt)[0] = inb(dev->ioport[c] + 0x14);
1da177e4
LT		 222 k = dev->id[c][target_id].last_len;
223 k -= adrcnt;
224 dev->id[c][target_id].tran_len = k;
225 dev->id[c][target_id].last_len = adrcnt;
3a38e53e 226 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 227 dev->in_int[c] = 0;
78614ecd 228 return IRQ_HANDLED;
1da177e4
LT		 229 } else {
230#ifdef ED_DBGP
231 printk("cmdp != 0x41\n");
232#endif
3a38e53e 233 outb(0x46, dev->ioport[c] + 0x10);
1da177e4 234 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 235 outb(0x00, dev->ioport[c] + 0x12);
236 outb(0x00, dev->ioport[c] + 0x13);
237 outb(0x00, dev->ioport[c] + 0x14);
238 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 239 dev->in_int[c] = 0;
78614ecd 240 return IRQ_HANDLED;
1da177e4
LT		 241 }
242 }
243 if (dev->last_cmd[c] != 0xff) {
244 dev->last_cmd[c] |= 0x40;
245 }
246 if (dev->dev_id == ATP885_DEVID) {
247 j = inb(dev->baseport + 0x29) & 0xfe;
248 outb(j, dev->baseport + 0x29);
3a38e53e
OZ		 249 } else
250 outb(0x45, dev->ioport[c] + 0x10);
251
252 target_id = inb(dev->ioport[c] + 0x16);
1da177e4
LT		 253 /*
254 * Remap wide identifiers
255 */
256 if ((target_id & 0x10) != 0) {
257 target_id = (target_id & 0x07) | 0x08;
258 } else {
259 target_id &= 0x07;
260 }
3a38e53e
OZ		 261 if (dev->dev_id == ATP885_DEVID)
262 outb(0x45, dev->ioport[c] + 0x10);
1da177e4
LT		 263 workreq = dev->id[c][target_id].curr_req;
264#ifdef ED_DBGP
017560fc
JG		 265 scmd_printk(KERN_DEBUG, workreq, "CDB");
266 for (l = 0; l < workreq->cmd_len; l++)
1da177e4 267 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
017560fc 268 printk("\n");
1da177e4
LT		 269#endif
270
3a38e53e
OZ		 271 outb(lun, dev->ioport[c] + 0x0f);
272 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 273 adrcnt = dev->id[c][target_id].tran_len;
274 k = dev->id[c][target_id].last_len;
275
3a38e53e
OZ		 276 outb(((unsigned char *) &k)[2], dev->ioport[c] + 0x12);
277 outb(((unsigned char *) &k)[1], dev->ioport[c] + 0x13);
278 outb(((unsigned char *) &k)[0], dev->ioport[c] + 0x14);
1da177e4 279#ifdef ED_DBGP
3a38e53e 280 printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k, inb(dev->ioport[c] + 0x14), inb(dev->ioport[c] + 0x13), inb(dev->ioport[c] + 0x12));
1da177e4
LT		 281#endif
282 /* Remap wide */
283 j = target_id;
284 if (target_id > 7) {
285 j = (j & 0x07) | 0x40;
286 }
287 /* Add direction */
288 j |= dev->id[c][target_id].dirct;
3a38e53e
OZ		 289 outb(j, dev->ioport[c] + 0x15);
290 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 291
292 /* enable 32 bit fifo transfer */
293 if (dev->dev_id == ATP885_DEVID) {
bc0fe4c9 294 i=inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 295 //j=workreq->cmnd[0];
296 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
297 i |= 0x0c;
298 }
bc0fe4c9 299 outb(i, dev->pciport[c] + 1);
1da177e4
LT		 300 } else if ((dev->dev_id == ATP880_DEVID1) ||
301 (dev->dev_id == ATP880_DEVID2) ) {
1da177e4 302 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 303 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4 304 } else {
3a38e53e 305 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);///minus 0x05???
1da177e4
LT		 306 }
307 } else {
1da177e4 308 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3a38e53e 309 outb((unsigned char) ((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08), dev->ioport[c] + 0x3a);
1da177e4 310 } else {
3a38e53e 311 outb((unsigned char) (inb(dev->ioport[c] + 0x3a) & 0xf3), dev->ioport[c] + 0x3a);
1da177e4
LT		 312 }
313 }
1da177e4
LT		 314 j = 0;
315 id = 1;
316 id = id << target_id;
317 /*
318 * Is this a wide device
319 */
320 if ((id & dev->wide_id[c]) != 0) {
321 j |= 0x01;
322 }
3a38e53e
OZ		 323 outb(j, dev->ioport[c] + 0x1b);
324 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
325 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 326 }
327 if (dev->id[c][target_id].last_len == 0) {
3a38e53e 328 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 329 dev->in_int[c] = 0;
330#ifdef ED_DBGP
331 printk("dev->id[c][target_id].last_len = 0\n");
332#endif
78614ecd 333 return IRQ_HANDLED;
1da177e4
LT		 334 }
335#ifdef ED_DBGP
336 printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
337#endif
338 prd = dev->id[c][target_id].prd_pos;
339 while (adrcnt != 0) {
340 id = ((unsigned short int *)prd)[2];
341 if (id == 0) {
342 k = 0x10000;
343 } else {
344 k = id;
345 }
346 if (k > adrcnt) {
347 ((unsigned short int *)prd)[2] = (unsigned short int)
348 (k - adrcnt);
349 ((unsigned long *)prd)[0] += adrcnt;
350 adrcnt = 0;
351 dev->id[c][target_id].prd_pos = prd;
352 } else {
353 adrcnt -= k;
354 dev->id[c][target_id].prdaddr += 0x08;
355 prd += 0x08;
356 if (adrcnt == 0) {
357 dev->id[c][target_id].prd_pos = prd;
358 }
359 }
360 }
bc0fe4c9 361 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 0x04);
1da177e4
LT		 362#ifdef ED_DBGP
363 printk("dev->id[%d][%d].prdaddr 0x%8x\n", c, target_id, dev->id[c][target_id].prdaddr);
364#endif
bc0fe4c9
OZ		 365 if (dev->dev_id != ATP885_DEVID) {
366 outb(0x06, dev->pciport[c] + 2);
367 outb(0x00, dev->pciport[c] + 2);
1da177e4 368 }
1da177e4
LT		 369 /*
370 * Check transfer direction
371 */
372 if (dev->id[c][target_id].dirct != 0) {
3a38e53e 373 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 374 outb(0x01, dev->pciport[c]);
1da177e4
LT		 375 dev->in_int[c] = 0;
376#ifdef ED_DBGP
377 printk("status 0x80 return dirct != 0\n");
378#endif
78614ecd 379 return IRQ_HANDLED;
1da177e4 380 }
3a38e53e 381 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 382 outb(0x09, dev->pciport[c]);
1da177e4
LT		 383 dev->in_int[c] = 0;
384#ifdef ED_DBGP
385 printk("status 0x80 return dirct = 0\n");
386#endif
78614ecd 387 return IRQ_HANDLED;
1da177e4
LT		 388 }
389
390 /*
391 * Current scsi request on this target
392 */
393
394 workreq = dev->id[c][target_id].curr_req;
395
78614ecd 396 if (i == 0x42 || i == 0x16) {
1da177e4
LT		 397 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
398 dev->last_cmd[c] = 0xff;
399 }
78614ecd
OZ		 400 if (i == 0x16) {
401 workreq->result = inb(dev->ioport[c] + 0x0f);
402 if (((dev->r1f[c][target_id] & 0x10) != 0)&&(dev->dev_id==ATP885_DEVID)) {
403 printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
404 workreq->result = 0x02;
405 }
406 } else
407 workreq->result = 0x02;
408
1da177e4
LT		 409 if (dev->dev_id == ATP885_DEVID) {
410 j = inb(dev->baseport + 0x29) | 0x01;
411 outb(j, dev->baseport + 0x29);
412 }
413 /*
414 * Complete the command
415 */
fe7ed98f
BH		 416 scsi_dma_unmap(workreq);
417
1da177e4
LT		 418 spin_lock_irqsave(dev->host->host_lock, flags);
419 (*workreq->scsi_done) (workreq);
420#ifdef ED_DBGP
421 printk("workreq->scsi_done\n");
422#endif
423 /*
424 * Clear it off the queue
425 */
426 dev->id[c][target_id].curr_req = NULL;
427 dev->working[c]--;
428 spin_unlock_irqrestore(dev->host->host_lock, flags);
429 /*
430 * Take it back wide
431 */
432 if (dev->wide_id[c] != 0) {
3a38e53e
OZ		 433 outb(0x01, dev->ioport[c] + 0x1b);
434 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != 0x01) {
435 outb(0x01, dev->ioport[c] + 0x1b);
1da177e4
LT		 436 }
437 }
438 /*
439 * If there is stuff to send and nothing going then send it
440 */
441 spin_lock_irqsave(dev->host->host_lock, flags);
442 if (((dev->last_cmd[c] != 0xff) || (dev->quhd[c] != dev->quend[c])) &&
443 (dev->in_snd[c] == 0)) {
444#ifdef ED_DBGP
445 printk("Call sent_s870(scsi_done)\n");
446#endif
447 send_s870(dev,c);
448 }
449 spin_unlock_irqrestore(dev->host->host_lock, flags);
450 dev->in_int[c] = 0;
78614ecd 451 return IRQ_HANDLED;
1da177e4
LT		 452 }
453 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
454 dev->last_cmd[c] = 0xff;
455 }
456 if (i == 0x4f) {
457 i = 0x89;
458 }
459 i &= 0x0f;
460 if (i == 0x09) {
bc0fe4c9
OZ		 461 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
462 outb(0x06, dev->pciport[c] + 2);
463 outb(0x00, dev->pciport[c] + 2);
3a38e53e 464 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 465 if (dev->dev_id == ATP885_DEVID) {
1da177e4 466 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 467 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
468 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
469 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 470 dev->id[c][target_id].dirct = 0x00;
1da177e4
LT		 471 } else {
472 dev->id[c][target_id].dirct = 0x00;
1da177e4 473 }
3a38e53e 474 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 475 outb(0x09, dev->pciport[c]);
1da177e4 476 dev->in_int[c] = 0;
78614ecd 477 return IRQ_HANDLED;
1da177e4
LT		 478 }
479 if (i == 0x08) {
bc0fe4c9
OZ		 480 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
481 outb(0x06, dev->pciport[c] + 2);
482 outb(0x00, dev->pciport[c] + 2);
3a38e53e 483 outb(0x41, dev->ioport[c] + 0x10);
1da177e4 484 if (dev->dev_id == ATP885_DEVID) {
1da177e4 485 k = dev->id[c][target_id].last_len;
3a38e53e
OZ		 486 outb((unsigned char) (((unsigned char *) (&k))[2]), dev->ioport[c] + 0x12);
487 outb((unsigned char) (((unsigned char *) (&k))[1]), dev->ioport[c] + 0x13);
488 outb((unsigned char) (((unsigned char *) (&k))[0]), dev->ioport[c] + 0x14);
1da177e4 489 }
3a38e53e 490 outb((unsigned char) (inb(dev->ioport[c] + 0x15) | 0x20), dev->ioport[c] + 0x15);
1da177e4 491 dev->id[c][target_id].dirct = 0x20;
3a38e53e 492 outb(0x08, dev->ioport[c] + 0x18);
bc0fe4c9 493 outb(0x01, dev->pciport[c]);
1da177e4 494 dev->in_int[c] = 0;
78614ecd 495 return IRQ_HANDLED;
1da177e4 496 }
1da177e4 497 if (i == 0x0a) {
3a38e53e 498 outb(0x30, dev->ioport[c] + 0x10);
1da177e4 499 } else {
3a38e53e 500 outb(0x46, dev->ioport[c] + 0x10);
1da177e4
LT		 501 }
502 dev->id[c][target_id].dirct = 0x00;
3a38e53e
OZ		 503 outb(0x00, dev->ioport[c] + 0x12);
504 outb(0x00, dev->ioport[c] + 0x13);
505 outb(0x00, dev->ioport[c] + 0x14);
506 outb(0x08, dev->ioport[c] + 0x18);
1da177e4 507 }
78614ecd
OZ		 508 dev->in_int[c] = 0;
509
1da177e4
LT		 510 return IRQ_HANDLED;
511}
512/**
513 * atp870u_queuecommand - Queue SCSI command
514 * @req_p: request block
515 * @done: completion function
516 *
517 * Queue a command to the ATP queue. Called with the host lock held.
518 */
f281233d 519static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
1da177e4
LT		 520 void (*done) (struct scsi_cmnd *))
521{
522 unsigned char c;
3b836464 523 unsigned int m;
1da177e4
LT		 524 struct atp_unit *dev;
525 struct Scsi_Host *host;
526
422c0d61 527 c = scmd_channel(req_p);
1da177e4 528 req_p->sense_buffer[0]=0;
fe7ed98f 529 scsi_set_resid(req_p, 0);
422c0d61 530 if (scmd_channel(req_p) > 1) {
1da177e4
LT		 531 req_p->result = 0x00040000;
532 done(req_p);
533#ifdef ED_DBGP
534 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
535#endif
536 return 0;
537 }
538
539 host = req_p->device->host;
540 dev = (struct atp_unit *)&host->hostdata;
541
542
543
544 m = 1;
422c0d61 545 m = m << scmd_id(req_p);
1da177e4
LT		 546
547 /*
548 * Fake a timeout for missing targets
549 */
550
551 if ((m & dev->active_id[c]) == 0) {
552 req_p->result = 0x00040000;
553 done(req_p);
554 return 0;
555 }
556
557 if (done) {
558 req_p->scsi_done = done;
559 } else {
560#ifdef ED_DBGP
561 printk( "atp870u_queuecommand: done can't be NULL\n");
562#endif
563 req_p->result = 0;
564 done(req_p);
565 return 0;
566 }
567
568 /*
569 * Count new command
570 */
571 dev->quend[c]++;
572 if (dev->quend[c] >= qcnt) {
573 dev->quend[c] = 0;
574 }
575
576 /*
577 * Check queue state
578 */
579 if (dev->quhd[c] == dev->quend[c]) {
580 if (dev->quend[c] == 0) {
581 dev->quend[c] = qcnt;
582 }
583#ifdef ED_DBGP
584 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
585#endif
586 dev->quend[c]--;
587 req_p->result = 0x00020000;
588 done(req_p);
589 return 0;
590 }
591 dev->quereq[c][dev->quend[c]] = req_p;
1da177e4 592#ifdef ED_DBGP
3b836464 593 printk("dev->ioport[c] = %x inb(dev->ioport[c] + 0x1c) = %x dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",dev->ioport[c],inb(dev->ioport[c] + 0x1c),c,dev->in_int[c],c,dev->in_snd[c]);
1da177e4 594#endif
3b836464 595 if ((inb(dev->ioport[c] + 0x1c) == 0) && (dev->in_int[c] == 0) && (dev->in_snd[c] == 0)) {
1da177e4
LT		 596#ifdef ED_DBGP
597 printk("Call sent_s870(atp870u_queuecommand)\n");
598#endif
599 send_s870(dev,c);
600 }
601#ifdef ED_DBGP
602 printk("atp870u_queuecommand : exit\n");
603#endif
604 return 0;
605}
606
f281233d
JG		 607static DEF_SCSI_QCMD(atp870u_queuecommand)
608
1da177e4
LT		 609/**
610 * send_s870 - send a command to the controller
611 * @host: host
612 *
613 * On entry there is work queued to be done. We move some of that work to the
614 * controller itself.
615 *
616 * Caller holds the host lock.
617 */
618static void send_s870(struct atp_unit *dev,unsigned char c)
619{
468b8968 620 struct scsi_cmnd *workreq = NULL;
1da177e4
LT		 621 unsigned int i;//,k;
622 unsigned char j, target_id;
623 unsigned char *prd;
c2bab403 624 unsigned short int w;
1da177e4 625 unsigned long l, bttl = 0;
1da177e4
LT		 626 unsigned long sg_count;
627
628 if (dev->in_snd[c] != 0) {
629#ifdef ED_DBGP
630 printk("cmnd in_snd\n");
631#endif
632 return;
633 }
634#ifdef ED_DBGP
635 printk("Sent_s870 enter\n");
636#endif
637 dev->in_snd[c] = 1;
638 if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
639 dev->last_cmd[c] &= 0x0f;
640 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
468b8968
OZ		 641 if (!workreq) {
642 dev->last_cmd[c] = 0xff;
643 if (dev->quhd[c] == dev->quend[c]) {
644 dev->in_snd[c] = 0;
645 return;
646 }
1da177e4
LT		 647 }
648 }
468b8968
OZ		 649 if (!workreq) {
650 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
651 dev->in_snd[c] = 0;
652 return;
653 }
654 dev->working[c]++;
655 j = dev->quhd[c];
656 dev->quhd[c]++;
657 if (dev->quhd[c] >= qcnt)
658 dev->quhd[c] = 0;
659 workreq = dev->quereq[c][dev->quhd[c]];
660 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
661 dev->quhd[c] = j;
662 dev->working[c]--;
663 dev->in_snd[c] = 0;
664 return;
665 }
422c0d61
JG		 666 dev->id[c][scmd_id(workreq)].curr_req = workreq;
667 dev->last_cmd[c] = scmd_id(workreq);
1da177e4 668 }
468b8968 669 if ((inb(dev->ioport[c] + 0x1f) & 0xb0) != 0 || inb(dev->ioport[c] + 0x1c) != 0) {
1da177e4 670#ifdef ED_DBGP
468b8968 671 printk("Abort to Send\n");
1da177e4 672#endif
468b8968
OZ		 673 dev->last_cmd[c] |= 0x40;
674 dev->in_snd[c] = 0;
675 return;
676 }
1da177e4
LT		 677#ifdef ED_DBGP
678 printk("OK to Send\n");
422c0d61 679 scmd_printk(KERN_DEBUG, workreq, "CDB");
1da177e4
LT		 680 for(i=0;i<workreq->cmd_len;i++) {
681 printk(" %x",workreq->cmnd[i]);
682 }
422c0d61 683 printk("\n");
1da177e4 684#endif
fe7ed98f
BH		 685 l = scsi_bufflen(workreq);
686
1da177e4
LT		 687 if (dev->dev_id == ATP885_DEVID) {
688 j = inb(dev->baseport + 0x29) & 0xfe;
689 outb(j, dev->baseport + 0x29);
422c0d61 690 dev->r1f[c][scmd_id(workreq)] = 0;
1da177e4
LT		 691 }
692
693 if (workreq->cmnd[0] == READ_CAPACITY) {
fe7ed98f
BH		 694 if (l > 8)
695 l = 8;
1da177e4
LT		 696 }
697 if (workreq->cmnd[0] == 0x00) {
fe7ed98f 698 l = 0;
1da177e4
LT		 699 }
700
1da177e4 701 j = 0;
422c0d61 702 target_id = scmd_id(workreq);
1da177e4
LT		 703
704 /*
705 * Wide ?
706 */
707 w = 1;
708 w = w << target_id;
709 if ((w & dev->wide_id[c]) != 0) {
710 j |= 0x01;
711 }
3b836464
OZ		 712 outb(j, dev->ioport[c] + 0x1b);
713 while ((inb(dev->ioport[c] + 0x1b) & 0x01) != j) {
714 outb(j,dev->ioport[c] + 0x1b);
1da177e4
LT		 715#ifdef ED_DBGP
716 printk("send_s870 while loop 1\n");
717#endif
718 }
719 /*
720 * Write the command
721 */
722
3b836464
OZ		 723 outb(workreq->cmd_len, dev->ioport[c] + 0x00);
724 outb(0x2c, dev->ioport[c] + 0x01);
1da177e4 725 if (dev->dev_id == ATP885_DEVID) {
3b836464 726 outb(0x7f, dev->ioport[c] + 0x02);
1da177e4 727 } else {
3b836464 728 outb(0xcf, dev->ioport[c] + 0x02);
1da177e4
LT		 729 }
730 for (i = 0; i < workreq->cmd_len; i++) {
3b836464 731 outb(workreq->cmnd[i], dev->ioport[c] + 0x03 + i);
1da177e4 732 }
3b836464 733 outb(workreq->device->lun, dev->ioport[c] + 0x0f);
1da177e4
LT		 734 /*
735 * Write the target
736 */
3b836464 737 outb(dev->id[c][target_id].devsp, dev->ioport[c] + 0x11);
1da177e4
LT		 738#ifdef ED_DBGP
739 printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,dev->id[c][target_id].devsp);
740#endif
fe7ed98f
BH		 741
742 sg_count = scsi_dma_map(workreq);
1da177e4
LT		 743 /*
744 * Write transfer size
745 */
3b836464
OZ		 746 outb((unsigned char) (((unsigned char *) (&l))[2]), dev->ioport[c] + 0x12);
747 outb((unsigned char) (((unsigned char *) (&l))[1]), dev->ioport[c] + 0x13);
748 outb((unsigned char) (((unsigned char *) (&l))[0]), dev->ioport[c] + 0x14);
1da177e4
LT		 749 j = target_id;
750 dev->id[c][j].last_len = l;
751 dev->id[c][j].tran_len = 0;
752#ifdef ED_DBGP
753 printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
754#endif
755 /*
756 * Flip the wide bits
757 */
758 if ((j & 0x08) != 0) {
759 j = (j & 0x07) | 0x40;
760 }
761 /*
762 * Check transfer direction
763 */
764 if (workreq->sc_data_direction == DMA_TO_DEVICE) {
3b836464 765 outb((unsigned char) (j | 0x20), dev->ioport[c] + 0x15);
1da177e4 766 } else {
3b836464 767 outb(j, dev->ioport[c] + 0x15);
1da177e4 768 }
3b836464
OZ		 769 outb((unsigned char) (inb(dev->ioport[c] + 0x16) | 0x80), dev->ioport[c] + 0x16);
770 outb(0x80, dev->ioport[c] + 0x16);
1da177e4
LT		 771 dev->id[c][target_id].dirct = 0;
772 if (l == 0) {
3b836464 773 if (inb(dev->ioport[c] + 0x1c) == 0) {
1da177e4
LT		 774#ifdef ED_DBGP
775 printk("change SCSI_CMD_REG 0x08\n");
776#endif
3b836464 777 outb(0x08, dev->ioport[c] + 0x18);
1da177e4
LT		 778 } else {
779 dev->last_cmd[c] |= 0x40;
780 }
781 dev->in_snd[c] = 0;
782 return;
783 }
1da177e4
LT		 784 prd = dev->id[c][target_id].prd_table;
785 dev->id[c][target_id].prd_pos = prd;
786
787 /*
788 * Now write the request list. Either as scatter/gather or as
789 * a linear chain.
790 */
791
fe7ed98f
BH		 792 if (l) {
793 struct scatterlist *sgpnt;
1da177e4 794 i = 0;
fe7ed98f
BH		 795 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
796 bttl = sg_dma_address(sgpnt);
797 l=sg_dma_len(sgpnt);
1da177e4 798#ifdef ED_DBGP
fe7ed98f 799 printk("1. bttl %x, l %x\n",bttl, l);
1da177e4 800#endif
fe7ed98f 801 while (l > 0x10000) {
1da177e4
LT		 802 (((u16 *) (prd))[i + 3]) = 0x0000;
803 (((u16 *) (prd))[i + 2]) = 0x0000;
804 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
805 l -= 0x10000;
806 bttl += 0x10000;
807 i += 0x04;
808 }
809 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
810 (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
811 (((u16 *) (prd))[i + 3]) = 0;
812 i += 0x04;
813 }
814 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
815#ifdef ED_DBGP
816 printk("prd %4x %4x %4x %4x\n",(((unsigned short int *)prd)[0]),(((unsigned short int *)prd)[1]),(((unsigned short int *)prd)[2]),(((unsigned short int *)prd)[3]));
817 printk("2. bttl %x, l %x\n",bttl, l);
818#endif
1da177e4 819 }
1da177e4 820#ifdef ED_DBGP
c2bab403 821 printk("send_s870: prdaddr_2 0x%8x target_id %d\n", dev->id[c][target_id].prdaddr,target_id);
1da177e4 822#endif
b5683557 823 dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
c2bab403
OZ		 824 outl(dev->id[c][target_id].prdaddr, dev->pciport[c] + 4);
825 outb(0x06, dev->pciport[c] + 2);
826 outb(0x00, dev->pciport[c] + 2);
1da177e4 827 if (dev->dev_id == ATP885_DEVID) {
c2bab403 828 j = inb(dev->pciport[c] + 1) & 0xf3;
1da177e4
LT		 829 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) ||
830 (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
831 j |= 0x0c;
832 }
c2bab403 833 outb(j, dev->pciport[c] + 1);
1da177e4
LT		 834 } else if ((dev->dev_id == ATP880_DEVID1) ||
835 (dev->dev_id == ATP880_DEVID2)) {
1da177e4 836 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 837 outb((unsigned char) ((inb(dev->ioport[c] - 0x05) & 0x3f) | 0xc0), dev->ioport[c] - 0x05);
1da177e4 838 } else {
3b836464 839 outb((unsigned char) (inb(dev->ioport[c] - 0x05) & 0x3f), dev->ioport[c] - 0x05);
1da177e4
LT		 840 }
841 } else {
1da177e4 842 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
3b836464 843 outb((inb(dev->ioport[c] + 0x3a) & 0xf3) | 0x08, dev->ioport[c] + 0x3a);
1da177e4 844 } else {
3b836464 845 outb(inb(dev->ioport[c] + 0x3a) & 0xf3, dev->ioport[c] + 0x3a);
1da177e4
LT		 846 }
847 }
1da177e4
LT		 848
849 if(workreq->sc_data_direction == DMA_TO_DEVICE) {
850 dev->id[c][target_id].dirct = 0x20;
3b836464
OZ		 851 if (inb(dev->ioport[c] + 0x1c) == 0) {
852 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 853 outb(0x01, dev->pciport[c]);
1da177e4
LT		 854#ifdef ED_DBGP
855 printk( "start DMA(to target)\n");
856#endif
857 } else {
858 dev->last_cmd[c] |= 0x40;
859 }
860 dev->in_snd[c] = 0;
861 return;
862 }
3b836464
OZ		 863 if (inb(dev->ioport[c] + 0x1c) == 0) {
864 outb(0x08, dev->ioport[c] + 0x18);
c2bab403 865 outb(0x09, dev->pciport[c]);
1da177e4
LT		 866#ifdef ED_DBGP
867 printk( "start DMA(to host)\n");
868#endif
869 } else {
870 dev->last_cmd[c] |= 0x40;
871 }
872 dev->in_snd[c] = 0;
873 return;
874
875}
876
877static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
878{
1da177e4
LT		 879 unsigned short int i, k;
880 unsigned char j;
881
1940ed62 882 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 883 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
1940ed62 884 k = inw(dev->ioport[0] + 0x1c);
1da177e4 885 j = (unsigned char) (k >> 8);
832e9ac6
OZ		 886 if ((k & 0x8000) != 0) /* DB7 all release? */
887 i = 0;
1da177e4
LT		 888 }
889 *val |= 0x4000; /* assert DB6 */
1940ed62 890 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 891 *val &= 0xdfff; /* assert DB5 */
1940ed62 892 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 893 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
832e9ac6
OZ		 894 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) != 0) /* DB5 all release? */
895 i = 0;
1da177e4
LT		 896 }
897 *val |= 0x8000; /* no DB4-0, assert DB7 */
898 *val &= 0xe0ff;
1940ed62 899 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 900 *val &= 0xbfff; /* release DB6 */
1940ed62 901 outw(*val, dev->ioport[0] + 0x1c);
1da177e4 902 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
832e9ac6
OZ		 903 if ((inw(dev->ioport[0] + 0x1c) & 0x4000) != 0) /* DB6 all release? */
904 i = 0;
1da177e4
LT		 905 }
906
907 return j;
908}
909
910static void tscam(struct Scsi_Host *host)
911{
912
1da177e4
LT		 913 unsigned char i, j, k;
914 unsigned long n;
915 unsigned short int m, assignid_map, val;
916 unsigned char mbuf[33], quintet[2];
917 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
918 static unsigned char g2q_tab[8] = {
919 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
920 };
921
922/* I can't believe we need this before we've even done anything. Remove it
923 * and see if anyone bitches.
924 for (i = 0; i < 0x10; i++) {
925 udelay(0xffff);
926 }
927 */
928
1940ed62
OZ		 929 outb(0x08, dev->ioport[0] + 1);
930 outb(0x7f, dev->ioport[0] + 2);
931 outb(0x20, dev->ioport[0] + 0x11);
1da177e4
LT		 932
933 if ((dev->scam_on & 0x40) == 0) {
934 return;
935 }
936 m = 1;
937 m <<= dev->host_id[0];
938 j = 16;
939 if (dev->chip_ver < 4) {
940 m |= 0xff00;
941 j = 8;
942 }
943 assignid_map = m;
1940ed62
OZ		 944 outb(0x02, dev->ioport[0] + 0x02); /* 2*2=4ms,3EH 2/32*3E=3.9ms */
945 outb(0, dev->ioport[0] + 0x03);
946 outb(0, dev->ioport[0] + 0x04);
947 outb(0, dev->ioport[0] + 0x05);
948 outb(0, dev->ioport[0] + 0x06);
949 outb(0, dev->ioport[0] + 0x07);
950 outb(0, dev->ioport[0] + 0x08);
1da177e4
LT		 951
952 for (i = 0; i < j; i++) {
953 m = 1;
954 m = m << i;
955 if ((m & assignid_map) != 0) {
956 continue;
957 }
1940ed62
OZ		 958 outb(0, dev->ioport[0] + 0x0f);
959 outb(0, dev->ioport[0] + 0x12);
960 outb(0, dev->ioport[0] + 0x13);
961 outb(0, dev->ioport[0] + 0x14);
1da177e4
LT		 962 if (i > 7) {
963 k = (i & 0x07) | 0x40;
964 } else {
965 k = i;
966 }
1940ed62 967 outb(k, dev->ioport[0] + 0x15);
1da177e4 968 if (dev->chip_ver == 4) {
1940ed62 969 outb(0x01, dev->ioport[0] + 0x1b);
1da177e4 970 } else {
1940ed62 971 outb(0x00, dev->ioport[0] + 0x1b);
1da177e4 972 }
58c4d046
OZ		 973 do {
974 outb(0x09, dev->ioport[0] + 0x18);
1da177e4 975
58c4d046
OZ		 976 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0x00)
977 cpu_relax();
978 k = inb(dev->ioport[0] + 0x17);
979 if ((k == 0x85) || (k == 0x42))
980 break;
981 if (k != 0x16)
982 outb(0x41, dev->ioport[0] + 0x10);
983 } while (k != 0x16);
984 if ((k == 0x85) || (k == 0x42))
985 continue;
1da177e4
LT		 986 assignid_map |= m;
987
988 }
1940ed62
OZ		 989 outb(0x7f, dev->ioport[0] + 0x02);
990 outb(0x02, dev->ioport[0] + 0x1b);
1da177e4
LT		 991
992 outb(0, 0x80);
993
994 val = 0x0080; /* bsy */
1940ed62 995 outw(val, dev->ioport[0] + 0x1c);
1da177e4 996 val |= 0x0040; /* sel */
1940ed62 997 outw(val, dev->ioport[0] + 0x1c);
1da177e4 998 val |= 0x0004; /* msg */
1940ed62 999 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1000 inb(0x80); /* 2 deskew delay(45ns*2=90ns) */
1001 val &= 0x007f; /* no bsy */
1940ed62 1002 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1003 mdelay(128);
1004 val &= 0x00fb; /* after 1ms no msg */
1940ed62 1005 outw(val, dev->ioport[0] + 0x1c);
58c4d046
OZ		 1006 while ((inb(dev->ioport[0] + 0x1c) & 0x04) != 0)
1007 ;
1da177e4
LT		 1008 outb(1, 0x80);
1009 udelay(100);
1010 for (n = 0; n < 0x30000; n++) {
1940ed62 1011 if ((inb(dev->ioport[0] + 0x1c) & 0x80) != 0) { /* bsy ? */
1da177e4
LT		 1012 goto wait_io;
1013 }
1014 }
1015 goto TCM_SYNC;
1016wait_io:
1017 for (n = 0; n < 0x30000; n++) {
1940ed62 1018 if ((inb(dev->ioport[0] + 0x1c) & 0x81) == 0x0081) {
1da177e4
LT		 1019 goto wait_io1;
1020 }
1021 }
1022 goto TCM_SYNC;
1023wait_io1:
1024 inb(0x80);
1025 val |= 0x8003; /* io,cd,db7 */
1940ed62 1026 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1027 inb(0x80);
1028 val &= 0x00bf; /* no sel */
1940ed62 1029 outw(val, dev->ioport[0] + 0x1c);
1da177e4
LT		 1030 outb(2, 0x80);
1031TCM_SYNC:
0f6d93aa
MM		 1032 /*
1033 * The funny division into multiple delays is to accomodate
1034 * arches like ARM where udelay() multiplies its argument by
1035 * a large number to initialize a loop counter. To avoid
1036 * overflow, the maximum supported udelay is 2000 microseconds.
1037 *
1038 * XXX it would be more polite to find a way to use msleep()
1039 */
1040 mdelay(2);
1041 udelay(48);
1940ed62
OZ		 1042 if ((inb(dev->ioport[0] + 0x1c) & 0x80) == 0x00) { /* bsy ? */
1043 outw(0, dev->ioport[0] + 0x1c);
1044 outb(0, dev->ioport[0] + 0x1b);
1045 outb(0, dev->ioport[0] + 0x15);
1046 outb(0x09, dev->ioport[0] + 0x18);
1047 while ((inb(dev->ioport[0] + 0x1f) & 0x80) == 0)
1da177e4 1048 cpu_relax();
1940ed62 1049 inb(dev->ioport[0] + 0x17);
1da177e4
LT		 1050 return;
1051 }
1052 val &= 0x00ff; /* synchronization */
1053 val |= 0x3f00;
1054 fun_scam(dev, &val);
1055 outb(3, 0x80);
1056 val &= 0x00ff; /* isolation */
1057 val |= 0x2000;
1058 fun_scam(dev, &val);
1059 outb(4, 0x80);
1060 i = 8;
1061 j = 0;
1062TCM_ID:
1940ed62 1063 if ((inw(dev->ioport[0] + 0x1c) & 0x2000) == 0) {
1da177e4
LT		 1064 goto TCM_ID;
1065 }
1066 outb(5, 0x80);
1067 val &= 0x00ff; /* get ID_STRING */
1068 val |= 0x2000;
1069 k = fun_scam(dev, &val);
1070 if ((k & 0x03) == 0) {
1071 goto TCM_5;
1072 }
1073 mbuf[j] <<= 0x01;
1074 mbuf[j] &= 0xfe;
1075 if ((k & 0x02) != 0) {
1076 mbuf[j] |= 0x01;
1077 }
1078 i--;
1079 if (i > 0) {
1080 goto TCM_ID;
1081 }
1082 j++;
1083 i = 8;
1084 goto TCM_ID;
1085
1086TCM_5: /* isolation complete.. */
1087/* mbuf[32]=0;
1088 printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1089 i = 15;
1090 j = mbuf[0];
25985edc 1091 if ((j & 0x20) != 0) { /* bit5=1:ID up to 7 */
1da177e4
LT		 1092 i = 7;
1093 }
1094 if ((j & 0x06) == 0) { /* IDvalid? */
1095 goto G2Q5;
1096 }
1097 k = mbuf[1];
1098small_id:
1099 m = 1;
1100 m <<= k;
1101 if ((m & assignid_map) == 0) {
1102 goto G2Q_QUIN;
1103 }
1104 if (k > 0) {
1105 k--;
1106 goto small_id;
1107 }
1108G2Q5: /* srch from max acceptable ID# */
1109 k = i; /* max acceptable ID# */
1110G2Q_LP:
1111 m = 1;
1112 m <<= k;
1113 if ((m & assignid_map) == 0) {
1114 goto G2Q_QUIN;
1115 }
1116 if (k > 0) {
1117 k--;
1118 goto G2Q_LP;
1119 }
1120G2Q_QUIN: /* k=binID#, */
1121 assignid_map |= m;
1122 if (k < 8) {
1123 quintet[0] = 0x38; /* 1st dft ID<8 */
1124 } else {
1125 quintet[0] = 0x31; /* 1st ID>=8 */
1126 }
1127 k &= 0x07;
1128 quintet[1] = g2q_tab[k];
1129
1130 val &= 0x00ff; /* AssignID 1stQuintet,AH=001xxxxx */
1131 m = quintet[0] << 8;
1132 val |= m;
1133 fun_scam(dev, &val);
1134 val &= 0x00ff; /* AssignID 2ndQuintet,AH=001xxxxx */
1135 m = quintet[1] << 8;
1136 val |= m;
1137 fun_scam(dev, &val);
1138
1139 goto TCM_SYNC;
1140
1141}
1142
1143static void is870(struct atp_unit *dev, unsigned int wkport)
1144{
1da177e4
LT		 1145 unsigned char i, j, k, rmb, n;
1146 unsigned short int m;
1147 static unsigned char mbuf[512];
1148 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1149 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1150 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1151 static unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0c, 0x0e };
1152 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
1153 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1154
ea41ed60 1155 outb((unsigned char) (inb(wkport + 0x3a) | 0x10), wkport + 0x3a);
1da177e4
LT		 1156
1157 for (i = 0; i < 16; i++) {
1158 if ((dev->chip_ver != 4) && (i > 7)) {
1159 break;
1160 }
1161 m = 1;
1162 m = m << i;
1163 if ((m & dev->active_id[0]) != 0) {
1164 continue;
1165 }
1166 if (i == dev->host_id[0]) {
1167 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1168 continue;
1169 }
1da177e4 1170 if (dev->chip_ver == 4) {
ea41ed60 1171 outb(0x01, wkport + 0x1b);
1da177e4 1172 } else {
ea41ed60
OZ		 1173 outb(0x00, wkport + 0x1b);
1174 }
1175 outb(0x08, wkport + 1);
1176 outb(0x7f, wkport + 2);
1177 outb(satn[0], wkport + 3);
1178 outb(satn[1], wkport + 4);
1179 outb(satn[2], wkport + 5);
1180 outb(satn[3], wkport + 6);
1181 outb(satn[4], wkport + 7);
1182 outb(satn[5], wkport + 8);
1183 outb(0, wkport + 0x0f);
1184 outb(dev->id[0][i].devsp, wkport + 0x11);
1185 outb(0, wkport + 0x12);
1186 outb(satn[6], wkport + 0x13);
1187 outb(satn[7], wkport + 0x14);
1da177e4
LT		 1188 j = i;
1189 if ((j & 0x08) != 0) {
1190 j = (j & 0x07) | 0x40;
1191 }
ea41ed60
OZ		 1192 outb(j, wkport + 0x15);
1193 outb(satn[8], wkport + 0x18);
1da177e4 1194
ea41ed60 1195 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1196 cpu_relax();
1197
ea41ed60 1198 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1199 continue;
1200
ea41ed60 1201 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1202 cpu_relax();
1203
1204 dev->active_id[0] |= m;
1205
ea41ed60
OZ		 1206 outb(0x30, wkport + 0x10);
1207 outb(0x00, wkport + 0x04);
1da177e4
LT		 1208
1209phase_cmd:
ea41ed60
OZ		 1210 outb(0x08, wkport + 0x18);
1211 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 1212 cpu_relax();
ea41ed60 1213 j = inb(wkport + 0x17);
1da177e4 1214 if (j != 0x16) {
ea41ed60 1215 outb(0x41, wkport + 0x10);
1da177e4
LT		 1216 goto phase_cmd;
1217 }
1218sel_ok:
ea41ed60
OZ		 1219 outb(inqd[0], wkport + 3);
1220 outb(inqd[1], wkport + 4);
1221 outb(inqd[2], wkport + 5);
1222 outb(inqd[3], wkport + 6);
1223 outb(inqd[4], wkport + 7);
1224 outb(inqd[5], wkport + 8);
1225 outb(0, wkport + 0x0f);
1226 outb(dev->id[0][i].devsp, wkport + 0x11);
1227 outb(0, wkport + 0x12);
1228 outb(inqd[6], wkport + 0x13);
1229 outb(inqd[7], wkport + 0x14);
1230 outb(inqd[8], wkport + 0x18);
1231
1232 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1233 cpu_relax();
1234
ea41ed60 1235 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1236 continue;
1237
ea41ed60 1238 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1239 cpu_relax();
1240
1da177e4 1241 if (dev->chip_ver == 4)
ea41ed60 1242 outb(0x00, wkport + 0x1b);
1da177e4 1243
ea41ed60 1244 outb(0x08, wkport + 0x18);
1da177e4
LT		 1245 j = 0;
1246rd_inq_data:
ea41ed60 1247 k = inb(wkport + 0x1f);
1da177e4 1248 if ((k & 0x01) != 0) {
ea41ed60 1249 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 1250 goto rd_inq_data;
1251 }
1252 if ((k & 0x80) == 0) {
1253 goto rd_inq_data;
1254 }
ea41ed60 1255 j = inb(wkport + 0x17);
1da177e4
LT		 1256 if (j == 0x16) {
1257 goto inq_ok;
1258 }
ea41ed60
OZ		 1259 outb(0x46, wkport + 0x10);
1260 outb(0, wkport + 0x12);
1261 outb(0, wkport + 0x13);
1262 outb(0, wkport + 0x14);
1263 outb(0x08, wkport + 0x18);
1264
1265 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1266 cpu_relax();
1267
ea41ed60 1268 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 1269 goto sel_ok;
1270 }
1271inq_ok:
1272 mbuf[36] = 0;
1273 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1274 dev->id[0][i].devtype = mbuf[0];
1275 rmb = mbuf[1];
1276 n = mbuf[7];
1277 if (dev->chip_ver != 4) {
1278 goto not_wide;
1279 }
1280 if ((mbuf[7] & 0x60) == 0) {
1281 goto not_wide;
1282 }
1283 if ((dev->global_map[0] & 0x20) == 0) {
1284 goto not_wide;
1285 }
ea41ed60
OZ		 1286 outb(0x01, wkport + 0x1b);
1287 outb(satn[0], wkport + 3);
1288 outb(satn[1], wkport + 4);
1289 outb(satn[2], wkport + 5);
1290 outb(satn[3], wkport + 6);
1291 outb(satn[4], wkport + 7);
1292 outb(satn[5], wkport + 8);
1293 outb(0, wkport + 0x0f);
1294 outb(dev->id[0][i].devsp, wkport + 0x11);
1295 outb(0, wkport + 0x12);
1296 outb(satn[6], wkport + 0x13);
1297 outb(satn[7], wkport + 0x14);
1298 outb(satn[8], wkport + 0x18);
1299
1300 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1301 cpu_relax();
1302
ea41ed60 1303 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1304 continue;
1305
ea41ed60 1306 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1307 cpu_relax();
1308
1309try_wide:
1310 j = 0;
ea41ed60
OZ		 1311 outb(0x05, wkport + 0x14);
1312 outb(0x20, wkport + 0x18);
1313
1314 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1315 if ((inb(wkport + 0x1f) & 0x01) != 0)
1316 outb(wide[j++], wkport + 0x19);
1da177e4 1317 }
1da177e4 1318
ea41ed60 1319 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1320 cpu_relax();
1321
ea41ed60 1322 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1323 if (j == 0x0f) {
1324 goto widep_in;
1325 }
1326 if (j == 0x0a) {
1327 goto widep_cmd;
1328 }
1329 if (j == 0x0e) {
1330 goto try_wide;
1331 }
1332 continue;
1333widep_out:
ea41ed60
OZ		 1334 outb(0x20, wkport + 0x18);
1335 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1336 if ((inb(wkport + 0x1f) & 0x01) != 0)
1337 outb(0, wkport + 0x19);
1da177e4 1338 }
ea41ed60 1339 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1340 if (j == 0x0f) {
1341 goto widep_in;
1342 }
1343 if (j == 0x0a) {
1344 goto widep_cmd;
1345 }
1346 if (j == 0x0e) {
1347 goto widep_out;
1348 }
1349 continue;
1350widep_in:
ea41ed60
OZ		 1351 outb(0xff, wkport + 0x14);
1352 outb(0x20, wkport + 0x18);
1da177e4
LT		 1353 k = 0;
1354widep_in1:
ea41ed60 1355 j = inb(wkport + 0x1f);
1da177e4 1356 if ((j & 0x01) != 0) {
ea41ed60 1357 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1358 goto widep_in1;
1359 }
1360 if ((j & 0x80) == 0x00) {
1361 goto widep_in1;
1362 }
ea41ed60 1363 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1364 if (j == 0x0f) {
1365 goto widep_in;
1366 }
1367 if (j == 0x0a) {
1368 goto widep_cmd;
1369 }
1370 if (j == 0x0e) {
1371 goto widep_out;
1372 }
1373 continue;
1374widep_cmd:
ea41ed60
OZ		 1375 outb(0x30, wkport + 0x10);
1376 outb(0x00, wkport + 0x14);
1377 outb(0x08, wkport + 0x18);
1da177e4 1378
ea41ed60 1379 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1380 cpu_relax();
1381
ea41ed60 1382 j = inb(wkport + 0x17);
1da177e4
LT		 1383 if (j != 0x16) {
1384 if (j == 0x4e) {
1385 goto widep_out;
1386 }
1387 continue;
1388 }
1389 if (mbuf[0] != 0x01) {
1390 goto not_wide;
1391 }
1392 if (mbuf[1] != 0x02) {
1393 goto not_wide;
1394 }
1395 if (mbuf[2] != 0x03) {
1396 goto not_wide;
1397 }
1398 if (mbuf[3] != 0x01) {
1399 goto not_wide;
1400 }
1401 m = 1;
1402 m = m << i;
1403 dev->wide_id[0] |= m;
1404not_wide:
1405 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1406 goto set_sync;
1407 }
1408 continue;
1409set_sync:
1da177e4
LT		 1410 j = 0;
1411 if ((m & dev->wide_id[0]) != 0) {
1412 j |= 0x01;
1413 }
ea41ed60
OZ		 1414 outb(j, wkport + 0x1b);
1415 outb(satn[0], wkport + 3);
1416 outb(satn[1], wkport + 4);
1417 outb(satn[2], wkport + 5);
1418 outb(satn[3], wkport + 6);
1419 outb(satn[4], wkport + 7);
1420 outb(satn[5], wkport + 8);
1421 outb(0, wkport + 0x0f);
1422 outb(dev->id[0][i].devsp, wkport + 0x11);
1423 outb(0, wkport + 0x12);
1424 outb(satn[6], wkport + 0x13);
1425 outb(satn[7], wkport + 0x14);
1426 outb(satn[8], wkport + 0x18);
1427
1428 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1429 cpu_relax();
1430
ea41ed60 1431 if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1432 continue;
1433
ea41ed60 1434 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 1435 cpu_relax();
1436
1437try_sync:
1438 j = 0;
ea41ed60
OZ		 1439 outb(0x06, wkport + 0x14);
1440 outb(0x20, wkport + 0x18);
1441
1442 while ((inb(wkport + 0x1f) & 0x80) == 0) {
1443 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4 1444 if ((m & dev->wide_id[0]) != 0) {
ea41ed60 1445 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 1446 } else {
1447 if ((m & dev->ultra_map[0]) != 0) {
ea41ed60 1448 outb(synu[j++], wkport + 0x19);
1da177e4 1449 } else {
ea41ed60 1450 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 1451 }
1452 }
1da177e4
LT		 1453 }
1454 }
1da177e4 1455
ea41ed60 1456 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1457 cpu_relax();
1458
ea41ed60 1459 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 1460 if (j == 0x0f) {
1461 goto phase_ins;
1462 }
1463 if (j == 0x0a) {
1464 goto phase_cmds;
1465 }
1466 if (j == 0x0e) {
1467 goto try_sync;
1468 }
1469 continue;
1470phase_outs:
ea41ed60
OZ		 1471 outb(0x20, wkport + 0x18);
1472 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
1473 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
1474 outb(0x00, wkport + 0x19);
1da177e4 1475 }
ea41ed60 1476 j = inb(wkport + 0x17);
1da177e4
LT		 1477 if (j == 0x85) {
1478 goto tar_dcons;
1479 }
1480 j &= 0x0f;
1481 if (j == 0x0f) {
1482 goto phase_ins;
1483 }
1484 if (j == 0x0a) {
1485 goto phase_cmds;
1486 }
1487 if (j == 0x0e) {
1488 goto phase_outs;
1489 }
1490 continue;
1491phase_ins:
ea41ed60
OZ		 1492 outb(0xff, wkport + 0x14);
1493 outb(0x20, wkport + 0x18);
1da177e4
LT		 1494 k = 0;
1495phase_ins1:
ea41ed60 1496 j = inb(wkport + 0x1f);
1da177e4 1497 if ((j & 0x01) != 0x00) {
ea41ed60 1498 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 1499 goto phase_ins1;
1500 }
1501 if ((j & 0x80) == 0x00) {
1502 goto phase_ins1;
1503 }
1da177e4 1504
ea41ed60 1505 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4
LT		 1506 cpu_relax();
1507
ea41ed60 1508 j = inb(wkport + 0x17);
1da177e4
LT		 1509 if (j == 0x85) {
1510 goto tar_dcons;
1511 }
1512 j &= 0x0f;
1513 if (j == 0x0f) {
1514 goto phase_ins;
1515 }
1516 if (j == 0x0a) {
1517 goto phase_cmds;
1518 }
1519 if (j == 0x0e) {
1520 goto phase_outs;
1521 }
1522 continue;
1523phase_cmds:
ea41ed60 1524 outb(0x30, wkport + 0x10);
1da177e4 1525tar_dcons:
ea41ed60
OZ		 1526 outb(0x00, wkport + 0x14);
1527 outb(0x08, wkport + 0x18);
1da177e4 1528
ea41ed60 1529 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4
LT		 1530 cpu_relax();
1531
ea41ed60 1532 j = inb(wkport + 0x17);
1da177e4
LT		 1533 if (j != 0x16) {
1534 continue;
1535 }
1536 if (mbuf[0] != 0x01) {
1537 continue;
1538 }
1539 if (mbuf[1] != 0x03) {
1540 continue;
1541 }
1542 if (mbuf[4] == 0x00) {
1543 continue;
1544 }
1545 if (mbuf[3] > 0x64) {
1546 continue;
1547 }
1548 if (mbuf[4] > 0x0c) {
1549 mbuf[4] = 0x0c;
1550 }
1551 dev->id[0][i].devsp = mbuf[4];
1552 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
1553 j = 0xa0;
1554 goto set_syn_ok;
1555 }
1556 if (mbuf[3] < 0x1a) {
1557 j = 0x20;
1558 goto set_syn_ok;
1559 }
1560 if (mbuf[3] < 0x33) {
1561 j = 0x40;
1562 goto set_syn_ok;
1563 }
1564 if (mbuf[3] < 0x4c) {
1565 j = 0x50;
1566 goto set_syn_ok;
1567 }
1568 j = 0x60;
1569set_syn_ok:
1570 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
1571 }
ea41ed60 1572 outb((unsigned char) (inb(wkport + 0x3a) & 0xef), wkport + 0x3a);
1da177e4
LT		 1573}
1574
1575static void is880(struct atp_unit *dev, unsigned int wkport)
1576{
1da177e4
LT		 1577 unsigned char i, j, k, rmb, n, lvdmode;
1578 unsigned short int m;
1579 static unsigned char mbuf[512];
1580 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1581 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1582 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1583 unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1584 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1585 unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1586 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1587 static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1588
1589 lvdmode = inb(wkport + 0x3f) & 0x40;
1590
1591 for (i = 0; i < 16; i++) {
1592 m = 1;
1593 m = m << i;
1594 if ((m & dev->active_id[0]) != 0) {
1595 continue;
1596 }
1597 if (i == dev->host_id[0]) {
1598 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
1599 continue;
1600 }
3b30acf6
OZ		 1601 outb(0x01, wkport + 0x5b);
1602 outb(0x08, wkport + 0x41);
1603 outb(0x7f, wkport + 0x42);
1604 outb(satn[0], wkport + 0x43);
1605 outb(satn[1], wkport + 0x44);
1606 outb(satn[2], wkport + 0x45);
1607 outb(satn[3], wkport + 0x46);
1608 outb(satn[4], wkport + 0x47);
1609 outb(satn[5], wkport + 0x48);
1610 outb(0, wkport + 0x4f);
1611 outb(dev->id[0][i].devsp, wkport + 0x51);
1612 outb(0, wkport + 0x52);
1613 outb(satn[6], wkport + 0x53);
1614 outb(satn[7], wkport + 0x54);
1da177e4
LT		 1615 j = i;
1616 if ((j & 0x08) != 0) {
1617 j = (j & 0x07) | 0x40;
1618 }
3b30acf6
OZ		 1619 outb(j, wkport + 0x55);
1620 outb(satn[8], wkport + 0x58);
1da177e4 1621
3b30acf6 1622 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1623 cpu_relax();
1624
3b30acf6 1625 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1626 continue;
1627
3b30acf6 1628 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1629 cpu_relax();
1630
1631 dev->active_id[0] |= m;
1632
3b30acf6
OZ		 1633 outb(0x30, wkport + 0x50);
1634 outb(0x00, wkport + 0x54);
1da177e4
LT		 1635
1636phase_cmd:
3b30acf6 1637 outb(0x08, wkport + 0x58);
1da177e4 1638
3b30acf6 1639 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1640 cpu_relax();
1641
3b30acf6 1642 j = inb(wkport + 0x57);
1da177e4 1643 if (j != 0x16) {
3b30acf6 1644 outb(0x41, wkport + 0x50);
1da177e4
LT		 1645 goto phase_cmd;
1646 }
1647sel_ok:
3b30acf6
OZ		 1648 outb(inqd[0], wkport + 0x43);
1649 outb(inqd[1], wkport + 0x44);
1650 outb(inqd[2], wkport + 0x45);
1651 outb(inqd[3], wkport + 0x46);
1652 outb(inqd[4], wkport + 0x47);
1653 outb(inqd[5], wkport + 0x48);
1654 outb(0, wkport + 0x4f);
1655 outb(dev->id[0][i].devsp, wkport + 0x51);
1656 outb(0, wkport + 0x52);
1657 outb(inqd[6], wkport + 0x53);
1658 outb(inqd[7], wkport + 0x54);
1659 outb(inqd[8], wkport + 0x58);
1da177e4 1660
3b30acf6 1661 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1662 cpu_relax();
1663
3b30acf6 1664 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1665 continue;
1666
3b30acf6 1667 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1668 cpu_relax();
1669
3b30acf6
OZ		 1670 outb(0x00, wkport + 0x5b);
1671 outb(0x08, wkport + 0x58);
1da177e4
LT		 1672 j = 0;
1673rd_inq_data:
3b30acf6 1674 k = inb(wkport + 0x5f);
1da177e4 1675 if ((k & 0x01) != 0) {
3b30acf6 1676 mbuf[j++] = inb(wkport + 0x59);
1da177e4
LT		 1677 goto rd_inq_data;
1678 }
1679 if ((k & 0x80) == 0) {
1680 goto rd_inq_data;
1681 }
3b30acf6 1682 j = inb(wkport + 0x57);
1da177e4
LT		 1683 if (j == 0x16) {
1684 goto inq_ok;
1685 }
3b30acf6
OZ		 1686 outb(0x46, wkport + 0x50);
1687 outb(0, wkport + 0x52);
1688 outb(0, wkport + 0x53);
1689 outb(0, wkport + 0x54);
1690 outb(0x08, wkport + 0x58);
1691 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1692 cpu_relax();
1693
3b30acf6 1694 if (inb(wkport + 0x57) != 0x16)
1da177e4
LT		 1695 goto sel_ok;
1696
1697inq_ok:
1698 mbuf[36] = 0;
1699 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1700 dev->id[0][i].devtype = mbuf[0];
1701 rmb = mbuf[1];
1702 n = mbuf[7];
1703 if ((mbuf[7] & 0x60) == 0) {
1704 goto not_wide;
1705 }
1706 if ((i < 8) && ((dev->global_map[0] & 0x20) == 0)) {
1707 goto not_wide;
1708 }
1709 if (lvdmode == 0) {
1710 goto chg_wide;
1711 }
1712 if (dev->sp[0][i] != 0x04) // force u2
1713 {
1714 goto chg_wide;
1715 }
1716
3b30acf6
OZ		 1717 outb(0x01, wkport + 0x5b);
1718 outb(satn[0], wkport + 0x43);
1719 outb(satn[1], wkport + 0x44);
1720 outb(satn[2], wkport + 0x45);
1721 outb(satn[3], wkport + 0x46);
1722 outb(satn[4], wkport + 0x47);
1723 outb(satn[5], wkport + 0x48);
1724 outb(0, wkport + 0x4f);
1725 outb(dev->id[0][i].devsp, wkport + 0x51);
1726 outb(0, wkport + 0x52);
1727 outb(satn[6], wkport + 0x53);
1728 outb(satn[7], wkport + 0x54);
1729 outb(satn[8], wkport + 0x58);
1730
1731 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1732 cpu_relax();
1733
3b30acf6 1734 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1735 continue;
1736
3b30acf6 1737 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1738 cpu_relax();
1739
1740try_u3:
1741 j = 0;
3b30acf6
OZ		 1742 outb(0x09, wkport + 0x54);
1743 outb(0x20, wkport + 0x58);
1744
1745 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1746 if ((inb(wkport + 0x5f) & 0x01) != 0)
1747 outb(u3[j++], wkport + 0x59);
1da177e4 1748 }
1da177e4 1749
3b30acf6 1750 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1751 cpu_relax();
1752
3b30acf6 1753 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1754 if (j == 0x0f) {
1755 goto u3p_in;
1756 }
1757 if (j == 0x0a) {
1758 goto u3p_cmd;
1759 }
1760 if (j == 0x0e) {
1761 goto try_u3;
1762 }
1763 continue;
1764u3p_out:
3b30acf6
OZ		 1765 outb(0x20, wkport + 0x58);
1766 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1767 if ((inb(wkport + 0x5f) & 0x01) != 0)
1768 outb(0, wkport + 0x59);
1da177e4 1769 }
3b30acf6 1770 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1771 if (j == 0x0f) {
1772 goto u3p_in;
1773 }
1774 if (j == 0x0a) {
1775 goto u3p_cmd;
1776 }
1777 if (j == 0x0e) {
1778 goto u3p_out;
1779 }
1780 continue;
1781u3p_in:
3b30acf6
OZ		 1782 outb(0x09, wkport + 0x54);
1783 outb(0x20, wkport + 0x58);
1da177e4
LT		 1784 k = 0;
1785u3p_in1:
3b30acf6 1786 j = inb(wkport + 0x5f);
1da177e4 1787 if ((j & 0x01) != 0) {
3b30acf6 1788 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1789 goto u3p_in1;
1790 }
1791 if ((j & 0x80) == 0x00) {
1792 goto u3p_in1;
1793 }
3b30acf6 1794 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1795 if (j == 0x0f) {
1796 goto u3p_in;
1797 }
1798 if (j == 0x0a) {
1799 goto u3p_cmd;
1800 }
1801 if (j == 0x0e) {
1802 goto u3p_out;
1803 }
1804 continue;
1805u3p_cmd:
3b30acf6
OZ		 1806 outb(0x30, wkport + 0x50);
1807 outb(0x00, wkport + 0x54);
1808 outb(0x08, wkport + 0x58);
1da177e4 1809
3b30acf6 1810 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1811 cpu_relax();
1812
3b30acf6 1813 j = inb(wkport + 0x57);
1da177e4
LT		 1814 if (j != 0x16) {
1815 if (j == 0x4e) {
1816 goto u3p_out;
1817 }
1818 continue;
1819 }
1820 if (mbuf[0] != 0x01) {
1821 goto chg_wide;
1822 }
1823 if (mbuf[1] != 0x06) {
1824 goto chg_wide;
1825 }
1826 if (mbuf[2] != 0x04) {
1827 goto chg_wide;
1828 }
1829 if (mbuf[3] == 0x09) {
1830 m = 1;
1831 m = m << i;
1832 dev->wide_id[0] |= m;
1833 dev->id[0][i].devsp = 0xce;
1834 continue;
1835 }
1836chg_wide:
3b30acf6
OZ		 1837 outb(0x01, wkport + 0x5b);
1838 outb(satn[0], wkport + 0x43);
1839 outb(satn[1], wkport + 0x44);
1840 outb(satn[2], wkport + 0x45);
1841 outb(satn[3], wkport + 0x46);
1842 outb(satn[4], wkport + 0x47);
1843 outb(satn[5], wkport + 0x48);
1844 outb(0, wkport + 0x4f);
1845 outb(dev->id[0][i].devsp, wkport + 0x51);
1846 outb(0, wkport + 0x52);
1847 outb(satn[6], wkport + 0x53);
1848 outb(satn[7], wkport + 0x54);
1849 outb(satn[8], wkport + 0x58);
1850
1851 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1852 cpu_relax();
1853
3b30acf6 1854 if (inb(wkport + 0x57) != 0x11 && inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1855 continue;
1856
3b30acf6 1857 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1858 cpu_relax();
1859
1860try_wide:
1861 j = 0;
3b30acf6
OZ		 1862 outb(0x05, wkport + 0x54);
1863 outb(0x20, wkport + 0x58);
1864
1865 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1866 if ((inb(wkport + 0x5f) & 0x01) != 0)
1867 outb(wide[j++], wkport + 0x59);
1da177e4 1868 }
3b30acf6 1869 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 1870 cpu_relax();
1871
3b30acf6 1872 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1873 if (j == 0x0f) {
1874 goto widep_in;
1875 }
1876 if (j == 0x0a) {
1877 goto widep_cmd;
1878 }
1879 if (j == 0x0e) {
1880 goto try_wide;
1881 }
1882 continue;
1883widep_out:
3b30acf6
OZ		 1884 outb(0x20, wkport + 0x58);
1885 while ((inb(wkport + 0x5f) & 0x80) == 0) {
1886 if ((inb(wkport + 0x5f) & 0x01) != 0)
1887 outb(0, wkport + 0x59);
1da177e4 1888 }
3b30acf6 1889 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1890 if (j == 0x0f) {
1891 goto widep_in;
1892 }
1893 if (j == 0x0a) {
1894 goto widep_cmd;
1895 }
1896 if (j == 0x0e) {
1897 goto widep_out;
1898 }
1899 continue;
1900widep_in:
3b30acf6
OZ		 1901 outb(0xff, wkport + 0x54);
1902 outb(0x20, wkport + 0x58);
1da177e4
LT		 1903 k = 0;
1904widep_in1:
3b30acf6 1905 j = inb(wkport + 0x5f);
1da177e4 1906 if ((j & 0x01) != 0) {
3b30acf6 1907 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 1908 goto widep_in1;
1909 }
1910 if ((j & 0x80) == 0x00) {
1911 goto widep_in1;
1912 }
3b30acf6 1913 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 1914 if (j == 0x0f) {
1915 goto widep_in;
1916 }
1917 if (j == 0x0a) {
1918 goto widep_cmd;
1919 }
1920 if (j == 0x0e) {
1921 goto widep_out;
1922 }
1923 continue;
1924widep_cmd:
3b30acf6
OZ		 1925 outb(0x30, wkport + 0x50);
1926 outb(0x00, wkport + 0x54);
1927 outb(0x08, wkport + 0x58);
1928
1929 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1930 cpu_relax();
1931
3b30acf6 1932 j = inb(wkport + 0x57);
1da177e4
LT		 1933 if (j != 0x16) {
1934 if (j == 0x4e) {
1935 goto widep_out;
1936 }
1937 continue;
1938 }
1939 if (mbuf[0] != 0x01) {
1940 goto not_wide;
1941 }
1942 if (mbuf[1] != 0x02) {
1943 goto not_wide;
1944 }
1945 if (mbuf[2] != 0x03) {
1946 goto not_wide;
1947 }
1948 if (mbuf[3] != 0x01) {
1949 goto not_wide;
1950 }
1951 m = 1;
1952 m = m << i;
1953 dev->wide_id[0] |= m;
1954not_wide:
1955 if ((dev->id[0][i].devtype == 0x00) || (dev->id[0][i].devtype == 0x07) || ((dev->id[0][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1956 m = 1;
1957 m = m << i;
1958 if ((dev->async[0] & m) != 0) {
1959 goto set_sync;
1960 }
1961 }
1962 continue;
1963set_sync:
1964 if (dev->sp[0][i] == 0x02) {
1965 synu[4] = 0x0c;
1966 synuw[4] = 0x0c;
1967 } else {
1968 if (dev->sp[0][i] >= 0x03) {
1969 synu[4] = 0x0a;
1970 synuw[4] = 0x0a;
1971 }
1972 }
1da177e4
LT		 1973 j = 0;
1974 if ((m & dev->wide_id[0]) != 0) {
1975 j |= 0x01;
1976 }
3b30acf6
OZ		 1977 outb(j, wkport + 0x5b);
1978 outb(satn[0], wkport + 0x43);
1979 outb(satn[1], wkport + 0x44);
1980 outb(satn[2], wkport + 0x45);
1981 outb(satn[3], wkport + 0x46);
1982 outb(satn[4], wkport + 0x47);
1983 outb(satn[5], wkport + 0x48);
1984 outb(0, wkport + 0x4f);
1985 outb(dev->id[0][i].devsp, wkport + 0x51);
1986 outb(0, wkport + 0x52);
1987 outb(satn[6], wkport + 0x53);
1988 outb(satn[7], wkport + 0x54);
1989 outb(satn[8], wkport + 0x58);
1990
1991 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 1992 cpu_relax();
1993
3b30acf6 1994 if ((inb(wkport + 0x57) != 0x11) && (inb(wkport + 0x57) != 0x8e)) {
1da177e4
LT		 1995 continue;
1996 }
3b30acf6 1997 while (inb(wkport + 0x57) != 0x8e)
1da177e4
LT		 1998 cpu_relax();
1999
2000try_sync:
2001 j = 0;
3b30acf6
OZ		 2002 outb(0x06, wkport + 0x54);
2003 outb(0x20, wkport + 0x58);
2004
2005 while ((inb(wkport + 0x5f) & 0x80) == 0) {
2006 if ((inb(wkport + 0x5f) & 0x01) != 0) {
1da177e4
LT		 2007 if ((m & dev->wide_id[0]) != 0) {
2008 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 2009 outb(synuw[j++], wkport + 0x59);
1da177e4 2010 } else {
3b30acf6 2011 outb(synw[j++], wkport + 0x59);
1da177e4
LT		 2012 }
2013 } else {
2014 if ((m & dev->ultra_map[0]) != 0) {
3b30acf6 2015 outb(synu[j++], wkport + 0x59);
1da177e4 2016 } else {
3b30acf6 2017 outb(synn[j++], wkport + 0x59);
1da177e4
LT		 2018 }
2019 }
1da177e4
LT		 2020 }
2021 }
1da177e4 2022
3b30acf6 2023 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2024 cpu_relax();
2025
3b30acf6 2026 j = inb(wkport + 0x57) & 0x0f;
1da177e4
LT		 2027 if (j == 0x0f) {
2028 goto phase_ins;
2029 }
2030 if (j == 0x0a) {
2031 goto phase_cmds;
2032 }
2033 if (j == 0x0e) {
2034 goto try_sync;
2035 }
2036 continue;
2037phase_outs:
3b30acf6
OZ		 2038 outb(0x20, wkport + 0x58);
2039 while ((inb(wkport + 0x5f) & 0x80) == 0x00) {
2040 if ((inb(wkport + 0x5f) & 0x01) != 0x00)
2041 outb(0x00, wkport + 0x59);
1da177e4 2042 }
3b30acf6 2043 j = inb(wkport + 0x57);
1da177e4
LT		 2044 if (j == 0x85) {
2045 goto tar_dcons;
2046 }
2047 j &= 0x0f;
2048 if (j == 0x0f) {
2049 goto phase_ins;
2050 }
2051 if (j == 0x0a) {
2052 goto phase_cmds;
2053 }
2054 if (j == 0x0e) {
2055 goto phase_outs;
2056 }
2057 continue;
2058phase_ins:
3b30acf6
OZ		 2059 outb(0x06, wkport + 0x54);
2060 outb(0x20, wkport + 0x58);
1da177e4
LT		 2061 k = 0;
2062phase_ins1:
3b30acf6 2063 j = inb(wkport + 0x5f);
1da177e4 2064 if ((j & 0x01) != 0x00) {
3b30acf6 2065 mbuf[k++] = inb(wkport + 0x59);
1da177e4
LT		 2066 goto phase_ins1;
2067 }
2068 if ((j & 0x80) == 0x00) {
2069 goto phase_ins1;
2070 }
1da177e4 2071
3b30acf6 2072 while ((inb(wkport + 0x57) & 0x80) == 0x00)
1da177e4
LT		 2073 cpu_relax();
2074
3b30acf6 2075 j = inb(wkport + 0x57);
1da177e4
LT		 2076 if (j == 0x85) {
2077 goto tar_dcons;
2078 }
2079 j &= 0x0f;
2080 if (j == 0x0f) {
2081 goto phase_ins;
2082 }
2083 if (j == 0x0a) {
2084 goto phase_cmds;
2085 }
2086 if (j == 0x0e) {
2087 goto phase_outs;
2088 }
2089 continue;
2090phase_cmds:
3b30acf6 2091 outb(0x30, wkport + 0x50);
1da177e4 2092tar_dcons:
3b30acf6
OZ		 2093 outb(0x00, wkport + 0x54);
2094 outb(0x08, wkport + 0x58);
1da177e4 2095
3b30acf6 2096 while ((inb(wkport + 0x5f) & 0x80) == 0x00)
1da177e4
LT		 2097 cpu_relax();
2098
3b30acf6 2099 j = inb(wkport + 0x57);
1da177e4
LT		 2100 if (j != 0x16) {
2101 continue;
2102 }
2103 if (mbuf[0] != 0x01) {
2104 continue;
2105 }
2106 if (mbuf[1] != 0x03) {
2107 continue;
2108 }
2109 if (mbuf[4] == 0x00) {
2110 continue;
2111 }
2112 if (mbuf[3] > 0x64) {
2113 continue;
2114 }
2115 if (mbuf[4] > 0x0e) {
2116 mbuf[4] = 0x0e;
2117 }
2118 dev->id[0][i].devsp = mbuf[4];
2119 if (mbuf[3] < 0x0c) {
2120 j = 0xb0;
2121 goto set_syn_ok;
2122 }
2123 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2124 j = 0xa0;
2125 goto set_syn_ok;
2126 }
2127 if (mbuf[3] < 0x1a) {
2128 j = 0x20;
2129 goto set_syn_ok;
2130 }
2131 if (mbuf[3] < 0x33) {
2132 j = 0x40;
2133 goto set_syn_ok;
2134 }
2135 if (mbuf[3] < 0x4c) {
2136 j = 0x50;
2137 goto set_syn_ok;
2138 }
2139 j = 0x60;
2140set_syn_ok:
2141 dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
2142 }
2143}
2144
2145static void atp870u_free_tables(struct Scsi_Host *host)
2146{
2147 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2148 int j, k;
2149 for (j=0; j < 2; j++) {
2150 for (k = 0; k < 16; k++) {
2151 if (!atp_dev->id[j][k].prd_table)
2152 continue;
b5683557 2153 pci_free_consistent(atp_dev->pdev, 1024, atp_dev->id[j][k].prd_table, atp_dev->id[j][k].prd_bus);
1da177e4
LT		 2154 atp_dev->id[j][k].prd_table = NULL;
2155 }
2156 }
2157}
2158
2159static int atp870u_init_tables(struct Scsi_Host *host)
2160{
2161 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
2162 int c,k;
2163 for(c=0;c < 2;c++) {
2164 for(k=0;k<16;k++) {
b5683557 2165 atp_dev->id[c][k].prd_table = pci_alloc_consistent(atp_dev->pdev, 1024, &(atp_dev->id[c][k].prd_bus));
1da177e4
LT		 2166 if (!atp_dev->id[c][k].prd_table) {
2167 printk("atp870u_init_tables fail\n");
2168 atp870u_free_tables(host);
2169 return -ENOMEM;
2170 }
b5683557 2171 atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1da177e4
LT		 2172 atp_dev->id[c][k].devsp=0x20;
2173 atp_dev->id[c][k].devtype = 0x7f;
2174 atp_dev->id[c][k].curr_req = NULL;
2175 }
2176
2177 atp_dev->active_id[c] = 0;
2178 atp_dev->wide_id[c] = 0;
2179 atp_dev->host_id[c] = 0x07;
2180 atp_dev->quhd[c] = 0;
2181 atp_dev->quend[c] = 0;
2182 atp_dev->last_cmd[c] = 0xff;
2183 atp_dev->in_snd[c] = 0;
2184 atp_dev->in_int[c] = 0;
2185
2186 for (k = 0; k < qcnt; k++) {
2187 atp_dev->quereq[c][k] = NULL;
2188 }
2189 for (k = 0; k < 16; k++) {
2190 atp_dev->id[c][k].curr_req = NULL;
2191 atp_dev->sp[c][k] = 0x04;
2192 }
2193 }
2194 return 0;
2195}
2196
2197/* return non-zero on detection */
2198static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2199{
2200 unsigned char k, m, c;
2201 unsigned long flags;
493c5201 2202 unsigned int base_io, error,n;
1da177e4
LT		 2203 unsigned char host_id;
2204 struct Scsi_Host *shpnt = NULL;
dc6a78f1 2205 struct atp_unit *atpdev, *p;
1da177e4
LT		 2206 unsigned char setupdata[2][16];
2207 int count = 0;
dc6a78f1
RD		 2208
2209 atpdev = kzalloc(sizeof(*atpdev), GFP_KERNEL);
2210 if (!atpdev)
2211 return -ENOMEM;
2212
1da177e4 2213 if (pci_enable_device(pdev))
dc6a78f1 2214 goto err_eio;
1da177e4 2215
284901a9 2216 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1da177e4
LT		 2217 printk(KERN_INFO "atp870u: use 32bit DMA mask.\n");
2218 } else {
2219 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
dc6a78f1 2220 goto err_eio;
1da177e4
LT		 2221 }
2222
1da177e4
LT		 2223 /*
2224 * It's probably easier to weed out some revisions like
2225 * this than via the PCI device table
2226 */
2227 if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610) {
7d7311c4 2228 atpdev->chip_ver = pdev->revision;
dc6a78f1
RD		 2229 if (atpdev->chip_ver < 2)
2230 goto err_eio;
1da177e4
LT		 2231 }
2232
2233 switch (ent->device) {
2234 case PCI_DEVICE_ID_ARTOP_AEC7612UW:
2235 case PCI_DEVICE_ID_ARTOP_AEC7612SUW:
2236 case ATP880_DEVID1:
2237 case ATP880_DEVID2:
2238 case ATP885_DEVID:
dc6a78f1 2239 atpdev->chip_ver = 0x04;
1da177e4
LT		 2240 default:
2241 break;
2242 }
2243 base_io = pci_resource_start(pdev, 0);
2244 base_io &= 0xfffffff8;
dc6a78f1 2245
1da177e4 2246 if ((ent->device == ATP880_DEVID1)||(ent->device == ATP880_DEVID2)) {
7d7311c4 2247 atpdev->chip_ver = pdev->revision;
1da177e4
LT		 2248 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);//JCC082803
2249
2250 host_id = inb(base_io + 0x39);
2251 host_id >>= 0x04;
2252
2253 printk(KERN_INFO " ACARD AEC-67160 PCI Ultra3 LVD Host Adapter: %d"
2254 " IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
dc6a78f1
RD		 2255 atpdev->ioport[0] = base_io + 0x40;
2256 atpdev->pciport[0] = base_io + 0x28;
2257 atpdev->dev_id = ent->device;
2258 atpdev->host_id[0] = host_id;
1da177e4 2259
493c5201
OZ		 2260 atpdev->scam_on = inb(base_io + 0x22);
2261 atpdev->global_map[0] = inb(base_io + 0x35);
2262 atpdev->ultra_map[0] = inw(base_io + 0x3c);
1da177e4
LT		 2263
2264 n = 0x3f09;
2265next_fblk_880:
2266 if (n >= 0x4000)
2267 goto flash_ok_880;
2268
2269 m = 0;
2270 outw(n, base_io + 0x34);
2271 n += 0x0002;
2272 if (inb(base_io + 0x30) == 0xff)
2273 goto flash_ok_880;
2274
dc6a78f1
RD		 2275 atpdev->sp[0][m++] = inb(base_io + 0x30);
2276 atpdev->sp[0][m++] = inb(base_io + 0x31);
2277 atpdev->sp[0][m++] = inb(base_io + 0x32);
2278 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2279 outw(n, base_io + 0x34);
2280 n += 0x0002;
dc6a78f1
RD		 2281 atpdev->sp[0][m++] = inb(base_io + 0x30);
2282 atpdev->sp[0][m++] = inb(base_io + 0x31);
2283 atpdev->sp[0][m++] = inb(base_io + 0x32);
2284 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2285 outw(n, base_io + 0x34);
2286 n += 0x0002;
dc6a78f1
RD		 2287 atpdev->sp[0][m++] = inb(base_io + 0x30);
2288 atpdev->sp[0][m++] = inb(base_io + 0x31);
2289 atpdev->sp[0][m++] = inb(base_io + 0x32);
2290 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2291 outw(n, base_io + 0x34);
2292 n += 0x0002;
dc6a78f1
RD		 2293 atpdev->sp[0][m++] = inb(base_io + 0x30);
2294 atpdev->sp[0][m++] = inb(base_io + 0x31);
2295 atpdev->sp[0][m++] = inb(base_io + 0x32);
2296 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 2297 n += 0x0018;
2298 goto next_fblk_880;
2299flash_ok_880:
2300 outw(0, base_io + 0x34);
dc6a78f1
RD		 2301 atpdev->ultra_map[0] = 0;
2302 atpdev->async[0] = 0;
1da177e4
LT		 2303 for (k = 0; k < 16; k++) {
2304 n = 1;
2305 n = n << k;
dc6a78f1
RD		 2306 if (atpdev->sp[0][k] > 1) {
2307 atpdev->ultra_map[0] |= n;
1da177e4 2308 } else {
dc6a78f1
RD		 2309 if (atpdev->sp[0][k] == 0)
2310 atpdev->async[0] |= n;
1da177e4
LT		 2311 }
2312 }
dc6a78f1
RD		 2313 atpdev->async[0] = ~(atpdev->async[0]);
2314 outb(atpdev->global_map[0], base_io + 0x35);
1da177e4
LT		 2315
2316 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2317 if (!shpnt)
dc6a78f1 2318 goto err_nomem;
1da177e4
LT		 2319
2320 p = (struct atp_unit *)&shpnt->hostdata;
2321
dc6a78f1
RD		 2322 atpdev->host = shpnt;
2323 atpdev->pdev = pdev;
1da177e4 2324 pci_set_drvdata(pdev, p);
dc6a78f1 2325 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2326 if (atp870u_init_tables(shpnt) < 0) {
2327 printk(KERN_ERR "Unable to allocate tables for Acard controller\n");
2328 goto unregister;
2329 }
2330
1d6f359a 2331 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp880i", shpnt)) {
1da177e4
LT		 2332 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2333 goto free_tables;
2334 }
2335
2336 spin_lock_irqsave(shpnt->host_lock, flags);
493c5201
OZ		 2337 k = inb(base_io + 0x38) & 0x80;
2338 outb(k, base_io + 0x38);
2339 outb(0x20, base_io + 0x3b);
1da177e4 2340 mdelay(32);
493c5201 2341 outb(0, base_io + 0x3b);
1da177e4 2342 mdelay(32);
493c5201
OZ		 2343 inb(base_io + 0x5b);
2344 inb(base_io + 0x57);
2345 outb((host_id | 0x08), base_io + 0x40);
2346 outb(0, base_io + 0x58);
2347 while ((inb(base_io + 0x5f) & 0x80) == 0)
1da177e4 2348 mdelay(1);
493c5201
OZ		 2349 inb(base_io + 0x57);
2350 outb(8, base_io + 0x41);
2351 outb(0x7f, base_io + 0x42);
2352 outb(0x20, base_io + 0x51);
1da177e4
LT		 2353
2354 tscam(shpnt);
2355 is880(p, base_io);
493c5201 2356 outb(0xb0, base_io + 0x38);
1da177e4
LT		 2357 shpnt->max_id = 16;
2358 shpnt->this_id = host_id;
2359 shpnt->unique_id = base_io;
2360 shpnt->io_port = base_io;
2361 shpnt->n_io_port = 0x60; /* Number of bytes of I/O space used */
2362 shpnt->irq = pdev->irq;
2363 } else if (ent->device == ATP885_DEVID) {
2364 printk(KERN_INFO " ACARD AEC-67162 PCI Ultra3 LVD Host Adapter: IO:%x, IRQ:%d.\n"
2365 , base_io, pdev->irq);
2366
dc6a78f1
RD		 2367 atpdev->pdev = pdev;
2368 atpdev->dev_id = ent->device;
2369 atpdev->baseport = base_io;
2370 atpdev->ioport[0] = base_io + 0x80;
2371 atpdev->ioport[1] = base_io + 0xc0;
2372 atpdev->pciport[0] = base_io + 0x40;
2373 atpdev->pciport[1] = base_io + 0x50;
1da177e4
LT		 2374
2375 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2376 if (!shpnt)
dc6a78f1 2377 goto err_nomem;
1da177e4
LT		 2378
2379 p = (struct atp_unit *)&shpnt->hostdata;
2380
dc6a78f1
RD		 2381 atpdev->host = shpnt;
2382 atpdev->pdev = pdev;
1da177e4 2383 pci_set_drvdata(pdev, p);
dc6a78f1 2384 memcpy(p, atpdev, sizeof(struct atp_unit));
1da177e4
LT		 2385 if (atp870u_init_tables(shpnt) < 0)
2386 goto unregister;
2387
2388#ifdef ED_DBGP
2389 printk("request_irq() shpnt %p hostdata %p\n", shpnt, p);
2390#endif
1d6f359a 2391 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt)) {
1da177e4
LT		 2392 printk(KERN_ERR "Unable to allocate IRQ for Acard controller.\n");
2393 goto free_tables;
2394 }
2395
2396 spin_lock_irqsave(shpnt->host_lock, flags);
2397
2398 c=inb(base_io + 0x29);
2399 outb((c | 0x04),base_io + 0x29);
2400
2401 n=0x1f80;
2402next_fblk_885:
2403 if (n >= 0x2000) {
2404 goto flash_ok_885;
2405 }
2406 outw(n,base_io + 0x3c);
2407 if (inl(base_io + 0x38) == 0xffffffff) {
2408 goto flash_ok_885;
2409 }
2410 for (m=0; m < 2; m++) {
2411 p->global_map[m]= 0;
2412 for (k=0; k < 4; k++) {
2413 outw(n++,base_io + 0x3c);
2414 ((unsigned long *)&setupdata[m][0])[k]=inl(base_io + 0x38);
2415 }
2416 for (k=0; k < 4; k++) {
2417 outw(n++,base_io + 0x3c);
2418 ((unsigned long *)&p->sp[m][0])[k]=inl(base_io + 0x38);
2419 }
2420 n += 8;
2421 }
2422 goto next_fblk_885;
2423flash_ok_885:
2424#ifdef ED_DBGP
2425 printk( "Flash Read OK\n");
2426#endif
2427 c=inb(base_io + 0x29);
2428 outb((c & 0xfb),base_io + 0x29);
2429 for (c=0;c < 2;c++) {
2430 p->ultra_map[c]=0;
2431 p->async[c] = 0;
2432 for (k=0; k < 16; k++) {
2433 n=1;
2434 n = n << k;
2435 if (p->sp[c][k] > 1) {
2436 p->ultra_map[c] |= n;
2437 } else {
2438 if (p->sp[c][k] == 0) {
2439 p->async[c] |= n;
2440 }
2441 }
2442 }
2443 p->async[c] = ~(p->async[c]);
2444
2445 if (p->global_map[c] == 0) {
2446 k=setupdata[c][1];
2447 if ((k & 0x40) != 0)
2448 p->global_map[c] |= 0x20;
2449 k &= 0x07;
2450 p->global_map[c] |= k;
2451 if ((setupdata[c][2] & 0x04) != 0)
2452 p->global_map[c] |= 0x08;
2453 p->host_id[c] = setupdata[c][0] & 0x07;
2454 }
2455 }
2456
2457 k = inb(base_io + 0x28) & 0x8f;
2458 k |= 0x10;
2459 outb(k, base_io + 0x28);
2460 outb(0x80, base_io + 0x41);
2461 outb(0x80, base_io + 0x51);
2462 mdelay(100);
2463 outb(0, base_io + 0x41);
2464 outb(0, base_io + 0x51);
2465 mdelay(1000);
2466 inb(base_io + 0x9b);
2467 inb(base_io + 0x97);
2468 inb(base_io + 0xdb);
2469 inb(base_io + 0xd7);
1da177e4
LT		 2470 k=p->host_id[0];
2471 if (k > 7)
2472 k = (k & 0x07) | 0x40;
2473 k |= 0x08;
493c5201
OZ		 2474 outb(k, base_io + 0x80);
2475 outb(0, base_io + 0x98);
1da177e4 2476
493c5201 2477 while ((inb(base_io + 0x9f) & 0x80) == 0)
1da177e4
LT		 2478 cpu_relax();
2479
493c5201
OZ		 2480 inb(base_io + 0x97);
2481 outb(8, base_io + 0x81);
2482 outb(0x7f, base_io + 0x82);
2483 outb(0x20, base_io + 0x91);
2484
1da177e4
LT		 2485 k=p->host_id[1];
2486 if (k > 7)
2487 k = (k & 0x07) | 0x40;
2488 k |= 0x08;
493c5201
OZ		 2489 outb(k, base_io + 0xc0);
2490 outb(0, base_io + 0xd8);
1da177e4 2491
493c5201 2492 while ((inb(base_io + 0xdf) & 0x80) == 0)
1da177e4
LT		 2493 cpu_relax();
2494
493c5201
OZ		 2495 inb(base_io + 0xd7);
2496 outb(8, base_io + 0xc1);
2497 outb(0x7f, base_io + 0xc2);
2498 outb(0x20, base_io + 0xd1);
1da177e4
LT		 2499
2500 tscam_885();
2501 printk(KERN_INFO " Scanning Channel A SCSI Device ...\n");
2502 is885(p, base_io + 0x80, 0);
2503 printk(KERN_INFO " Scanning Channel B SCSI Device ...\n");
2504 is885(p, base_io + 0xc0, 1);
2505
2506 k = inb(base_io + 0x28) & 0xcf;
2507 k |= 0xc0;
2508 outb(k, base_io + 0x28);
2509 k = inb(base_io + 0x1f) | 0x80;
2510 outb(k, base_io + 0x1f);
2511 k = inb(base_io + 0x29) | 0x01;
2512 outb(k, base_io + 0x29);
2513#ifdef ED_DBGP
2514 //printk("atp885: atp_host[0] 0x%p\n", atp_host[0]);
2515#endif
2516 shpnt->max_id = 16;
2517 shpnt->max_lun = (p->global_map[0] & 0x07) + 1;
2518 shpnt->max_channel = 1;
2519 shpnt->this_id = p->host_id[0];
2520 shpnt->unique_id = base_io;
2521 shpnt->io_port = base_io;
2522 shpnt->n_io_port = 0xff; /* Number of bytes of I/O space used */
2523 shpnt->irq = pdev->irq;
2524
2525 } else {
2526 error = pci_read_config_byte(pdev, 0x49, &host_id);
2527
2528 printk(KERN_INFO " ACARD AEC-671X PCI Ultra/W SCSI-2/3 Host Adapter: %d "
2529 "IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
2530
dc6a78f1
RD		 2531 atpdev->ioport[0] = base_io;
2532 atpdev->pciport[0] = base_io + 0x20;
2533 atpdev->dev_id = ent->device;
1da177e4 2534 host_id &= 0x07;
dc6a78f1 2535 atpdev->host_id[0] = host_id;
493c5201
OZ		 2536 atpdev->scam_on = inb(base_io + 0x22);
2537 atpdev->global_map[0] = inb(base_io + 0x2d);
2538 atpdev->ultra_map[0] = inw(base_io + 0x2e);
1da177e4 2539
dc6a78f1
RD		 2540 if (atpdev->ultra_map[0] == 0) {
2541 atpdev->scam_on = 0x00;
2542 atpdev->global_map[0] = 0x20;
2543 atpdev->ultra_map[0] = 0xffff;
1da177e4
LT		 2544 }
2545
2546 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
2547 if (!shpnt)
dc6a78f1 2548 goto err_nomem;
1da177e4
LT		 2549
2550 p = (struct atp_unit *)&shpnt->hostdata;
2551
dc6a78f1
RD		 2552 atpdev->host = shpnt;
2553 atpdev->pdev = pdev;
1da177e4 2554 pci_set_drvdata(pdev, p);
dc6a78f1 2555 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 2556 if (atp870u_init_tables(shpnt) < 0)
2557 goto unregister;
2558
1d6f359a 2559 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870i", shpnt)) {
1da177e4
LT		 2560 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
2561 goto free_tables;
2562 }
2563
2564 spin_lock_irqsave(shpnt->host_lock, flags);
dc6a78f1 2565 if (atpdev->chip_ver > 0x07) { /* check if atp876 chip then enable terminator */
493c5201 2566 outb(0x00, base_io + 0x3e);
1da177e4
LT		 2567 }
2568
493c5201
OZ		 2569 k = (inb(base_io + 0x3a) & 0xf3) | 0x10;
2570 outb(k, base_io + 0x3a);
2571 outb((k & 0xdf), base_io + 0x3a);
1da177e4 2572 mdelay(32);
493c5201 2573 outb(k, base_io + 0x3a);
1da177e4 2574 mdelay(32);
493c5201
OZ		 2575 outb((host_id | 0x08), base_io + 0);
2576 outb(0, base_io + 0x18);
2577 while ((inb(base_io + 0x1f) & 0x80) == 0)
1da177e4
LT		 2578 mdelay(1);
2579
493c5201
OZ		 2580 inb(base_io + 0x17);
2581 outb(8, base_io + 1);
2582 outb(0x7f, base_io + 2);
2583 outb(0x20, base_io + 0x11);
1da177e4
LT		 2584
2585 tscam(shpnt);
2586 is870(p, base_io);
493c5201
OZ		 2587 outb((inb(base_io + 0x3a) & 0xef), base_io + 0x3a);
2588 outb((inb(base_io + 0x3b) | 0x20), base_io + 0x3b);
dc6a78f1 2589 if (atpdev->chip_ver == 4)
1da177e4
LT		 2590 shpnt->max_id = 16;
2591 else
2b89dad0 2592 shpnt->max_id = 8;
1da177e4
LT		 2593 shpnt->this_id = host_id;
2594 shpnt->unique_id = base_io;
2595 shpnt->io_port = base_io;
2596 shpnt->n_io_port = 0x40; /* Number of bytes of I/O space used */
2597 shpnt->irq = pdev->irq;
2598 }
2599 spin_unlock_irqrestore(shpnt->host_lock, flags);
2600 if(ent->device==ATP885_DEVID) {
2601 if(!request_region(base_io, 0xff, "atp870u")) /* Register the IO ports that we use */
2602 goto request_io_fail;
2603 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2604 if(!request_region(base_io, 0x60, "atp870u")) /* Register the IO ports that we use */
2605 goto request_io_fail;
2606 } else {
2607 if(!request_region(base_io, 0x40, "atp870u")) /* Register the IO ports that we use */
2608 goto request_io_fail;
2609 }
2610 count++;
2611 if (scsi_add_host(shpnt, &pdev->dev))
2612 goto scsi_add_fail;
2613 scsi_scan_host(shpnt);
2614#ifdef ED_DBGP
2615 printk("atp870u_prob : exit\n");
2616#endif
2617 return 0;
2618
2619scsi_add_fail:
2620 printk("atp870u_prob:scsi_add_fail\n");
2621 if(ent->device==ATP885_DEVID) {
2622 release_region(base_io, 0xff);
2623 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
2624 release_region(base_io, 0x60);
2625 } else {
2626 release_region(base_io, 0x40);
2627 }
2628request_io_fail:
2629 printk("atp870u_prob:request_io_fail\n");
2630 free_irq(pdev->irq, shpnt);
2631free_tables:
2632 printk("atp870u_prob:free_table\n");
2633 atp870u_free_tables(shpnt);
2634unregister:
2635 printk("atp870u_prob:unregister\n");
2636 scsi_host_put(shpnt);
2637 return -1;
dc6a78f1
RD		 2638err_eio:
2639 kfree(atpdev);
2640 return -EIO;
2641err_nomem:
2642 kfree(atpdev);
2643 return -ENOMEM;
1da177e4
LT		 2644}
2645
2646/* The abort command does not leave the device in a clean state where
2647 it is available to be used again. Until this gets worked out, we will
2648 leave it commented out. */
2649
2650static int atp870u_abort(struct scsi_cmnd * SCpnt)
2651{
2652 unsigned char j, k, c;
2653 struct scsi_cmnd *workrequ;
1da177e4
LT		 2654 struct atp_unit *dev;
2655 struct Scsi_Host *host;
2656 host = SCpnt->device->host;
2657
2658 dev = (struct atp_unit *)&host->hostdata;
422c0d61 2659 c = scmd_channel(SCpnt);
1da177e4
LT		 2660 printk(" atp870u: abort Channel = %x \n", c);
2661 printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
2662 printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1da177e4 2663 for (j = 0; j < 0x18; j++) {
2eabdf22 2664 printk(" r%2x=%2x", j, inb(dev->ioport[c] + j));
1da177e4 2665 }
2eabdf22
OZ		 2666 printk(" r1c=%2x", inb(dev->ioport[c] + 0x1c));
2667 printk(" r1f=%2x in_snd=%2x ", inb(dev->ioport[c] + 0x1f), dev->in_snd[c]);
2668 printk(" d00=%2x", inb(dev->pciport[c]));
2669 printk(" d02=%2x", inb(dev->pciport[c] + 0x02));
1da177e4
LT		 2670 for(j=0;j<16;j++) {
2671 if (dev->id[c][j].curr_req != NULL) {
2672 workrequ = dev->id[c][j].curr_req;
2673 printk("\n que cdb= ");
2674 for (k=0; k < workrequ->cmd_len; k++) {
2675 printk(" %2x ",workrequ->cmnd[k]);
2676 }
2677 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
2678 }
2679 }
2680 return SUCCESS;
2681}
2682
2683static const char *atp870u_info(struct Scsi_Host *notused)
2684{
2685 static char buffer[128];
2686
2687 strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
2688
2689 return buffer;
2690}
2691
d773e422 2692static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1da177e4 2693{
3d30079c
RV		 2694 seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
2695 "Adapter Configuration:\n");
d773e422
AV		 2696 seq_printf(m, " Base IO: %#.4lx\n", HBAptr->io_port);
2697 seq_printf(m, " IRQ: %d\n", HBAptr->irq);
2698 return 0;
1da177e4
LT		 2699}
2700
2701
2702static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
2703 sector_t capacity, int *ip)
2704{
2705 int heads, sectors, cylinders;
2706
2707 heads = 64;
2708 sectors = 32;
2709 cylinders = (unsigned long)capacity / (heads * sectors);
2710 if (cylinders > 1024) {
2711 heads = 255;
2712 sectors = 63;
2713 cylinders = (unsigned long)capacity / (heads * sectors);
2714 }
2715 ip[0] = heads;
2716 ip[1] = sectors;
2717 ip[2] = cylinders;
2718
2719 return 0;
2720}
2721
2722static void atp870u_remove (struct pci_dev *pdev)
2723{
2724 struct atp_unit *devext = pci_get_drvdata(pdev);
2725 struct Scsi_Host *pshost = devext->host;
2726
2727
2728 scsi_remove_host(pshost);
2729 printk(KERN_INFO "free_irq : %d\n",pshost->irq);
2730 free_irq(pshost->irq, pshost);
2731 release_region(pshost->io_port, pshost->n_io_port);
2732 printk(KERN_INFO "atp870u_free_tables : %p\n",pshost);
2733 atp870u_free_tables(pshost);
2734 printk(KERN_INFO "scsi_host_put : %p\n",pshost);
2735 scsi_host_put(pshost);
1da177e4
LT		 2736}
2737MODULE_LICENSE("GPL");
2738
2739static struct scsi_host_template atp870u_template = {
2740 .module = THIS_MODULE,
2741 .name = "atp870u" /* name */,
2742 .proc_name = "atp870u",
d773e422 2743 .show_info = atp870u_show_info,
1da177e4
LT		 2744 .info = atp870u_info /* info */,
2745 .queuecommand = atp870u_queuecommand /* queuecommand */,
2746 .eh_abort_handler = atp870u_abort /* abort */,
2747 .bios_param = atp870u_biosparam /* biosparm */,
2748 .can_queue = qcnt /* can_queue */,
2749 .this_id = 7 /* SCSI ID */,
2750 .sg_tablesize = ATP870U_SCATTER /*SG_ALL*/ /*SG_NONE*/,
1da177e4
LT		 2751 .use_clustering = ENABLE_CLUSTERING,
2752 .max_sectors = ATP870U_MAX_SECTORS,
2753};
2754
2755static struct pci_device_id atp870u_id_table[] = {
2756 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID) },
2757 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1) },
2758 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2) },
2759 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610) },
2760 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW) },
2761 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U) },
2762 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S) },
2763 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D) },
2764 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
2765 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060) },
2766 { 0, },
2767};
2768
2769MODULE_DEVICE_TABLE(pci, atp870u_id_table);
2770
2771static struct pci_driver atp870u_driver = {
2772 .id_table = atp870u_id_table,
2773 .name = "atp870u",
2774 .probe = atp870u_probe,
6f039790 2775 .remove = atp870u_remove,
1da177e4
LT		 2776};
2777
2778static int __init atp870u_init(void)
2779{
2780#ifdef ED_DBGP
2781 printk("atp870u_init: Entry\n");
2782#endif
2783 return pci_register_driver(&atp870u_driver);
2784}
2785
2786static void __exit atp870u_exit(void)
2787{
2788#ifdef ED_DBGP
2789 printk("atp870u_exit: Entry\n");
2790#endif
2791 pci_unregister_driver(&atp870u_driver);
2792}
2793
2794static void tscam_885(void)
2795{
2796 unsigned char i;
2797
2798 for (i = 0; i < 0x2; i++) {
2799 mdelay(300);
2800 }
2801 return;
2802}
2803
2804
2805
2806static void is885(struct atp_unit *dev, unsigned int wkport,unsigned char c)
2807{
1da177e4
LT		 2808 unsigned char i, j, k, rmb, n, lvdmode;
2809 unsigned short int m;
2810 static unsigned char mbuf[512];
2811 static unsigned char satn[9] = {0, 0, 0, 0, 0, 0, 0, 6, 6};
2812 static unsigned char inqd[9] = {0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6};
2813 static unsigned char synn[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2814 unsigned char synu[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2815 static unsigned char synw[6] = {0x80, 1, 3, 1, 0x19, 0x0e};
2816 unsigned char synuw[6] = {0x80, 1, 3, 1, 0x0a, 0x0e};
2817 static unsigned char wide[6] = {0x80, 1, 2, 3, 1, 0};
2818 static unsigned char u3[9] = { 0x80,1,6,4,0x09,00,0x0e,0x01,0x02 };
2819
2820 lvdmode=inb(wkport + 0x1b) >> 7;
2821
2822 for (i = 0; i < 16; i++) {
2823 m = 1;
2824 m = m << i;
2825 if ((m & dev->active_id[c]) != 0) {
2826 continue;
2827 }
2828 if (i == dev->host_id[c]) {
2829 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
2830 continue;
2831 }
e2c22b45
OZ		 2832 outb(0x01, wkport + 0x1b);
2833 outb(0x08, wkport + 0x01);
2834 outb(0x7f, wkport + 0x02);
2835 outb(satn[0], wkport + 0x03);
2836 outb(satn[1], wkport + 0x04);
2837 outb(satn[2], wkport + 0x05);
2838 outb(satn[3], wkport + 0x06);
2839 outb(satn[4], wkport + 0x07);
2840 outb(satn[5], wkport + 0x08);
2841 outb(0, wkport + 0x0f);
2842 outb(dev->id[c][i].devsp, wkport + 0x11);
1da177e4 2843
e2c22b45
OZ		 2844 outb(0, wkport + 0x12);
2845 outb(satn[6], wkport + 0x13);
2846 outb(satn[7], wkport + 0x14);
1da177e4
LT		 2847 j = i;
2848 if ((j & 0x08) != 0) {
2849 j = (j & 0x07) | 0x40;
2850 }
e2c22b45
OZ		 2851 outb(j, wkport + 0x15);
2852 outb(satn[8], wkport + 0x18);
1da177e4 2853
e2c22b45 2854 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2855 cpu_relax();
e2c22b45 2856 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2857 continue;
2858 }
e2c22b45 2859 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2860 cpu_relax();
2861 dev->active_id[c] |= m;
2862
e2c22b45
OZ		 2863 outb(0x30, wkport + 0x10);
2864 outb(0x00, wkport + 0x14);
1da177e4
LT		 2865
2866phase_cmd:
e2c22b45
OZ		 2867 outb(0x08, wkport + 0x18);
2868 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2869 cpu_relax();
e2c22b45 2870 j = inb(wkport + 0x17);
1da177e4 2871 if (j != 0x16) {
e2c22b45 2872 outb(0x41, wkport + 0x10);
1da177e4
LT		 2873 goto phase_cmd;
2874 }
2875sel_ok:
e2c22b45
OZ		 2876 outb(inqd[0], wkport + 0x03);
2877 outb(inqd[1], wkport + 0x04);
2878 outb(inqd[2], wkport + 0x05);
2879 outb(inqd[3], wkport + 0x06);
2880 outb(inqd[4], wkport + 0x07);
2881 outb(inqd[5], wkport + 0x08);
2882 outb(0, wkport + 0x0f);
2883 outb(dev->id[c][i].devsp, wkport + 0x11);
2884 outb(0, wkport + 0x12);
2885 outb(inqd[6], wkport + 0x13);
2886 outb(inqd[7], wkport + 0x14);
2887 outb(inqd[8], wkport + 0x18);
2888 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2889 cpu_relax();
e2c22b45 2890 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2891 continue;
2892 }
e2c22b45 2893 while (inb(wkport + 0x17) != 0x8e)
1da177e4 2894 cpu_relax();
e2c22b45
OZ		 2895 outb(0x00, wkport + 0x1b);
2896 outb(0x08, wkport + 0x18);
1da177e4
LT		 2897 j = 0;
2898rd_inq_data:
e2c22b45 2899 k = inb(wkport + 0x1f);
1da177e4 2900 if ((k & 0x01) != 0) {
e2c22b45 2901 mbuf[j++] = inb(wkport + 0x19);
1da177e4
LT		 2902 goto rd_inq_data;
2903 }
2904 if ((k & 0x80) == 0) {
2905 goto rd_inq_data;
2906 }
e2c22b45 2907 j = inb(wkport + 0x17);
1da177e4
LT		 2908 if (j == 0x16) {
2909 goto inq_ok;
2910 }
e2c22b45
OZ		 2911 outb(0x46, wkport + 0x10);
2912 outb(0, wkport + 0x12);
2913 outb(0, wkport + 0x13);
2914 outb(0, wkport + 0x14);
2915 outb(0x08, wkport + 0x18);
2916 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2917 cpu_relax();
e2c22b45 2918 if (inb(wkport + 0x17) != 0x16) {
1da177e4
LT		 2919 goto sel_ok;
2920 }
2921inq_ok:
2922 mbuf[36] = 0;
2923 printk( KERN_INFO" ID: %2d %s\n", i, &mbuf[8]);
2924 dev->id[c][i].devtype = mbuf[0];
2925 rmb = mbuf[1];
2926 n = mbuf[7];
2927 if ((mbuf[7] & 0x60) == 0) {
2928 goto not_wide;
2929 }
2930 if ((i < 8) && ((dev->global_map[c] & 0x20) == 0)) {
2931 goto not_wide;
2932 }
2933 if (lvdmode == 0) {
2934 goto chg_wide;
2935 }
2936 if (dev->sp[c][i] != 0x04) { // force u2
2937 goto chg_wide;
2938 }
2939
e2c22b45
OZ		 2940 outb(0x01, wkport + 0x1b);
2941 outb(satn[0], wkport + 0x03);
2942 outb(satn[1], wkport + 0x04);
2943 outb(satn[2], wkport + 0x05);
2944 outb(satn[3], wkport + 0x06);
2945 outb(satn[4], wkport + 0x07);
2946 outb(satn[5], wkport + 0x08);
2947 outb(0, wkport + 0x0f);
2948 outb(dev->id[c][i].devsp, wkport + 0x11);
2949 outb(0, wkport + 0x12);
2950 outb(satn[6], wkport + 0x13);
2951 outb(satn[7], wkport + 0x14);
2952 outb(satn[8], wkport + 0x18);
2953
2954 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 2955 cpu_relax();
e2c22b45 2956 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 2957 continue;
2958 }
e2c22b45 2959 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 2960 cpu_relax();
2961try_u3:
2962 j = 0;
e2c22b45
OZ		 2963 outb(0x09, wkport + 0x14);
2964 outb(0x20, wkport + 0x18);
2965
2966 while ((inb(wkport + 0x1f) & 0x80) == 0) {
2967 if ((inb(wkport + 0x1f) & 0x01) != 0)
2968 outb(u3[j++], wkport + 0x19);
1da177e4
LT		 2969 cpu_relax();
2970 }
e2c22b45 2971 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 2972 cpu_relax();
e2c22b45 2973 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 2974 if (j == 0x0f) {
2975 goto u3p_in;
2976 }
2977 if (j == 0x0a) {
2978 goto u3p_cmd;
2979 }
2980 if (j == 0x0e) {
2981 goto try_u3;
2982 }
2983 continue;
2984u3p_out:
e2c22b45
OZ		 2985 outb(0x20, wkport + 0x18);
2986 while ((inb(wkport + 0x1f) & 0x80) == 0) {
2987 if ((inb(wkport + 0x1f) & 0x01) != 0)
2988 outb(0, wkport + 0x19);
1da177e4
LT		 2989 cpu_relax();
2990 }
e2c22b45 2991 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 2992 if (j == 0x0f) {
2993 goto u3p_in;
2994 }
2995 if (j == 0x0a) {
2996 goto u3p_cmd;
2997 }
2998 if (j == 0x0e) {
2999 goto u3p_out;
3000 }
3001 continue;
3002u3p_in:
e2c22b45
OZ		 3003 outb(0x09, wkport + 0x14);
3004 outb(0x20, wkport + 0x18);
1da177e4
LT		 3005 k = 0;
3006u3p_in1:
e2c22b45 3007 j = inb(wkport + 0x1f);
1da177e4 3008 if ((j & 0x01) != 0) {
e2c22b45 3009 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3010 goto u3p_in1;
3011 }
3012 if ((j & 0x80) == 0x00) {
3013 goto u3p_in1;
3014 }
e2c22b45 3015 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3016 if (j == 0x0f) {
3017 goto u3p_in;
3018 }
3019 if (j == 0x0a) {
3020 goto u3p_cmd;
3021 }
3022 if (j == 0x0e) {
3023 goto u3p_out;
3024 }
3025 continue;
3026u3p_cmd:
e2c22b45
OZ		 3027 outb(0x30, wkport + 0x10);
3028 outb(0x00, wkport + 0x14);
3029 outb(0x08, wkport + 0x18);
3030 while ((inb(wkport + 0x1f) & 0x80) == 0x00);
3031 j = inb(wkport + 0x17);
1da177e4
LT		 3032 if (j != 0x16) {
3033 if (j == 0x4e) {
3034 goto u3p_out;
3035 }
3036 continue;
3037 }
3038 if (mbuf[0] != 0x01) {
3039 goto chg_wide;
3040 }
3041 if (mbuf[1] != 0x06) {
3042 goto chg_wide;
3043 }
3044 if (mbuf[2] != 0x04) {
3045 goto chg_wide;
3046 }
3047 if (mbuf[3] == 0x09) {
3048 m = 1;
3049 m = m << i;
3050 dev->wide_id[c] |= m;
3051 dev->id[c][i].devsp = 0xce;
3052#ifdef ED_DBGP
3053 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3054#endif
3055 continue;
3056 }
3057chg_wide:
e2c22b45
OZ		 3058 outb(0x01, wkport + 0x1b);
3059 outb(satn[0], wkport + 0x03);
3060 outb(satn[1], wkport + 0x04);
3061 outb(satn[2], wkport + 0x05);
3062 outb(satn[3], wkport + 0x06);
3063 outb(satn[4], wkport + 0x07);
3064 outb(satn[5], wkport + 0x08);
3065 outb(0, wkport + 0x0f);
3066 outb(dev->id[c][i].devsp, wkport + 0x11);
3067 outb(0, wkport + 0x12);
3068 outb(satn[6], wkport + 0x13);
3069 outb(satn[7], wkport + 0x14);
3070 outb(satn[8], wkport + 0x18);
3071
3072 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3073 cpu_relax();
e2c22b45 3074 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3075 continue;
3076 }
e2c22b45 3077 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3078 cpu_relax();
3079try_wide:
3080 j = 0;
e2c22b45
OZ		 3081 outb(0x05, wkport + 0x14);
3082 outb(0x20, wkport + 0x18);
3083
3084 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3085 if ((inb(wkport + 0x1f) & 0x01) != 0)
3086 outb(wide[j++], wkport + 0x19);
1da177e4
LT		 3087 cpu_relax();
3088 }
e2c22b45 3089 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3090 cpu_relax();
e2c22b45 3091 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3092 if (j == 0x0f) {
3093 goto widep_in;
3094 }
3095 if (j == 0x0a) {
3096 goto widep_cmd;
3097 }
3098 if (j == 0x0e) {
3099 goto try_wide;
3100 }
3101 continue;
3102widep_out:
e2c22b45
OZ		 3103 outb(0x20, wkport + 0x18);
3104 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3105 if ((inb(wkport + 0x1f) & 0x01) != 0)
3106 outb(0, wkport + 0x19);
1da177e4
LT		 3107 cpu_relax();
3108 }
e2c22b45 3109 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3110 if (j == 0x0f) {
3111 goto widep_in;
3112 }
3113 if (j == 0x0a) {
3114 goto widep_cmd;
3115 }
3116 if (j == 0x0e) {
3117 goto widep_out;
3118 }
3119 continue;
3120widep_in:
e2c22b45
OZ		 3121 outb(0xff, wkport + 0x14);
3122 outb(0x20, wkport + 0x18);
1da177e4
LT		 3123 k = 0;
3124widep_in1:
e2c22b45 3125 j = inb(wkport + 0x1f);
1da177e4 3126 if ((j & 0x01) != 0) {
e2c22b45 3127 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3128 goto widep_in1;
3129 }
3130 if ((j & 0x80) == 0x00) {
3131 goto widep_in1;
3132 }
e2c22b45 3133 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3134 if (j == 0x0f) {
3135 goto widep_in;
3136 }
3137 if (j == 0x0a) {
3138 goto widep_cmd;
3139 }
3140 if (j == 0x0e) {
3141 goto widep_out;
3142 }
3143 continue;
3144widep_cmd:
e2c22b45
OZ		 3145 outb(0x30, wkport + 0x10);
3146 outb(0x00, wkport + 0x14);
3147 outb(0x08, wkport + 0x18);
3148 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3149 cpu_relax();
e2c22b45 3150 j = inb(wkport + 0x17);
1da177e4
LT		 3151 if (j != 0x16) {
3152 if (j == 0x4e) {
3153 goto widep_out;
3154 }
3155 continue;
3156 }
3157 if (mbuf[0] != 0x01) {
3158 goto not_wide;
3159 }
3160 if (mbuf[1] != 0x02) {
3161 goto not_wide;
3162 }
3163 if (mbuf[2] != 0x03) {
3164 goto not_wide;
3165 }
3166 if (mbuf[3] != 0x01) {
3167 goto not_wide;
3168 }
3169 m = 1;
3170 m = m << i;
3171 dev->wide_id[c] |= m;
3172not_wide:
3173 if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) ||
3174 ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
3175 m = 1;
3176 m = m << i;
3177 if ((dev->async[c] & m) != 0) {
3178 goto set_sync;
3179 }
3180 }
3181 continue;
3182set_sync:
3183 if (dev->sp[c][i] == 0x02) {
3184 synu[4]=0x0c;
3185 synuw[4]=0x0c;
3186 } else {
3187 if (dev->sp[c][i] >= 0x03) {
3188 synu[4]=0x0a;
3189 synuw[4]=0x0a;
3190 }
3191 }
1da177e4
LT		 3192 j = 0;
3193 if ((m & dev->wide_id[c]) != 0) {
3194 j |= 0x01;
3195 }
e2c22b45
OZ		 3196 outb(j, wkport + 0x1b);
3197 outb(satn[0], wkport + 0x03);
3198 outb(satn[1], wkport + 0x04);
3199 outb(satn[2], wkport + 0x05);
3200 outb(satn[3], wkport + 0x06);
3201 outb(satn[4], wkport + 0x07);
3202 outb(satn[5], wkport + 0x08);
3203 outb(0, wkport + 0x0f);
3204 outb(dev->id[c][i].devsp, wkport + 0x11);
3205 outb(0, wkport + 0x12);
3206 outb(satn[6], wkport + 0x13);
3207 outb(satn[7], wkport + 0x14);
3208 outb(satn[8], wkport + 0x18);
3209
3210 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3211 cpu_relax();
e2c22b45 3212 if ((inb(wkport + 0x17) != 0x11) && (inb(wkport + 0x17) != 0x8e)) {
1da177e4
LT		 3213 continue;
3214 }
e2c22b45 3215 while (inb(wkport + 0x17) != 0x8e)
1da177e4
LT		 3216 cpu_relax();
3217try_sync:
3218 j = 0;
e2c22b45
OZ		 3219 outb(0x06, wkport + 0x14);
3220 outb(0x20, wkport + 0x18);
3221
3222 while ((inb(wkport + 0x1f) & 0x80) == 0) {
3223 if ((inb(wkport + 0x1f) & 0x01) != 0) {
1da177e4
LT		 3224 if ((m & dev->wide_id[c]) != 0) {
3225 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3226 outb(synuw[j++], wkport + 0x19);
1da177e4 3227 } else {
e2c22b45 3228 outb(synw[j++], wkport + 0x19);
1da177e4
LT		 3229 }
3230 } else {
3231 if ((m & dev->ultra_map[c]) != 0) {
e2c22b45 3232 outb(synu[j++], wkport + 0x19);
1da177e4 3233 } else {
e2c22b45 3234 outb(synn[j++], wkport + 0x19);
1da177e4
LT		 3235 }
3236 }
1da177e4
LT		 3237 }
3238 }
e2c22b45 3239 while ((inb(wkport + 0x17) & 0x80) == 0x00)
1da177e4 3240 cpu_relax();
e2c22b45 3241 j = inb(wkport + 0x17) & 0x0f;
1da177e4
LT		 3242 if (j == 0x0f) {
3243 goto phase_ins;
3244 }
3245 if (j == 0x0a) {
3246 goto phase_cmds;
3247 }
3248 if (j == 0x0e) {
3249 goto try_sync;
3250 }
3251 continue;
3252phase_outs:
e2c22b45
OZ		 3253 outb(0x20, wkport + 0x18);
3254 while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
3255 if ((inb(wkport + 0x1f) & 0x01) != 0x00)
3256 outb(0x00, wkport + 0x19);
1da177e4
LT		 3257 cpu_relax();
3258 }
e2c22b45 3259 j = inb(wkport + 0x17);
1da177e4
LT		 3260 if (j == 0x85) {
3261 goto tar_dcons;
3262 }
3263 j &= 0x0f;
3264 if (j == 0x0f) {
3265 goto phase_ins;
3266 }
3267 if (j == 0x0a) {
3268 goto phase_cmds;
3269 }
3270 if (j == 0x0e) {
3271 goto phase_outs;
3272 }
3273 continue;
3274phase_ins:
e2c22b45
OZ		 3275 outb(0x06, wkport + 0x14);
3276 outb(0x20, wkport + 0x18);
1da177e4
LT		 3277 k = 0;
3278phase_ins1:
e2c22b45 3279 j = inb(wkport + 0x1f);
1da177e4 3280 if ((j & 0x01) != 0x00) {
e2c22b45 3281 mbuf[k++] = inb(wkport + 0x19);
1da177e4
LT		 3282 goto phase_ins1;
3283 }
3284 if ((j & 0x80) == 0x00) {
3285 goto phase_ins1;
3286 }
e2c22b45
OZ		 3287 while ((inb(wkport + 0x17) & 0x80) == 0x00);
3288 j = inb(wkport + 0x17);
1da177e4
LT		 3289 if (j == 0x85) {
3290 goto tar_dcons;
3291 }
3292 j &= 0x0f;
3293 if (j == 0x0f) {
3294 goto phase_ins;
3295 }
3296 if (j == 0x0a) {
3297 goto phase_cmds;
3298 }
3299 if (j == 0x0e) {
3300 goto phase_outs;
3301 }
3302 continue;
3303phase_cmds:
e2c22b45 3304 outb(0x30, wkport + 0x10);
1da177e4 3305tar_dcons:
e2c22b45
OZ		 3306 outb(0x00, wkport + 0x14);
3307 outb(0x08, wkport + 0x18);
3308 while ((inb(wkport + 0x1f) & 0x80) == 0x00)
1da177e4 3309 cpu_relax();
e2c22b45 3310 j = inb(wkport + 0x17);
1da177e4
LT		 3311 if (j != 0x16) {
3312 continue;
3313 }
3314 if (mbuf[0] != 0x01) {
3315 continue;
3316 }
3317 if (mbuf[1] != 0x03) {
3318 continue;
3319 }
3320 if (mbuf[4] == 0x00) {
3321 continue;
3322 }
3323 if (mbuf[3] > 0x64) {
3324 continue;
3325 }
3326 if (mbuf[4] > 0x0e) {
3327 mbuf[4] = 0x0e;
3328 }
3329 dev->id[c][i].devsp = mbuf[4];
3330 if (mbuf[3] < 0x0c){
3331 j = 0xb0;
3332 goto set_syn_ok;
3333 }
3334 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
3335 j = 0xa0;
3336 goto set_syn_ok;
3337 }
3338 if (mbuf[3] < 0x1a) {
3339 j = 0x20;
3340 goto set_syn_ok;
3341 }
3342 if (mbuf[3] < 0x33) {
3343 j = 0x40;
3344 goto set_syn_ok;
3345 }
3346 if (mbuf[3] < 0x4c) {
3347 j = 0x50;
3348 goto set_syn_ok;
3349 }
3350 j = 0x60;
3351 set_syn_ok:
3352 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
3353#ifdef ED_DBGP
3354 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
3355#endif
3356 }
e2c22b45 3357 outb(0x80, wkport + 0x16);
1da177e4
LT		 3358}
3359
3360module_init(atp870u_init);
3361module_exit(atp870u_exit);
3362
Linux kernel - Deliverables
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