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atp870u: Remove is870()
[deliverable/linux.git] / drivers / scsi / atp870u.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (C) 1997 Wu Ching Chen
3 * 2.1.x update (C) 1998 Krzysztof G. Baranowski
fa195afe
AC		 4 * 2.5.x update (C) 2002 Red Hat
5 * 2.6.x update (C) 2004 Red Hat
1da177e4
LT		 6 *
7 * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
8 *
9 * Wu Ching Chen : NULL pointer fixes 2000/06/02
10 * support atp876 chip
11 * enable 32 bit fifo transfer
12 * support cdrom & remove device run ultra speed
13 * fix disconnect bug 2000/12/21
14 * support atp880 chip lvd u160 2001/05/15
15 * fix prd table bug 2001/09/12 (7.1)
16 *
17 * atp885 support add by ACARD Hao Ping Lian 2005/01/05
18 */
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/string.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/proc_fs.h>
28#include <linux/spinlock.h>
29#include <linux/pci.h>
30#include <linux/blkdev.h>
910638ae 31#include <linux/dma-mapping.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT		 33#include <asm/io.h>
34
35#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_device.h>
38#include <scsi/scsi_host.h>
39
40#include "atp870u.h"
41
42static struct scsi_host_template atp870u_template;
43static void send_s870(struct atp_unit *dev,unsigned char c);
197fb8d8 44static void is885(struct atp_unit *dev, unsigned char c, bool wide_chip, unsigned char lvdmode);
1da177e4
LT		 45static void tscam_885(void);
46
6a3cebb6
OZ		 47static inline void atp_writeb_base(struct atp_unit *atp, u8 reg, u8 val)
48{
49 outb(val, atp->baseport + reg);
50}
51
52static inline void atp_writeb_io(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
53{
54 outb(val, atp->ioport[channel] + reg);
55}
56
57static inline void atp_writew_io(struct atp_unit *atp, u8 channel, u8 reg, u16 val)
58{
59 outw(val, atp->ioport[channel] + reg);
60}
61
62static inline void atp_writeb_pci(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
63{
64 outb(val, atp->pciport[channel] + reg);
65}
66
67static inline void atp_writel_pci(struct atp_unit *atp, u8 channel, u8 reg, u32 val)
68{
69 outl(val, atp->pciport[channel] + reg);
70}
71
72static inline u8 atp_readb_base(struct atp_unit *atp, u8 reg)
73{
74 return inb(atp->baseport + reg);
75}
76
77static inline u8 atp_readb_io(struct atp_unit *atp, u8 channel, u8 reg)
78{
79 return inb(atp->ioport[channel] + reg);
80}
81
82static inline u16 atp_readw_io(struct atp_unit *atp, u8 channel, u8 reg)
83{
84 return inw(atp->ioport[channel] + reg);
85}
86
87static inline u8 atp_readb_pci(struct atp_unit *atp, u8 channel, u8 reg)
88{
89 return inb(atp->pciport[channel] + reg);
90}
91
7d12e780 92static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
1da177e4
LT		 93{
94 unsigned long flags;
bc0fe4c9 95 unsigned short int id;
1da177e4
LT		 96 unsigned char i, j, c, target_id, lun,cmdp;
97 unsigned char *prd;
98 struct scsi_cmnd *workreq;
1da177e4
LT		 99 unsigned long adrcnt, k;
100#ifdef ED_DBGP
101 unsigned long l;
102#endif
1da177e4
LT		 103 struct Scsi_Host *host = dev_id;
104 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
105
106 for (c = 0; c < 2; c++) {
6a3cebb6 107 j = atp_readb_io(dev, c, 0x1f);
1da177e4 108 if ((j & 0x80) != 0)
78614ecd 109 break;
1da177e4
LT		 110 dev->in_int[c] = 0;
111 }
78614ecd
OZ		 112 if ((j & 0x80) == 0)
113 return IRQ_NONE;
1da177e4
LT		 114#ifdef ED_DBGP
115 printk("atp870u_intr_handle enter\n");
116#endif
117 dev->in_int[c] = 1;
6a3cebb6 118 cmdp = atp_readb_io(dev, c, 0x10);
1da177e4
LT		 119 if (dev->working[c] != 0) {
120 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 121 if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0)
122 atp_writeb_io(dev, c, 0x16, (atp_readb_io(dev, c, 0x16) | 0x80));
1da177e4 123 }
6a3cebb6 124 if ((atp_readb_pci(dev, c, 0x00) & 0x08) != 0)
1da177e4 125 {
1da177e4 126 for (k=0; k < 1000; k++) {
6a3cebb6 127 if ((atp_readb_pci(dev, c, 2) & 0x08) == 0)
78614ecd 128 break;
6a3cebb6 129 if ((atp_readb_pci(dev, c, 2) & 0x01) == 0)
78614ecd 130 break;
1da177e4
LT		 131 }
132 }
6a3cebb6 133 atp_writeb_pci(dev, c, 0, 0x00);
1da177e4 134
6a3cebb6 135 i = atp_readb_io(dev, c, 0x17);
1da177e4 136
bc0fe4c9 137 if (dev->dev_id == ATP885_DEVID)
6a3cebb6 138 atp_writeb_pci(dev, c, 2, 0x06);
1da177e4 139
6a3cebb6 140 target_id = atp_readb_io(dev, c, 0x15);
1da177e4
LT		 141
142 /*
143 * Remap wide devices onto id numbers
144 */
145
146 if ((target_id & 0x40) != 0) {
147 target_id = (target_id & 0x07) | 0x08;
148 } else {
149 target_id &= 0x07;
150 }
151
152 if ((j & 0x40) != 0) {
153 if (dev->last_cmd[c] == 0xff) {
154 dev->last_cmd[c] = target_id;
155 }
156 dev->last_cmd[c] |= 0x40;
157 }
158 if (dev->dev_id == ATP885_DEVID)
159 dev->r1f[c][target_id] |= j;
160#ifdef ED_DBGP
161 printk("atp870u_intr_handle status = %x\n",i);
162#endif
163 if (i == 0x85) {
164 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
165 dev->last_cmd[c] = 0xff;
166 }
167 if (dev->dev_id == ATP885_DEVID) {
1da177e4 168 adrcnt = 0;
6a3cebb6
OZ		 169 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
170 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
171 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 172 if (dev->id[c][target_id].last_len != adrcnt)
173 {
174 k = dev->id[c][target_id].last_len;
175 k -= adrcnt;
176 dev->id[c][target_id].tran_len = k;
177 dev->id[c][target_id].last_len = adrcnt;
178 }
179#ifdef ED_DBGP
3a38e53e 180 printk("dev->id[c][target_id].last_len = %d dev->id[c][target_id].tran_len = %d\n",dev->id[c][target_id].last_len,dev->id[c][target_id].tran_len);
1da177e4
LT		 181#endif
182 }
183
184 /*
185 * Flip wide
186 */
187 if (dev->wide_id[c] != 0) {
6a3cebb6
OZ		 188 atp_writeb_io(dev, c, 0x1b, 0x01);
189 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
190 atp_writeb_io(dev, c, 0x1b, 0x01);
1da177e4
LT		 191 }
192 /*
193 * Issue more commands
194 */
195 spin_lock_irqsave(dev->host->host_lock, flags);
196 if (((dev->quhd[c] != dev->quend[c]) || (dev->last_cmd[c] != 0xff)) &&
197 (dev->in_snd[c] == 0)) {
198#ifdef ED_DBGP
199 printk("Call sent_s870\n");
200#endif
201 send_s870(dev,c);
202 }
203 spin_unlock_irqrestore(dev->host->host_lock, flags);
204 /*
205 * Done
206 */
207 dev->in_int[c] = 0;
208#ifdef ED_DBGP
209 printk("Status 0x85 return\n");
210#endif
78614ecd 211 return IRQ_HANDLED;
1da177e4
LT		 212 }
213
214 if (i == 0x40) {
215 dev->last_cmd[c] |= 0x40;
216 dev->in_int[c] = 0;
78614ecd 217 return IRQ_HANDLED;
1da177e4
LT		 218 }
219
220 if (i == 0x21) {
221 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
222 dev->last_cmd[c] = 0xff;
223 }
1da177e4 224 adrcnt = 0;
6a3cebb6
OZ		 225 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
226 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
227 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 228 k = dev->id[c][target_id].last_len;
229 k -= adrcnt;
230 dev->id[c][target_id].tran_len = k;
231 dev->id[c][target_id].last_len = adrcnt;
6a3cebb6
OZ		 232 atp_writeb_io(dev, c, 0x10, 0x41);
233 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 234 dev->in_int[c] = 0;
78614ecd 235 return IRQ_HANDLED;
1da177e4
LT		 236 }
237
238 if (dev->dev_id == ATP885_DEVID) {
239 if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
240 if ((i == 0x4c) || (i == 0x8c))
241 i=0x48;
242 else
243 i=0x49;
244 }
245
246 }
247 if ((i == 0x80) || (i == 0x8f)) {
248#ifdef ED_DBGP
249 printk(KERN_DEBUG "Device reselect\n");
250#endif
251 lun = 0;
6a3cebb6
OZ		 252 if (cmdp == 0x44 || i == 0x80)
253 lun = atp_readb_io(dev, c, 0x1d) & 0x07;
254 else {
1da177e4
LT		 255 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
256 dev->last_cmd[c] = 0xff;
257 }
258 if (cmdp == 0x41) {
259#ifdef ED_DBGP
260 printk("cmdp = 0x41\n");
261#endif
1da177e4 262 adrcnt = 0;
6a3cebb6
OZ		 263 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
264 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
265 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 266 k = dev->id[c][target_id].last_len;
267 k -= adrcnt;
268 dev->id[c][target_id].tran_len = k;
269 dev->id[c][target_id].last_len = adrcnt;
6a3cebb6 270 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 271 dev->in_int[c] = 0;
78614ecd 272 return IRQ_HANDLED;
1da177e4
LT		 273 } else {
274#ifdef ED_DBGP
275 printk("cmdp != 0x41\n");
276#endif
6a3cebb6 277 atp_writeb_io(dev, c, 0x10, 0x46);
1da177e4 278 dev->id[c][target_id].dirct = 0x00;
6a3cebb6
OZ		 279 atp_writeb_io(dev, c, 0x12, 0x00);
280 atp_writeb_io(dev, c, 0x13, 0x00);
281 atp_writeb_io(dev, c, 0x14, 0x00);
282 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 283 dev->in_int[c] = 0;
78614ecd 284 return IRQ_HANDLED;
1da177e4
LT		 285 }
286 }
287 if (dev->last_cmd[c] != 0xff) {
288 dev->last_cmd[c] |= 0x40;
289 }
290 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 291 j = atp_readb_base(dev, 0x29) & 0xfe;
292 atp_writeb_base(dev, 0x29, j);
3a38e53e 293 } else
6a3cebb6 294 atp_writeb_io(dev, c, 0x10, 0x45);
3a38e53e 295
6a3cebb6 296 target_id = atp_readb_io(dev, c, 0x16);
1da177e4
LT		 297 /*
298 * Remap wide identifiers
299 */
300 if ((target_id & 0x10) != 0) {
301 target_id = (target_id & 0x07) | 0x08;
302 } else {
303 target_id &= 0x07;
304 }
3a38e53e 305 if (dev->dev_id == ATP885_DEVID)
6a3cebb6 306 atp_writeb_io(dev, c, 0x10, 0x45);
1da177e4
LT		 307 workreq = dev->id[c][target_id].curr_req;
308#ifdef ED_DBGP
017560fc
JG		 309 scmd_printk(KERN_DEBUG, workreq, "CDB");
310 for (l = 0; l < workreq->cmd_len; l++)
1da177e4 311 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
017560fc 312 printk("\n");
1da177e4
LT		 313#endif
314
6a3cebb6
OZ		 315 atp_writeb_io(dev, c, 0x0f, lun);
316 atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
1da177e4
LT		 317 adrcnt = dev->id[c][target_id].tran_len;
318 k = dev->id[c][target_id].last_len;
319
6a3cebb6
OZ		 320 atp_writeb_io(dev, c, 0x12, ((unsigned char *) &k)[2]);
321 atp_writeb_io(dev, c, 0x13, ((unsigned char *) &k)[1]);
322 atp_writeb_io(dev, c, 0x14, ((unsigned char *) &k)[0]);
1da177e4 323#ifdef ED_DBGP
6a3cebb6 324 printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k, atp_readb_io(dev, c, 0x14), atp_readb_io(dev, c, 0x13), atp_readb_io(dev, c, 0x12));
1da177e4
LT		 325#endif
326 /* Remap wide */
327 j = target_id;
328 if (target_id > 7) {
329 j = (j & 0x07) | 0x40;
330 }
331 /* Add direction */
332 j |= dev->id[c][target_id].dirct;
6a3cebb6
OZ		 333 atp_writeb_io(dev, c, 0x15, j);
334 atp_writeb_io(dev, c, 0x16, 0x80);
1da177e4
LT		 335
336 /* enable 32 bit fifo transfer */
337 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6 338 i = atp_readb_pci(dev, c, 1) & 0xf3;
1da177e4
LT		 339 //j=workreq->cmnd[0];
340 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
341 i |= 0x0c;
342 }
6a3cebb6 343 atp_writeb_pci(dev, c, 1, i);
1da177e4
LT		 344 } else if ((dev->dev_id == ATP880_DEVID1) ||
345 (dev->dev_id == ATP880_DEVID2) ) {
6a3cebb6
OZ		 346 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
347 atp_writeb_base(dev, 0x3b, (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
348 else
349 atp_writeb_base(dev, 0x3b, atp_readb_base(dev, 0x3b) & 0x3f);
1da177e4 350 } else {
6a3cebb6
OZ		 351 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
352 atp_writeb_io(dev, c, 0x3a, (atp_readb_io(dev, c, 0x3a) & 0xf3) | 0x08);
353 else
354 atp_writeb_io(dev, c, 0x3a, atp_readb_io(dev, c, 0x3a) & 0xf3);
1da177e4 355 }
1da177e4
LT		 356 j = 0;
357 id = 1;
358 id = id << target_id;
359 /*
360 * Is this a wide device
361 */
362 if ((id & dev->wide_id[c]) != 0) {
363 j |= 0x01;
364 }
6a3cebb6
OZ		 365 atp_writeb_io(dev, c, 0x1b, j);
366 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j)
367 atp_writeb_io(dev, c, 0x1b, j);
1da177e4 368 if (dev->id[c][target_id].last_len == 0) {
6a3cebb6 369 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4
LT		 370 dev->in_int[c] = 0;
371#ifdef ED_DBGP
372 printk("dev->id[c][target_id].last_len = 0\n");
373#endif
78614ecd 374 return IRQ_HANDLED;
1da177e4
LT		 375 }
376#ifdef ED_DBGP
377 printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
378#endif
379 prd = dev->id[c][target_id].prd_pos;
380 while (adrcnt != 0) {
381 id = ((unsigned short int *)prd)[2];
382 if (id == 0) {
383 k = 0x10000;
384 } else {
385 k = id;
386 }
387 if (k > adrcnt) {
388 ((unsigned short int *)prd)[2] = (unsigned short int)
389 (k - adrcnt);
390 ((unsigned long *)prd)[0] += adrcnt;
391 adrcnt = 0;
392 dev->id[c][target_id].prd_pos = prd;
393 } else {
394 adrcnt -= k;
395 dev->id[c][target_id].prdaddr += 0x08;
396 prd += 0x08;
397 if (adrcnt == 0) {
398 dev->id[c][target_id].prd_pos = prd;
399 }
400 }
401 }
6a3cebb6 402 atp_writel_pci(dev, c, 0x04, dev->id[c][target_id].prdaddr);
1da177e4
LT		 403#ifdef ED_DBGP
404 printk("dev->id[%d][%d].prdaddr 0x%8x\n", c, target_id, dev->id[c][target_id].prdaddr);
405#endif
bc0fe4c9 406 if (dev->dev_id != ATP885_DEVID) {
6a3cebb6
OZ		 407 atp_writeb_pci(dev, c, 2, 0x06);
408 atp_writeb_pci(dev, c, 2, 0x00);
1da177e4 409 }
1da177e4
LT		 410 /*
411 * Check transfer direction
412 */
413 if (dev->id[c][target_id].dirct != 0) {
6a3cebb6
OZ		 414 atp_writeb_io(dev, c, 0x18, 0x08);
415 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4
LT		 416 dev->in_int[c] = 0;
417#ifdef ED_DBGP
418 printk("status 0x80 return dirct != 0\n");
419#endif
78614ecd 420 return IRQ_HANDLED;
1da177e4 421 }
6a3cebb6
OZ		 422 atp_writeb_io(dev, c, 0x18, 0x08);
423 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4
LT		 424 dev->in_int[c] = 0;
425#ifdef ED_DBGP
426 printk("status 0x80 return dirct = 0\n");
427#endif
78614ecd 428 return IRQ_HANDLED;
1da177e4
LT		 429 }
430
431 /*
432 * Current scsi request on this target
433 */
434
435 workreq = dev->id[c][target_id].curr_req;
436
78614ecd 437 if (i == 0x42 || i == 0x16) {
1da177e4
LT		 438 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
439 dev->last_cmd[c] = 0xff;
440 }
78614ecd 441 if (i == 0x16) {
6a3cebb6 442 workreq->result = atp_readb_io(dev, c, 0x0f);
78614ecd
OZ		 443 if (((dev->r1f[c][target_id] & 0x10) != 0)&&(dev->dev_id==ATP885_DEVID)) {
444 printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
445 workreq->result = 0x02;
446 }
447 } else
448 workreq->result = 0x02;
449
1da177e4 450 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 451 j = atp_readb_base(dev, 0x29) | 0x01;
452 atp_writeb_base(dev, 0x29, j);
1da177e4
LT		 453 }
454 /*
455 * Complete the command
456 */
fe7ed98f
BH		 457 scsi_dma_unmap(workreq);
458
1da177e4
LT		 459 spin_lock_irqsave(dev->host->host_lock, flags);
460 (*workreq->scsi_done) (workreq);
461#ifdef ED_DBGP
462 printk("workreq->scsi_done\n");
463#endif
464 /*
465 * Clear it off the queue
466 */
467 dev->id[c][target_id].curr_req = NULL;
468 dev->working[c]--;
469 spin_unlock_irqrestore(dev->host->host_lock, flags);
470 /*
471 * Take it back wide
472 */
473 if (dev->wide_id[c] != 0) {
6a3cebb6
OZ		 474 atp_writeb_io(dev, c, 0x1b, 0x01);
475 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
476 atp_writeb_io(dev, c, 0x1b, 0x01);
1da177e4
LT		 477 }
478 /*
479 * If there is stuff to send and nothing going then send it
480 */
481 spin_lock_irqsave(dev->host->host_lock, flags);
482 if (((dev->last_cmd[c] != 0xff) || (dev->quhd[c] != dev->quend[c])) &&
483 (dev->in_snd[c] == 0)) {
484#ifdef ED_DBGP
485 printk("Call sent_s870(scsi_done)\n");
486#endif
487 send_s870(dev,c);
488 }
489 spin_unlock_irqrestore(dev->host->host_lock, flags);
490 dev->in_int[c] = 0;
78614ecd 491 return IRQ_HANDLED;
1da177e4
LT		 492 }
493 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
494 dev->last_cmd[c] = 0xff;
495 }
496 if (i == 0x4f) {
497 i = 0x89;
498 }
499 i &= 0x0f;
500 if (i == 0x09) {
6a3cebb6
OZ		 501 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
502 atp_writeb_pci(dev, c, 2, 0x06);
503 atp_writeb_pci(dev, c, 2, 0x00);
504 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4 505 if (dev->dev_id == ATP885_DEVID) {
1da177e4 506 k = dev->id[c][target_id].last_len;
6a3cebb6
OZ		 507 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&k))[2]);
508 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&k))[1]);
509 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&k))[0]);
1da177e4 510 dev->id[c][target_id].dirct = 0x00;
1da177e4
LT		 511 } else {
512 dev->id[c][target_id].dirct = 0x00;
1da177e4 513 }
6a3cebb6
OZ		 514 atp_writeb_io(dev, c, 0x18, 0x08);
515 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4 516 dev->in_int[c] = 0;
78614ecd 517 return IRQ_HANDLED;
1da177e4
LT		 518 }
519 if (i == 0x08) {
6a3cebb6
OZ		 520 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
521 atp_writeb_pci(dev, c, 2, 0x06);
522 atp_writeb_pci(dev, c, 2, 0x00);
523 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4 524 if (dev->dev_id == ATP885_DEVID) {
1da177e4 525 k = dev->id[c][target_id].last_len;
6a3cebb6
OZ		 526 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&k))[2]);
527 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&k))[1]);
528 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&k))[0]);
1da177e4 529 }
6a3cebb6 530 atp_writeb_io(dev, c, 0x15, atp_readb_io(dev, c, 0x15) | 0x20);
1da177e4 531 dev->id[c][target_id].dirct = 0x20;
6a3cebb6
OZ		 532 atp_writeb_io(dev, c, 0x18, 0x08);
533 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4 534 dev->in_int[c] = 0;
78614ecd 535 return IRQ_HANDLED;
1da177e4 536 }
6a3cebb6
OZ		 537 if (i == 0x0a)
538 atp_writeb_io(dev, c, 0x10, 0x30);
539 else
540 atp_writeb_io(dev, c, 0x10, 0x46);
1da177e4 541 dev->id[c][target_id].dirct = 0x00;
6a3cebb6
OZ		 542 atp_writeb_io(dev, c, 0x12, 0x00);
543 atp_writeb_io(dev, c, 0x13, 0x00);
544 atp_writeb_io(dev, c, 0x14, 0x00);
545 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 546 }
78614ecd
OZ		 547 dev->in_int[c] = 0;
548
1da177e4
LT		 549 return IRQ_HANDLED;
550}
551/**
552 * atp870u_queuecommand - Queue SCSI command
553 * @req_p: request block
554 * @done: completion function
555 *
556 * Queue a command to the ATP queue. Called with the host lock held.
557 */
f281233d 558static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
1da177e4
LT		 559 void (*done) (struct scsi_cmnd *))
560{
561 unsigned char c;
3b836464 562 unsigned int m;
1da177e4
LT		 563 struct atp_unit *dev;
564 struct Scsi_Host *host;
565
422c0d61 566 c = scmd_channel(req_p);
1da177e4 567 req_p->sense_buffer[0]=0;
fe7ed98f 568 scsi_set_resid(req_p, 0);
422c0d61 569 if (scmd_channel(req_p) > 1) {
1da177e4
LT		 570 req_p->result = 0x00040000;
571 done(req_p);
572#ifdef ED_DBGP
573 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
574#endif
575 return 0;
576 }
577
578 host = req_p->device->host;
579 dev = (struct atp_unit *)&host->hostdata;
580
581
582
583 m = 1;
422c0d61 584 m = m << scmd_id(req_p);
1da177e4
LT		 585
586 /*
587 * Fake a timeout for missing targets
588 */
589
590 if ((m & dev->active_id[c]) == 0) {
591 req_p->result = 0x00040000;
592 done(req_p);
593 return 0;
594 }
595
596 if (done) {
597 req_p->scsi_done = done;
598 } else {
599#ifdef ED_DBGP
600 printk( "atp870u_queuecommand: done can't be NULL\n");
601#endif
602 req_p->result = 0;
603 done(req_p);
604 return 0;
605 }
606
607 /*
608 * Count new command
609 */
610 dev->quend[c]++;
611 if (dev->quend[c] >= qcnt) {
612 dev->quend[c] = 0;
613 }
614
615 /*
616 * Check queue state
617 */
618 if (dev->quhd[c] == dev->quend[c]) {
619 if (dev->quend[c] == 0) {
620 dev->quend[c] = qcnt;
621 }
622#ifdef ED_DBGP
623 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
624#endif
625 dev->quend[c]--;
626 req_p->result = 0x00020000;
627 done(req_p);
628 return 0;
629 }
630 dev->quereq[c][dev->quend[c]] = req_p;
1da177e4 631#ifdef ED_DBGP
6a3cebb6 632 printk("dev->ioport[c] = %x atp_readb_io(dev, c, 0x1c) = %x dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",dev->ioport[c],atp_readb_io(dev, c, 0x1c),c,dev->in_int[c],c,dev->in_snd[c]);
1da177e4 633#endif
6a3cebb6 634 if ((atp_readb_io(dev, c, 0x1c) == 0) && (dev->in_int[c] == 0) && (dev->in_snd[c] == 0)) {
1da177e4
LT		 635#ifdef ED_DBGP
636 printk("Call sent_s870(atp870u_queuecommand)\n");
637#endif
638 send_s870(dev,c);
639 }
640#ifdef ED_DBGP
641 printk("atp870u_queuecommand : exit\n");
642#endif
643 return 0;
644}
645
f281233d
JG		 646static DEF_SCSI_QCMD(atp870u_queuecommand)
647
1da177e4
LT		 648/**
649 * send_s870 - send a command to the controller
650 * @host: host
651 *
652 * On entry there is work queued to be done. We move some of that work to the
653 * controller itself.
654 *
655 * Caller holds the host lock.
656 */
657static void send_s870(struct atp_unit *dev,unsigned char c)
658{
468b8968 659 struct scsi_cmnd *workreq = NULL;
1da177e4
LT		 660 unsigned int i;//,k;
661 unsigned char j, target_id;
662 unsigned char *prd;
c2bab403 663 unsigned short int w;
1da177e4 664 unsigned long l, bttl = 0;
1da177e4
LT		 665 unsigned long sg_count;
666
667 if (dev->in_snd[c] != 0) {
668#ifdef ED_DBGP
669 printk("cmnd in_snd\n");
670#endif
671 return;
672 }
673#ifdef ED_DBGP
674 printk("Sent_s870 enter\n");
675#endif
676 dev->in_snd[c] = 1;
677 if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
678 dev->last_cmd[c] &= 0x0f;
679 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
468b8968
OZ		 680 if (!workreq) {
681 dev->last_cmd[c] = 0xff;
682 if (dev->quhd[c] == dev->quend[c]) {
683 dev->in_snd[c] = 0;
684 return;
685 }
1da177e4
LT		 686 }
687 }
468b8968
OZ		 688 if (!workreq) {
689 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
690 dev->in_snd[c] = 0;
691 return;
692 }
693 dev->working[c]++;
694 j = dev->quhd[c];
695 dev->quhd[c]++;
696 if (dev->quhd[c] >= qcnt)
697 dev->quhd[c] = 0;
698 workreq = dev->quereq[c][dev->quhd[c]];
699 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
700 dev->quhd[c] = j;
701 dev->working[c]--;
702 dev->in_snd[c] = 0;
703 return;
704 }
422c0d61
JG		 705 dev->id[c][scmd_id(workreq)].curr_req = workreq;
706 dev->last_cmd[c] = scmd_id(workreq);
1da177e4 707 }
6a3cebb6 708 if ((atp_readb_io(dev, c, 0x1f) & 0xb0) != 0 || atp_readb_io(dev, c, 0x1c) != 0) {
1da177e4 709#ifdef ED_DBGP
468b8968 710 printk("Abort to Send\n");
1da177e4 711#endif
468b8968
OZ		 712 dev->last_cmd[c] |= 0x40;
713 dev->in_snd[c] = 0;
714 return;
715 }
1da177e4
LT		 716#ifdef ED_DBGP
717 printk("OK to Send\n");
422c0d61 718 scmd_printk(KERN_DEBUG, workreq, "CDB");
1da177e4
LT		 719 for(i=0;i<workreq->cmd_len;i++) {
720 printk(" %x",workreq->cmnd[i]);
721 }
422c0d61 722 printk("\n");
1da177e4 723#endif
fe7ed98f
BH		 724 l = scsi_bufflen(workreq);
725
1da177e4 726 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 727 j = atp_readb_base(dev, 0x29) & 0xfe;
728 atp_writeb_base(dev, 0x29, j);
422c0d61 729 dev->r1f[c][scmd_id(workreq)] = 0;
1da177e4
LT		 730 }
731
732 if (workreq->cmnd[0] == READ_CAPACITY) {
fe7ed98f
BH		 733 if (l > 8)
734 l = 8;
1da177e4
LT		 735 }
736 if (workreq->cmnd[0] == 0x00) {
fe7ed98f 737 l = 0;
1da177e4
LT		 738 }
739
1da177e4 740 j = 0;
422c0d61 741 target_id = scmd_id(workreq);
1da177e4
LT		 742
743 /*
744 * Wide ?
745 */
746 w = 1;
747 w = w << target_id;
748 if ((w & dev->wide_id[c]) != 0) {
749 j |= 0x01;
750 }
6a3cebb6
OZ		 751 atp_writeb_io(dev, c, 0x1b, j);
752 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j) {
753 atp_writeb_pci(dev, c, 0x1b, j);
1da177e4
LT		 754#ifdef ED_DBGP
755 printk("send_s870 while loop 1\n");
756#endif
757 }
758 /*
759 * Write the command
760 */
761
6a3cebb6
OZ		 762 atp_writeb_io(dev, c, 0x00, workreq->cmd_len);
763 atp_writeb_io(dev, c, 0x01, 0x2c);
764 if (dev->dev_id == ATP885_DEVID)
765 atp_writeb_io(dev, c, 0x02, 0x7f);
766 else
767 atp_writeb_io(dev, c, 0x02, 0xcf);
768 for (i = 0; i < workreq->cmd_len; i++)
769 atp_writeb_io(dev, c, 0x03 + i, workreq->cmnd[i]);
770 atp_writeb_io(dev, c, 0x0f, workreq->device->lun);
1da177e4
LT		 771 /*
772 * Write the target
773 */
6a3cebb6 774 atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
1da177e4
LT		 775#ifdef ED_DBGP
776 printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,dev->id[c][target_id].devsp);
777#endif
fe7ed98f
BH		 778
779 sg_count = scsi_dma_map(workreq);
1da177e4
LT		 780 /*
781 * Write transfer size
782 */
6a3cebb6
OZ		 783 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&l))[2]);
784 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&l))[1]);
785 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&l))[0]);
1da177e4
LT		 786 j = target_id;
787 dev->id[c][j].last_len = l;
788 dev->id[c][j].tran_len = 0;
789#ifdef ED_DBGP
790 printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
791#endif
792 /*
793 * Flip the wide bits
794 */
795 if ((j & 0x08) != 0) {
796 j = (j & 0x07) | 0x40;
797 }
798 /*
799 * Check transfer direction
800 */
6a3cebb6
OZ		 801 if (workreq->sc_data_direction == DMA_TO_DEVICE)
802 atp_writeb_io(dev, c, 0x15, j | 0x20);
803 else
804 atp_writeb_io(dev, c, 0x15, j);
805 atp_writeb_io(dev, c, 0x16, atp_readb_io(dev, c, 0x16) | 0x80);
806 atp_writeb_io(dev, c, 0x16, 0x80);
1da177e4
LT		 807 dev->id[c][target_id].dirct = 0;
808 if (l == 0) {
6a3cebb6 809 if (atp_readb_io(dev, c, 0x1c) == 0) {
1da177e4
LT		 810#ifdef ED_DBGP
811 printk("change SCSI_CMD_REG 0x08\n");
812#endif
6a3cebb6
OZ		 813 atp_writeb_io(dev, c, 0x18, 0x08);
814 } else
1da177e4 815 dev->last_cmd[c] |= 0x40;
1da177e4
LT		 816 dev->in_snd[c] = 0;
817 return;
818 }
1da177e4
LT		 819 prd = dev->id[c][target_id].prd_table;
820 dev->id[c][target_id].prd_pos = prd;
821
822 /*
823 * Now write the request list. Either as scatter/gather or as
824 * a linear chain.
825 */
826
fe7ed98f
BH		 827 if (l) {
828 struct scatterlist *sgpnt;
1da177e4 829 i = 0;
fe7ed98f
BH		 830 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
831 bttl = sg_dma_address(sgpnt);
832 l=sg_dma_len(sgpnt);
1da177e4 833#ifdef ED_DBGP
fe7ed98f 834 printk("1. bttl %x, l %x\n",bttl, l);
1da177e4 835#endif
fe7ed98f 836 while (l > 0x10000) {
1da177e4
LT		 837 (((u16 *) (prd))[i + 3]) = 0x0000;
838 (((u16 *) (prd))[i + 2]) = 0x0000;
839 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
840 l -= 0x10000;
841 bttl += 0x10000;
842 i += 0x04;
843 }
844 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
845 (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
846 (((u16 *) (prd))[i + 3]) = 0;
847 i += 0x04;
848 }
849 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
850#ifdef ED_DBGP
851 printk("prd %4x %4x %4x %4x\n",(((unsigned short int *)prd)[0]),(((unsigned short int *)prd)[1]),(((unsigned short int *)prd)[2]),(((unsigned short int *)prd)[3]));
852 printk("2. bttl %x, l %x\n",bttl, l);
853#endif
1da177e4 854 }
1da177e4 855#ifdef ED_DBGP
c2bab403 856 printk("send_s870: prdaddr_2 0x%8x target_id %d\n", dev->id[c][target_id].prdaddr,target_id);
1da177e4 857#endif
b5683557 858 dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
6a3cebb6
OZ		 859 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
860 atp_writeb_pci(dev, c, 2, 0x06);
861 atp_writeb_pci(dev, c, 2, 0x00);
1da177e4 862 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6 863 j = atp_readb_pci(dev, c, 1) & 0xf3;
1da177e4
LT		 864 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) ||
865 (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
866 j |= 0x0c;
867 }
6a3cebb6 868 atp_writeb_pci(dev, c, 1, j);
1da177e4
LT		 869 } else if ((dev->dev_id == ATP880_DEVID1) ||
870 (dev->dev_id == ATP880_DEVID2)) {
6a3cebb6
OZ		 871 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
872 atp_writeb_base(dev, 0x3b, (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
873 else
874 atp_writeb_base(dev, 0x3b, atp_readb_base(dev, 0x3b) & 0x3f);
1da177e4 875 } else {
6a3cebb6
OZ		 876 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
877 atp_writeb_io(dev, c, 0x3a, (atp_readb_io(dev, c, 0x3a) & 0xf3) | 0x08);
878 else
879 atp_writeb_io(dev, c, 0x3a, atp_readb_io(dev, c, 0x3a) & 0xf3);
1da177e4 880 }
1da177e4
LT		 881
882 if(workreq->sc_data_direction == DMA_TO_DEVICE) {
883 dev->id[c][target_id].dirct = 0x20;
6a3cebb6
OZ		 884 if (atp_readb_io(dev, c, 0x1c) == 0) {
885 atp_writeb_io(dev, c, 0x18, 0x08);
886 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4
LT		 887#ifdef ED_DBGP
888 printk( "start DMA(to target)\n");
889#endif
890 } else {
891 dev->last_cmd[c] |= 0x40;
892 }
893 dev->in_snd[c] = 0;
894 return;
895 }
6a3cebb6
OZ		 896 if (atp_readb_io(dev, c, 0x1c) == 0) {
897 atp_writeb_io(dev, c, 0x18, 0x08);
898 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4
LT		 899#ifdef ED_DBGP
900 printk( "start DMA(to host)\n");
901#endif
902 } else {
903 dev->last_cmd[c] |= 0x40;
904 }
905 dev->in_snd[c] = 0;
906 return;
907
908}
909
910static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
911{
1da177e4
LT		 912 unsigned short int i, k;
913 unsigned char j;
914
6a3cebb6 915 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 916 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 917 k = atp_readw_io(dev, 0, 0x1c);
1da177e4 918 j = (unsigned char) (k >> 8);
832e9ac6
OZ		 919 if ((k & 0x8000) != 0) /* DB7 all release? */
920 i = 0;
1da177e4
LT		 921 }
922 *val |= 0x4000; /* assert DB6 */
6a3cebb6 923 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 924 *val &= 0xdfff; /* assert DB5 */
6a3cebb6 925 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 926 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 927 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) != 0) /* DB5 all release? */
832e9ac6 928 i = 0;
1da177e4
LT		 929 }
930 *val |= 0x8000; /* no DB4-0, assert DB7 */
931 *val &= 0xe0ff;
6a3cebb6 932 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 933 *val &= 0xbfff; /* release DB6 */
6a3cebb6 934 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 935 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 936 if ((atp_readw_io(dev, 0, 0x1c) & 0x4000) != 0) /* DB6 all release? */
832e9ac6 937 i = 0;
1da177e4
LT		 938 }
939
940 return j;
941}
942
943static void tscam(struct Scsi_Host *host)
944{
945
1da177e4
LT		 946 unsigned char i, j, k;
947 unsigned long n;
948 unsigned short int m, assignid_map, val;
949 unsigned char mbuf[33], quintet[2];
950 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
951 static unsigned char g2q_tab[8] = {
952 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
953 };
954
955/* I can't believe we need this before we've even done anything. Remove it
956 * and see if anyone bitches.
957 for (i = 0; i < 0x10; i++) {
958 udelay(0xffff);
959 }
960 */
961
6a3cebb6
OZ		 962 atp_writeb_io(dev, 0, 1, 0x08);
963 atp_writeb_io(dev, 0, 2, 0x7f);
964 atp_writeb_io(dev, 0, 0x11, 0x20);
1da177e4
LT		 965
966 if ((dev->scam_on & 0x40) == 0) {
967 return;
968 }
969 m = 1;
970 m <<= dev->host_id[0];
971 j = 16;
972 if (dev->chip_ver < 4) {
973 m |= 0xff00;
974 j = 8;
975 }
976 assignid_map = m;
6a3cebb6
OZ		 977 atp_writeb_io(dev, 0, 0x02, 0x02); /* 2*2=4ms,3EH 2/32*3E=3.9ms */
978 atp_writeb_io(dev, 0, 0x03, 0);
979 atp_writeb_io(dev, 0, 0x04, 0);
980 atp_writeb_io(dev, 0, 0x05, 0);
981 atp_writeb_io(dev, 0, 0x06, 0);
982 atp_writeb_io(dev, 0, 0x07, 0);
983 atp_writeb_io(dev, 0, 0x08, 0);
1da177e4
LT		 984
985 for (i = 0; i < j; i++) {
986 m = 1;
987 m = m << i;
988 if ((m & assignid_map) != 0) {
989 continue;
990 }
6a3cebb6
OZ		 991 atp_writeb_io(dev, 0, 0x0f, 0);
992 atp_writeb_io(dev, 0, 0x12, 0);
993 atp_writeb_io(dev, 0, 0x13, 0);
994 atp_writeb_io(dev, 0, 0x14, 0);
1da177e4
LT		 995 if (i > 7) {
996 k = (i & 0x07) | 0x40;
997 } else {
998 k = i;
999 }
6a3cebb6
OZ		 1000 atp_writeb_io(dev, 0, 0x15, k);
1001 if (dev->chip_ver == 4)
1002 atp_writeb_io(dev, 0, 0x1b, 0x01);
1003 else
1004 atp_writeb_io(dev, 0, 0x1b, 0x00);
58c4d046 1005 do {
6a3cebb6 1006 atp_writeb_io(dev, 0, 0x18, 0x09);
1da177e4 1007
6a3cebb6 1008 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0x00)
58c4d046 1009 cpu_relax();
6a3cebb6 1010 k = atp_readb_io(dev, 0, 0x17);
58c4d046
OZ		 1011 if ((k == 0x85) || (k == 0x42))
1012 break;
1013 if (k != 0x16)
6a3cebb6 1014 atp_writeb_io(dev, 0, 0x10, 0x41);
58c4d046
OZ		 1015 } while (k != 0x16);
1016 if ((k == 0x85) || (k == 0x42))
1017 continue;
1da177e4
LT		 1018 assignid_map |= m;
1019
1020 }
6a3cebb6
OZ		 1021 atp_writeb_io(dev, 0, 0x02, 0x7f);
1022 atp_writeb_io(dev, 0, 0x1b, 0x02);
1da177e4
LT		 1023
1024 outb(0, 0x80);
1025
1026 val = 0x0080; /* bsy */
6a3cebb6 1027 atp_writew_io(dev, 0, 0x1c, val);
1da177e4 1028 val |= 0x0040; /* sel */
6a3cebb6 1029 atp_writew_io(dev, 0, 0x1c, val);
1da177e4 1030 val |= 0x0004; /* msg */
6a3cebb6 1031 atp_writew_io(dev, 0, 0x1c, val);
1da177e4
LT		 1032 inb(0x80); /* 2 deskew delay(45ns*2=90ns) */
1033 val &= 0x007f; /* no bsy */
6a3cebb6 1034 atp_writew_io(dev, 0, 0x1c, val);
1da177e4
LT		 1035 mdelay(128);
1036 val &= 0x00fb; /* after 1ms no msg */
6a3cebb6
OZ		 1037 atp_writew_io(dev, 0, 0x1c, val);
1038 while ((atp_readb_io(dev, 0, 0x1c) & 0x04) != 0)
58c4d046 1039 ;
1da177e4
LT		 1040 outb(1, 0x80);
1041 udelay(100);
c7fcc089 1042 for (n = 0; n < 0x30000; n++)
6a3cebb6 1043 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) != 0) /* bsy ? */
c7fcc089
OZ		 1044 break;
1045 if (n < 0x30000)
1046 for (n = 0; n < 0x30000; n++)
6a3cebb6 1047 if ((atp_readb_io(dev, 0, 0x1c) & 0x81) == 0x0081) {
c7fcc089
OZ		 1048 inb(0x80);
1049 val |= 0x8003; /* io,cd,db7 */
6a3cebb6 1050 atp_writew_io(dev, 0, 0x1c, val);
c7fcc089
OZ		 1051 inb(0x80);
1052 val &= 0x00bf; /* no sel */
6a3cebb6 1053 atp_writew_io(dev, 0, 0x1c, val);
c7fcc089
OZ		 1054 outb(2, 0x80);
1055 break;
1056 }
1057 while (1) {
0f6d93aa
MM		 1058 /*
1059 * The funny division into multiple delays is to accomodate
1060 * arches like ARM where udelay() multiplies its argument by
1061 * a large number to initialize a loop counter. To avoid
1062 * overflow, the maximum supported udelay is 2000 microseconds.
1063 *
1064 * XXX it would be more polite to find a way to use msleep()
1065 */
1066 mdelay(2);
1067 udelay(48);
6a3cebb6
OZ		 1068 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) == 0x00) { /* bsy ? */
1069 atp_writew_io(dev, 0, 0x1c, 0);
1070 atp_writeb_io(dev, 0, 0x1b, 0);
1071 atp_writeb_io(dev, 0, 0x15, 0);
1072 atp_writeb_io(dev, 0, 0x18, 0x09);
1073 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0)
1da177e4 1074 cpu_relax();
6a3cebb6 1075 atp_readb_io(dev, 0, 0x17);
1da177e4
LT		 1076 return;
1077 }
1078 val &= 0x00ff; /* synchronization */
1079 val |= 0x3f00;
1080 fun_scam(dev, &val);
1081 outb(3, 0x80);
1082 val &= 0x00ff; /* isolation */
1083 val |= 0x2000;
1084 fun_scam(dev, &val);
1085 outb(4, 0x80);
1086 i = 8;
1087 j = 0;
c7fcc089
OZ		 1088
1089 while (1) {
6a3cebb6 1090 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) == 0)
c7fcc089
OZ		 1091 continue;
1092 outb(5, 0x80);
1093 val &= 0x00ff; /* get ID_STRING */
1094 val |= 0x2000;
1095 k = fun_scam(dev, &val);
1096 if ((k & 0x03) == 0)
1097 break;
1098 mbuf[j] <<= 0x01;
1099 mbuf[j] &= 0xfe;
1100 if ((k & 0x02) != 0)
1101 mbuf[j] |= 0x01;
1102 i--;
1103 if (i > 0)
1104 continue;
1105 j++;
1106 i = 8;
1da177e4 1107 }
1da177e4 1108
c7fcc089 1109 /* isolation complete.. */
1da177e4
LT		 1110/* mbuf[32]=0;
1111 printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1112 i = 15;
1113 j = mbuf[0];
25985edc 1114 if ((j & 0x20) != 0) { /* bit5=1:ID up to 7 */
1da177e4
LT		 1115 i = 7;
1116 }
c7fcc089
OZ		 1117 if ((j & 0x06) != 0) { /* IDvalid? */
1118 k = mbuf[1];
1119 while (1) {
1120 m = 1;
1121 m <<= k;
1122 if ((m & assignid_map) == 0)
1123 break;
1124 if (k > 0)
1125 k--;
1126 else
1127 break;
1128 }
1da177e4 1129 }
c7fcc089
OZ		 1130 if ((m & assignid_map) != 0) { /* srch from max acceptable ID# */
1131 k = i; /* max acceptable ID# */
1132 while (1) {
1133 m = 1;
1134 m <<= k;
1135 if ((m & assignid_map) == 0)
1136 break;
1137 if (k > 0)
1138 k--;
1139 else
1140 break;
1141 }
1da177e4 1142 }
c7fcc089 1143 /* k=binID#, */
1da177e4
LT		 1144 assignid_map |= m;
1145 if (k < 8) {
1146 quintet[0] = 0x38; /* 1st dft ID<8 */
1147 } else {
1148 quintet[0] = 0x31; /* 1st ID>=8 */
1149 }
1150 k &= 0x07;
1151 quintet[1] = g2q_tab[k];
1152
1153 val &= 0x00ff; /* AssignID 1stQuintet,AH=001xxxxx */
1154 m = quintet[0] << 8;
1155 val |= m;
1156 fun_scam(dev, &val);
1157 val &= 0x00ff; /* AssignID 2ndQuintet,AH=001xxxxx */
1158 m = quintet[1] << 8;
1159 val |= m;
1160 fun_scam(dev, &val);
1161
c7fcc089 1162 }
1da177e4
LT		 1163}
1164
1da177e4
LT		 1165static void atp870u_free_tables(struct Scsi_Host *host)
1166{
1167 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1168 int j, k;
1169 for (j=0; j < 2; j++) {
1170 for (k = 0; k < 16; k++) {
1171 if (!atp_dev->id[j][k].prd_table)
1172 continue;
b5683557 1173 pci_free_consistent(atp_dev->pdev, 1024, atp_dev->id[j][k].prd_table, atp_dev->id[j][k].prd_bus);
1da177e4
LT		 1174 atp_dev->id[j][k].prd_table = NULL;
1175 }
1176 }
1177}
1178
1179static int atp870u_init_tables(struct Scsi_Host *host)
1180{
1181 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1182 int c,k;
1183 for(c=0;c < 2;c++) {
1184 for(k=0;k<16;k++) {
b5683557 1185 atp_dev->id[c][k].prd_table = pci_alloc_consistent(atp_dev->pdev, 1024, &(atp_dev->id[c][k].prd_bus));
1da177e4
LT		 1186 if (!atp_dev->id[c][k].prd_table) {
1187 printk("atp870u_init_tables fail\n");
1188 atp870u_free_tables(host);
1189 return -ENOMEM;
1190 }
b5683557 1191 atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1da177e4
LT		 1192 atp_dev->id[c][k].devsp=0x20;
1193 atp_dev->id[c][k].devtype = 0x7f;
1194 atp_dev->id[c][k].curr_req = NULL;
1195 }
1196
1197 atp_dev->active_id[c] = 0;
1198 atp_dev->wide_id[c] = 0;
1199 atp_dev->host_id[c] = 0x07;
1200 atp_dev->quhd[c] = 0;
1201 atp_dev->quend[c] = 0;
1202 atp_dev->last_cmd[c] = 0xff;
1203 atp_dev->in_snd[c] = 0;
1204 atp_dev->in_int[c] = 0;
1205
1206 for (k = 0; k < qcnt; k++) {
1207 atp_dev->quereq[c][k] = NULL;
1208 }
1209 for (k = 0; k < 16; k++) {
1210 atp_dev->id[c][k].curr_req = NULL;
1211 atp_dev->sp[c][k] = 0x04;
1212 }
1213 }
1214 return 0;
1215}
1216
1217/* return non-zero on detection */
1218static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1219{
1220 unsigned char k, m, c;
1221 unsigned long flags;
493c5201 1222 unsigned int base_io, error,n;
1da177e4
LT		 1223 unsigned char host_id;
1224 struct Scsi_Host *shpnt = NULL;
dc6a78f1 1225 struct atp_unit *atpdev, *p;
1da177e4
LT		 1226 unsigned char setupdata[2][16];
1227 int count = 0;
dc6a78f1
RD		 1228
1229 atpdev = kzalloc(sizeof(*atpdev), GFP_KERNEL);
1230 if (!atpdev)
1231 return -ENOMEM;
1232
1da177e4 1233 if (pci_enable_device(pdev))
dc6a78f1 1234 goto err_eio;
1da177e4 1235
284901a9 1236 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1da177e4
LT		 1237 printk(KERN_INFO "atp870u: use 32bit DMA mask.\n");
1238 } else {
1239 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
dc6a78f1 1240 goto err_eio;
1da177e4
LT		 1241 }
1242
1da177e4
LT		 1243 /*
1244 * It's probably easier to weed out some revisions like
1245 * this than via the PCI device table
1246 */
1247 if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610) {
7d7311c4 1248 atpdev->chip_ver = pdev->revision;
dc6a78f1
RD		 1249 if (atpdev->chip_ver < 2)
1250 goto err_eio;
1da177e4
LT		 1251 }
1252
1253 switch (ent->device) {
1254 case PCI_DEVICE_ID_ARTOP_AEC7612UW:
1255 case PCI_DEVICE_ID_ARTOP_AEC7612SUW:
1256 case ATP880_DEVID1:
1257 case ATP880_DEVID2:
1258 case ATP885_DEVID:
dc6a78f1 1259 atpdev->chip_ver = 0x04;
1da177e4
LT		 1260 default:
1261 break;
1262 }
1263 base_io = pci_resource_start(pdev, 0);
1264 base_io &= 0xfffffff8;
6a3cebb6 1265 atpdev->baseport = base_io;
dc6a78f1 1266
1da177e4 1267 if ((ent->device == ATP880_DEVID1)||(ent->device == ATP880_DEVID2)) {
7d7311c4 1268 atpdev->chip_ver = pdev->revision;
1da177e4
LT		 1269 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);//JCC082803
1270
1271 host_id = inb(base_io + 0x39);
1272 host_id >>= 0x04;
1273
1274 printk(KERN_INFO " ACARD AEC-67160 PCI Ultra3 LVD Host Adapter: %d"
1275 " IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
dc6a78f1
RD		 1276 atpdev->ioport[0] = base_io + 0x40;
1277 atpdev->pciport[0] = base_io + 0x28;
1278 atpdev->dev_id = ent->device;
1279 atpdev->host_id[0] = host_id;
1da177e4 1280
493c5201
OZ		 1281 atpdev->scam_on = inb(base_io + 0x22);
1282 atpdev->global_map[0] = inb(base_io + 0x35);
1283 atpdev->ultra_map[0] = inw(base_io + 0x3c);
1da177e4
LT		 1284
1285 n = 0x3f09;
1286next_fblk_880:
1287 if (n >= 0x4000)
1288 goto flash_ok_880;
1289
1290 m = 0;
1291 outw(n, base_io + 0x34);
1292 n += 0x0002;
1293 if (inb(base_io + 0x30) == 0xff)
1294 goto flash_ok_880;
1295
dc6a78f1
RD		 1296 atpdev->sp[0][m++] = inb(base_io + 0x30);
1297 atpdev->sp[0][m++] = inb(base_io + 0x31);
1298 atpdev->sp[0][m++] = inb(base_io + 0x32);
1299 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 1300 outw(n, base_io + 0x34);
1301 n += 0x0002;
dc6a78f1
RD		 1302 atpdev->sp[0][m++] = inb(base_io + 0x30);
1303 atpdev->sp[0][m++] = inb(base_io + 0x31);
1304 atpdev->sp[0][m++] = inb(base_io + 0x32);
1305 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 1306 outw(n, base_io + 0x34);
1307 n += 0x0002;
dc6a78f1
RD		 1308 atpdev->sp[0][m++] = inb(base_io + 0x30);
1309 atpdev->sp[0][m++] = inb(base_io + 0x31);
1310 atpdev->sp[0][m++] = inb(base_io + 0x32);
1311 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 1312 outw(n, base_io + 0x34);
1313 n += 0x0002;
dc6a78f1
RD		 1314 atpdev->sp[0][m++] = inb(base_io + 0x30);
1315 atpdev->sp[0][m++] = inb(base_io + 0x31);
1316 atpdev->sp[0][m++] = inb(base_io + 0x32);
1317 atpdev->sp[0][m++] = inb(base_io + 0x33);
1da177e4
LT		 1318 n += 0x0018;
1319 goto next_fblk_880;
1320flash_ok_880:
1321 outw(0, base_io + 0x34);
dc6a78f1
RD		 1322 atpdev->ultra_map[0] = 0;
1323 atpdev->async[0] = 0;
1da177e4
LT		 1324 for (k = 0; k < 16; k++) {
1325 n = 1;
1326 n = n << k;
dc6a78f1
RD		 1327 if (atpdev->sp[0][k] > 1) {
1328 atpdev->ultra_map[0] |= n;
1da177e4 1329 } else {
dc6a78f1
RD		 1330 if (atpdev->sp[0][k] == 0)
1331 atpdev->async[0] |= n;
1da177e4
LT		 1332 }
1333 }
dc6a78f1
RD		 1334 atpdev->async[0] = ~(atpdev->async[0]);
1335 outb(atpdev->global_map[0], base_io + 0x35);
1da177e4
LT		 1336
1337 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1338 if (!shpnt)
dc6a78f1 1339 goto err_nomem;
1da177e4
LT		 1340
1341 p = (struct atp_unit *)&shpnt->hostdata;
1342
dc6a78f1
RD		 1343 atpdev->host = shpnt;
1344 atpdev->pdev = pdev;
1da177e4 1345 pci_set_drvdata(pdev, p);
dc6a78f1 1346 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 1347 if (atp870u_init_tables(shpnt) < 0) {
1348 printk(KERN_ERR "Unable to allocate tables for Acard controller\n");
1349 goto unregister;
1350 }
1351
1d6f359a 1352 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp880i", shpnt)) {
1da177e4
LT		 1353 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
1354 goto free_tables;
1355 }
1356
1357 spin_lock_irqsave(shpnt->host_lock, flags);
493c5201
OZ		 1358 k = inb(base_io + 0x38) & 0x80;
1359 outb(k, base_io + 0x38);
1360 outb(0x20, base_io + 0x3b);
1da177e4 1361 mdelay(32);
493c5201 1362 outb(0, base_io + 0x3b);
1da177e4 1363 mdelay(32);
493c5201
OZ		 1364 inb(base_io + 0x5b);
1365 inb(base_io + 0x57);
1366 outb((host_id | 0x08), base_io + 0x40);
1367 outb(0, base_io + 0x58);
1368 while ((inb(base_io + 0x5f) & 0x80) == 0)
1da177e4 1369 mdelay(1);
493c5201
OZ		 1370 inb(base_io + 0x57);
1371 outb(8, base_io + 0x41);
1372 outb(0x7f, base_io + 0x42);
1373 outb(0x20, base_io + 0x51);
1da177e4
LT		 1374
1375 tscam(shpnt);
197fb8d8 1376 is885(p, 0, true, atp_readb_base(p, 0x3f) & 0x40);
493c5201 1377 outb(0xb0, base_io + 0x38);
1da177e4
LT		 1378 shpnt->max_id = 16;
1379 shpnt->this_id = host_id;
1380 shpnt->unique_id = base_io;
1381 shpnt->io_port = base_io;
1382 shpnt->n_io_port = 0x60; /* Number of bytes of I/O space used */
1383 shpnt->irq = pdev->irq;
1384 } else if (ent->device == ATP885_DEVID) {
1385 printk(KERN_INFO " ACARD AEC-67162 PCI Ultra3 LVD Host Adapter: IO:%x, IRQ:%d.\n"
1386 , base_io, pdev->irq);
1387
dc6a78f1
RD		 1388 atpdev->pdev = pdev;
1389 atpdev->dev_id = ent->device;
dc6a78f1
RD		 1390 atpdev->ioport[0] = base_io + 0x80;
1391 atpdev->ioport[1] = base_io + 0xc0;
1392 atpdev->pciport[0] = base_io + 0x40;
1393 atpdev->pciport[1] = base_io + 0x50;
1da177e4
LT		 1394
1395 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1396 if (!shpnt)
dc6a78f1 1397 goto err_nomem;
1da177e4
LT		 1398
1399 p = (struct atp_unit *)&shpnt->hostdata;
1400
dc6a78f1
RD		 1401 atpdev->host = shpnt;
1402 atpdev->pdev = pdev;
1da177e4 1403 pci_set_drvdata(pdev, p);
dc6a78f1 1404 memcpy(p, atpdev, sizeof(struct atp_unit));
1da177e4
LT		 1405 if (atp870u_init_tables(shpnt) < 0)
1406 goto unregister;
1407
1408#ifdef ED_DBGP
1409 printk("request_irq() shpnt %p hostdata %p\n", shpnt, p);
1410#endif
1d6f359a 1411 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt)) {
1da177e4
LT		 1412 printk(KERN_ERR "Unable to allocate IRQ for Acard controller.\n");
1413 goto free_tables;
1414 }
1415
1416 spin_lock_irqsave(shpnt->host_lock, flags);
1417
1418 c=inb(base_io + 0x29);
1419 outb((c | 0x04),base_io + 0x29);
1420
1421 n=0x1f80;
1422next_fblk_885:
1423 if (n >= 0x2000) {
1424 goto flash_ok_885;
1425 }
1426 outw(n,base_io + 0x3c);
1427 if (inl(base_io + 0x38) == 0xffffffff) {
1428 goto flash_ok_885;
1429 }
1430 for (m=0; m < 2; m++) {
1431 p->global_map[m]= 0;
1432 for (k=0; k < 4; k++) {
1433 outw(n++,base_io + 0x3c);
1434 ((unsigned long *)&setupdata[m][0])[k]=inl(base_io + 0x38);
1435 }
1436 for (k=0; k < 4; k++) {
1437 outw(n++,base_io + 0x3c);
1438 ((unsigned long *)&p->sp[m][0])[k]=inl(base_io + 0x38);
1439 }
1440 n += 8;
1441 }
1442 goto next_fblk_885;
1443flash_ok_885:
1444#ifdef ED_DBGP
1445 printk( "Flash Read OK\n");
1446#endif
1447 c=inb(base_io + 0x29);
1448 outb((c & 0xfb),base_io + 0x29);
1449 for (c=0;c < 2;c++) {
1450 p->ultra_map[c]=0;
1451 p->async[c] = 0;
1452 for (k=0; k < 16; k++) {
1453 n=1;
1454 n = n << k;
1455 if (p->sp[c][k] > 1) {
1456 p->ultra_map[c] |= n;
1457 } else {
1458 if (p->sp[c][k] == 0) {
1459 p->async[c] |= n;
1460 }
1461 }
1462 }
1463 p->async[c] = ~(p->async[c]);
1464
1465 if (p->global_map[c] == 0) {
1466 k=setupdata[c][1];
1467 if ((k & 0x40) != 0)
1468 p->global_map[c] |= 0x20;
1469 k &= 0x07;
1470 p->global_map[c] |= k;
1471 if ((setupdata[c][2] & 0x04) != 0)
1472 p->global_map[c] |= 0x08;
1473 p->host_id[c] = setupdata[c][0] & 0x07;
1474 }
1475 }
1476
1477 k = inb(base_io + 0x28) & 0x8f;
1478 k |= 0x10;
1479 outb(k, base_io + 0x28);
1480 outb(0x80, base_io + 0x41);
1481 outb(0x80, base_io + 0x51);
1482 mdelay(100);
1483 outb(0, base_io + 0x41);
1484 outb(0, base_io + 0x51);
1485 mdelay(1000);
1486 inb(base_io + 0x9b);
1487 inb(base_io + 0x97);
1488 inb(base_io + 0xdb);
1489 inb(base_io + 0xd7);
1da177e4
LT		 1490 k=p->host_id[0];
1491 if (k > 7)
1492 k = (k & 0x07) | 0x40;
1493 k |= 0x08;
493c5201
OZ		 1494 outb(k, base_io + 0x80);
1495 outb(0, base_io + 0x98);
1da177e4 1496
493c5201 1497 while ((inb(base_io + 0x9f) & 0x80) == 0)
1da177e4
LT		 1498 cpu_relax();
1499
493c5201
OZ		 1500 inb(base_io + 0x97);
1501 outb(8, base_io + 0x81);
1502 outb(0x7f, base_io + 0x82);
1503 outb(0x20, base_io + 0x91);
1504
1da177e4
LT		 1505 k=p->host_id[1];
1506 if (k > 7)
1507 k = (k & 0x07) | 0x40;
1508 k |= 0x08;
493c5201
OZ		 1509 outb(k, base_io + 0xc0);
1510 outb(0, base_io + 0xd8);
1da177e4 1511
493c5201 1512 while ((inb(base_io + 0xdf) & 0x80) == 0)
1da177e4
LT		 1513 cpu_relax();
1514
493c5201
OZ		 1515 inb(base_io + 0xd7);
1516 outb(8, base_io + 0xc1);
1517 outb(0x7f, base_io + 0xc2);
1518 outb(0x20, base_io + 0xd1);
1da177e4
LT		 1519
1520 tscam_885();
1521 printk(KERN_INFO " Scanning Channel A SCSI Device ...\n");
197fb8d8 1522 is885(p, 0, true, atp_readb_io(p, 0, 0x1b) >> 7);
fa50b308 1523 atp_writeb_io(p, 0, 0x16, 0x80);
1da177e4 1524 printk(KERN_INFO " Scanning Channel B SCSI Device ...\n");
197fb8d8 1525 is885(p, 1, true, atp_readb_io(p, 1, 0x1b) >> 7);
fa50b308 1526 atp_writeb_io(p, 1, 0x16, 0x80);
1da177e4
LT		 1527 k = inb(base_io + 0x28) & 0xcf;
1528 k |= 0xc0;
1529 outb(k, base_io + 0x28);
1530 k = inb(base_io + 0x1f) | 0x80;
1531 outb(k, base_io + 0x1f);
1532 k = inb(base_io + 0x29) | 0x01;
1533 outb(k, base_io + 0x29);
1534#ifdef ED_DBGP
1535 //printk("atp885: atp_host[0] 0x%p\n", atp_host[0]);
1536#endif
1537 shpnt->max_id = 16;
1538 shpnt->max_lun = (p->global_map[0] & 0x07) + 1;
1539 shpnt->max_channel = 1;
1540 shpnt->this_id = p->host_id[0];
1541 shpnt->unique_id = base_io;
1542 shpnt->io_port = base_io;
1543 shpnt->n_io_port = 0xff; /* Number of bytes of I/O space used */
1544 shpnt->irq = pdev->irq;
1545
1546 } else {
1547 error = pci_read_config_byte(pdev, 0x49, &host_id);
1548
1549 printk(KERN_INFO " ACARD AEC-671X PCI Ultra/W SCSI-2/3 Host Adapter: %d "
1550 "IO:%x, IRQ:%d.\n", count, base_io, pdev->irq);
1551
dc6a78f1
RD		 1552 atpdev->ioport[0] = base_io;
1553 atpdev->pciport[0] = base_io + 0x20;
1554 atpdev->dev_id = ent->device;
1da177e4 1555 host_id &= 0x07;
dc6a78f1 1556 atpdev->host_id[0] = host_id;
493c5201
OZ		 1557 atpdev->scam_on = inb(base_io + 0x22);
1558 atpdev->global_map[0] = inb(base_io + 0x2d);
1559 atpdev->ultra_map[0] = inw(base_io + 0x2e);
1da177e4 1560
dc6a78f1
RD		 1561 if (atpdev->ultra_map[0] == 0) {
1562 atpdev->scam_on = 0x00;
1563 atpdev->global_map[0] = 0x20;
1564 atpdev->ultra_map[0] = 0xffff;
1da177e4
LT		 1565 }
1566
1567 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1568 if (!shpnt)
dc6a78f1 1569 goto err_nomem;
1da177e4
LT		 1570
1571 p = (struct atp_unit *)&shpnt->hostdata;
1572
dc6a78f1
RD		 1573 atpdev->host = shpnt;
1574 atpdev->pdev = pdev;
1da177e4 1575 pci_set_drvdata(pdev, p);
dc6a78f1 1576 memcpy(p, atpdev, sizeof(*atpdev));
1da177e4
LT		 1577 if (atp870u_init_tables(shpnt) < 0)
1578 goto unregister;
1579
1d6f359a 1580 if (request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870i", shpnt)) {
1da177e4
LT		 1581 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
1582 goto free_tables;
1583 }
1584
1585 spin_lock_irqsave(shpnt->host_lock, flags);
dc6a78f1 1586 if (atpdev->chip_ver > 0x07) { /* check if atp876 chip then enable terminator */
493c5201 1587 outb(0x00, base_io + 0x3e);
1da177e4
LT		 1588 }
1589
493c5201
OZ		 1590 k = (inb(base_io + 0x3a) & 0xf3) | 0x10;
1591 outb(k, base_io + 0x3a);
1592 outb((k & 0xdf), base_io + 0x3a);
1da177e4 1593 mdelay(32);
493c5201 1594 outb(k, base_io + 0x3a);
1da177e4 1595 mdelay(32);
493c5201
OZ		 1596 outb((host_id | 0x08), base_io + 0);
1597 outb(0, base_io + 0x18);
1598 while ((inb(base_io + 0x1f) & 0x80) == 0)
1da177e4
LT		 1599 mdelay(1);
1600
493c5201
OZ		 1601 inb(base_io + 0x17);
1602 outb(8, base_io + 1);
1603 outb(0x7f, base_io + 2);
1604 outb(0x20, base_io + 0x11);
1da177e4
LT		 1605
1606 tscam(shpnt);
95c1def5 1607 atp_writeb_io(p, 0, 0x3a, atp_readb_io(p, 0, 0x3a) | 0x10);
851eb661 1608 is885(p, 0, p->chip_ver == 4, 0);
95c1def5 1609 atp_writeb_io(p, 0, 0x3a, atp_readb_io(p, 0, 0x3a) & 0xef);
493c5201
OZ		 1610 outb((inb(base_io + 0x3a) & 0xef), base_io + 0x3a);
1611 outb((inb(base_io + 0x3b) | 0x20), base_io + 0x3b);
dc6a78f1 1612 if (atpdev->chip_ver == 4)
1da177e4
LT		 1613 shpnt->max_id = 16;
1614 else
2b89dad0 1615 shpnt->max_id = 8;
1da177e4
LT		 1616 shpnt->this_id = host_id;
1617 shpnt->unique_id = base_io;
1618 shpnt->io_port = base_io;
1619 shpnt->n_io_port = 0x40; /* Number of bytes of I/O space used */
1620 shpnt->irq = pdev->irq;
1621 }
1622 spin_unlock_irqrestore(shpnt->host_lock, flags);
1623 if(ent->device==ATP885_DEVID) {
1624 if(!request_region(base_io, 0xff, "atp870u")) /* Register the IO ports that we use */
1625 goto request_io_fail;
1626 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
1627 if(!request_region(base_io, 0x60, "atp870u")) /* Register the IO ports that we use */
1628 goto request_io_fail;
1629 } else {
1630 if(!request_region(base_io, 0x40, "atp870u")) /* Register the IO ports that we use */
1631 goto request_io_fail;
1632 }
1633 count++;
1634 if (scsi_add_host(shpnt, &pdev->dev))
1635 goto scsi_add_fail;
1636 scsi_scan_host(shpnt);
1637#ifdef ED_DBGP
1638 printk("atp870u_prob : exit\n");
1639#endif
1640 return 0;
1641
1642scsi_add_fail:
1643 printk("atp870u_prob:scsi_add_fail\n");
1644 if(ent->device==ATP885_DEVID) {
1645 release_region(base_io, 0xff);
1646 } else if((ent->device==ATP880_DEVID1)||(ent->device==ATP880_DEVID2)) {
1647 release_region(base_io, 0x60);
1648 } else {
1649 release_region(base_io, 0x40);
1650 }
1651request_io_fail:
1652 printk("atp870u_prob:request_io_fail\n");
1653 free_irq(pdev->irq, shpnt);
1654free_tables:
1655 printk("atp870u_prob:free_table\n");
1656 atp870u_free_tables(shpnt);
1657unregister:
1658 printk("atp870u_prob:unregister\n");
1659 scsi_host_put(shpnt);
1660 return -1;
dc6a78f1
RD		 1661err_eio:
1662 kfree(atpdev);
1663 return -EIO;
1664err_nomem:
1665 kfree(atpdev);
1666 return -ENOMEM;
1da177e4
LT		 1667}
1668
1669/* The abort command does not leave the device in a clean state where
1670 it is available to be used again. Until this gets worked out, we will
1671 leave it commented out. */
1672
1673static int atp870u_abort(struct scsi_cmnd * SCpnt)
1674{
1675 unsigned char j, k, c;
1676 struct scsi_cmnd *workrequ;
1da177e4
LT		 1677 struct atp_unit *dev;
1678 struct Scsi_Host *host;
1679 host = SCpnt->device->host;
1680
1681 dev = (struct atp_unit *)&host->hostdata;
422c0d61 1682 c = scmd_channel(SCpnt);
1da177e4
LT		 1683 printk(" atp870u: abort Channel = %x \n", c);
1684 printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
1685 printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1da177e4 1686 for (j = 0; j < 0x18; j++) {
6a3cebb6 1687 printk(" r%2x=%2x", j, atp_readb_io(dev, c, j));
1da177e4 1688 }
6a3cebb6
OZ		 1689 printk(" r1c=%2x", atp_readb_io(dev, c, 0x1c));
1690 printk(" r1f=%2x in_snd=%2x ", atp_readb_io(dev, c, 0x1f), dev->in_snd[c]);
1691 printk(" d00=%2x", atp_readb_pci(dev, c, 0x00));
1692 printk(" d02=%2x", atp_readb_pci(dev, c, 0x02));
1da177e4
LT		 1693 for(j=0;j<16;j++) {
1694 if (dev->id[c][j].curr_req != NULL) {
1695 workrequ = dev->id[c][j].curr_req;
1696 printk("\n que cdb= ");
1697 for (k=0; k < workrequ->cmd_len; k++) {
1698 printk(" %2x ",workrequ->cmnd[k]);
1699 }
1700 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
1701 }
1702 }
1703 return SUCCESS;
1704}
1705
1706static const char *atp870u_info(struct Scsi_Host *notused)
1707{
1708 static char buffer[128];
1709
1710 strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
1711
1712 return buffer;
1713}
1714
d773e422 1715static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1da177e4 1716{
3d30079c
RV		 1717 seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
1718 "Adapter Configuration:\n");
d773e422
AV		 1719 seq_printf(m, " Base IO: %#.4lx\n", HBAptr->io_port);
1720 seq_printf(m, " IRQ: %d\n", HBAptr->irq);
1721 return 0;
1da177e4
LT		 1722}
1723
1724
1725static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
1726 sector_t capacity, int *ip)
1727{
1728 int heads, sectors, cylinders;
1729
1730 heads = 64;
1731 sectors = 32;
1732 cylinders = (unsigned long)capacity / (heads * sectors);
1733 if (cylinders > 1024) {
1734 heads = 255;
1735 sectors = 63;
1736 cylinders = (unsigned long)capacity / (heads * sectors);
1737 }
1738 ip[0] = heads;
1739 ip[1] = sectors;
1740 ip[2] = cylinders;
1741
1742 return 0;
1743}
1744
1745static void atp870u_remove (struct pci_dev *pdev)
1746{
1747 struct atp_unit *devext = pci_get_drvdata(pdev);
1748 struct Scsi_Host *pshost = devext->host;
1749
1750
1751 scsi_remove_host(pshost);
1752 printk(KERN_INFO "free_irq : %d\n",pshost->irq);
1753 free_irq(pshost->irq, pshost);
1754 release_region(pshost->io_port, pshost->n_io_port);
1755 printk(KERN_INFO "atp870u_free_tables : %p\n",pshost);
1756 atp870u_free_tables(pshost);
1757 printk(KERN_INFO "scsi_host_put : %p\n",pshost);
1758 scsi_host_put(pshost);
1da177e4
LT		 1759}
1760MODULE_LICENSE("GPL");
1761
1762static struct scsi_host_template atp870u_template = {
1763 .module = THIS_MODULE,
1764 .name = "atp870u" /* name */,
1765 .proc_name = "atp870u",
d773e422 1766 .show_info = atp870u_show_info,
1da177e4
LT		 1767 .info = atp870u_info /* info */,
1768 .queuecommand = atp870u_queuecommand /* queuecommand */,
1769 .eh_abort_handler = atp870u_abort /* abort */,
1770 .bios_param = atp870u_biosparam /* biosparm */,
1771 .can_queue = qcnt /* can_queue */,
1772 .this_id = 7 /* SCSI ID */,
1773 .sg_tablesize = ATP870U_SCATTER /*SG_ALL*/ /*SG_NONE*/,
1da177e4
LT		 1774 .use_clustering = ENABLE_CLUSTERING,
1775 .max_sectors = ATP870U_MAX_SECTORS,
1776};
1777
1778static struct pci_device_id atp870u_id_table[] = {
1779 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID) },
1780 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1) },
1781 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2) },
1782 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610) },
1783 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW) },
1784 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U) },
1785 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S) },
1786 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D) },
1787 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
1788 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060) },
1789 { 0, },
1790};
1791
1792MODULE_DEVICE_TABLE(pci, atp870u_id_table);
1793
1794static struct pci_driver atp870u_driver = {
1795 .id_table = atp870u_id_table,
1796 .name = "atp870u",
1797 .probe = atp870u_probe,
6f039790 1798 .remove = atp870u_remove,
1da177e4
LT		 1799};
1800
1801static int __init atp870u_init(void)
1802{
1803#ifdef ED_DBGP
1804 printk("atp870u_init: Entry\n");
1805#endif
1806 return pci_register_driver(&atp870u_driver);
1807}
1808
1809static void __exit atp870u_exit(void)
1810{
1811#ifdef ED_DBGP
1812 printk("atp870u_exit: Entry\n");
1813#endif
1814 pci_unregister_driver(&atp870u_driver);
1815}
1816
1817static void tscam_885(void)
1818{
1819 unsigned char i;
1820
1821 for (i = 0; i < 0x2; i++) {
1822 mdelay(300);
1823 }
1824 return;
1825}
1826
1827
1828
197fb8d8 1829static void is885(struct atp_unit *dev, unsigned char c, bool wide_chip, unsigned char lvdmode)
1da177e4 1830{
fa50b308 1831 unsigned char i, j, k, rmb, n;
1da177e4
LT		 1832 unsigned short int m;
1833 static unsigned char mbuf[512];
80b52a7f
OZ		 1834 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1835 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1836 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1837 unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1838 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
460da918 1839 static unsigned char synw_870[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
80b52a7f
OZ		 1840 unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1841 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1842 static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1da177e4 1843
1da177e4 1844 for (i = 0; i < 16; i++) {
197fb8d8
OZ		 1845 if (!wide_chip && (i > 7))
1846 break;
1da177e4
LT		 1847 m = 1;
1848 m = m << i;
1849 if ((m & dev->active_id[c]) != 0) {
1850 continue;
1851 }
1852 if (i == dev->host_id[c]) {
1853 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
1854 continue;
1855 }
197fb8d8 1856 atp_writeb_io(dev, c, 0x1b, wide_chip ? 0x01 : 0x00);
5d2a5a4f
OZ		 1857 atp_writeb_io(dev, c, 1, 0x08);
1858 atp_writeb_io(dev, c, 2, 0x7f);
1859 atp_writeb_io(dev, c, 3, satn[0]);
1860 atp_writeb_io(dev, c, 4, satn[1]);
1861 atp_writeb_io(dev, c, 5, satn[2]);
1862 atp_writeb_io(dev, c, 6, satn[3]);
1863 atp_writeb_io(dev, c, 7, satn[4]);
1864 atp_writeb_io(dev, c, 8, satn[5]);
1865 atp_writeb_io(dev, c, 0x0f, 0);
1866 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
5d2a5a4f
OZ		 1867 atp_writeb_io(dev, c, 0x12, 0);
1868 atp_writeb_io(dev, c, 0x13, satn[6]);
1869 atp_writeb_io(dev, c, 0x14, satn[7]);
1da177e4
LT		 1870 j = i;
1871 if ((j & 0x08) != 0) {
1872 j = (j & 0x07) | 0x40;
1873 }
5d2a5a4f
OZ		 1874 atp_writeb_io(dev, c, 0x15, j);
1875 atp_writeb_io(dev, c, 0x18, satn[8]);
1da177e4 1876
5d2a5a4f 1877 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1878 cpu_relax();
80b52a7f
OZ		 1879
1880 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1881 continue;
80b52a7f 1882
5d2a5a4f 1883 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1884 cpu_relax();
80b52a7f 1885
1da177e4
LT		 1886 dev->active_id[c] |= m;
1887
5d2a5a4f 1888 atp_writeb_io(dev, c, 0x10, 0x30);
460da918
OZ		 1889 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
1890 atp_writeb_io(dev, c, 0x14, 0x00);
1891 else /* result of is870() merge - is this a bug? */
1892 atp_writeb_io(dev, c, 0x04, 0x00);
1da177e4
LT		 1893
1894phase_cmd:
5d2a5a4f 1895 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 1896
5d2a5a4f 1897 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1898 cpu_relax();
80b52a7f 1899
5d2a5a4f 1900 j = atp_readb_io(dev, c, 0x17);
1da177e4 1901 if (j != 0x16) {
5d2a5a4f 1902 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4
LT		 1903 goto phase_cmd;
1904 }
1905sel_ok:
5d2a5a4f
OZ		 1906 atp_writeb_io(dev, c, 3, inqd[0]);
1907 atp_writeb_io(dev, c, 4, inqd[1]);
1908 atp_writeb_io(dev, c, 5, inqd[2]);
1909 atp_writeb_io(dev, c, 6, inqd[3]);
1910 atp_writeb_io(dev, c, 7, inqd[4]);
1911 atp_writeb_io(dev, c, 8, inqd[5]);
1912 atp_writeb_io(dev, c, 0x0f, 0);
1913 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1914 atp_writeb_io(dev, c, 0x12, 0);
1915 atp_writeb_io(dev, c, 0x13, inqd[6]);
1916 atp_writeb_io(dev, c, 0x14, inqd[7]);
1917 atp_writeb_io(dev, c, 0x18, inqd[8]);
80b52a7f 1918
5d2a5a4f 1919 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1920 cpu_relax();
80b52a7f
OZ		 1921
1922 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1923 continue;
80b52a7f 1924
5d2a5a4f 1925 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1926 cpu_relax();
80b52a7f 1927
197fb8d8
OZ		 1928 if (wide_chip)
1929 atp_writeb_io(dev, c, 0x1b, 0x00);
1930
5d2a5a4f 1931 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4
LT		 1932 j = 0;
1933rd_inq_data:
5d2a5a4f 1934 k = atp_readb_io(dev, c, 0x1f);
1da177e4 1935 if ((k & 0x01) != 0) {
5d2a5a4f 1936 mbuf[j++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 1937 goto rd_inq_data;
1938 }
1939 if ((k & 0x80) == 0) {
1940 goto rd_inq_data;
1941 }
5d2a5a4f 1942 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 1943 if (j == 0x16) {
1944 goto inq_ok;
1945 }
5d2a5a4f
OZ		 1946 atp_writeb_io(dev, c, 0x10, 0x46);
1947 atp_writeb_io(dev, c, 0x12, 0);
1948 atp_writeb_io(dev, c, 0x13, 0);
1949 atp_writeb_io(dev, c, 0x14, 0);
1950 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 1951
5d2a5a4f 1952 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1953 cpu_relax();
80b52a7f
OZ		 1954
1955 if (atp_readb_io(dev, c, 0x17) != 0x16)
1da177e4 1956 goto sel_ok;
80b52a7f 1957
1da177e4
LT		 1958inq_ok:
1959 mbuf[36] = 0;
80b52a7f 1960 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1da177e4
LT		 1961 dev->id[c][i].devtype = mbuf[0];
1962 rmb = mbuf[1];
1963 n = mbuf[7];
197fb8d8
OZ		 1964 if (!wide_chip)
1965 goto not_wide;
1da177e4
LT		 1966 if ((mbuf[7] & 0x60) == 0) {
1967 goto not_wide;
1968 }
197fb8d8
OZ		 1969 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
1970 if ((i < 8) && ((dev->global_map[c] & 0x20) == 0))
1971 goto not_wide;
1972 } else { /* result of is870() merge - is this a bug? */
1973 if ((dev->global_map[c] & 0x20) == 0)
1974 goto not_wide;
1da177e4
LT		 1975 }
1976 if (lvdmode == 0) {
80b52a7f 1977 goto chg_wide;
1da177e4 1978 }
80b52a7f
OZ		 1979 if (dev->sp[c][i] != 0x04) // force u2
1980 {
1981 goto chg_wide;
1da177e4
LT		 1982 }
1983
5d2a5a4f
OZ		 1984 atp_writeb_io(dev, c, 0x1b, 0x01);
1985 atp_writeb_io(dev, c, 3, satn[0]);
1986 atp_writeb_io(dev, c, 4, satn[1]);
1987 atp_writeb_io(dev, c, 5, satn[2]);
1988 atp_writeb_io(dev, c, 6, satn[3]);
1989 atp_writeb_io(dev, c, 7, satn[4]);
1990 atp_writeb_io(dev, c, 8, satn[5]);
1991 atp_writeb_io(dev, c, 0x0f, 0);
1992 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1993 atp_writeb_io(dev, c, 0x12, 0);
1994 atp_writeb_io(dev, c, 0x13, satn[6]);
1995 atp_writeb_io(dev, c, 0x14, satn[7]);
1996 atp_writeb_io(dev, c, 0x18, satn[8]);
1997
1998 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1999 cpu_relax();
80b52a7f
OZ		 2000
2001 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2002 continue;
80b52a7f 2003
5d2a5a4f 2004 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2005 cpu_relax();
80b52a7f 2006
1da177e4
LT		 2007try_u3:
2008 j = 0;
5d2a5a4f
OZ		 2009 atp_writeb_io(dev, c, 0x14, 0x09);
2010 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2011
5d2a5a4f
OZ		 2012 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2013 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2014 atp_writeb_io(dev, c, 0x19, u3[j++]);
1da177e4
LT		 2015 cpu_relax();
2016 }
80b52a7f 2017
5d2a5a4f 2018 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2019 cpu_relax();
80b52a7f 2020
5d2a5a4f 2021 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2022 if (j == 0x0f) {
2023 goto u3p_in;
2024 }
2025 if (j == 0x0a) {
2026 goto u3p_cmd;
2027 }
2028 if (j == 0x0e) {
2029 goto try_u3;
2030 }
2031 continue;
2032u3p_out:
5d2a5a4f
OZ		 2033 atp_writeb_io(dev, c, 0x18, 0x20);
2034 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2035 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2036 atp_writeb_io(dev, c, 0x19, 0);
1da177e4
LT		 2037 cpu_relax();
2038 }
5d2a5a4f 2039 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2040 if (j == 0x0f) {
2041 goto u3p_in;
2042 }
2043 if (j == 0x0a) {
2044 goto u3p_cmd;
2045 }
2046 if (j == 0x0e) {
2047 goto u3p_out;
2048 }
2049 continue;
2050u3p_in:
5d2a5a4f
OZ		 2051 atp_writeb_io(dev, c, 0x14, 0x09);
2052 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2053 k = 0;
2054u3p_in1:
5d2a5a4f 2055 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2056 if ((j & 0x01) != 0) {
5d2a5a4f 2057 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2058 goto u3p_in1;
2059 }
2060 if ((j & 0x80) == 0x00) {
2061 goto u3p_in1;
2062 }
5d2a5a4f 2063 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2064 if (j == 0x0f) {
2065 goto u3p_in;
2066 }
2067 if (j == 0x0a) {
2068 goto u3p_cmd;
2069 }
2070 if (j == 0x0e) {
2071 goto u3p_out;
2072 }
2073 continue;
2074u3p_cmd:
5d2a5a4f
OZ		 2075 atp_writeb_io(dev, c, 0x10, 0x30);
2076 atp_writeb_io(dev, c, 0x14, 0x00);
2077 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2078
5d2a5a4f 2079 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00);
80b52a7f 2080
5d2a5a4f 2081 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2082 if (j != 0x16) {
2083 if (j == 0x4e) {
2084 goto u3p_out;
2085 }
2086 continue;
2087 }
2088 if (mbuf[0] != 0x01) {
2089 goto chg_wide;
2090 }
2091 if (mbuf[1] != 0x06) {
2092 goto chg_wide;
2093 }
2094 if (mbuf[2] != 0x04) {
2095 goto chg_wide;
2096 }
2097 if (mbuf[3] == 0x09) {
2098 m = 1;
2099 m = m << i;
2100 dev->wide_id[c] |= m;
2101 dev->id[c][i].devsp = 0xce;
2102#ifdef ED_DBGP
2103 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
2104#endif
2105 continue;
2106 }
2107chg_wide:
5d2a5a4f
OZ		 2108 atp_writeb_io(dev, c, 0x1b, 0x01);
2109 atp_writeb_io(dev, c, 3, satn[0]);
2110 atp_writeb_io(dev, c, 4, satn[1]);
2111 atp_writeb_io(dev, c, 5, satn[2]);
2112 atp_writeb_io(dev, c, 6, satn[3]);
2113 atp_writeb_io(dev, c, 7, satn[4]);
2114 atp_writeb_io(dev, c, 8, satn[5]);
2115 atp_writeb_io(dev, c, 0x0f, 0);
2116 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2117 atp_writeb_io(dev, c, 0x12, 0);
2118 atp_writeb_io(dev, c, 0x13, satn[6]);
2119 atp_writeb_io(dev, c, 0x14, satn[7]);
2120 atp_writeb_io(dev, c, 0x18, satn[8]);
2121
2122 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2123 cpu_relax();
80b52a7f
OZ		 2124
2125 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2126 continue;
80b52a7f 2127
5d2a5a4f 2128 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2129 cpu_relax();
80b52a7f 2130
1da177e4
LT		 2131try_wide:
2132 j = 0;
5d2a5a4f
OZ		 2133 atp_writeb_io(dev, c, 0x14, 0x05);
2134 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2135
5d2a5a4f
OZ		 2136 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2137 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2138 atp_writeb_io(dev, c, 0x19, wide[j++]);
1da177e4
LT		 2139 cpu_relax();
2140 }
80b52a7f 2141
5d2a5a4f 2142 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2143 cpu_relax();
80b52a7f 2144
5d2a5a4f 2145 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2146 if (j == 0x0f) {
2147 goto widep_in;
2148 }
2149 if (j == 0x0a) {
2150 goto widep_cmd;
2151 }
2152 if (j == 0x0e) {
2153 goto try_wide;
2154 }
2155 continue;
2156widep_out:
5d2a5a4f
OZ		 2157 atp_writeb_io(dev, c, 0x18, 0x20);
2158 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2159 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2160 atp_writeb_io(dev, c, 0x19, 0);
1da177e4
LT		 2161 cpu_relax();
2162 }
5d2a5a4f 2163 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2164 if (j == 0x0f) {
2165 goto widep_in;
2166 }
2167 if (j == 0x0a) {
2168 goto widep_cmd;
2169 }
2170 if (j == 0x0e) {
2171 goto widep_out;
2172 }
2173 continue;
2174widep_in:
5d2a5a4f
OZ		 2175 atp_writeb_io(dev, c, 0x14, 0xff);
2176 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2177 k = 0;
2178widep_in1:
5d2a5a4f 2179 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2180 if ((j & 0x01) != 0) {
5d2a5a4f 2181 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2182 goto widep_in1;
2183 }
2184 if ((j & 0x80) == 0x00) {
2185 goto widep_in1;
2186 }
5d2a5a4f 2187 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2188 if (j == 0x0f) {
2189 goto widep_in;
2190 }
2191 if (j == 0x0a) {
2192 goto widep_cmd;
2193 }
2194 if (j == 0x0e) {
2195 goto widep_out;
2196 }
2197 continue;
2198widep_cmd:
5d2a5a4f
OZ		 2199 atp_writeb_io(dev, c, 0x10, 0x30);
2200 atp_writeb_io(dev, c, 0x14, 0x00);
2201 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2202
5d2a5a4f 2203 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2204 cpu_relax();
80b52a7f 2205
5d2a5a4f 2206 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2207 if (j != 0x16) {
2208 if (j == 0x4e) {
2209 goto widep_out;
2210 }
2211 continue;
2212 }
2213 if (mbuf[0] != 0x01) {
2214 goto not_wide;
2215 }
2216 if (mbuf[1] != 0x02) {
2217 goto not_wide;
2218 }
2219 if (mbuf[2] != 0x03) {
2220 goto not_wide;
2221 }
2222 if (mbuf[3] != 0x01) {
2223 goto not_wide;
2224 }
2225 m = 1;
2226 m = m << i;
2227 dev->wide_id[c] |= m;
2228not_wide:
80b52a7f 2229 if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) || ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1da177e4
LT		 2230 m = 1;
2231 m = m << i;
2232 if ((dev->async[c] & m) != 0) {
80b52a7f 2233 goto set_sync;
1da177e4
LT		 2234 }
2235 }
2236 continue;
2237set_sync:
460da918 2238 if ((dev->dev_id != ATP885_DEVID && dev->dev_id != ATP880_DEVID1 && dev->dev_id != ATP880_DEVID2) || (dev->sp[c][i] == 0x02)) {
80b52a7f
OZ		 2239 synu[4] = 0x0c;
2240 synuw[4] = 0x0c;
1da177e4 2241 } else {
80b52a7f
OZ		 2242 if (dev->sp[c][i] >= 0x03) {
2243 synu[4] = 0x0a;
2244 synuw[4] = 0x0a;
2245 }
1da177e4 2246 }
1da177e4
LT		 2247 j = 0;
2248 if ((m & dev->wide_id[c]) != 0) {
2249 j |= 0x01;
2250 }
5d2a5a4f
OZ		 2251 atp_writeb_io(dev, c, 0x1b, j);
2252 atp_writeb_io(dev, c, 3, satn[0]);
2253 atp_writeb_io(dev, c, 4, satn[1]);
2254 atp_writeb_io(dev, c, 5, satn[2]);
2255 atp_writeb_io(dev, c, 6, satn[3]);
2256 atp_writeb_io(dev, c, 7, satn[4]);
2257 atp_writeb_io(dev, c, 8, satn[5]);
2258 atp_writeb_io(dev, c, 0x0f, 0);
2259 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2260 atp_writeb_io(dev, c, 0x12, 0);
2261 atp_writeb_io(dev, c, 0x13, satn[6]);
2262 atp_writeb_io(dev, c, 0x14, satn[7]);
2263 atp_writeb_io(dev, c, 0x18, satn[8]);
2264
2265 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2266 cpu_relax();
80b52a7f
OZ		 2267
2268 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2269 continue;
80b52a7f 2270
5d2a5a4f 2271 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2272 cpu_relax();
80b52a7f 2273
1da177e4
LT		 2274try_sync:
2275 j = 0;
5d2a5a4f
OZ		 2276 atp_writeb_io(dev, c, 0x14, 0x06);
2277 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2278
5d2a5a4f
OZ		 2279 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2280 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0) {
1da177e4 2281 if ((m & dev->wide_id[c]) != 0) {
460da918
OZ		 2282 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
2283 if ((m & dev->ultra_map[c]) != 0) {
2284 atp_writeb_io(dev, c, 0x19, synuw[j++]);
2285 } else {
2286 atp_writeb_io(dev, c, 0x19, synw[j++]);
2287 }
2288 } else
2289 atp_writeb_io(dev, c, 0x19, synw_870[j++]);
1da177e4
LT		 2290 } else {
2291 if ((m & dev->ultra_map[c]) != 0) {
5d2a5a4f 2292 atp_writeb_io(dev, c, 0x19, synu[j++]);
1da177e4 2293 } else {
5d2a5a4f 2294 atp_writeb_io(dev, c, 0x19, synn[j++]);
1da177e4
LT		 2295 }
2296 }
1da177e4
LT		 2297 }
2298 }
80b52a7f 2299
5d2a5a4f 2300 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2301 cpu_relax();
80b52a7f 2302
5d2a5a4f 2303 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2304 if (j == 0x0f) {
2305 goto phase_ins;
2306 }
2307 if (j == 0x0a) {
2308 goto phase_cmds;
2309 }
2310 if (j == 0x0e) {
2311 goto try_sync;
2312 }
2313 continue;
2314phase_outs:
5d2a5a4f
OZ		 2315 atp_writeb_io(dev, c, 0x18, 0x20);
2316 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00) {
2317 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0x00)
2318 atp_writeb_io(dev, c, 0x19, 0x00);
1da177e4
LT		 2319 cpu_relax();
2320 }
5d2a5a4f 2321 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2322 if (j == 0x85) {
2323 goto tar_dcons;
2324 }
2325 j &= 0x0f;
2326 if (j == 0x0f) {
2327 goto phase_ins;
2328 }
2329 if (j == 0x0a) {
2330 goto phase_cmds;
2331 }
2332 if (j == 0x0e) {
2333 goto phase_outs;
2334 }
2335 continue;
2336phase_ins:
460da918
OZ		 2337 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
2338 atp_writeb_io(dev, c, 0x14, 0x06);
2339 else
2340 atp_writeb_io(dev, c, 0x14, 0xff);
5d2a5a4f 2341 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2342 k = 0;
2343phase_ins1:
5d2a5a4f 2344 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2345 if ((j & 0x01) != 0x00) {
5d2a5a4f 2346 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2347 goto phase_ins1;
2348 }
2349 if ((j & 0x80) == 0x00) {
2350 goto phase_ins1;
2351 }
80b52a7f 2352
5d2a5a4f 2353 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00);
80b52a7f 2354
5d2a5a4f 2355 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2356 if (j == 0x85) {
2357 goto tar_dcons;
2358 }
2359 j &= 0x0f;
2360 if (j == 0x0f) {
2361 goto phase_ins;
2362 }
2363 if (j == 0x0a) {
2364 goto phase_cmds;
2365 }
2366 if (j == 0x0e) {
2367 goto phase_outs;
2368 }
2369 continue;
2370phase_cmds:
5d2a5a4f 2371 atp_writeb_io(dev, c, 0x10, 0x30);
1da177e4 2372tar_dcons:
5d2a5a4f
OZ		 2373 atp_writeb_io(dev, c, 0x14, 0x00);
2374 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2375
5d2a5a4f 2376 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2377 cpu_relax();
80b52a7f 2378
5d2a5a4f 2379 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2380 if (j != 0x16) {
2381 continue;
2382 }
2383 if (mbuf[0] != 0x01) {
2384 continue;
2385 }
2386 if (mbuf[1] != 0x03) {
2387 continue;
2388 }
2389 if (mbuf[4] == 0x00) {
2390 continue;
2391 }
2392 if (mbuf[3] > 0x64) {
2393 continue;
2394 }
460da918
OZ		 2395 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
2396 if (mbuf[4] > 0x0e) {
2397 mbuf[4] = 0x0e;
2398 }
2399 } else {
2400 if (mbuf[4] > 0x0c) {
2401 mbuf[4] = 0x0c;
2402 }
1da177e4
LT		 2403 }
2404 dev->id[c][i].devsp = mbuf[4];
460da918
OZ		 2405 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
2406 if (mbuf[3] < 0x0c) {
2407 j = 0xb0;
2408 goto set_syn_ok;
2409 }
1da177e4
LT		 2410 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2411 j = 0xa0;
2412 goto set_syn_ok;
2413 }
2414 if (mbuf[3] < 0x1a) {
2415 j = 0x20;
2416 goto set_syn_ok;
2417 }
2418 if (mbuf[3] < 0x33) {
2419 j = 0x40;
2420 goto set_syn_ok;
2421 }
2422 if (mbuf[3] < 0x4c) {
2423 j = 0x50;
2424 goto set_syn_ok;
2425 }
2426 j = 0x60;
80b52a7f 2427set_syn_ok:
1da177e4 2428 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
80b52a7f 2429#ifdef ED_DBGP
1da177e4
LT		 2430 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
2431#endif
2432 }
1da177e4
LT		 2433}
2434
2435module_init(atp870u_init);
2436module_exit(atp870u_exit);
2437
Linux kernel - Deliverables
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