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atp870u: Improve unsupported chip detection
[deliverable/linux.git] / drivers / scsi / atp870u.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (C) 1997 Wu Ching Chen
3 * 2.1.x update (C) 1998 Krzysztof G. Baranowski
fa195afe
AC		 4 * 2.5.x update (C) 2002 Red Hat
5 * 2.6.x update (C) 2004 Red Hat
1da177e4
LT		 6 *
7 * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
8 *
9 * Wu Ching Chen : NULL pointer fixes 2000/06/02
10 * support atp876 chip
11 * enable 32 bit fifo transfer
12 * support cdrom & remove device run ultra speed
13 * fix disconnect bug 2000/12/21
14 * support atp880 chip lvd u160 2001/05/15
15 * fix prd table bug 2001/09/12 (7.1)
16 *
17 * atp885 support add by ACARD Hao Ping Lian 2005/01/05
18 */
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/string.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/proc_fs.h>
28#include <linux/spinlock.h>
29#include <linux/pci.h>
30#include <linux/blkdev.h>
910638ae 31#include <linux/dma-mapping.h>
5a0e3ad6 32#include <linux/slab.h>
1da177e4
LT		 33#include <asm/io.h>
34
35#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_device.h>
38#include <scsi/scsi_host.h>
39
40#include "atp870u.h"
41
42static struct scsi_host_template atp870u_template;
43static void send_s870(struct atp_unit *dev,unsigned char c);
4192a40f 44static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip, unsigned char lvdmode);
1da177e4 45
6a3cebb6
OZ		 46static inline void atp_writeb_base(struct atp_unit *atp, u8 reg, u8 val)
47{
48 outb(val, atp->baseport + reg);
49}
50
d804bb25
OZ		 51static inline void atp_writew_base(struct atp_unit *atp, u8 reg, u16 val)
52{
53 outw(val, atp->baseport + reg);
54}
55
6a3cebb6
OZ		 56static inline void atp_writeb_io(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
57{
58 outb(val, atp->ioport[channel] + reg);
59}
60
61static inline void atp_writew_io(struct atp_unit *atp, u8 channel, u8 reg, u16 val)
62{
63 outw(val, atp->ioport[channel] + reg);
64}
65
66static inline void atp_writeb_pci(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
67{
68 outb(val, atp->pciport[channel] + reg);
69}
70
71static inline void atp_writel_pci(struct atp_unit *atp, u8 channel, u8 reg, u32 val)
72{
73 outl(val, atp->pciport[channel] + reg);
74}
75
76static inline u8 atp_readb_base(struct atp_unit *atp, u8 reg)
77{
78 return inb(atp->baseport + reg);
79}
80
d804bb25
OZ		 81static inline u16 atp_readw_base(struct atp_unit *atp, u8 reg)
82{
83 return inw(atp->baseport + reg);
84}
85
86static inline u32 atp_readl_base(struct atp_unit *atp, u8 reg)
87{
88 return inl(atp->baseport + reg);
89}
90
6a3cebb6
OZ		 91static inline u8 atp_readb_io(struct atp_unit *atp, u8 channel, u8 reg)
92{
93 return inb(atp->ioport[channel] + reg);
94}
95
96static inline u16 atp_readw_io(struct atp_unit *atp, u8 channel, u8 reg)
97{
98 return inw(atp->ioport[channel] + reg);
99}
100
101static inline u8 atp_readb_pci(struct atp_unit *atp, u8 channel, u8 reg)
102{
103 return inb(atp->pciport[channel] + reg);
104}
105
7d12e780 106static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
1da177e4
LT		 107{
108 unsigned long flags;
bc0fe4c9 109 unsigned short int id;
1da177e4
LT		 110 unsigned char i, j, c, target_id, lun,cmdp;
111 unsigned char *prd;
112 struct scsi_cmnd *workreq;
1da177e4
LT		 113 unsigned long adrcnt, k;
114#ifdef ED_DBGP
115 unsigned long l;
116#endif
1da177e4
LT		 117 struct Scsi_Host *host = dev_id;
118 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
119
120 for (c = 0; c < 2; c++) {
6a3cebb6 121 j = atp_readb_io(dev, c, 0x1f);
1da177e4 122 if ((j & 0x80) != 0)
78614ecd 123 break;
1da177e4
LT		 124 dev->in_int[c] = 0;
125 }
78614ecd
OZ		 126 if ((j & 0x80) == 0)
127 return IRQ_NONE;
1da177e4
LT		 128#ifdef ED_DBGP
129 printk("atp870u_intr_handle enter\n");
130#endif
131 dev->in_int[c] = 1;
6a3cebb6 132 cmdp = atp_readb_io(dev, c, 0x10);
1da177e4
LT		 133 if (dev->working[c] != 0) {
134 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 135 if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0)
136 atp_writeb_io(dev, c, 0x16, (atp_readb_io(dev, c, 0x16) | 0x80));
1da177e4 137 }
6a3cebb6 138 if ((atp_readb_pci(dev, c, 0x00) & 0x08) != 0)
1da177e4 139 {
1da177e4 140 for (k=0; k < 1000; k++) {
6a3cebb6 141 if ((atp_readb_pci(dev, c, 2) & 0x08) == 0)
78614ecd 142 break;
6a3cebb6 143 if ((atp_readb_pci(dev, c, 2) & 0x01) == 0)
78614ecd 144 break;
1da177e4
LT		 145 }
146 }
6a3cebb6 147 atp_writeb_pci(dev, c, 0, 0x00);
1da177e4 148
6a3cebb6 149 i = atp_readb_io(dev, c, 0x17);
1da177e4 150
bc0fe4c9 151 if (dev->dev_id == ATP885_DEVID)
6a3cebb6 152 atp_writeb_pci(dev, c, 2, 0x06);
1da177e4 153
6a3cebb6 154 target_id = atp_readb_io(dev, c, 0x15);
1da177e4
LT		 155
156 /*
157 * Remap wide devices onto id numbers
158 */
159
160 if ((target_id & 0x40) != 0) {
161 target_id = (target_id & 0x07) | 0x08;
162 } else {
163 target_id &= 0x07;
164 }
165
166 if ((j & 0x40) != 0) {
167 if (dev->last_cmd[c] == 0xff) {
168 dev->last_cmd[c] = target_id;
169 }
170 dev->last_cmd[c] |= 0x40;
171 }
172 if (dev->dev_id == ATP885_DEVID)
173 dev->r1f[c][target_id] |= j;
174#ifdef ED_DBGP
175 printk("atp870u_intr_handle status = %x\n",i);
176#endif
177 if (i == 0x85) {
178 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
179 dev->last_cmd[c] = 0xff;
180 }
181 if (dev->dev_id == ATP885_DEVID) {
1da177e4 182 adrcnt = 0;
6a3cebb6
OZ		 183 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
184 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
185 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 186 if (dev->id[c][target_id].last_len != adrcnt)
187 {
188 k = dev->id[c][target_id].last_len;
189 k -= adrcnt;
190 dev->id[c][target_id].tran_len = k;
191 dev->id[c][target_id].last_len = adrcnt;
192 }
193#ifdef ED_DBGP
3a38e53e 194 printk("dev->id[c][target_id].last_len = %d dev->id[c][target_id].tran_len = %d\n",dev->id[c][target_id].last_len,dev->id[c][target_id].tran_len);
1da177e4
LT		 195#endif
196 }
197
198 /*
199 * Flip wide
200 */
201 if (dev->wide_id[c] != 0) {
6a3cebb6
OZ		 202 atp_writeb_io(dev, c, 0x1b, 0x01);
203 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
204 atp_writeb_io(dev, c, 0x1b, 0x01);
1da177e4
LT		 205 }
206 /*
207 * Issue more commands
208 */
209 spin_lock_irqsave(dev->host->host_lock, flags);
210 if (((dev->quhd[c] != dev->quend[c]) || (dev->last_cmd[c] != 0xff)) &&
211 (dev->in_snd[c] == 0)) {
212#ifdef ED_DBGP
213 printk("Call sent_s870\n");
214#endif
215 send_s870(dev,c);
216 }
217 spin_unlock_irqrestore(dev->host->host_lock, flags);
218 /*
219 * Done
220 */
221 dev->in_int[c] = 0;
222#ifdef ED_DBGP
223 printk("Status 0x85 return\n");
224#endif
78614ecd 225 return IRQ_HANDLED;
1da177e4
LT		 226 }
227
228 if (i == 0x40) {
229 dev->last_cmd[c] |= 0x40;
230 dev->in_int[c] = 0;
78614ecd 231 return IRQ_HANDLED;
1da177e4
LT		 232 }
233
234 if (i == 0x21) {
235 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
236 dev->last_cmd[c] = 0xff;
237 }
1da177e4 238 adrcnt = 0;
6a3cebb6
OZ		 239 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
240 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
241 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 242 k = dev->id[c][target_id].last_len;
243 k -= adrcnt;
244 dev->id[c][target_id].tran_len = k;
245 dev->id[c][target_id].last_len = adrcnt;
6a3cebb6
OZ		 246 atp_writeb_io(dev, c, 0x10, 0x41);
247 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 248 dev->in_int[c] = 0;
78614ecd 249 return IRQ_HANDLED;
1da177e4
LT		 250 }
251
252 if (dev->dev_id == ATP885_DEVID) {
253 if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
254 if ((i == 0x4c) || (i == 0x8c))
255 i=0x48;
256 else
257 i=0x49;
258 }
259
260 }
261 if ((i == 0x80) || (i == 0x8f)) {
262#ifdef ED_DBGP
263 printk(KERN_DEBUG "Device reselect\n");
264#endif
265 lun = 0;
6a3cebb6
OZ		 266 if (cmdp == 0x44 || i == 0x80)
267 lun = atp_readb_io(dev, c, 0x1d) & 0x07;
268 else {
1da177e4
LT		 269 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
270 dev->last_cmd[c] = 0xff;
271 }
272 if (cmdp == 0x41) {
273#ifdef ED_DBGP
274 printk("cmdp = 0x41\n");
275#endif
1da177e4 276 adrcnt = 0;
6a3cebb6
OZ		 277 ((unsigned char *) &adrcnt)[2] = atp_readb_io(dev, c, 0x12);
278 ((unsigned char *) &adrcnt)[1] = atp_readb_io(dev, c, 0x13);
279 ((unsigned char *) &adrcnt)[0] = atp_readb_io(dev, c, 0x14);
1da177e4
LT		 280 k = dev->id[c][target_id].last_len;
281 k -= adrcnt;
282 dev->id[c][target_id].tran_len = k;
283 dev->id[c][target_id].last_len = adrcnt;
6a3cebb6 284 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 285 dev->in_int[c] = 0;
78614ecd 286 return IRQ_HANDLED;
1da177e4
LT		 287 } else {
288#ifdef ED_DBGP
289 printk("cmdp != 0x41\n");
290#endif
6a3cebb6 291 atp_writeb_io(dev, c, 0x10, 0x46);
1da177e4 292 dev->id[c][target_id].dirct = 0x00;
6a3cebb6
OZ		 293 atp_writeb_io(dev, c, 0x12, 0x00);
294 atp_writeb_io(dev, c, 0x13, 0x00);
295 atp_writeb_io(dev, c, 0x14, 0x00);
296 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 297 dev->in_int[c] = 0;
78614ecd 298 return IRQ_HANDLED;
1da177e4
LT		 299 }
300 }
301 if (dev->last_cmd[c] != 0xff) {
302 dev->last_cmd[c] |= 0x40;
303 }
304 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 305 j = atp_readb_base(dev, 0x29) & 0xfe;
306 atp_writeb_base(dev, 0x29, j);
3a38e53e 307 } else
6a3cebb6 308 atp_writeb_io(dev, c, 0x10, 0x45);
3a38e53e 309
6a3cebb6 310 target_id = atp_readb_io(dev, c, 0x16);
1da177e4
LT		 311 /*
312 * Remap wide identifiers
313 */
314 if ((target_id & 0x10) != 0) {
315 target_id = (target_id & 0x07) | 0x08;
316 } else {
317 target_id &= 0x07;
318 }
3a38e53e 319 if (dev->dev_id == ATP885_DEVID)
6a3cebb6 320 atp_writeb_io(dev, c, 0x10, 0x45);
1da177e4
LT		 321 workreq = dev->id[c][target_id].curr_req;
322#ifdef ED_DBGP
017560fc
JG		 323 scmd_printk(KERN_DEBUG, workreq, "CDB");
324 for (l = 0; l < workreq->cmd_len; l++)
1da177e4 325 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
017560fc 326 printk("\n");
1da177e4
LT		 327#endif
328
6a3cebb6
OZ		 329 atp_writeb_io(dev, c, 0x0f, lun);
330 atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
1da177e4
LT		 331 adrcnt = dev->id[c][target_id].tran_len;
332 k = dev->id[c][target_id].last_len;
333
6a3cebb6
OZ		 334 atp_writeb_io(dev, c, 0x12, ((unsigned char *) &k)[2]);
335 atp_writeb_io(dev, c, 0x13, ((unsigned char *) &k)[1]);
336 atp_writeb_io(dev, c, 0x14, ((unsigned char *) &k)[0]);
1da177e4 337#ifdef ED_DBGP
6a3cebb6 338 printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k, atp_readb_io(dev, c, 0x14), atp_readb_io(dev, c, 0x13), atp_readb_io(dev, c, 0x12));
1da177e4
LT		 339#endif
340 /* Remap wide */
341 j = target_id;
342 if (target_id > 7) {
343 j = (j & 0x07) | 0x40;
344 }
345 /* Add direction */
346 j |= dev->id[c][target_id].dirct;
6a3cebb6
OZ		 347 atp_writeb_io(dev, c, 0x15, j);
348 atp_writeb_io(dev, c, 0x16, 0x80);
1da177e4
LT		 349
350 /* enable 32 bit fifo transfer */
351 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6 352 i = atp_readb_pci(dev, c, 1) & 0xf3;
1da177e4
LT		 353 //j=workreq->cmnd[0];
354 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
355 i |= 0x0c;
356 }
6a3cebb6 357 atp_writeb_pci(dev, c, 1, i);
1da177e4
LT		 358 } else if ((dev->dev_id == ATP880_DEVID1) ||
359 (dev->dev_id == ATP880_DEVID2) ) {
6a3cebb6
OZ		 360 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
361 atp_writeb_base(dev, 0x3b, (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
362 else
363 atp_writeb_base(dev, 0x3b, atp_readb_base(dev, 0x3b) & 0x3f);
1da177e4 364 } else {
6a3cebb6 365 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
c751d9f1 366 atp_writeb_base(dev, 0x3a, (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
6a3cebb6 367 else
c751d9f1 368 atp_writeb_base(dev, 0x3a, atp_readb_base(dev, 0x3a) & 0xf3);
1da177e4 369 }
1da177e4
LT		 370 j = 0;
371 id = 1;
372 id = id << target_id;
373 /*
374 * Is this a wide device
375 */
376 if ((id & dev->wide_id[c]) != 0) {
377 j |= 0x01;
378 }
6a3cebb6
OZ		 379 atp_writeb_io(dev, c, 0x1b, j);
380 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j)
381 atp_writeb_io(dev, c, 0x1b, j);
1da177e4 382 if (dev->id[c][target_id].last_len == 0) {
6a3cebb6 383 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4
LT		 384 dev->in_int[c] = 0;
385#ifdef ED_DBGP
386 printk("dev->id[c][target_id].last_len = 0\n");
387#endif
78614ecd 388 return IRQ_HANDLED;
1da177e4
LT		 389 }
390#ifdef ED_DBGP
391 printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
392#endif
393 prd = dev->id[c][target_id].prd_pos;
394 while (adrcnt != 0) {
395 id = ((unsigned short int *)prd)[2];
396 if (id == 0) {
397 k = 0x10000;
398 } else {
399 k = id;
400 }
401 if (k > adrcnt) {
402 ((unsigned short int *)prd)[2] = (unsigned short int)
403 (k - adrcnt);
404 ((unsigned long *)prd)[0] += adrcnt;
405 adrcnt = 0;
406 dev->id[c][target_id].prd_pos = prd;
407 } else {
408 adrcnt -= k;
409 dev->id[c][target_id].prdaddr += 0x08;
410 prd += 0x08;
411 if (adrcnt == 0) {
412 dev->id[c][target_id].prd_pos = prd;
413 }
414 }
415 }
6a3cebb6 416 atp_writel_pci(dev, c, 0x04, dev->id[c][target_id].prdaddr);
1da177e4
LT		 417#ifdef ED_DBGP
418 printk("dev->id[%d][%d].prdaddr 0x%8x\n", c, target_id, dev->id[c][target_id].prdaddr);
419#endif
bc0fe4c9 420 if (dev->dev_id != ATP885_DEVID) {
6a3cebb6
OZ		 421 atp_writeb_pci(dev, c, 2, 0x06);
422 atp_writeb_pci(dev, c, 2, 0x00);
1da177e4 423 }
1da177e4
LT		 424 /*
425 * Check transfer direction
426 */
427 if (dev->id[c][target_id].dirct != 0) {
6a3cebb6
OZ		 428 atp_writeb_io(dev, c, 0x18, 0x08);
429 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4
LT		 430 dev->in_int[c] = 0;
431#ifdef ED_DBGP
432 printk("status 0x80 return dirct != 0\n");
433#endif
78614ecd 434 return IRQ_HANDLED;
1da177e4 435 }
6a3cebb6
OZ		 436 atp_writeb_io(dev, c, 0x18, 0x08);
437 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4
LT		 438 dev->in_int[c] = 0;
439#ifdef ED_DBGP
440 printk("status 0x80 return dirct = 0\n");
441#endif
78614ecd 442 return IRQ_HANDLED;
1da177e4
LT		 443 }
444
445 /*
446 * Current scsi request on this target
447 */
448
449 workreq = dev->id[c][target_id].curr_req;
450
78614ecd 451 if (i == 0x42 || i == 0x16) {
1da177e4
LT		 452 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
453 dev->last_cmd[c] = 0xff;
454 }
78614ecd 455 if (i == 0x16) {
6a3cebb6 456 workreq->result = atp_readb_io(dev, c, 0x0f);
78614ecd
OZ		 457 if (((dev->r1f[c][target_id] & 0x10) != 0)&&(dev->dev_id==ATP885_DEVID)) {
458 printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
459 workreq->result = 0x02;
460 }
461 } else
462 workreq->result = 0x02;
463
1da177e4 464 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 465 j = atp_readb_base(dev, 0x29) | 0x01;
466 atp_writeb_base(dev, 0x29, j);
1da177e4
LT		 467 }
468 /*
469 * Complete the command
470 */
fe7ed98f
BH		 471 scsi_dma_unmap(workreq);
472
1da177e4
LT		 473 spin_lock_irqsave(dev->host->host_lock, flags);
474 (*workreq->scsi_done) (workreq);
475#ifdef ED_DBGP
476 printk("workreq->scsi_done\n");
477#endif
478 /*
479 * Clear it off the queue
480 */
481 dev->id[c][target_id].curr_req = NULL;
482 dev->working[c]--;
483 spin_unlock_irqrestore(dev->host->host_lock, flags);
484 /*
485 * Take it back wide
486 */
487 if (dev->wide_id[c] != 0) {
6a3cebb6
OZ		 488 atp_writeb_io(dev, c, 0x1b, 0x01);
489 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
490 atp_writeb_io(dev, c, 0x1b, 0x01);
1da177e4
LT		 491 }
492 /*
493 * If there is stuff to send and nothing going then send it
494 */
495 spin_lock_irqsave(dev->host->host_lock, flags);
496 if (((dev->last_cmd[c] != 0xff) || (dev->quhd[c] != dev->quend[c])) &&
497 (dev->in_snd[c] == 0)) {
498#ifdef ED_DBGP
499 printk("Call sent_s870(scsi_done)\n");
500#endif
501 send_s870(dev,c);
502 }
503 spin_unlock_irqrestore(dev->host->host_lock, flags);
504 dev->in_int[c] = 0;
78614ecd 505 return IRQ_HANDLED;
1da177e4
LT		 506 }
507 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
508 dev->last_cmd[c] = 0xff;
509 }
510 if (i == 0x4f) {
511 i = 0x89;
512 }
513 i &= 0x0f;
514 if (i == 0x09) {
6a3cebb6
OZ		 515 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
516 atp_writeb_pci(dev, c, 2, 0x06);
517 atp_writeb_pci(dev, c, 2, 0x00);
518 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4 519 if (dev->dev_id == ATP885_DEVID) {
1da177e4 520 k = dev->id[c][target_id].last_len;
6a3cebb6
OZ		 521 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&k))[2]);
522 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&k))[1]);
523 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&k))[0]);
1da177e4 524 dev->id[c][target_id].dirct = 0x00;
1da177e4
LT		 525 } else {
526 dev->id[c][target_id].dirct = 0x00;
1da177e4 527 }
6a3cebb6
OZ		 528 atp_writeb_io(dev, c, 0x18, 0x08);
529 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4 530 dev->in_int[c] = 0;
78614ecd 531 return IRQ_HANDLED;
1da177e4
LT		 532 }
533 if (i == 0x08) {
6a3cebb6
OZ		 534 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
535 atp_writeb_pci(dev, c, 2, 0x06);
536 atp_writeb_pci(dev, c, 2, 0x00);
537 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4 538 if (dev->dev_id == ATP885_DEVID) {
1da177e4 539 k = dev->id[c][target_id].last_len;
6a3cebb6
OZ		 540 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&k))[2]);
541 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&k))[1]);
542 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&k))[0]);
1da177e4 543 }
6a3cebb6 544 atp_writeb_io(dev, c, 0x15, atp_readb_io(dev, c, 0x15) | 0x20);
1da177e4 545 dev->id[c][target_id].dirct = 0x20;
6a3cebb6
OZ		 546 atp_writeb_io(dev, c, 0x18, 0x08);
547 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4 548 dev->in_int[c] = 0;
78614ecd 549 return IRQ_HANDLED;
1da177e4 550 }
6a3cebb6
OZ		 551 if (i == 0x0a)
552 atp_writeb_io(dev, c, 0x10, 0x30);
553 else
554 atp_writeb_io(dev, c, 0x10, 0x46);
1da177e4 555 dev->id[c][target_id].dirct = 0x00;
6a3cebb6
OZ		 556 atp_writeb_io(dev, c, 0x12, 0x00);
557 atp_writeb_io(dev, c, 0x13, 0x00);
558 atp_writeb_io(dev, c, 0x14, 0x00);
559 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4 560 }
78614ecd
OZ		 561 dev->in_int[c] = 0;
562
1da177e4
LT		 563 return IRQ_HANDLED;
564}
565/**
566 * atp870u_queuecommand - Queue SCSI command
567 * @req_p: request block
568 * @done: completion function
569 *
570 * Queue a command to the ATP queue. Called with the host lock held.
571 */
f281233d 572static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p,
1da177e4
LT		 573 void (*done) (struct scsi_cmnd *))
574{
575 unsigned char c;
3b836464 576 unsigned int m;
1da177e4
LT		 577 struct atp_unit *dev;
578 struct Scsi_Host *host;
579
422c0d61 580 c = scmd_channel(req_p);
1da177e4 581 req_p->sense_buffer[0]=0;
fe7ed98f 582 scsi_set_resid(req_p, 0);
422c0d61 583 if (scmd_channel(req_p) > 1) {
1da177e4
LT		 584 req_p->result = 0x00040000;
585 done(req_p);
586#ifdef ED_DBGP
587 printk("atp870u_queuecommand : req_p->device->channel > 1\n");
588#endif
589 return 0;
590 }
591
592 host = req_p->device->host;
593 dev = (struct atp_unit *)&host->hostdata;
594
595
596
597 m = 1;
422c0d61 598 m = m << scmd_id(req_p);
1da177e4
LT		 599
600 /*
601 * Fake a timeout for missing targets
602 */
603
604 if ((m & dev->active_id[c]) == 0) {
605 req_p->result = 0x00040000;
606 done(req_p);
607 return 0;
608 }
609
610 if (done) {
611 req_p->scsi_done = done;
612 } else {
613#ifdef ED_DBGP
614 printk( "atp870u_queuecommand: done can't be NULL\n");
615#endif
616 req_p->result = 0;
617 done(req_p);
618 return 0;
619 }
620
621 /*
622 * Count new command
623 */
624 dev->quend[c]++;
625 if (dev->quend[c] >= qcnt) {
626 dev->quend[c] = 0;
627 }
628
629 /*
630 * Check queue state
631 */
632 if (dev->quhd[c] == dev->quend[c]) {
633 if (dev->quend[c] == 0) {
634 dev->quend[c] = qcnt;
635 }
636#ifdef ED_DBGP
637 printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
638#endif
639 dev->quend[c]--;
640 req_p->result = 0x00020000;
641 done(req_p);
642 return 0;
643 }
644 dev->quereq[c][dev->quend[c]] = req_p;
1da177e4 645#ifdef ED_DBGP
6a3cebb6 646 printk("dev->ioport[c] = %x atp_readb_io(dev, c, 0x1c) = %x dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",dev->ioport[c],atp_readb_io(dev, c, 0x1c),c,dev->in_int[c],c,dev->in_snd[c]);
1da177e4 647#endif
6a3cebb6 648 if ((atp_readb_io(dev, c, 0x1c) == 0) && (dev->in_int[c] == 0) && (dev->in_snd[c] == 0)) {
1da177e4
LT		 649#ifdef ED_DBGP
650 printk("Call sent_s870(atp870u_queuecommand)\n");
651#endif
652 send_s870(dev,c);
653 }
654#ifdef ED_DBGP
655 printk("atp870u_queuecommand : exit\n");
656#endif
657 return 0;
658}
659
f281233d
JG		 660static DEF_SCSI_QCMD(atp870u_queuecommand)
661
1da177e4
LT		 662/**
663 * send_s870 - send a command to the controller
664 * @host: host
665 *
666 * On entry there is work queued to be done. We move some of that work to the
667 * controller itself.
668 *
669 * Caller holds the host lock.
670 */
671static void send_s870(struct atp_unit *dev,unsigned char c)
672{
468b8968 673 struct scsi_cmnd *workreq = NULL;
1da177e4
LT		 674 unsigned int i;//,k;
675 unsigned char j, target_id;
676 unsigned char *prd;
c2bab403 677 unsigned short int w;
1da177e4 678 unsigned long l, bttl = 0;
1da177e4
LT		 679 unsigned long sg_count;
680
681 if (dev->in_snd[c] != 0) {
682#ifdef ED_DBGP
683 printk("cmnd in_snd\n");
684#endif
685 return;
686 }
687#ifdef ED_DBGP
688 printk("Sent_s870 enter\n");
689#endif
690 dev->in_snd[c] = 1;
691 if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
692 dev->last_cmd[c] &= 0x0f;
693 workreq = dev->id[c][dev->last_cmd[c]].curr_req;
468b8968
OZ		 694 if (!workreq) {
695 dev->last_cmd[c] = 0xff;
696 if (dev->quhd[c] == dev->quend[c]) {
697 dev->in_snd[c] = 0;
698 return;
699 }
1da177e4
LT		 700 }
701 }
468b8968
OZ		 702 if (!workreq) {
703 if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
704 dev->in_snd[c] = 0;
705 return;
706 }
707 dev->working[c]++;
708 j = dev->quhd[c];
709 dev->quhd[c]++;
710 if (dev->quhd[c] >= qcnt)
711 dev->quhd[c] = 0;
712 workreq = dev->quereq[c][dev->quhd[c]];
713 if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
714 dev->quhd[c] = j;
715 dev->working[c]--;
716 dev->in_snd[c] = 0;
717 return;
718 }
422c0d61
JG		 719 dev->id[c][scmd_id(workreq)].curr_req = workreq;
720 dev->last_cmd[c] = scmd_id(workreq);
1da177e4 721 }
6a3cebb6 722 if ((atp_readb_io(dev, c, 0x1f) & 0xb0) != 0 || atp_readb_io(dev, c, 0x1c) != 0) {
1da177e4 723#ifdef ED_DBGP
468b8968 724 printk("Abort to Send\n");
1da177e4 725#endif
468b8968
OZ		 726 dev->last_cmd[c] |= 0x40;
727 dev->in_snd[c] = 0;
728 return;
729 }
1da177e4
LT		 730#ifdef ED_DBGP
731 printk("OK to Send\n");
422c0d61 732 scmd_printk(KERN_DEBUG, workreq, "CDB");
1da177e4
LT		 733 for(i=0;i<workreq->cmd_len;i++) {
734 printk(" %x",workreq->cmnd[i]);
735 }
422c0d61 736 printk("\n");
1da177e4 737#endif
fe7ed98f
BH		 738 l = scsi_bufflen(workreq);
739
1da177e4 740 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6
OZ		 741 j = atp_readb_base(dev, 0x29) & 0xfe;
742 atp_writeb_base(dev, 0x29, j);
422c0d61 743 dev->r1f[c][scmd_id(workreq)] = 0;
1da177e4
LT		 744 }
745
746 if (workreq->cmnd[0] == READ_CAPACITY) {
fe7ed98f
BH		 747 if (l > 8)
748 l = 8;
1da177e4
LT		 749 }
750 if (workreq->cmnd[0] == 0x00) {
fe7ed98f 751 l = 0;
1da177e4
LT		 752 }
753
1da177e4 754 j = 0;
422c0d61 755 target_id = scmd_id(workreq);
1da177e4
LT		 756
757 /*
758 * Wide ?
759 */
760 w = 1;
761 w = w << target_id;
762 if ((w & dev->wide_id[c]) != 0) {
763 j |= 0x01;
764 }
6a3cebb6
OZ		 765 atp_writeb_io(dev, c, 0x1b, j);
766 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j) {
767 atp_writeb_pci(dev, c, 0x1b, j);
1da177e4
LT		 768#ifdef ED_DBGP
769 printk("send_s870 while loop 1\n");
770#endif
771 }
772 /*
773 * Write the command
774 */
775
6a3cebb6
OZ		 776 atp_writeb_io(dev, c, 0x00, workreq->cmd_len);
777 atp_writeb_io(dev, c, 0x01, 0x2c);
778 if (dev->dev_id == ATP885_DEVID)
779 atp_writeb_io(dev, c, 0x02, 0x7f);
780 else
781 atp_writeb_io(dev, c, 0x02, 0xcf);
782 for (i = 0; i < workreq->cmd_len; i++)
783 atp_writeb_io(dev, c, 0x03 + i, workreq->cmnd[i]);
784 atp_writeb_io(dev, c, 0x0f, workreq->device->lun);
1da177e4
LT		 785 /*
786 * Write the target
787 */
6a3cebb6 788 atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
1da177e4
LT		 789#ifdef ED_DBGP
790 printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,dev->id[c][target_id].devsp);
791#endif
fe7ed98f
BH		 792
793 sg_count = scsi_dma_map(workreq);
1da177e4
LT		 794 /*
795 * Write transfer size
796 */
6a3cebb6
OZ		 797 atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&l))[2]);
798 atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&l))[1]);
799 atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&l))[0]);
1da177e4
LT		 800 j = target_id;
801 dev->id[c][j].last_len = l;
802 dev->id[c][j].tran_len = 0;
803#ifdef ED_DBGP
804 printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
805#endif
806 /*
807 * Flip the wide bits
808 */
809 if ((j & 0x08) != 0) {
810 j = (j & 0x07) | 0x40;
811 }
812 /*
813 * Check transfer direction
814 */
6a3cebb6
OZ		 815 if (workreq->sc_data_direction == DMA_TO_DEVICE)
816 atp_writeb_io(dev, c, 0x15, j | 0x20);
817 else
818 atp_writeb_io(dev, c, 0x15, j);
819 atp_writeb_io(dev, c, 0x16, atp_readb_io(dev, c, 0x16) | 0x80);
820 atp_writeb_io(dev, c, 0x16, 0x80);
1da177e4
LT		 821 dev->id[c][target_id].dirct = 0;
822 if (l == 0) {
6a3cebb6 823 if (atp_readb_io(dev, c, 0x1c) == 0) {
1da177e4
LT		 824#ifdef ED_DBGP
825 printk("change SCSI_CMD_REG 0x08\n");
826#endif
6a3cebb6
OZ		 827 atp_writeb_io(dev, c, 0x18, 0x08);
828 } else
1da177e4 829 dev->last_cmd[c] |= 0x40;
1da177e4
LT		 830 dev->in_snd[c] = 0;
831 return;
832 }
1da177e4
LT		 833 prd = dev->id[c][target_id].prd_table;
834 dev->id[c][target_id].prd_pos = prd;
835
836 /*
837 * Now write the request list. Either as scatter/gather or as
838 * a linear chain.
839 */
840
fe7ed98f
BH		 841 if (l) {
842 struct scatterlist *sgpnt;
1da177e4 843 i = 0;
fe7ed98f
BH		 844 scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
845 bttl = sg_dma_address(sgpnt);
846 l=sg_dma_len(sgpnt);
1da177e4 847#ifdef ED_DBGP
fe7ed98f 848 printk("1. bttl %x, l %x\n",bttl, l);
1da177e4 849#endif
fe7ed98f 850 while (l > 0x10000) {
1da177e4
LT		 851 (((u16 *) (prd))[i + 3]) = 0x0000;
852 (((u16 *) (prd))[i + 2]) = 0x0000;
853 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
854 l -= 0x10000;
855 bttl += 0x10000;
856 i += 0x04;
857 }
858 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
859 (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
860 (((u16 *) (prd))[i + 3]) = 0;
861 i += 0x04;
862 }
863 (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
864#ifdef ED_DBGP
865 printk("prd %4x %4x %4x %4x\n",(((unsigned short int *)prd)[0]),(((unsigned short int *)prd)[1]),(((unsigned short int *)prd)[2]),(((unsigned short int *)prd)[3]));
866 printk("2. bttl %x, l %x\n",bttl, l);
867#endif
1da177e4 868 }
1da177e4 869#ifdef ED_DBGP
c2bab403 870 printk("send_s870: prdaddr_2 0x%8x target_id %d\n", dev->id[c][target_id].prdaddr,target_id);
1da177e4 871#endif
b5683557 872 dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
6a3cebb6
OZ		 873 atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
874 atp_writeb_pci(dev, c, 2, 0x06);
875 atp_writeb_pci(dev, c, 2, 0x00);
1da177e4 876 if (dev->dev_id == ATP885_DEVID) {
6a3cebb6 877 j = atp_readb_pci(dev, c, 1) & 0xf3;
1da177e4
LT		 878 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) ||
879 (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a)) {
880 j |= 0x0c;
881 }
6a3cebb6 882 atp_writeb_pci(dev, c, 1, j);
1da177e4
LT		 883 } else if ((dev->dev_id == ATP880_DEVID1) ||
884 (dev->dev_id == ATP880_DEVID2)) {
6a3cebb6
OZ		 885 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
886 atp_writeb_base(dev, 0x3b, (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
887 else
888 atp_writeb_base(dev, 0x3b, atp_readb_base(dev, 0x3b) & 0x3f);
1da177e4 889 } else {
6a3cebb6 890 if ((workreq->cmnd[0] == 0x08) || (workreq->cmnd[0] == 0x28) || (workreq->cmnd[0] == 0x0a) || (workreq->cmnd[0] == 0x2a))
c751d9f1 891 atp_writeb_base(dev, 0x3a, (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
6a3cebb6 892 else
c751d9f1 893 atp_writeb_base(dev, 0x3a, atp_readb_base(dev, 0x3a) & 0xf3);
1da177e4 894 }
1da177e4
LT		 895
896 if(workreq->sc_data_direction == DMA_TO_DEVICE) {
897 dev->id[c][target_id].dirct = 0x20;
6a3cebb6
OZ		 898 if (atp_readb_io(dev, c, 0x1c) == 0) {
899 atp_writeb_io(dev, c, 0x18, 0x08);
900 atp_writeb_pci(dev, c, 0, 0x01);
1da177e4
LT		 901#ifdef ED_DBGP
902 printk( "start DMA(to target)\n");
903#endif
904 } else {
905 dev->last_cmd[c] |= 0x40;
906 }
907 dev->in_snd[c] = 0;
908 return;
909 }
6a3cebb6
OZ		 910 if (atp_readb_io(dev, c, 0x1c) == 0) {
911 atp_writeb_io(dev, c, 0x18, 0x08);
912 atp_writeb_pci(dev, c, 0, 0x09);
1da177e4
LT		 913#ifdef ED_DBGP
914 printk( "start DMA(to host)\n");
915#endif
916 } else {
917 dev->last_cmd[c] |= 0x40;
918 }
919 dev->in_snd[c] = 0;
920 return;
921
922}
923
924static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
925{
1da177e4
LT		 926 unsigned short int i, k;
927 unsigned char j;
928
6a3cebb6 929 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 930 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 931 k = atp_readw_io(dev, 0, 0x1c);
1da177e4 932 j = (unsigned char) (k >> 8);
832e9ac6
OZ		 933 if ((k & 0x8000) != 0) /* DB7 all release? */
934 i = 0;
1da177e4
LT		 935 }
936 *val |= 0x4000; /* assert DB6 */
6a3cebb6 937 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 938 *val &= 0xdfff; /* assert DB5 */
6a3cebb6 939 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 940 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 941 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) != 0) /* DB5 all release? */
832e9ac6 942 i = 0;
1da177e4
LT		 943 }
944 *val |= 0x8000; /* no DB4-0, assert DB7 */
945 *val &= 0xe0ff;
6a3cebb6 946 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 947 *val &= 0xbfff; /* release DB6 */
6a3cebb6 948 atp_writew_io(dev, 0, 0x1c, *val);
1da177e4 949 for (i = 0; i < 10; i++) { /* stable >= bus settle delay(400 ns) */
6a3cebb6 950 if ((atp_readw_io(dev, 0, 0x1c) & 0x4000) != 0) /* DB6 all release? */
832e9ac6 951 i = 0;
1da177e4
LT		 952 }
953
954 return j;
955}
956
957static void tscam(struct Scsi_Host *host)
958{
959
1da177e4
LT		 960 unsigned char i, j, k;
961 unsigned long n;
962 unsigned short int m, assignid_map, val;
963 unsigned char mbuf[33], quintet[2];
964 struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
965 static unsigned char g2q_tab[8] = {
966 0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
967 };
968
969/* I can't believe we need this before we've even done anything. Remove it
970 * and see if anyone bitches.
971 for (i = 0; i < 0x10; i++) {
972 udelay(0xffff);
973 }
974 */
975
6a3cebb6
OZ		 976 atp_writeb_io(dev, 0, 1, 0x08);
977 atp_writeb_io(dev, 0, 2, 0x7f);
978 atp_writeb_io(dev, 0, 0x11, 0x20);
1da177e4
LT		 979
980 if ((dev->scam_on & 0x40) == 0) {
981 return;
982 }
983 m = 1;
984 m <<= dev->host_id[0];
985 j = 16;
986 if (dev->chip_ver < 4) {
987 m |= 0xff00;
988 j = 8;
989 }
990 assignid_map = m;
6a3cebb6
OZ		 991 atp_writeb_io(dev, 0, 0x02, 0x02); /* 2*2=4ms,3EH 2/32*3E=3.9ms */
992 atp_writeb_io(dev, 0, 0x03, 0);
993 atp_writeb_io(dev, 0, 0x04, 0);
994 atp_writeb_io(dev, 0, 0x05, 0);
995 atp_writeb_io(dev, 0, 0x06, 0);
996 atp_writeb_io(dev, 0, 0x07, 0);
997 atp_writeb_io(dev, 0, 0x08, 0);
1da177e4
LT		 998
999 for (i = 0; i < j; i++) {
1000 m = 1;
1001 m = m << i;
1002 if ((m & assignid_map) != 0) {
1003 continue;
1004 }
6a3cebb6
OZ		 1005 atp_writeb_io(dev, 0, 0x0f, 0);
1006 atp_writeb_io(dev, 0, 0x12, 0);
1007 atp_writeb_io(dev, 0, 0x13, 0);
1008 atp_writeb_io(dev, 0, 0x14, 0);
1da177e4
LT		 1009 if (i > 7) {
1010 k = (i & 0x07) | 0x40;
1011 } else {
1012 k = i;
1013 }
6a3cebb6
OZ		 1014 atp_writeb_io(dev, 0, 0x15, k);
1015 if (dev->chip_ver == 4)
1016 atp_writeb_io(dev, 0, 0x1b, 0x01);
1017 else
1018 atp_writeb_io(dev, 0, 0x1b, 0x00);
58c4d046 1019 do {
6a3cebb6 1020 atp_writeb_io(dev, 0, 0x18, 0x09);
1da177e4 1021
6a3cebb6 1022 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0x00)
58c4d046 1023 cpu_relax();
6a3cebb6 1024 k = atp_readb_io(dev, 0, 0x17);
58c4d046
OZ		 1025 if ((k == 0x85) || (k == 0x42))
1026 break;
1027 if (k != 0x16)
6a3cebb6 1028 atp_writeb_io(dev, 0, 0x10, 0x41);
58c4d046
OZ		 1029 } while (k != 0x16);
1030 if ((k == 0x85) || (k == 0x42))
1031 continue;
1da177e4
LT		 1032 assignid_map |= m;
1033
1034 }
6a3cebb6
OZ		 1035 atp_writeb_io(dev, 0, 0x02, 0x7f);
1036 atp_writeb_io(dev, 0, 0x1b, 0x02);
1da177e4 1037
2bbbac45 1038 udelay(2);
1da177e4
LT		 1039
1040 val = 0x0080; /* bsy */
6a3cebb6 1041 atp_writew_io(dev, 0, 0x1c, val);
1da177e4 1042 val |= 0x0040; /* sel */
6a3cebb6 1043 atp_writew_io(dev, 0, 0x1c, val);
1da177e4 1044 val |= 0x0004; /* msg */
6a3cebb6 1045 atp_writew_io(dev, 0, 0x1c, val);
2bbbac45 1046 udelay(2); /* 2 deskew delay(45ns*2=90ns) */
1da177e4 1047 val &= 0x007f; /* no bsy */
6a3cebb6 1048 atp_writew_io(dev, 0, 0x1c, val);
1da177e4
LT		 1049 mdelay(128);
1050 val &= 0x00fb; /* after 1ms no msg */
6a3cebb6
OZ		 1051 atp_writew_io(dev, 0, 0x1c, val);
1052 while ((atp_readb_io(dev, 0, 0x1c) & 0x04) != 0)
58c4d046 1053 ;
2bbbac45 1054 udelay(2);
1da177e4 1055 udelay(100);
c7fcc089 1056 for (n = 0; n < 0x30000; n++)
6a3cebb6 1057 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) != 0) /* bsy ? */
c7fcc089
OZ		 1058 break;
1059 if (n < 0x30000)
1060 for (n = 0; n < 0x30000; n++)
6a3cebb6 1061 if ((atp_readb_io(dev, 0, 0x1c) & 0x81) == 0x0081) {
2bbbac45 1062 udelay(2);
c7fcc089 1063 val |= 0x8003; /* io,cd,db7 */
6a3cebb6 1064 atp_writew_io(dev, 0, 0x1c, val);
2bbbac45 1065 udelay(2);
c7fcc089 1066 val &= 0x00bf; /* no sel */
6a3cebb6 1067 atp_writew_io(dev, 0, 0x1c, val);
2bbbac45 1068 udelay(2);
c7fcc089
OZ		 1069 break;
1070 }
1071 while (1) {
0f6d93aa
MM		 1072 /*
1073 * The funny division into multiple delays is to accomodate
1074 * arches like ARM where udelay() multiplies its argument by
1075 * a large number to initialize a loop counter. To avoid
1076 * overflow, the maximum supported udelay is 2000 microseconds.
1077 *
1078 * XXX it would be more polite to find a way to use msleep()
1079 */
1080 mdelay(2);
1081 udelay(48);
6a3cebb6
OZ		 1082 if ((atp_readb_io(dev, 0, 0x1c) & 0x80) == 0x00) { /* bsy ? */
1083 atp_writew_io(dev, 0, 0x1c, 0);
1084 atp_writeb_io(dev, 0, 0x1b, 0);
1085 atp_writeb_io(dev, 0, 0x15, 0);
1086 atp_writeb_io(dev, 0, 0x18, 0x09);
1087 while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0)
1da177e4 1088 cpu_relax();
6a3cebb6 1089 atp_readb_io(dev, 0, 0x17);
1da177e4
LT		 1090 return;
1091 }
1092 val &= 0x00ff; /* synchronization */
1093 val |= 0x3f00;
1094 fun_scam(dev, &val);
2bbbac45 1095 udelay(2);
1da177e4
LT		 1096 val &= 0x00ff; /* isolation */
1097 val |= 0x2000;
1098 fun_scam(dev, &val);
2bbbac45 1099 udelay(2);
1da177e4
LT		 1100 i = 8;
1101 j = 0;
c7fcc089
OZ		 1102
1103 while (1) {
6a3cebb6 1104 if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) == 0)
c7fcc089 1105 continue;
2bbbac45 1106 udelay(2);
c7fcc089
OZ		 1107 val &= 0x00ff; /* get ID_STRING */
1108 val |= 0x2000;
1109 k = fun_scam(dev, &val);
1110 if ((k & 0x03) == 0)
1111 break;
1112 mbuf[j] <<= 0x01;
1113 mbuf[j] &= 0xfe;
1114 if ((k & 0x02) != 0)
1115 mbuf[j] |= 0x01;
1116 i--;
1117 if (i > 0)
1118 continue;
1119 j++;
1120 i = 8;
1da177e4 1121 }
1da177e4 1122
c7fcc089 1123 /* isolation complete.. */
1da177e4
LT		 1124/* mbuf[32]=0;
1125 printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1126 i = 15;
1127 j = mbuf[0];
25985edc 1128 if ((j & 0x20) != 0) { /* bit5=1:ID up to 7 */
1da177e4
LT		 1129 i = 7;
1130 }
c7fcc089
OZ		 1131 if ((j & 0x06) != 0) { /* IDvalid? */
1132 k = mbuf[1];
1133 while (1) {
1134 m = 1;
1135 m <<= k;
1136 if ((m & assignid_map) == 0)
1137 break;
1138 if (k > 0)
1139 k--;
1140 else
1141 break;
1142 }
1da177e4 1143 }
c7fcc089
OZ		 1144 if ((m & assignid_map) != 0) { /* srch from max acceptable ID# */
1145 k = i; /* max acceptable ID# */
1146 while (1) {
1147 m = 1;
1148 m <<= k;
1149 if ((m & assignid_map) == 0)
1150 break;
1151 if (k > 0)
1152 k--;
1153 else
1154 break;
1155 }
1da177e4 1156 }
c7fcc089 1157 /* k=binID#, */
1da177e4
LT		 1158 assignid_map |= m;
1159 if (k < 8) {
1160 quintet[0] = 0x38; /* 1st dft ID<8 */
1161 } else {
1162 quintet[0] = 0x31; /* 1st ID>=8 */
1163 }
1164 k &= 0x07;
1165 quintet[1] = g2q_tab[k];
1166
1167 val &= 0x00ff; /* AssignID 1stQuintet,AH=001xxxxx */
1168 m = quintet[0] << 8;
1169 val |= m;
1170 fun_scam(dev, &val);
1171 val &= 0x00ff; /* AssignID 2ndQuintet,AH=001xxxxx */
1172 m = quintet[1] << 8;
1173 val |= m;
1174 fun_scam(dev, &val);
1175
c7fcc089 1176 }
1da177e4
LT		 1177}
1178
1da177e4
LT		 1179static void atp870u_free_tables(struct Scsi_Host *host)
1180{
1181 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1182 int j, k;
1183 for (j=0; j < 2; j++) {
1184 for (k = 0; k < 16; k++) {
1185 if (!atp_dev->id[j][k].prd_table)
1186 continue;
b5683557 1187 pci_free_consistent(atp_dev->pdev, 1024, atp_dev->id[j][k].prd_table, atp_dev->id[j][k].prd_bus);
1da177e4
LT		 1188 atp_dev->id[j][k].prd_table = NULL;
1189 }
1190 }
1191}
1192
1193static int atp870u_init_tables(struct Scsi_Host *host)
1194{
1195 struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1196 int c,k;
1197 for(c=0;c < 2;c++) {
1198 for(k=0;k<16;k++) {
b5683557 1199 atp_dev->id[c][k].prd_table = pci_alloc_consistent(atp_dev->pdev, 1024, &(atp_dev->id[c][k].prd_bus));
1da177e4
LT		 1200 if (!atp_dev->id[c][k].prd_table) {
1201 printk("atp870u_init_tables fail\n");
1202 atp870u_free_tables(host);
1203 return -ENOMEM;
1204 }
b5683557 1205 atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1da177e4
LT		 1206 atp_dev->id[c][k].devsp=0x20;
1207 atp_dev->id[c][k].devtype = 0x7f;
1208 atp_dev->id[c][k].curr_req = NULL;
1209 }
1210
1211 atp_dev->active_id[c] = 0;
1212 atp_dev->wide_id[c] = 0;
1213 atp_dev->host_id[c] = 0x07;
1214 atp_dev->quhd[c] = 0;
1215 atp_dev->quend[c] = 0;
1216 atp_dev->last_cmd[c] = 0xff;
1217 atp_dev->in_snd[c] = 0;
1218 atp_dev->in_int[c] = 0;
1219
1220 for (k = 0; k < qcnt; k++) {
1221 atp_dev->quereq[c][k] = NULL;
1222 }
1223 for (k = 0; k < 16; k++) {
1224 atp_dev->id[c][k].curr_req = NULL;
1225 atp_dev->sp[c][k] = 0x04;
1226 }
1227 }
1228 return 0;
1229}
1230
6a1961bc
OZ		 1231static void atp_set_host_id(struct atp_unit *atp, u8 c, u8 host_id)
1232{
1233 atp_writeb_io(atp, c, 0, host_id | 0x08);
1234 atp_writeb_io(atp, c, 0x18, 0);
1235 while ((atp_readb_io(atp, c, 0x1f) & 0x80) == 0)
1236 mdelay(1);
1237 atp_readb_io(atp, c, 0x17);
1238 atp_writeb_io(atp, c, 1, 8);
1239 atp_writeb_io(atp, c, 2, 0x7f);
1240 atp_writeb_io(atp, c, 0x11, 0x20);
1241}
1242
1da177e4
LT		 1243/* return non-zero on detection */
1244static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1245{
1246 unsigned char k, m, c;
1247 unsigned long flags;
493c5201 1248 unsigned int base_io, error,n;
1da177e4
LT		 1249 unsigned char host_id;
1250 struct Scsi_Host *shpnt = NULL;
bdd5ac40 1251 struct atp_unit *atpdev;
1da177e4 1252 unsigned char setupdata[2][16];
bdd5ac40 1253 int err;
dc6a78f1 1254
b1e85063
OZ		 1255 if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610 && pdev->revision < 2) {
1256 dev_err(&pdev->dev, "ATP850S chips (AEC6710L/F cards) are not supported.\n");
1257 return -ENODEV;
1258 }
1259
bdd5ac40
OZ		 1260 err = pci_enable_device(pdev);
1261 if (err)
1262 goto fail;
1da177e4 1263
34a2c35d 1264 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1da177e4 1265 printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
bdd5ac40
OZ		 1266 err = -EIO;
1267 goto disable_device;
1da177e4
LT		 1268 }
1269
bdd5ac40
OZ		 1270 err = -ENOMEM;
1271 shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1272 if (!shpnt)
1273 goto disable_device;
1274
1275 atpdev = shost_priv(shpnt);
1276
1277 atpdev->host = shpnt;
1278 atpdev->pdev = pdev;
1279 pci_set_drvdata(pdev, atpdev);
1280
1da177e4 1281 switch (ent->device) {
b1e85063
OZ		 1282 case PCI_DEVICE_ID_ARTOP_AEC7610:
1283 atpdev->chip_ver = pdev->revision;
1284 break;
1da177e4
LT		 1285 case PCI_DEVICE_ID_ARTOP_AEC7612UW:
1286 case PCI_DEVICE_ID_ARTOP_AEC7612SUW:
1287 case ATP880_DEVID1:
1288 case ATP880_DEVID2:
1289 case ATP885_DEVID:
dc6a78f1 1290 atpdev->chip_ver = 0x04;
1da177e4
LT		 1291 default:
1292 break;
1293 }
1294 base_io = pci_resource_start(pdev, 0);
1295 base_io &= 0xfffffff8;
6a3cebb6 1296 atpdev->baseport = base_io;
dc6a78f1 1297
1da177e4 1298 if ((ent->device == ATP880_DEVID1)||(ent->device == ATP880_DEVID2)) {
7d7311c4 1299 atpdev->chip_ver = pdev->revision;
1da177e4
LT		 1300 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);//JCC082803
1301
d804bb25
OZ		 1302 atpdev->ioport[0] = base_io + 0x40;
1303 atpdev->pciport[0] = base_io + 0x28;
1304
1305 host_id = atp_readb_base(atpdev, 0x39);
1da177e4
LT		 1306 host_id >>= 0x04;
1307
c48442d1
OZ		 1308 printk(KERN_INFO " ACARD AEC-67160 PCI Ultra3 LVD Host Adapter:"
1309 " IO:%x, IRQ:%d.\n", base_io, pdev->irq);
dc6a78f1
RD		 1310 atpdev->dev_id = ent->device;
1311 atpdev->host_id[0] = host_id;
1da177e4 1312
d804bb25
OZ		 1313 atpdev->scam_on = atp_readb_base(atpdev, 0x22);
1314 atpdev->global_map[0] = atp_readb_base(atpdev, 0x35);
1315 atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x3c);
1da177e4
LT		 1316
1317 n = 0x3f09;
1318next_fblk_880:
1319 if (n >= 0x4000)
1320 goto flash_ok_880;
1321
1322 m = 0;
d804bb25 1323 atp_writew_base(atpdev, 0x34, n);
1da177e4 1324 n += 0x0002;
d804bb25 1325 if (atp_readb_base(atpdev, 0x30) == 0xff)
1da177e4
LT		 1326 goto flash_ok_880;
1327
d804bb25
OZ		 1328 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1329 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1330 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1331 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1332 atp_writew_base(atpdev, 0x34, n);
1da177e4 1333 n += 0x0002;
d804bb25
OZ		 1334 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1335 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1336 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1337 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1338 atp_writew_base(atpdev, 0x34, n);
1da177e4 1339 n += 0x0002;
d804bb25
OZ		 1340 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1341 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1342 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1343 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1344 atp_writew_base(atpdev, 0x34, n);
1da177e4 1345 n += 0x0002;
d804bb25
OZ		 1346 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1347 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1348 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1349 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1da177e4
LT		 1350 n += 0x0018;
1351 goto next_fblk_880;
1352flash_ok_880:
d804bb25 1353 atp_writew_base(atpdev, 0x34, 0);
dc6a78f1
RD		 1354 atpdev->ultra_map[0] = 0;
1355 atpdev->async[0] = 0;
1da177e4
LT		 1356 for (k = 0; k < 16; k++) {
1357 n = 1;
1358 n = n << k;
dc6a78f1
RD		 1359 if (atpdev->sp[0][k] > 1) {
1360 atpdev->ultra_map[0] |= n;
1da177e4 1361 } else {
dc6a78f1
RD		 1362 if (atpdev->sp[0][k] == 0)
1363 atpdev->async[0] |= n;
1da177e4
LT		 1364 }
1365 }
dc6a78f1 1366 atpdev->async[0] = ~(atpdev->async[0]);
d804bb25 1367 atp_writeb_base(atpdev, 0x35, atpdev->global_map[0]);
1da177e4 1368
1da177e4
LT		 1369 if (atp870u_init_tables(shpnt) < 0) {
1370 printk(KERN_ERR "Unable to allocate tables for Acard controller\n");
bdd5ac40 1371 err = -ENOMEM;
1da177e4
LT		 1372 goto unregister;
1373 }
1374
bdd5ac40
OZ		 1375 err = request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp880i", shpnt);
1376 if (err) {
1da177e4
LT		 1377 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
1378 goto free_tables;
1379 }
1380
1381 spin_lock_irqsave(shpnt->host_lock, flags);
bdd5ac40
OZ		 1382 k = atp_readb_base(atpdev, 0x38) & 0x80;
1383 atp_writeb_base(atpdev, 0x38, k);
1384 atp_writeb_base(atpdev, 0x3b, 0x20);
1da177e4 1385 mdelay(32);
bdd5ac40 1386 atp_writeb_base(atpdev, 0x3b, 0);
1da177e4 1387 mdelay(32);
bdd5ac40
OZ		 1388 atp_readb_io(atpdev, 0, 0x1b);
1389 atp_readb_io(atpdev, 0, 0x17);
6a1961bc 1390
bdd5ac40 1391 atp_set_host_id(atpdev, 0, host_id);
1da177e4
LT		 1392
1393 tscam(shpnt);
bdd5ac40
OZ		 1394 atp_is(atpdev, 0, true, atp_readb_base(atpdev, 0x3f) & 0x40);
1395 atp_writeb_base(atpdev, 0x38, 0xb0);
1da177e4
LT		 1396 shpnt->max_id = 16;
1397 shpnt->this_id = host_id;
1398 shpnt->unique_id = base_io;
1399 shpnt->io_port = base_io;
1400 shpnt->n_io_port = 0x60; /* Number of bytes of I/O space used */
1401 shpnt->irq = pdev->irq;
1402 } else if (ent->device == ATP885_DEVID) {
1403 printk(KERN_INFO " ACARD AEC-67162 PCI Ultra3 LVD Host Adapter: IO:%x, IRQ:%d.\n"
1404 , base_io, pdev->irq);
1405
dc6a78f1
RD		 1406 atpdev->pdev = pdev;
1407 atpdev->dev_id = ent->device;
dc6a78f1
RD		 1408 atpdev->ioport[0] = base_io + 0x80;
1409 atpdev->ioport[1] = base_io + 0xc0;
1410 atpdev->pciport[0] = base_io + 0x40;
1411 atpdev->pciport[1] = base_io + 0x50;
1da177e4 1412
bdd5ac40
OZ		 1413 if (atp870u_init_tables(shpnt) < 0) {
1414 err = -ENOMEM;
1da177e4 1415 goto unregister;
bdd5ac40 1416 }
1da177e4
LT		 1417
1418#ifdef ED_DBGP
bdd5ac40 1419 printk("request_irq() shpnt %p hostdata %p\n", shpnt, atpdev);
1da177e4 1420#endif
bdd5ac40
OZ		 1421 err = request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt);
1422 if (err) {
1da177e4
LT		 1423 printk(KERN_ERR "Unable to allocate IRQ for Acard controller.\n");
1424 goto free_tables;
1425 }
1426
1427 spin_lock_irqsave(shpnt->host_lock, flags);
1428
bdd5ac40
OZ		 1429 c = atp_readb_base(atpdev, 0x29);
1430 atp_writeb_base(atpdev, 0x29, c | 0x04);
1da177e4
LT		 1431
1432 n=0x1f80;
1433next_fblk_885:
1434 if (n >= 0x2000) {
1435 goto flash_ok_885;
1436 }
bdd5ac40
OZ		 1437 atp_writew_base(atpdev, 0x3c, n);
1438 if (atp_readl_base(atpdev, 0x38) == 0xffffffff) {
1da177e4
LT		 1439 goto flash_ok_885;
1440 }
1441 for (m=0; m < 2; m++) {
bdd5ac40 1442 atpdev->global_map[m]= 0;
1da177e4 1443 for (k=0; k < 4; k++) {
bdd5ac40
OZ		 1444 atp_writew_base(atpdev, 0x3c, n++);
1445 ((unsigned long *)&setupdata[m][0])[k] = atp_readl_base(atpdev, 0x38);
1da177e4
LT		 1446 }
1447 for (k=0; k < 4; k++) {
bdd5ac40
OZ		 1448 atp_writew_base(atpdev, 0x3c, n++);
1449 ((unsigned long *)&atpdev->sp[m][0])[k] = atp_readl_base(atpdev, 0x38);
1da177e4
LT		 1450 }
1451 n += 8;
1452 }
1453 goto next_fblk_885;
1454flash_ok_885:
1455#ifdef ED_DBGP
1456 printk( "Flash Read OK\n");
1457#endif
bdd5ac40
OZ		 1458 c = atp_readb_base(atpdev, 0x29);
1459 atp_writeb_base(atpdev, 0x29, c & 0xfb);
1da177e4 1460 for (c=0;c < 2;c++) {
bdd5ac40
OZ		 1461 atpdev->ultra_map[c]=0;
1462 atpdev->async[c] = 0;
1da177e4
LT		 1463 for (k=0; k < 16; k++) {
1464 n=1;
1465 n = n << k;
bdd5ac40
OZ		 1466 if (atpdev->sp[c][k] > 1) {
1467 atpdev->ultra_map[c] |= n;
1da177e4 1468 } else {
bdd5ac40
OZ		 1469 if (atpdev->sp[c][k] == 0) {
1470 atpdev->async[c] |= n;
1da177e4
LT		 1471 }
1472 }
1473 }
bdd5ac40 1474 atpdev->async[c] = ~(atpdev->async[c]);
1da177e4 1475
bdd5ac40 1476 if (atpdev->global_map[c] == 0) {
1da177e4
LT		 1477 k=setupdata[c][1];
1478 if ((k & 0x40) != 0)
bdd5ac40 1479 atpdev->global_map[c] |= 0x20;
1da177e4 1480 k &= 0x07;
bdd5ac40 1481 atpdev->global_map[c] |= k;
1da177e4 1482 if ((setupdata[c][2] & 0x04) != 0)
bdd5ac40
OZ		 1483 atpdev->global_map[c] |= 0x08;
1484 atpdev->host_id[c] = setupdata[c][0] & 0x07;
1da177e4
LT		 1485 }
1486 }
1487
bdd5ac40 1488 k = atp_readb_base(atpdev, 0x28) & 0x8f;
1da177e4 1489 k |= 0x10;
bdd5ac40
OZ		 1490 atp_writeb_base(atpdev, 0x28, k);
1491 atp_writeb_pci(atpdev, 0, 1, 0x80);
1492 atp_writeb_pci(atpdev, 1, 1, 0x80);
1da177e4 1493 mdelay(100);
bdd5ac40
OZ		 1494 atp_writeb_pci(atpdev, 0, 1, 0);
1495 atp_writeb_pci(atpdev, 1, 1, 0);
1da177e4 1496 mdelay(1000);
bdd5ac40
OZ		 1497 atp_readb_io(atpdev, 0, 0x1b);
1498 atp_readb_io(atpdev, 0, 0x17);
1499 atp_readb_io(atpdev, 1, 0x1b);
1500 atp_readb_io(atpdev, 1, 0x17);
6a1961bc 1501
bdd5ac40 1502 k=atpdev->host_id[0];
1da177e4
LT		 1503 if (k > 7)
1504 k = (k & 0x07) | 0x40;
bdd5ac40 1505 atp_set_host_id(atpdev, 0, k);
493c5201 1506
bdd5ac40 1507 k=atpdev->host_id[1];
1da177e4
LT		 1508 if (k > 7)
1509 k = (k & 0x07) | 0x40;
bdd5ac40 1510 atp_set_host_id(atpdev, 1, k);
1da177e4 1511
c4ad92bc 1512 mdelay(600); /* this delay used to be called tscam_885() */
1da177e4 1513 printk(KERN_INFO " Scanning Channel A SCSI Device ...\n");
bdd5ac40
OZ		 1514 atp_is(atpdev, 0, true, atp_readb_io(atpdev, 0, 0x1b) >> 7);
1515 atp_writeb_io(atpdev, 0, 0x16, 0x80);
1da177e4 1516 printk(KERN_INFO " Scanning Channel B SCSI Device ...\n");
bdd5ac40
OZ		 1517 atp_is(atpdev, 1, true, atp_readb_io(atpdev, 1, 0x1b) >> 7);
1518 atp_writeb_io(atpdev, 1, 0x16, 0x80);
1519 k = atp_readb_base(atpdev, 0x28) & 0xcf;
1da177e4 1520 k |= 0xc0;
bdd5ac40
OZ		 1521 atp_writeb_base(atpdev, 0x28, k);
1522 k = atp_readb_base(atpdev, 0x1f) | 0x80;
1523 atp_writeb_base(atpdev, 0x1f, k);
1524 k = atp_readb_base(atpdev, 0x29) | 0x01;
1525 atp_writeb_base(atpdev, 0x29, k);
1da177e4
LT		 1526#ifdef ED_DBGP
1527 //printk("atp885: atp_host[0] 0x%p\n", atp_host[0]);
1528#endif
1529 shpnt->max_id = 16;
bdd5ac40 1530 shpnt->max_lun = (atpdev->global_map[0] & 0x07) + 1;
1da177e4 1531 shpnt->max_channel = 1;
bdd5ac40 1532 shpnt->this_id = atpdev->host_id[0];
1da177e4
LT		 1533 shpnt->unique_id = base_io;
1534 shpnt->io_port = base_io;
1535 shpnt->n_io_port = 0xff; /* Number of bytes of I/O space used */
1536 shpnt->irq = pdev->irq;
1537
1538 } else {
1539 error = pci_read_config_byte(pdev, 0x49, &host_id);
1540
c48442d1
OZ		 1541 printk(KERN_INFO " ACARD AEC-671X PCI Ultra/W SCSI-2/3 Host Adapter: "
1542 "IO:%x, IRQ:%d.\n", base_io, pdev->irq);
1da177e4 1543
dc6a78f1
RD		 1544 atpdev->ioport[0] = base_io;
1545 atpdev->pciport[0] = base_io + 0x20;
1546 atpdev->dev_id = ent->device;
1da177e4 1547 host_id &= 0x07;
dc6a78f1 1548 atpdev->host_id[0] = host_id;
d804bb25
OZ		 1549 atpdev->scam_on = atp_readb_pci(atpdev, 0, 2);
1550 atpdev->global_map[0] = atp_readb_base(atpdev, 0x2d);
1551 atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x2e);
1da177e4 1552
dc6a78f1
RD		 1553 if (atpdev->ultra_map[0] == 0) {
1554 atpdev->scam_on = 0x00;
1555 atpdev->global_map[0] = 0x20;
1556 atpdev->ultra_map[0] = 0xffff;
1da177e4
LT		 1557 }
1558
1da177e4 1559
bdd5ac40
OZ		 1560 if (atp870u_init_tables(shpnt) < 0) {
1561 err = -ENOMEM;
1da177e4 1562 goto unregister;
bdd5ac40 1563 }
1da177e4 1564
bdd5ac40
OZ		 1565 err = request_irq(pdev->irq, atp870u_intr_handle, IRQF_SHARED, "atp870i", shpnt);
1566 if (err) {
1da177e4
LT		 1567 printk(KERN_ERR "Unable to allocate IRQ%d for Acard controller.\n", pdev->irq);
1568 goto free_tables;
1569 }
1570
1571 spin_lock_irqsave(shpnt->host_lock, flags);
d804bb25 1572 if (atpdev->chip_ver > 0x07) /* check if atp876 chip then enable terminator */
bdd5ac40 1573 atp_writeb_base(atpdev, 0x3e, 0x00);
1da177e4 1574
bdd5ac40
OZ		 1575 k = (atp_readb_base(atpdev, 0x3a) & 0xf3) | 0x10;
1576 atp_writeb_base(atpdev, 0x3a, k);
1577 atp_writeb_base(atpdev, 0x3a, k & 0xdf);
1da177e4 1578 mdelay(32);
bdd5ac40 1579 atp_writeb_base(atpdev, 0x3a, k);
1da177e4 1580 mdelay(32);
bdd5ac40 1581 atp_set_host_id(atpdev, 0, host_id);
1da177e4
LT		 1582
1583 tscam(shpnt);
bdd5ac40
OZ		 1584 atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) | 0x10);
1585 atp_is(atpdev, 0, atpdev->chip_ver == 4, 0);
1586 atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) & 0xef);
1587 atp_writeb_base(atpdev, 0x3b, atp_readb_base(atpdev, 0x3b) | 0x20);
dc6a78f1 1588 if (atpdev->chip_ver == 4)
1da177e4
LT		 1589 shpnt->max_id = 16;
1590 else
2b89dad0 1591 shpnt->max_id = 8;
1da177e4
LT		 1592 shpnt->this_id = host_id;
1593 shpnt->unique_id = base_io;
1594 shpnt->io_port = base_io;
1595 shpnt->n_io_port = 0x40; /* Number of bytes of I/O space used */
1596 shpnt->irq = pdev->irq;
1597 }
1598 spin_unlock_irqrestore(shpnt->host_lock, flags);
bdd5ac40
OZ		 1599 if (!request_region(base_io, shpnt->n_io_port, "atp870u")) {
1600 err = -EBUSY;
30ebc7ef 1601 goto request_io_fail;
bdd5ac40
OZ		 1602 }
1603 err = scsi_add_host(shpnt, &pdev->dev);
1604 if (err)
1da177e4
LT		 1605 goto scsi_add_fail;
1606 scsi_scan_host(shpnt);
1607#ifdef ED_DBGP
1608 printk("atp870u_prob : exit\n");
1609#endif
1610 return 0;
1611
1612scsi_add_fail:
1613 printk("atp870u_prob:scsi_add_fail\n");
30ebc7ef 1614 release_region(base_io, shpnt->n_io_port);
1da177e4
LT		 1615request_io_fail:
1616 printk("atp870u_prob:request_io_fail\n");
1617 free_irq(pdev->irq, shpnt);
1618free_tables:
1619 printk("atp870u_prob:free_table\n");
1620 atp870u_free_tables(shpnt);
1621unregister:
1da177e4 1622 scsi_host_put(shpnt);
bdd5ac40
OZ		 1623disable_device:
1624 pci_disable_device(pdev);
1625fail:
1626 return err;
1da177e4
LT		 1627}
1628
1629/* The abort command does not leave the device in a clean state where
1630 it is available to be used again. Until this gets worked out, we will
1631 leave it commented out. */
1632
1633static int atp870u_abort(struct scsi_cmnd * SCpnt)
1634{
1635 unsigned char j, k, c;
1636 struct scsi_cmnd *workrequ;
1da177e4
LT		 1637 struct atp_unit *dev;
1638 struct Scsi_Host *host;
1639 host = SCpnt->device->host;
1640
1641 dev = (struct atp_unit *)&host->hostdata;
422c0d61 1642 c = scmd_channel(SCpnt);
1da177e4
LT		 1643 printk(" atp870u: abort Channel = %x \n", c);
1644 printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
1645 printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1da177e4 1646 for (j = 0; j < 0x18; j++) {
6a3cebb6 1647 printk(" r%2x=%2x", j, atp_readb_io(dev, c, j));
1da177e4 1648 }
6a3cebb6
OZ		 1649 printk(" r1c=%2x", atp_readb_io(dev, c, 0x1c));
1650 printk(" r1f=%2x in_snd=%2x ", atp_readb_io(dev, c, 0x1f), dev->in_snd[c]);
1651 printk(" d00=%2x", atp_readb_pci(dev, c, 0x00));
1652 printk(" d02=%2x", atp_readb_pci(dev, c, 0x02));
1da177e4
LT		 1653 for(j=0;j<16;j++) {
1654 if (dev->id[c][j].curr_req != NULL) {
1655 workrequ = dev->id[c][j].curr_req;
1656 printk("\n que cdb= ");
1657 for (k=0; k < workrequ->cmd_len; k++) {
1658 printk(" %2x ",workrequ->cmnd[k]);
1659 }
1660 printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
1661 }
1662 }
1663 return SUCCESS;
1664}
1665
1666static const char *atp870u_info(struct Scsi_Host *notused)
1667{
1668 static char buffer[128];
1669
1670 strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
1671
1672 return buffer;
1673}
1674
d773e422 1675static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1da177e4 1676{
3d30079c
RV		 1677 seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
1678 "Adapter Configuration:\n");
d773e422
AV		 1679 seq_printf(m, " Base IO: %#.4lx\n", HBAptr->io_port);
1680 seq_printf(m, " IRQ: %d\n", HBAptr->irq);
1681 return 0;
1da177e4
LT		 1682}
1683
1684
1685static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
1686 sector_t capacity, int *ip)
1687{
1688 int heads, sectors, cylinders;
1689
1690 heads = 64;
1691 sectors = 32;
1692 cylinders = (unsigned long)capacity / (heads * sectors);
1693 if (cylinders > 1024) {
1694 heads = 255;
1695 sectors = 63;
1696 cylinders = (unsigned long)capacity / (heads * sectors);
1697 }
1698 ip[0] = heads;
1699 ip[1] = sectors;
1700 ip[2] = cylinders;
1701
1702 return 0;
1703}
1704
1705static void atp870u_remove (struct pci_dev *pdev)
1706{
1707 struct atp_unit *devext = pci_get_drvdata(pdev);
1708 struct Scsi_Host *pshost = devext->host;
1709
1710
1711 scsi_remove_host(pshost);
1da177e4
LT		 1712 free_irq(pshost->irq, pshost);
1713 release_region(pshost->io_port, pshost->n_io_port);
1da177e4 1714 atp870u_free_tables(pshost);
1da177e4 1715 scsi_host_put(pshost);
1da177e4
LT		 1716}
1717MODULE_LICENSE("GPL");
1718
1719static struct scsi_host_template atp870u_template = {
1720 .module = THIS_MODULE,
1721 .name = "atp870u" /* name */,
1722 .proc_name = "atp870u",
d773e422 1723 .show_info = atp870u_show_info,
1da177e4
LT		 1724 .info = atp870u_info /* info */,
1725 .queuecommand = atp870u_queuecommand /* queuecommand */,
1726 .eh_abort_handler = atp870u_abort /* abort */,
1727 .bios_param = atp870u_biosparam /* biosparm */,
1728 .can_queue = qcnt /* can_queue */,
1729 .this_id = 7 /* SCSI ID */,
1730 .sg_tablesize = ATP870U_SCATTER /*SG_ALL*/ /*SG_NONE*/,
1da177e4
LT		 1731 .use_clustering = ENABLE_CLUSTERING,
1732 .max_sectors = ATP870U_MAX_SECTORS,
1733};
1734
1735static struct pci_device_id atp870u_id_table[] = {
1736 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID) },
1737 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1) },
1738 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2) },
1739 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610) },
1740 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW) },
1741 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U) },
1742 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S) },
1743 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D) },
1744 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
1745 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060) },
1746 { 0, },
1747};
1748
1749MODULE_DEVICE_TABLE(pci, atp870u_id_table);
1750
1751static struct pci_driver atp870u_driver = {
1752 .id_table = atp870u_id_table,
1753 .name = "atp870u",
1754 .probe = atp870u_probe,
6f039790 1755 .remove = atp870u_remove,
1da177e4
LT		 1756};
1757
1ccd7d68 1758module_pci_driver(atp870u_driver);
1da177e4 1759
4192a40f 1760static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip, unsigned char lvdmode)
1da177e4 1761{
fa50b308 1762 unsigned char i, j, k, rmb, n;
1da177e4
LT		 1763 unsigned short int m;
1764 static unsigned char mbuf[512];
80b52a7f
OZ		 1765 static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1766 static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1767 static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1768 unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1769 static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
460da918 1770 static unsigned char synw_870[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
80b52a7f
OZ		 1771 unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1772 static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1773 static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1da177e4 1774
1da177e4 1775 for (i = 0; i < 16; i++) {
197fb8d8
OZ		 1776 if (!wide_chip && (i > 7))
1777 break;
1da177e4
LT		 1778 m = 1;
1779 m = m << i;
1780 if ((m & dev->active_id[c]) != 0) {
1781 continue;
1782 }
1783 if (i == dev->host_id[c]) {
1784 printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[c]);
1785 continue;
1786 }
197fb8d8 1787 atp_writeb_io(dev, c, 0x1b, wide_chip ? 0x01 : 0x00);
5d2a5a4f
OZ		 1788 atp_writeb_io(dev, c, 1, 0x08);
1789 atp_writeb_io(dev, c, 2, 0x7f);
1790 atp_writeb_io(dev, c, 3, satn[0]);
1791 atp_writeb_io(dev, c, 4, satn[1]);
1792 atp_writeb_io(dev, c, 5, satn[2]);
1793 atp_writeb_io(dev, c, 6, satn[3]);
1794 atp_writeb_io(dev, c, 7, satn[4]);
1795 atp_writeb_io(dev, c, 8, satn[5]);
1796 atp_writeb_io(dev, c, 0x0f, 0);
1797 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
5d2a5a4f
OZ		 1798 atp_writeb_io(dev, c, 0x12, 0);
1799 atp_writeb_io(dev, c, 0x13, satn[6]);
1800 atp_writeb_io(dev, c, 0x14, satn[7]);
1da177e4
LT		 1801 j = i;
1802 if ((j & 0x08) != 0) {
1803 j = (j & 0x07) | 0x40;
1804 }
5d2a5a4f
OZ		 1805 atp_writeb_io(dev, c, 0x15, j);
1806 atp_writeb_io(dev, c, 0x18, satn[8]);
1da177e4 1807
5d2a5a4f 1808 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1809 cpu_relax();
80b52a7f
OZ		 1810
1811 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1812 continue;
80b52a7f 1813
5d2a5a4f 1814 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1815 cpu_relax();
80b52a7f 1816
1da177e4
LT		 1817 dev->active_id[c] |= m;
1818
5d2a5a4f 1819 atp_writeb_io(dev, c, 0x10, 0x30);
460da918
OZ		 1820 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
1821 atp_writeb_io(dev, c, 0x14, 0x00);
1822 else /* result of is870() merge - is this a bug? */
1823 atp_writeb_io(dev, c, 0x04, 0x00);
1da177e4
LT		 1824
1825phase_cmd:
5d2a5a4f 1826 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 1827
5d2a5a4f 1828 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1829 cpu_relax();
80b52a7f 1830
5d2a5a4f 1831 j = atp_readb_io(dev, c, 0x17);
1da177e4 1832 if (j != 0x16) {
5d2a5a4f 1833 atp_writeb_io(dev, c, 0x10, 0x41);
1da177e4
LT		 1834 goto phase_cmd;
1835 }
1836sel_ok:
5d2a5a4f
OZ		 1837 atp_writeb_io(dev, c, 3, inqd[0]);
1838 atp_writeb_io(dev, c, 4, inqd[1]);
1839 atp_writeb_io(dev, c, 5, inqd[2]);
1840 atp_writeb_io(dev, c, 6, inqd[3]);
1841 atp_writeb_io(dev, c, 7, inqd[4]);
1842 atp_writeb_io(dev, c, 8, inqd[5]);
1843 atp_writeb_io(dev, c, 0x0f, 0);
1844 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1845 atp_writeb_io(dev, c, 0x12, 0);
1846 atp_writeb_io(dev, c, 0x13, inqd[6]);
1847 atp_writeb_io(dev, c, 0x14, inqd[7]);
1848 atp_writeb_io(dev, c, 0x18, inqd[8]);
80b52a7f 1849
5d2a5a4f 1850 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1851 cpu_relax();
80b52a7f
OZ		 1852
1853 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1854 continue;
80b52a7f 1855
5d2a5a4f 1856 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1857 cpu_relax();
80b52a7f 1858
197fb8d8
OZ		 1859 if (wide_chip)
1860 atp_writeb_io(dev, c, 0x1b, 0x00);
1861
5d2a5a4f 1862 atp_writeb_io(dev, c, 0x18, 0x08);
1da177e4
LT		 1863 j = 0;
1864rd_inq_data:
5d2a5a4f 1865 k = atp_readb_io(dev, c, 0x1f);
1da177e4 1866 if ((k & 0x01) != 0) {
5d2a5a4f 1867 mbuf[j++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 1868 goto rd_inq_data;
1869 }
1870 if ((k & 0x80) == 0) {
1871 goto rd_inq_data;
1872 }
5d2a5a4f 1873 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 1874 if (j == 0x16) {
1875 goto inq_ok;
1876 }
5d2a5a4f
OZ		 1877 atp_writeb_io(dev, c, 0x10, 0x46);
1878 atp_writeb_io(dev, c, 0x12, 0);
1879 atp_writeb_io(dev, c, 0x13, 0);
1880 atp_writeb_io(dev, c, 0x14, 0);
1881 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 1882
5d2a5a4f 1883 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1884 cpu_relax();
80b52a7f
OZ		 1885
1886 if (atp_readb_io(dev, c, 0x17) != 0x16)
1da177e4 1887 goto sel_ok;
80b52a7f 1888
1da177e4
LT		 1889inq_ok:
1890 mbuf[36] = 0;
80b52a7f 1891 printk(KERN_INFO " ID: %2d %s\n", i, &mbuf[8]);
1da177e4
LT		 1892 dev->id[c][i].devtype = mbuf[0];
1893 rmb = mbuf[1];
1894 n = mbuf[7];
197fb8d8
OZ		 1895 if (!wide_chip)
1896 goto not_wide;
1da177e4
LT		 1897 if ((mbuf[7] & 0x60) == 0) {
1898 goto not_wide;
1899 }
197fb8d8
OZ		 1900 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
1901 if ((i < 8) && ((dev->global_map[c] & 0x20) == 0))
1902 goto not_wide;
1903 } else { /* result of is870() merge - is this a bug? */
1904 if ((dev->global_map[c] & 0x20) == 0)
1905 goto not_wide;
1da177e4
LT		 1906 }
1907 if (lvdmode == 0) {
80b52a7f 1908 goto chg_wide;
1da177e4 1909 }
80b52a7f
OZ		 1910 if (dev->sp[c][i] != 0x04) // force u2
1911 {
1912 goto chg_wide;
1da177e4
LT		 1913 }
1914
5d2a5a4f
OZ		 1915 atp_writeb_io(dev, c, 0x1b, 0x01);
1916 atp_writeb_io(dev, c, 3, satn[0]);
1917 atp_writeb_io(dev, c, 4, satn[1]);
1918 atp_writeb_io(dev, c, 5, satn[2]);
1919 atp_writeb_io(dev, c, 6, satn[3]);
1920 atp_writeb_io(dev, c, 7, satn[4]);
1921 atp_writeb_io(dev, c, 8, satn[5]);
1922 atp_writeb_io(dev, c, 0x0f, 0);
1923 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1924 atp_writeb_io(dev, c, 0x12, 0);
1925 atp_writeb_io(dev, c, 0x13, satn[6]);
1926 atp_writeb_io(dev, c, 0x14, satn[7]);
1927 atp_writeb_io(dev, c, 0x18, satn[8]);
1928
1929 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 1930 cpu_relax();
80b52a7f
OZ		 1931
1932 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1933 continue;
80b52a7f 1934
5d2a5a4f 1935 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 1936 cpu_relax();
80b52a7f 1937
1da177e4
LT		 1938try_u3:
1939 j = 0;
5d2a5a4f
OZ		 1940 atp_writeb_io(dev, c, 0x14, 0x09);
1941 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 1942
5d2a5a4f
OZ		 1943 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1944 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1945 atp_writeb_io(dev, c, 0x19, u3[j++]);
1da177e4
LT		 1946 cpu_relax();
1947 }
80b52a7f 1948
5d2a5a4f 1949 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 1950 cpu_relax();
80b52a7f 1951
5d2a5a4f 1952 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 1953 if (j == 0x0f) {
1954 goto u3p_in;
1955 }
1956 if (j == 0x0a) {
1957 goto u3p_cmd;
1958 }
1959 if (j == 0x0e) {
1960 goto try_u3;
1961 }
1962 continue;
1963u3p_out:
5d2a5a4f
OZ		 1964 atp_writeb_io(dev, c, 0x18, 0x20);
1965 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1966 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1967 atp_writeb_io(dev, c, 0x19, 0);
1da177e4
LT		 1968 cpu_relax();
1969 }
5d2a5a4f 1970 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 1971 if (j == 0x0f) {
1972 goto u3p_in;
1973 }
1974 if (j == 0x0a) {
1975 goto u3p_cmd;
1976 }
1977 if (j == 0x0e) {
1978 goto u3p_out;
1979 }
1980 continue;
1981u3p_in:
5d2a5a4f
OZ		 1982 atp_writeb_io(dev, c, 0x14, 0x09);
1983 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 1984 k = 0;
1985u3p_in1:
5d2a5a4f 1986 j = atp_readb_io(dev, c, 0x1f);
1da177e4 1987 if ((j & 0x01) != 0) {
5d2a5a4f 1988 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 1989 goto u3p_in1;
1990 }
1991 if ((j & 0x80) == 0x00) {
1992 goto u3p_in1;
1993 }
5d2a5a4f 1994 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 1995 if (j == 0x0f) {
1996 goto u3p_in;
1997 }
1998 if (j == 0x0a) {
1999 goto u3p_cmd;
2000 }
2001 if (j == 0x0e) {
2002 goto u3p_out;
2003 }
2004 continue;
2005u3p_cmd:
5d2a5a4f
OZ		 2006 atp_writeb_io(dev, c, 0x10, 0x30);
2007 atp_writeb_io(dev, c, 0x14, 0x00);
2008 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2009
5d2a5a4f 2010 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00);
80b52a7f 2011
5d2a5a4f 2012 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2013 if (j != 0x16) {
2014 if (j == 0x4e) {
2015 goto u3p_out;
2016 }
2017 continue;
2018 }
2019 if (mbuf[0] != 0x01) {
2020 goto chg_wide;
2021 }
2022 if (mbuf[1] != 0x06) {
2023 goto chg_wide;
2024 }
2025 if (mbuf[2] != 0x04) {
2026 goto chg_wide;
2027 }
2028 if (mbuf[3] == 0x09) {
2029 m = 1;
2030 m = m << i;
2031 dev->wide_id[c] |= m;
2032 dev->id[c][i].devsp = 0xce;
2033#ifdef ED_DBGP
2034 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
2035#endif
2036 continue;
2037 }
2038chg_wide:
5d2a5a4f
OZ		 2039 atp_writeb_io(dev, c, 0x1b, 0x01);
2040 atp_writeb_io(dev, c, 3, satn[0]);
2041 atp_writeb_io(dev, c, 4, satn[1]);
2042 atp_writeb_io(dev, c, 5, satn[2]);
2043 atp_writeb_io(dev, c, 6, satn[3]);
2044 atp_writeb_io(dev, c, 7, satn[4]);
2045 atp_writeb_io(dev, c, 8, satn[5]);
2046 atp_writeb_io(dev, c, 0x0f, 0);
2047 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2048 atp_writeb_io(dev, c, 0x12, 0);
2049 atp_writeb_io(dev, c, 0x13, satn[6]);
2050 atp_writeb_io(dev, c, 0x14, satn[7]);
2051 atp_writeb_io(dev, c, 0x18, satn[8]);
2052
2053 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2054 cpu_relax();
80b52a7f
OZ		 2055
2056 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2057 continue;
80b52a7f 2058
5d2a5a4f 2059 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2060 cpu_relax();
80b52a7f 2061
1da177e4
LT		 2062try_wide:
2063 j = 0;
5d2a5a4f
OZ		 2064 atp_writeb_io(dev, c, 0x14, 0x05);
2065 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2066
5d2a5a4f
OZ		 2067 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2068 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2069 atp_writeb_io(dev, c, 0x19, wide[j++]);
1da177e4
LT		 2070 cpu_relax();
2071 }
80b52a7f 2072
5d2a5a4f 2073 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2074 cpu_relax();
80b52a7f 2075
5d2a5a4f 2076 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2077 if (j == 0x0f) {
2078 goto widep_in;
2079 }
2080 if (j == 0x0a) {
2081 goto widep_cmd;
2082 }
2083 if (j == 0x0e) {
2084 goto try_wide;
2085 }
2086 continue;
2087widep_out:
5d2a5a4f
OZ		 2088 atp_writeb_io(dev, c, 0x18, 0x20);
2089 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2090 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2091 atp_writeb_io(dev, c, 0x19, 0);
1da177e4
LT		 2092 cpu_relax();
2093 }
5d2a5a4f 2094 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2095 if (j == 0x0f) {
2096 goto widep_in;
2097 }
2098 if (j == 0x0a) {
2099 goto widep_cmd;
2100 }
2101 if (j == 0x0e) {
2102 goto widep_out;
2103 }
2104 continue;
2105widep_in:
5d2a5a4f
OZ		 2106 atp_writeb_io(dev, c, 0x14, 0xff);
2107 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2108 k = 0;
2109widep_in1:
5d2a5a4f 2110 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2111 if ((j & 0x01) != 0) {
5d2a5a4f 2112 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2113 goto widep_in1;
2114 }
2115 if ((j & 0x80) == 0x00) {
2116 goto widep_in1;
2117 }
5d2a5a4f 2118 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2119 if (j == 0x0f) {
2120 goto widep_in;
2121 }
2122 if (j == 0x0a) {
2123 goto widep_cmd;
2124 }
2125 if (j == 0x0e) {
2126 goto widep_out;
2127 }
2128 continue;
2129widep_cmd:
5d2a5a4f
OZ		 2130 atp_writeb_io(dev, c, 0x10, 0x30);
2131 atp_writeb_io(dev, c, 0x14, 0x00);
2132 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2133
5d2a5a4f 2134 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2135 cpu_relax();
80b52a7f 2136
5d2a5a4f 2137 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2138 if (j != 0x16) {
2139 if (j == 0x4e) {
2140 goto widep_out;
2141 }
2142 continue;
2143 }
2144 if (mbuf[0] != 0x01) {
2145 goto not_wide;
2146 }
2147 if (mbuf[1] != 0x02) {
2148 goto not_wide;
2149 }
2150 if (mbuf[2] != 0x03) {
2151 goto not_wide;
2152 }
2153 if (mbuf[3] != 0x01) {
2154 goto not_wide;
2155 }
2156 m = 1;
2157 m = m << i;
2158 dev->wide_id[c] |= m;
2159not_wide:
80b52a7f 2160 if ((dev->id[c][i].devtype == 0x00) || (dev->id[c][i].devtype == 0x07) || ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
1da177e4
LT		 2161 m = 1;
2162 m = m << i;
2163 if ((dev->async[c] & m) != 0) {
80b52a7f 2164 goto set_sync;
1da177e4
LT		 2165 }
2166 }
2167 continue;
2168set_sync:
460da918 2169 if ((dev->dev_id != ATP885_DEVID && dev->dev_id != ATP880_DEVID1 && dev->dev_id != ATP880_DEVID2) || (dev->sp[c][i] == 0x02)) {
80b52a7f
OZ		 2170 synu[4] = 0x0c;
2171 synuw[4] = 0x0c;
1da177e4 2172 } else {
80b52a7f
OZ		 2173 if (dev->sp[c][i] >= 0x03) {
2174 synu[4] = 0x0a;
2175 synuw[4] = 0x0a;
2176 }
1da177e4 2177 }
1da177e4
LT		 2178 j = 0;
2179 if ((m & dev->wide_id[c]) != 0) {
2180 j |= 0x01;
2181 }
5d2a5a4f
OZ		 2182 atp_writeb_io(dev, c, 0x1b, j);
2183 atp_writeb_io(dev, c, 3, satn[0]);
2184 atp_writeb_io(dev, c, 4, satn[1]);
2185 atp_writeb_io(dev, c, 5, satn[2]);
2186 atp_writeb_io(dev, c, 6, satn[3]);
2187 atp_writeb_io(dev, c, 7, satn[4]);
2188 atp_writeb_io(dev, c, 8, satn[5]);
2189 atp_writeb_io(dev, c, 0x0f, 0);
2190 atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2191 atp_writeb_io(dev, c, 0x12, 0);
2192 atp_writeb_io(dev, c, 0x13, satn[6]);
2193 atp_writeb_io(dev, c, 0x14, satn[7]);
2194 atp_writeb_io(dev, c, 0x18, satn[8]);
2195
2196 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2197 cpu_relax();
80b52a7f
OZ		 2198
2199 if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2200 continue;
80b52a7f 2201
5d2a5a4f 2202 while (atp_readb_io(dev, c, 0x17) != 0x8e)
1da177e4 2203 cpu_relax();
80b52a7f 2204
1da177e4
LT		 2205try_sync:
2206 j = 0;
5d2a5a4f
OZ		 2207 atp_writeb_io(dev, c, 0x14, 0x06);
2208 atp_writeb_io(dev, c, 0x18, 0x20);
e2c22b45 2209
5d2a5a4f
OZ		 2210 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2211 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0) {
1da177e4 2212 if ((m & dev->wide_id[c]) != 0) {
460da918
OZ		 2213 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
2214 if ((m & dev->ultra_map[c]) != 0) {
2215 atp_writeb_io(dev, c, 0x19, synuw[j++]);
2216 } else {
2217 atp_writeb_io(dev, c, 0x19, synw[j++]);
2218 }
2219 } else
2220 atp_writeb_io(dev, c, 0x19, synw_870[j++]);
1da177e4
LT		 2221 } else {
2222 if ((m & dev->ultra_map[c]) != 0) {
5d2a5a4f 2223 atp_writeb_io(dev, c, 0x19, synu[j++]);
1da177e4 2224 } else {
5d2a5a4f 2225 atp_writeb_io(dev, c, 0x19, synn[j++]);
1da177e4
LT		 2226 }
2227 }
1da177e4
LT		 2228 }
2229 }
80b52a7f 2230
5d2a5a4f 2231 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1da177e4 2232 cpu_relax();
80b52a7f 2233
5d2a5a4f 2234 j = atp_readb_io(dev, c, 0x17) & 0x0f;
1da177e4
LT		 2235 if (j == 0x0f) {
2236 goto phase_ins;
2237 }
2238 if (j == 0x0a) {
2239 goto phase_cmds;
2240 }
2241 if (j == 0x0e) {
2242 goto try_sync;
2243 }
2244 continue;
2245phase_outs:
5d2a5a4f
OZ		 2246 atp_writeb_io(dev, c, 0x18, 0x20);
2247 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00) {
2248 if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0x00)
2249 atp_writeb_io(dev, c, 0x19, 0x00);
1da177e4
LT		 2250 cpu_relax();
2251 }
5d2a5a4f 2252 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2253 if (j == 0x85) {
2254 goto tar_dcons;
2255 }
2256 j &= 0x0f;
2257 if (j == 0x0f) {
2258 goto phase_ins;
2259 }
2260 if (j == 0x0a) {
2261 goto phase_cmds;
2262 }
2263 if (j == 0x0e) {
2264 goto phase_outs;
2265 }
2266 continue;
2267phase_ins:
460da918
OZ		 2268 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
2269 atp_writeb_io(dev, c, 0x14, 0x06);
2270 else
2271 atp_writeb_io(dev, c, 0x14, 0xff);
5d2a5a4f 2272 atp_writeb_io(dev, c, 0x18, 0x20);
1da177e4
LT		 2273 k = 0;
2274phase_ins1:
5d2a5a4f 2275 j = atp_readb_io(dev, c, 0x1f);
1da177e4 2276 if ((j & 0x01) != 0x00) {
5d2a5a4f 2277 mbuf[k++] = atp_readb_io(dev, c, 0x19);
1da177e4
LT		 2278 goto phase_ins1;
2279 }
2280 if ((j & 0x80) == 0x00) {
2281 goto phase_ins1;
2282 }
80b52a7f 2283
5d2a5a4f 2284 while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00);
80b52a7f 2285
5d2a5a4f 2286 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2287 if (j == 0x85) {
2288 goto tar_dcons;
2289 }
2290 j &= 0x0f;
2291 if (j == 0x0f) {
2292 goto phase_ins;
2293 }
2294 if (j == 0x0a) {
2295 goto phase_cmds;
2296 }
2297 if (j == 0x0e) {
2298 goto phase_outs;
2299 }
2300 continue;
2301phase_cmds:
5d2a5a4f 2302 atp_writeb_io(dev, c, 0x10, 0x30);
1da177e4 2303tar_dcons:
5d2a5a4f
OZ		 2304 atp_writeb_io(dev, c, 0x14, 0x00);
2305 atp_writeb_io(dev, c, 0x18, 0x08);
80b52a7f 2306
5d2a5a4f 2307 while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1da177e4 2308 cpu_relax();
80b52a7f 2309
5d2a5a4f 2310 j = atp_readb_io(dev, c, 0x17);
1da177e4
LT		 2311 if (j != 0x16) {
2312 continue;
2313 }
2314 if (mbuf[0] != 0x01) {
2315 continue;
2316 }
2317 if (mbuf[1] != 0x03) {
2318 continue;
2319 }
2320 if (mbuf[4] == 0x00) {
2321 continue;
2322 }
2323 if (mbuf[3] > 0x64) {
2324 continue;
2325 }
460da918
OZ		 2326 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2) {
2327 if (mbuf[4] > 0x0e) {
2328 mbuf[4] = 0x0e;
2329 }
2330 } else {
2331 if (mbuf[4] > 0x0c) {
2332 mbuf[4] = 0x0c;
2333 }
1da177e4
LT		 2334 }
2335 dev->id[c][i].devsp = mbuf[4];
460da918
OZ		 2336 if (dev->dev_id == ATP885_DEVID || dev->dev_id == ATP880_DEVID1 || dev->dev_id == ATP880_DEVID2)
2337 if (mbuf[3] < 0x0c) {
2338 j = 0xb0;
2339 goto set_syn_ok;
2340 }
1da177e4
LT		 2341 if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2342 j = 0xa0;
2343 goto set_syn_ok;
2344 }
2345 if (mbuf[3] < 0x1a) {
2346 j = 0x20;
2347 goto set_syn_ok;
2348 }
2349 if (mbuf[3] < 0x33) {
2350 j = 0x40;
2351 goto set_syn_ok;
2352 }
2353 if (mbuf[3] < 0x4c) {
2354 j = 0x50;
2355 goto set_syn_ok;
2356 }
2357 j = 0x60;
80b52a7f 2358set_syn_ok:
1da177e4 2359 dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
80b52a7f 2360#ifdef ED_DBGP
1da177e4
LT		 2361 printk("dev->id[%2d][%2d].devsp = %2x\n",c,i,dev->id[c][i].devsp);
2362#endif
2363 }
1da177e4 2364}
Linux kernel - Deliverables
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