[deliverable/linux.git] / drivers / scsi / cxlflash / common.h

/*
 * CXL Flash Device Driver
 *
 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
 *             Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
 *
 * Copyright (C) 2015 IBM Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _CXLFLASH_COMMON_H
#define _CXLFLASH_COMMON_H

#include <linux/list.h>
#include <linux/types.h>
#include <scsi/scsi.h>
#include <scsi/scsi_device.h>


#define MAX_CONTEXT  CXLFLASH_MAX_CONTEXT       /* num contexts per afu */

#define CXLFLASH_BLOCK_SIZE	4096	/* 4K blocks */
#define CXLFLASH_MAX_XFER_SIZE	16777216	/* 16MB transfer */
#define CXLFLASH_MAX_SECTORS	(CXLFLASH_MAX_XFER_SIZE/512)	/* SCSI wants
								   max_sectors
								   in units of
								   512 byte
								   sectors
								*/

#define NUM_RRQ_ENTRY    16     /* for master issued cmds */
#define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))

/* AFU command retry limit */
#define MC_RETRY_CNT         5	/* sufficient for SCSI check and
				   certain AFU errors */

/* Command management definitions */
#define CXLFLASH_NUM_CMDS	(2 * CXLFLASH_MAX_CMDS)	/* Must be a pow2 for
							   alignment and more
							   efficient array
							   index derivation
							 */

#define CXLFLASH_MAX_CMDS               16
#define CXLFLASH_MAX_CMDS_PER_LUN       CXLFLASH_MAX_CMDS


static inline void check_sizes(void)
{
	BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS);
}

/* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
#define CMD_BUFSIZE     SIZE_4K

/* flags in IOA status area for host use */
#define B_DONE       0x01
#define B_ERROR      0x02	/* set with B_DONE */
#define B_TIMEOUT    0x04	/* set with B_DONE & B_ERROR */

enum cxlflash_lr_state {
	LINK_RESET_INVALID,
	LINK_RESET_REQUIRED,
	LINK_RESET_COMPLETE
};

enum cxlflash_init_state {
	INIT_STATE_NONE,
	INIT_STATE_PCI,
	INIT_STATE_AFU,
	INIT_STATE_SCSI
};

/*
 * Each context has its own set of resource handles that is visible
 * only from that context.
 */

struct cxlflash_cfg {
	struct afu *afu;
	struct cxl_context *mcctx;

	struct pci_dev *dev;
	struct pci_device_id *dev_id;
	struct Scsi_Host *host;

	ulong cxlflash_regs_pci;

	wait_queue_head_t eeh_waitq;

	struct work_struct work_q;
	enum cxlflash_init_state init_state;
	enum cxlflash_lr_state lr_state;
	int lr_port;

	struct cxl_afu *cxl_afu;

	struct pci_pool *cxlflash_cmd_pool;
	struct pci_dev *parent_dev;

	wait_queue_head_t tmf_waitq;
	bool tmf_active;
	u8 err_recovery_active:1;
};

struct afu_cmd {
	struct sisl_ioarcb rcb;	/* IOARCB (cache line aligned) */
	struct sisl_ioasa sa;	/* IOASA must follow IOARCB */
	spinlock_t slock;
	struct completion cevent;
	char *buf;		/* per command buffer */
	struct afu *parent;
	int slot;
	atomic_t free;

	u8 cmd_tmf:1;

	/* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
	 * However for performance reasons the IOARCB/IOASA should be
	 * cache line aligned.
	 */
} __aligned(cache_line_size());

struct afu {
	/* Stuff requiring alignment go first. */

	u64 rrq_entry[NUM_RRQ_ENTRY];	/* 128B RRQ */
	/*
	 * Command & data for AFU commands.
	 */
	struct afu_cmd cmd[CXLFLASH_NUM_CMDS];

	/* Beware of alignment till here. Preferably introduce new
	 * fields after this point
	 */

	/* AFU HW */
	struct cxl_ioctl_start_work work;
	struct cxlflash_afu_map *afu_map;	/* entire MMIO map */
	struct sisl_host_map *host_map;		/* MC host map */
	struct sisl_ctrl_map *ctrl_map;		/* MC control map */

	ctx_hndl_t ctx_hndl;	/* master's context handle */
	u64 *hrrq_start;
	u64 *hrrq_end;
	u64 *hrrq_curr;
	bool toggle;
	bool read_room;
	atomic64_t room;
	u64 hb;
	u32 cmd_couts;		/* Number of command checkouts */
	u32 internal_lun;	/* User-desired LUN mode for this AFU */

	char version[8];
	u64 interface_version;

	struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */

};

static inline u64 lun_to_lunid(u64 lun)
{
	u64 lun_id;

	int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
	return swab64(lun_id);
}

int cxlflash_send_cmd(struct afu *, struct afu_cmd *);
void cxlflash_wait_resp(struct afu *, struct afu_cmd *);
int cxlflash_afu_reset(struct cxlflash_cfg *);
struct afu_cmd *cxlflash_cmd_checkout(struct afu *);
void cxlflash_cmd_checkin(struct afu_cmd *);
int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8);
#endif /* ifndef _CXLFLASH_COMMON_H */
Commit	Line	Data
c21e0bbf MO	1	/*
	2	* CXL Flash Device Driver
	3	*
	4	* Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
	5	* Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
	6	*
	7	* Copyright (C) 2015 IBM Corporation
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	#ifndef _CXLFLASH_COMMON_H
	16	#define _CXLFLASH_COMMON_H
	17
	18	#include <linux/list.h>
	19	#include <linux/types.h>
	20	#include <scsi/scsi.h>
	21	#include <scsi/scsi_device.h>
	22
	23
	24	#define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */
	25
	26	#define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */
	27	#define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */
	28	#define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants
	29	max_sectors
	30	in units of
	31	512 byte
	32	sectors
	33	*/
	34
	35	#define NUM_RRQ_ENTRY 16 /* for master issued cmds */
	36	#define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))
	37
	38	/* AFU command retry limit */
	39	#define MC_RETRY_CNT 5 /* sufficient for SCSI check and
	40	certain AFU errors */
	41
	42	/* Command management definitions */
	43	#define CXLFLASH_NUM_CMDS (2 * CXLFLASH_MAX_CMDS) /* Must be a pow2 for
	44	alignment and more
	45	efficient array
	46	index derivation
	47	*/
	48
	49	#define CXLFLASH_MAX_CMDS 16
	50	#define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS
	51
	52
	53	static inline void check_sizes(void)
	54	{
	55	BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS);
	56	}
	57
	58	/* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
	59	#define CMD_BUFSIZE SIZE_4K
	60
	61	/* flags in IOA status area for host use */
	62	#define B_DONE 0x01
	63	#define B_ERROR 0x02 /* set with B_DONE */
	64	#define B_TIMEOUT 0x04 /* set with B_DONE & B_ERROR */
65
66	enum cxlflash_lr_state {
67	LINK_RESET_INVALID,
68	LINK_RESET_REQUIRED,
69	LINK_RESET_COMPLETE
70	};
71
72	enum cxlflash_init_state {
73	INIT_STATE_NONE,
74	INIT_STATE_PCI,
75	INIT_STATE_AFU,
76	INIT_STATE_SCSI
77	};
78
79	/*
80	* Each context has its own set of resource handles that is visible
81	* only from that context.
82	*/
83
84	struct cxlflash_cfg {
85	struct afu *afu;
86	struct cxl_context *mcctx;
87
88	struct pci_dev *dev;
89	struct pci_device_id *dev_id;
90	struct Scsi_Host *host;
91
92	ulong cxlflash_regs_pci;
93
94	wait_queue_head_t eeh_waitq;
95
96	struct work_struct work_q;
97	enum cxlflash_init_state init_state;
98	enum cxlflash_lr_state lr_state;
99	int lr_port;
100
101	struct cxl_afu *cxl_afu;
102
103	struct pci_pool *cxlflash_cmd_pool;
104	struct pci_dev *parent_dev;
105
106	wait_queue_head_t tmf_waitq;
107	bool tmf_active;
108	u8 err_recovery_active:1;
109	};
110
111	struct afu_cmd {
112	struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */
113	struct sisl_ioasa sa; /* IOASA must follow IOARCB */
114	spinlock_t slock;
115	struct completion cevent;
116	char buf; / per command buffer */
117	struct afu *parent;
118	int slot;
119	atomic_t free;
120
121	u8 cmd_tmf:1;
122
123	/* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
124	* However for performance reasons the IOARCB/IOASA should be
125	* cache line aligned.
126	*/
127	} __aligned(cache_line_size());
128
129	struct afu {
130	/* Stuff requiring alignment go first. */
131
132	u64 rrq_entry[NUM_RRQ_ENTRY]; /* 128B RRQ */
133	/*
134	* Command & data for AFU commands.
135	*/
136	struct afu_cmd cmd[CXLFLASH_NUM_CMDS];
137
138	/* Beware of alignment till here. Preferably introduce new
139	* fields after this point
140	*/
141
142	/* AFU HW */
143	struct cxl_ioctl_start_work work;
144	struct cxlflash_afu_map afu_map; / entire MMIO map */
145	struct sisl_host_map host_map; / MC host map */
146	struct sisl_ctrl_map ctrl_map; / MC control map */
147
148	ctx_hndl_t ctx_hndl; /* master's context handle */
149	u64 *hrrq_start;
150	u64 *hrrq_end;
151	u64 *hrrq_curr;
152	bool toggle;
153	bool read_room;
154	atomic64_t room;
155	u64 hb;
156	u32 cmd_couts; /* Number of command checkouts */
157	u32 internal_lun; /* User-desired LUN mode for this AFU */
158
159	char version[8];
160	u64 interface_version;
161
162	struct cxlflash_cfg parent; / Pointer back to parent cxlflash_cfg */
163
164	};
165
166	static inline u64 lun_to_lunid(u64 lun)
167	{
168	u64 lun_id;
169
170	int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
171	return swab64(lun_id);
172	}
173
174	int cxlflash_send_cmd(struct afu , struct afu_cmd );
175	void cxlflash_wait_resp(struct afu , struct afu_cmd );
176	int cxlflash_afu_reset(struct cxlflash_cfg *);
177	struct afu_cmd cxlflash_cmd_checkout(struct afu );
178	void cxlflash_cmd_checkin(struct afu_cmd *);
179	int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8);
180	#endif /* ifndef _CXLFLASH_COMMON_H */