cxlflash: Superpipe support
[deliverable/linux.git] / drivers / scsi / cxlflash / main.c
CommitLineData
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1/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/list.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19
20#include <asm/unaligned.h>
21
22#include <misc/cxl.h>
23
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_host.h>
65be2c79 26#include <uapi/scsi/cxlflash_ioctl.h>
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27
28#include "main.h"
29#include "sislite.h"
30#include "common.h"
31
32MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
33MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
34MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
35MODULE_LICENSE("GPL");
36
37
38/**
39 * cxlflash_cmd_checkout() - checks out an AFU command
40 * @afu: AFU to checkout from.
41 *
42 * Commands are checked out in a round-robin fashion. Note that since
43 * the command pool is larger than the hardware queue, the majority of
44 * times we will only loop once or twice before getting a command. The
45 * buffer and CDB within the command are initialized (zeroed) prior to
46 * returning.
47 *
48 * Return: The checked out command or NULL when command pool is empty.
49 */
50struct afu_cmd *cxlflash_cmd_checkout(struct afu *afu)
51{
52 int k, dec = CXLFLASH_NUM_CMDS;
53 struct afu_cmd *cmd;
54
55 while (dec--) {
56 k = (afu->cmd_couts++ & (CXLFLASH_NUM_CMDS - 1));
57
58 cmd = &afu->cmd[k];
59
60 if (!atomic_dec_if_positive(&cmd->free)) {
61 pr_debug("%s: returning found index=%d\n",
62 __func__, cmd->slot);
63 memset(cmd->buf, 0, CMD_BUFSIZE);
64 memset(cmd->rcb.cdb, 0, sizeof(cmd->rcb.cdb));
65 return cmd;
66 }
67 }
68
69 return NULL;
70}
71
72/**
73 * cxlflash_cmd_checkin() - checks in an AFU command
74 * @cmd: AFU command to checkin.
75 *
76 * Safe to pass commands that have already been checked in. Several
77 * internal tracking fields are reset as part of the checkin. Note
78 * that these are intentionally reset prior to toggling the free bit
79 * to avoid clobbering values in the event that the command is checked
80 * out right away.
81 */
82void cxlflash_cmd_checkin(struct afu_cmd *cmd)
83{
84 cmd->rcb.scp = NULL;
85 cmd->rcb.timeout = 0;
86 cmd->sa.ioasc = 0;
87 cmd->cmd_tmf = false;
88 cmd->sa.host_use[0] = 0; /* clears both completion and retry bytes */
89
90 if (unlikely(atomic_inc_return(&cmd->free) != 1)) {
91 pr_err("%s: Freeing cmd (%d) that is not in use!\n",
92 __func__, cmd->slot);
93 return;
94 }
95
96 pr_debug("%s: released cmd %p index=%d\n", __func__, cmd, cmd->slot);
97}
98
99/**
100 * process_cmd_err() - command error handler
101 * @cmd: AFU command that experienced the error.
102 * @scp: SCSI command associated with the AFU command in error.
103 *
104 * Translates error bits from AFU command to SCSI command results.
105 */
106static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
107{
108 struct sisl_ioarcb *ioarcb;
109 struct sisl_ioasa *ioasa;
110
111 if (unlikely(!cmd))
112 return;
113
114 ioarcb = &(cmd->rcb);
115 ioasa = &(cmd->sa);
116
117 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
118 pr_debug("%s: cmd underrun cmd = %p scp = %p\n",
119 __func__, cmd, scp);
120 scp->result = (DID_ERROR << 16);
121 }
122
123 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
124 pr_debug("%s: cmd underrun cmd = %p scp = %p\n",
125 __func__, cmd, scp);
126 scp->result = (DID_ERROR << 16);
127 }
128
129 pr_debug("%s: cmd failed afu_rc=%d scsi_rc=%d fc_rc=%d "
130 "afu_extra=0x%X, scsi_entra=0x%X, fc_extra=0x%X\n",
131 __func__, ioasa->rc.afu_rc, ioasa->rc.scsi_rc,
132 ioasa->rc.fc_rc, ioasa->afu_extra, ioasa->scsi_extra,
133 ioasa->fc_extra);
134
135 if (ioasa->rc.scsi_rc) {
136 /* We have a SCSI status */
137 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
138 memcpy(scp->sense_buffer, ioasa->sense_data,
139 SISL_SENSE_DATA_LEN);
140 scp->result = ioasa->rc.scsi_rc;
141 } else
142 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
143 }
144
145 /*
146 * We encountered an error. Set scp->result based on nature
147 * of error.
148 */
149 if (ioasa->rc.fc_rc) {
150 /* We have an FC status */
151 switch (ioasa->rc.fc_rc) {
152 case SISL_FC_RC_LINKDOWN:
153 scp->result = (DID_REQUEUE << 16);
154 break;
155 case SISL_FC_RC_RESID:
156 /* This indicates an FCP resid underrun */
157 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
158 /* If the SISL_RC_FLAGS_OVERRUN flag was set,
159 * then we will handle this error else where.
160 * If not then we must handle it here.
161 * This is probably an AFU bug. We will
162 * attempt a retry to see if that resolves it.
163 */
164 scp->result = (DID_ERROR << 16);
165 }
166 break;
167 case SISL_FC_RC_RESIDERR:
168 /* Resid mismatch between adapter and device */
169 case SISL_FC_RC_TGTABORT:
170 case SISL_FC_RC_ABORTOK:
171 case SISL_FC_RC_ABORTFAIL:
172 case SISL_FC_RC_NOLOGI:
173 case SISL_FC_RC_ABORTPEND:
174 case SISL_FC_RC_WRABORTPEND:
175 case SISL_FC_RC_NOEXP:
176 case SISL_FC_RC_INUSE:
177 scp->result = (DID_ERROR << 16);
178 break;
179 }
180 }
181
182 if (ioasa->rc.afu_rc) {
183 /* We have an AFU error */
184 switch (ioasa->rc.afu_rc) {
185 case SISL_AFU_RC_NO_CHANNELS:
186 scp->result = (DID_MEDIUM_ERROR << 16);
187 break;
188 case SISL_AFU_RC_DATA_DMA_ERR:
189 switch (ioasa->afu_extra) {
190 case SISL_AFU_DMA_ERR_PAGE_IN:
191 /* Retry */
192 scp->result = (DID_IMM_RETRY << 16);
193 break;
194 case SISL_AFU_DMA_ERR_INVALID_EA:
195 default:
196 scp->result = (DID_ERROR << 16);
197 }
198 break;
199 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
200 /* Retry */
201 scp->result = (DID_ALLOC_FAILURE << 16);
202 break;
203 default:
204 scp->result = (DID_ERROR << 16);
205 }
206 }
207}
208
209/**
210 * cmd_complete() - command completion handler
211 * @cmd: AFU command that has completed.
212 *
213 * Prepares and submits command that has either completed or timed out to
214 * the SCSI stack. Checks AFU command back into command pool for non-internal
215 * (rcb.scp populated) commands.
216 */
217static void cmd_complete(struct afu_cmd *cmd)
218{
219 struct scsi_cmnd *scp;
220 u32 resid;
221 ulong lock_flags;
222 struct afu *afu = cmd->parent;
223 struct cxlflash_cfg *cfg = afu->parent;
224 bool cmd_is_tmf;
225
226 spin_lock_irqsave(&cmd->slock, lock_flags);
227 cmd->sa.host_use_b[0] |= B_DONE;
228 spin_unlock_irqrestore(&cmd->slock, lock_flags);
229
230 if (cmd->rcb.scp) {
231 scp = cmd->rcb.scp;
232 if (unlikely(cmd->sa.rc.afu_rc ||
233 cmd->sa.rc.scsi_rc ||
234 cmd->sa.rc.fc_rc))
235 process_cmd_err(cmd, scp);
236 else
237 scp->result = (DID_OK << 16);
238
239 resid = cmd->sa.resid;
240 cmd_is_tmf = cmd->cmd_tmf;
241 cxlflash_cmd_checkin(cmd); /* Don't use cmd after here */
242
243 pr_debug("%s: calling scsi_set_resid, scp=%p "
244 "result=%X resid=%d\n", __func__,
245 scp, scp->result, resid);
246
247 scsi_set_resid(scp, resid);
248 scsi_dma_unmap(scp);
249 scp->scsi_done(scp);
250
251 if (cmd_is_tmf) {
252 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
253 cfg->tmf_active = false;
254 wake_up_all_locked(&cfg->tmf_waitq);
255 spin_unlock_irqrestore(&cfg->tmf_waitq.lock,
256 lock_flags);
257 }
258 } else
259 complete(&cmd->cevent);
260}
261
262/**
263 * send_tmf() - sends a Task Management Function (TMF)
264 * @afu: AFU to checkout from.
265 * @scp: SCSI command from stack.
266 * @tmfcmd: TMF command to send.
267 *
268 * Return:
269 * 0 on success
270 * SCSI_MLQUEUE_HOST_BUSY when host is busy
271 */
272static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
273{
274 struct afu_cmd *cmd;
275
276 u32 port_sel = scp->device->channel + 1;
277 short lflag = 0;
278 struct Scsi_Host *host = scp->device->host;
279 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
280 ulong lock_flags;
281 int rc = 0;
282
283 cmd = cxlflash_cmd_checkout(afu);
284 if (unlikely(!cmd)) {
285 pr_err("%s: could not get a free command\n", __func__);
286 rc = SCSI_MLQUEUE_HOST_BUSY;
287 goto out;
288 }
289
290 /* If a Task Management Function is active, do not send one more.
291 */
292 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
293 if (cfg->tmf_active)
294 wait_event_interruptible_locked_irq(cfg->tmf_waitq,
295 !cfg->tmf_active);
296 cfg->tmf_active = true;
297 cmd->cmd_tmf = true;
298 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
299
300 cmd->rcb.ctx_id = afu->ctx_hndl;
301 cmd->rcb.port_sel = port_sel;
302 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
303
304 lflag = SISL_REQ_FLAGS_TMF_CMD;
305
306 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
307 SISL_REQ_FLAGS_SUP_UNDERRUN | lflag);
308
309 /* Stash the scp in the reserved field, for reuse during interrupt */
310 cmd->rcb.scp = scp;
311
312 /* Copy the CDB from the cmd passed in */
313 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
314
315 /* Send the command */
316 rc = cxlflash_send_cmd(afu, cmd);
317 if (unlikely(rc)) {
318 cxlflash_cmd_checkin(cmd);
319 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
320 cfg->tmf_active = false;
321 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
322 goto out;
323 }
324
325 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
326 wait_event_interruptible_locked_irq(cfg->tmf_waitq, !cfg->tmf_active);
327 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
328out:
329 return rc;
330}
331
332/**
333 * cxlflash_driver_info() - information handler for this host driver
334 * @host: SCSI host associated with device.
335 *
336 * Return: A string describing the device.
337 */
338static const char *cxlflash_driver_info(struct Scsi_Host *host)
339{
340 return CXLFLASH_ADAPTER_NAME;
341}
342
343/**
344 * cxlflash_queuecommand() - sends a mid-layer request
345 * @host: SCSI host associated with device.
346 * @scp: SCSI command to send.
347 *
348 * Return:
349 * 0 on success
350 * SCSI_MLQUEUE_HOST_BUSY when host is busy
351 */
352static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
353{
354 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
355 struct afu *afu = cfg->afu;
356 struct pci_dev *pdev = cfg->dev;
5cdac81a 357 struct device *dev = &cfg->dev->dev;
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358 struct afu_cmd *cmd;
359 u32 port_sel = scp->device->channel + 1;
360 int nseg, i, ncount;
361 struct scatterlist *sg;
362 ulong lock_flags;
363 short lflag = 0;
364 int rc = 0;
365
366 pr_debug("%s: (scp=%p) %d/%d/%d/%llu cdb=(%08X-%08X-%08X-%08X)\n",
367 __func__, scp, host->host_no, scp->device->channel,
368 scp->device->id, scp->device->lun,
369 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
370 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
371 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
372 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
373
374 /* If a Task Management Function is active, wait for it to complete
375 * before continuing with regular commands.
376 */
377 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
378 if (cfg->tmf_active) {
379 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
380 rc = SCSI_MLQUEUE_HOST_BUSY;
381 goto out;
382 }
383 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
384
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385 switch (cfg->state) {
386 case STATE_LIMBO:
387 dev_dbg_ratelimited(dev, "%s: device in limbo!\n", __func__);
388 rc = SCSI_MLQUEUE_HOST_BUSY;
389 goto out;
390 case STATE_FAILTERM:
391 dev_dbg_ratelimited(dev, "%s: device has failed!\n", __func__);
392 scp->result = (DID_NO_CONNECT << 16);
393 scp->scsi_done(scp);
394 rc = 0;
395 goto out;
396 default:
397 break;
398 }
399
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400 cmd = cxlflash_cmd_checkout(afu);
401 if (unlikely(!cmd)) {
402 pr_err("%s: could not get a free command\n", __func__);
403 rc = SCSI_MLQUEUE_HOST_BUSY;
404 goto out;
405 }
406
407 cmd->rcb.ctx_id = afu->ctx_hndl;
408 cmd->rcb.port_sel = port_sel;
409 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
410
411 if (scp->sc_data_direction == DMA_TO_DEVICE)
412 lflag = SISL_REQ_FLAGS_HOST_WRITE;
413 else
414 lflag = SISL_REQ_FLAGS_HOST_READ;
415
416 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
417 SISL_REQ_FLAGS_SUP_UNDERRUN | lflag);
418
419 /* Stash the scp in the reserved field, for reuse during interrupt */
420 cmd->rcb.scp = scp;
421
422 nseg = scsi_dma_map(scp);
423 if (unlikely(nseg < 0)) {
424 dev_err(&pdev->dev, "%s: Fail DMA map! nseg=%d\n",
425 __func__, nseg);
426 rc = SCSI_MLQUEUE_HOST_BUSY;
427 goto out;
428 }
429
430 ncount = scsi_sg_count(scp);
431 scsi_for_each_sg(scp, sg, ncount, i) {
432 cmd->rcb.data_len = sg_dma_len(sg);
433 cmd->rcb.data_ea = sg_dma_address(sg);
434 }
435
436 /* Copy the CDB from the scsi_cmnd passed in */
437 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
438
439 /* Send the command */
440 rc = cxlflash_send_cmd(afu, cmd);
441 if (unlikely(rc)) {
442 cxlflash_cmd_checkin(cmd);
443 scsi_dma_unmap(scp);
444 }
445
446out:
447 return rc;
448}
449
450/**
451 * cxlflash_eh_device_reset_handler() - reset a single LUN
452 * @scp: SCSI command to send.
453 *
454 * Return:
455 * SUCCESS as defined in scsi/scsi.h
456 * FAILED as defined in scsi/scsi.h
457 */
458static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
459{
460 int rc = SUCCESS;
461 struct Scsi_Host *host = scp->device->host;
462 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
463 struct afu *afu = cfg->afu;
464 int rcr = 0;
465
466 pr_debug("%s: (scp=%p) %d/%d/%d/%llu "
467 "cdb=(%08X-%08X-%08X-%08X)\n", __func__, scp,
468 host->host_no, scp->device->channel,
469 scp->device->id, scp->device->lun,
470 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
471 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
472 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
473 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
474
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475 switch (cfg->state) {
476 case STATE_NORMAL:
477 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
478 if (unlikely(rcr))
479 rc = FAILED;
480 break;
481 case STATE_LIMBO:
482 wait_event(cfg->limbo_waitq, cfg->state != STATE_LIMBO);
483 if (cfg->state == STATE_NORMAL)
484 break;
485 /* fall through */
486 default:
c21e0bbf 487 rc = FAILED;
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488 break;
489 }
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490
491 pr_debug("%s: returning rc=%d\n", __func__, rc);
492 return rc;
493}
494
495/**
496 * cxlflash_eh_host_reset_handler() - reset the host adapter
497 * @scp: SCSI command from stack identifying host.
498 *
499 * Return:
500 * SUCCESS as defined in scsi/scsi.h
501 * FAILED as defined in scsi/scsi.h
502 */
503static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
504{
505 int rc = SUCCESS;
506 int rcr = 0;
507 struct Scsi_Host *host = scp->device->host;
508 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
509
510 pr_debug("%s: (scp=%p) %d/%d/%d/%llu "
511 "cdb=(%08X-%08X-%08X-%08X)\n", __func__, scp,
512 host->host_no, scp->device->channel,
513 scp->device->id, scp->device->lun,
514 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
515 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
516 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
517 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
518
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519 switch (cfg->state) {
520 case STATE_NORMAL:
521 cfg->state = STATE_LIMBO;
522 scsi_block_requests(cfg->host);
65be2c79 523 cxlflash_mark_contexts_error(cfg);
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524 rcr = cxlflash_afu_reset(cfg);
525 if (rcr) {
526 rc = FAILED;
527 cfg->state = STATE_FAILTERM;
528 } else
529 cfg->state = STATE_NORMAL;
530 wake_up_all(&cfg->limbo_waitq);
531 scsi_unblock_requests(cfg->host);
532 break;
533 case STATE_LIMBO:
534 wait_event(cfg->limbo_waitq, cfg->state != STATE_LIMBO);
535 if (cfg->state == STATE_NORMAL)
536 break;
537 /* fall through */
538 default:
c21e0bbf 539 rc = FAILED;
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540 break;
541 }
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542
543 pr_debug("%s: returning rc=%d\n", __func__, rc);
544 return rc;
545}
546
547/**
548 * cxlflash_change_queue_depth() - change the queue depth for the device
549 * @sdev: SCSI device destined for queue depth change.
550 * @qdepth: Requested queue depth value to set.
551 *
552 * The requested queue depth is capped to the maximum supported value.
553 *
554 * Return: The actual queue depth set.
555 */
556static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
557{
558
559 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
560 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
561
562 scsi_change_queue_depth(sdev, qdepth);
563 return sdev->queue_depth;
564}
565
566/**
567 * cxlflash_show_port_status() - queries and presents the current port status
568 * @dev: Generic device associated with the host owning the port.
569 * @attr: Device attribute representing the port.
570 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
571 *
572 * Return: The size of the ASCII string returned in @buf.
573 */
574static ssize_t cxlflash_show_port_status(struct device *dev,
575 struct device_attribute *attr,
576 char *buf)
577{
578 struct Scsi_Host *shost = class_to_shost(dev);
579 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)shost->hostdata;
580 struct afu *afu = cfg->afu;
581
582 char *disp_status;
583 int rc;
584 u32 port;
585 u64 status;
586 u64 *fc_regs;
587
588 rc = kstrtouint((attr->attr.name + 4), 10, &port);
589 if (rc || (port > NUM_FC_PORTS))
590 return 0;
591
592 fc_regs = &afu->afu_map->global.fc_regs[port][0];
593 status =
594 (readq_be(&fc_regs[FC_MTIP_STATUS / 8]) & FC_MTIP_STATUS_MASK);
595
596 if (status == FC_MTIP_STATUS_ONLINE)
597 disp_status = "online";
598 else if (status == FC_MTIP_STATUS_OFFLINE)
599 disp_status = "offline";
600 else
601 disp_status = "unknown";
602
603 return snprintf(buf, PAGE_SIZE, "%s\n", disp_status);
604}
605
606/**
607 * cxlflash_show_lun_mode() - presents the current LUN mode of the host
608 * @dev: Generic device associated with the host.
609 * @attr: Device attribute representing the lun mode.
610 * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII.
611 *
612 * Return: The size of the ASCII string returned in @buf.
613 */
614static ssize_t cxlflash_show_lun_mode(struct device *dev,
615 struct device_attribute *attr, char *buf)
616{
617 struct Scsi_Host *shost = class_to_shost(dev);
618 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)shost->hostdata;
619 struct afu *afu = cfg->afu;
620
621 return snprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
622}
623
624/**
625 * cxlflash_store_lun_mode() - sets the LUN mode of the host
626 * @dev: Generic device associated with the host.
627 * @attr: Device attribute representing the lun mode.
628 * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII.
629 * @count: Length of data resizing in @buf.
630 *
631 * The CXL Flash AFU supports a dummy LUN mode where the external
632 * links and storage are not required. Space on the FPGA is used
633 * to create 1 or 2 small LUNs which are presented to the system
634 * as if they were a normal storage device. This feature is useful
635 * during development and also provides manufacturing with a way
636 * to test the AFU without an actual device.
637 *
638 * 0 = external LUN[s] (default)
639 * 1 = internal LUN (1 x 64K, 512B blocks, id 0)
640 * 2 = internal LUN (1 x 64K, 4K blocks, id 0)
641 * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1)
642 * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1)
643 *
644 * Return: The size of the ASCII string returned in @buf.
645 */
646static ssize_t cxlflash_store_lun_mode(struct device *dev,
647 struct device_attribute *attr,
648 const char *buf, size_t count)
649{
650 struct Scsi_Host *shost = class_to_shost(dev);
651 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)shost->hostdata;
652 struct afu *afu = cfg->afu;
653 int rc;
654 u32 lun_mode;
655
656 rc = kstrtouint(buf, 10, &lun_mode);
657 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
658 afu->internal_lun = lun_mode;
659 cxlflash_afu_reset(cfg);
660 scsi_scan_host(cfg->host);
661 }
662
663 return count;
664}
665
65be2c79
MO
666/**
667 * cxlflash_show_ioctl_version() - presents the current ioctl version of the host
668 * @dev: Generic device associated with the host.
669 * @attr: Device attribute representing the ioctl version.
670 * @buf: Buffer of length PAGE_SIZE to report back the ioctl version.
671 *
672 * Return: The size of the ASCII string returned in @buf.
673 */
674static ssize_t cxlflash_show_ioctl_version(struct device *dev,
675 struct device_attribute *attr,
676 char *buf)
677{
678 return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0);
679}
680
c21e0bbf
MO
681/**
682 * cxlflash_show_dev_mode() - presents the current mode of the device
683 * @dev: Generic device associated with the device.
684 * @attr: Device attribute representing the device mode.
685 * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII.
686 *
687 * Return: The size of the ASCII string returned in @buf.
688 */
689static ssize_t cxlflash_show_dev_mode(struct device *dev,
690 struct device_attribute *attr, char *buf)
691{
692 struct scsi_device *sdev = to_scsi_device(dev);
693
694 return snprintf(buf, PAGE_SIZE, "%s\n",
695 sdev->hostdata ? "superpipe" : "legacy");
696}
697
698/**
699 * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe
700 * @cxlflash: Internal structure associated with the host.
701 */
702static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
703{
704 struct pci_dev *pdev = cfg->dev;
705
706 if (pci_channel_offline(pdev))
5cdac81a 707 wait_event_timeout(cfg->limbo_waitq,
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MO
708 !pci_channel_offline(pdev),
709 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
710}
711
712/*
713 * Host attributes
714 */
715static DEVICE_ATTR(port0, S_IRUGO, cxlflash_show_port_status, NULL);
716static DEVICE_ATTR(port1, S_IRUGO, cxlflash_show_port_status, NULL);
717static DEVICE_ATTR(lun_mode, S_IRUGO | S_IWUSR, cxlflash_show_lun_mode,
718 cxlflash_store_lun_mode);
65be2c79 719static DEVICE_ATTR(ioctl_version, S_IRUGO, cxlflash_show_ioctl_version, NULL);
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720
721static struct device_attribute *cxlflash_host_attrs[] = {
722 &dev_attr_port0,
723 &dev_attr_port1,
724 &dev_attr_lun_mode,
65be2c79 725 &dev_attr_ioctl_version,
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726 NULL
727};
728
729/*
730 * Device attributes
731 */
732static DEVICE_ATTR(mode, S_IRUGO, cxlflash_show_dev_mode, NULL);
733
734static struct device_attribute *cxlflash_dev_attrs[] = {
735 &dev_attr_mode,
736 NULL
737};
738
739/*
740 * Host template
741 */
742static struct scsi_host_template driver_template = {
743 .module = THIS_MODULE,
744 .name = CXLFLASH_ADAPTER_NAME,
745 .info = cxlflash_driver_info,
65be2c79 746 .ioctl = cxlflash_ioctl,
c21e0bbf
MO
747 .proc_name = CXLFLASH_NAME,
748 .queuecommand = cxlflash_queuecommand,
749 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
750 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
751 .change_queue_depth = cxlflash_change_queue_depth,
752 .cmd_per_lun = 16,
753 .can_queue = CXLFLASH_MAX_CMDS,
754 .this_id = -1,
755 .sg_tablesize = SG_NONE, /* No scatter gather support. */
756 .max_sectors = CXLFLASH_MAX_SECTORS,
757 .use_clustering = ENABLE_CLUSTERING,
758 .shost_attrs = cxlflash_host_attrs,
759 .sdev_attrs = cxlflash_dev_attrs,
760};
761
762/*
763 * Device dependent values
764 */
765static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS };
766
767/*
768 * PCI device binding table
769 */
770static struct pci_device_id cxlflash_pci_table[] = {
771 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
772 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
773 {}
774};
775
776MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
777
778/**
779 * free_mem() - free memory associated with the AFU
780 * @cxlflash: Internal structure associated with the host.
781 */
782static void free_mem(struct cxlflash_cfg *cfg)
783{
784 int i;
785 char *buf = NULL;
786 struct afu *afu = cfg->afu;
787
788 if (cfg->afu) {
789 for (i = 0; i < CXLFLASH_NUM_CMDS; i++) {
790 buf = afu->cmd[i].buf;
791 if (!((u64)buf & (PAGE_SIZE - 1)))
792 free_page((ulong)buf);
793 }
794
795 free_pages((ulong)afu, get_order(sizeof(struct afu)));
796 cfg->afu = NULL;
797 }
798}
799
800/**
801 * stop_afu() - stops the AFU command timers and unmaps the MMIO space
802 * @cxlflash: Internal structure associated with the host.
803 *
804 * Safe to call with AFU in a partially allocated/initialized state.
805 */
806static void stop_afu(struct cxlflash_cfg *cfg)
807{
808 int i;
809 struct afu *afu = cfg->afu;
810
811 if (likely(afu)) {
812 for (i = 0; i < CXLFLASH_NUM_CMDS; i++)
813 complete(&afu->cmd[i].cevent);
814
815 if (likely(afu->afu_map)) {
816 cxl_psa_unmap((void *)afu->afu_map);
817 afu->afu_map = NULL;
818 }
819 }
820}
821
822/**
823 * term_mc() - terminates the master context
824 * @cxlflash: Internal structure associated with the host.
825 * @level: Depth of allocation, where to begin waterfall tear down.
826 *
827 * Safe to call with AFU/MC in partially allocated/initialized state.
828 */
829static void term_mc(struct cxlflash_cfg *cfg, enum undo_level level)
830{
831 int rc = 0;
832 struct afu *afu = cfg->afu;
833
834 if (!afu || !cfg->mcctx) {
835 pr_err("%s: returning from term_mc with NULL afu or MC\n",
836 __func__);
837 return;
838 }
839
840 switch (level) {
841 case UNDO_START:
842 rc = cxl_stop_context(cfg->mcctx);
843 BUG_ON(rc);
844 case UNMAP_THREE:
845 cxl_unmap_afu_irq(cfg->mcctx, 3, afu);
846 case UNMAP_TWO:
847 cxl_unmap_afu_irq(cfg->mcctx, 2, afu);
848 case UNMAP_ONE:
849 cxl_unmap_afu_irq(cfg->mcctx, 1, afu);
850 case FREE_IRQ:
851 cxl_free_afu_irqs(cfg->mcctx);
852 case RELEASE_CONTEXT:
853 cfg->mcctx = NULL;
854 }
855}
856
857/**
858 * term_afu() - terminates the AFU
859 * @cxlflash: Internal structure associated with the host.
860 *
861 * Safe to call with AFU/MC in partially allocated/initialized state.
862 */
863static void term_afu(struct cxlflash_cfg *cfg)
864{
865 term_mc(cfg, UNDO_START);
866
867 if (cfg->afu)
868 stop_afu(cfg);
869
870 pr_debug("%s: returning\n", __func__);
871}
872
873/**
874 * cxlflash_remove() - PCI entry point to tear down host
875 * @pdev: PCI device associated with the host.
876 *
877 * Safe to use as a cleanup in partially allocated/initialized state.
878 */
879static void cxlflash_remove(struct pci_dev *pdev)
880{
881 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
882 ulong lock_flags;
883
884 /* If a Task Management Function is active, wait for it to complete
885 * before continuing with remove.
886 */
887 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
888 if (cfg->tmf_active)
889 wait_event_interruptible_locked_irq(cfg->tmf_waitq,
890 !cfg->tmf_active);
891 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
892
5cdac81a 893 cfg->state = STATE_FAILTERM;
65be2c79 894 cxlflash_stop_term_user_contexts(cfg);
5cdac81a 895
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MO
896 switch (cfg->init_state) {
897 case INIT_STATE_SCSI:
65be2c79 898 cxlflash_term_local_luns(cfg);
c21e0bbf
MO
899 scsi_remove_host(cfg->host);
900 scsi_host_put(cfg->host);
901 /* Fall through */
902 case INIT_STATE_AFU:
903 term_afu(cfg);
904 case INIT_STATE_PCI:
905 pci_release_regions(cfg->dev);
906 pci_disable_device(pdev);
907 case INIT_STATE_NONE:
908 flush_work(&cfg->work_q);
909 free_mem(cfg);
910 break;
911 }
912
913 pr_debug("%s: returning\n", __func__);
914}
915
916/**
917 * alloc_mem() - allocates the AFU and its command pool
918 * @cxlflash: Internal structure associated with the host.
919 *
920 * A partially allocated state remains on failure.
921 *
922 * Return:
923 * 0 on success
924 * -ENOMEM on failure to allocate memory
925 */
926static int alloc_mem(struct cxlflash_cfg *cfg)
927{
928 int rc = 0;
929 int i;
930 char *buf = NULL;
931
932 /* This allocation is about 12K, i.e. only 1 64k page
933 * and upto 4 4k pages
934 */
935 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
936 get_order(sizeof(struct afu)));
937 if (unlikely(!cfg->afu)) {
938 pr_err("%s: cannot get %d free pages\n",
939 __func__, get_order(sizeof(struct afu)));
940 rc = -ENOMEM;
941 goto out;
942 }
943 cfg->afu->parent = cfg;
944 cfg->afu->afu_map = NULL;
945
946 for (i = 0; i < CXLFLASH_NUM_CMDS; buf += CMD_BUFSIZE, i++) {
947 if (!((u64)buf & (PAGE_SIZE - 1))) {
948 buf = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
949 if (unlikely(!buf)) {
950 pr_err("%s: Allocate command buffers fail!\n",
951 __func__);
952 rc = -ENOMEM;
953 free_mem(cfg);
954 goto out;
955 }
956 }
957
958 cfg->afu->cmd[i].buf = buf;
959 atomic_set(&cfg->afu->cmd[i].free, 1);
960 cfg->afu->cmd[i].slot = i;
961 }
962
963out:
964 return rc;
965}
966
967/**
968 * init_pci() - initializes the host as a PCI device
969 * @cxlflash: Internal structure associated with the host.
970 *
971 * Return:
972 * 0 on success
973 * -EIO on unable to communicate with device
974 * A return code from the PCI sub-routines
975 */
976static int init_pci(struct cxlflash_cfg *cfg)
977{
978 struct pci_dev *pdev = cfg->dev;
979 int rc = 0;
980
981 cfg->cxlflash_regs_pci = pci_resource_start(pdev, 0);
982 rc = pci_request_regions(pdev, CXLFLASH_NAME);
983 if (rc < 0) {
984 dev_err(&pdev->dev,
985 "%s: Couldn't register memory range of registers\n",
986 __func__);
987 goto out;
988 }
989
990 rc = pci_enable_device(pdev);
991 if (rc || pci_channel_offline(pdev)) {
992 if (pci_channel_offline(pdev)) {
993 cxlflash_wait_for_pci_err_recovery(cfg);
994 rc = pci_enable_device(pdev);
995 }
996
997 if (rc) {
998 dev_err(&pdev->dev, "%s: Cannot enable adapter\n",
999 __func__);
1000 cxlflash_wait_for_pci_err_recovery(cfg);
1001 goto out_release_regions;
1002 }
1003 }
1004
1005 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1006 if (rc < 0) {
1007 dev_dbg(&pdev->dev, "%s: Failed to set 64 bit PCI DMA mask\n",
1008 __func__);
1009 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1010 }
1011
1012 if (rc < 0) {
1013 dev_err(&pdev->dev, "%s: Failed to set PCI DMA mask\n",
1014 __func__);
1015 goto out_disable;
1016 }
1017
1018 pci_set_master(pdev);
1019
1020 if (pci_channel_offline(pdev)) {
1021 cxlflash_wait_for_pci_err_recovery(cfg);
1022 if (pci_channel_offline(pdev)) {
1023 rc = -EIO;
1024 goto out_msi_disable;
1025 }
1026 }
1027
1028 rc = pci_save_state(pdev);
1029
1030 if (rc != PCIBIOS_SUCCESSFUL) {
1031 dev_err(&pdev->dev, "%s: Failed to save PCI config space\n",
1032 __func__);
1033 rc = -EIO;
1034 goto cleanup_nolog;
1035 }
1036
1037out:
1038 pr_debug("%s: returning rc=%d\n", __func__, rc);
1039 return rc;
1040
1041cleanup_nolog:
1042out_msi_disable:
1043 cxlflash_wait_for_pci_err_recovery(cfg);
1044out_disable:
1045 pci_disable_device(pdev);
1046out_release_regions:
1047 pci_release_regions(pdev);
1048 goto out;
1049
1050}
1051
1052/**
1053 * init_scsi() - adds the host to the SCSI stack and kicks off host scan
1054 * @cxlflash: Internal structure associated with the host.
1055 *
1056 * Return:
1057 * 0 on success
1058 * A return code from adding the host
1059 */
1060static int init_scsi(struct cxlflash_cfg *cfg)
1061{
1062 struct pci_dev *pdev = cfg->dev;
1063 int rc = 0;
1064
1065 rc = scsi_add_host(cfg->host, &pdev->dev);
1066 if (rc) {
1067 dev_err(&pdev->dev, "%s: scsi_add_host failed (rc=%d)\n",
1068 __func__, rc);
1069 goto out;
1070 }
1071
1072 scsi_scan_host(cfg->host);
1073
1074out:
1075 pr_debug("%s: returning rc=%d\n", __func__, rc);
1076 return rc;
1077}
1078
1079/**
1080 * set_port_online() - transitions the specified host FC port to online state
1081 * @fc_regs: Top of MMIO region defined for specified port.
1082 *
1083 * The provided MMIO region must be mapped prior to call. Online state means
1084 * that the FC link layer has synced, completed the handshaking process, and
1085 * is ready for login to start.
1086 */
1087static void set_port_online(u64 *fc_regs)
1088{
1089 u64 cmdcfg;
1090
1091 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
1092 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */
1093 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */
1094 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
1095}
1096
1097/**
1098 * set_port_offline() - transitions the specified host FC port to offline state
1099 * @fc_regs: Top of MMIO region defined for specified port.
1100 *
1101 * The provided MMIO region must be mapped prior to call.
1102 */
1103static void set_port_offline(u64 *fc_regs)
1104{
1105 u64 cmdcfg;
1106
1107 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
1108 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */
1109 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */
1110 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
1111}
1112
1113/**
1114 * wait_port_online() - waits for the specified host FC port come online
1115 * @fc_regs: Top of MMIO region defined for specified port.
1116 * @delay_us: Number of microseconds to delay between reading port status.
1117 * @nretry: Number of cycles to retry reading port status.
1118 *
1119 * The provided MMIO region must be mapped prior to call. This will timeout
1120 * when the cable is not plugged in.
1121 *
1122 * Return:
1123 * TRUE (1) when the specified port is online
1124 * FALSE (0) when the specified port fails to come online after timeout
1125 * -EINVAL when @delay_us is less than 1000
1126 */
1127static int wait_port_online(u64 *fc_regs, u32 delay_us, u32 nretry)
1128{
1129 u64 status;
1130
1131 if (delay_us < 1000) {
1132 pr_err("%s: invalid delay specified %d\n", __func__, delay_us);
1133 return -EINVAL;
1134 }
1135
1136 do {
1137 msleep(delay_us / 1000);
1138 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1139 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
1140 nretry--);
1141
1142 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
1143}
1144
1145/**
1146 * wait_port_offline() - waits for the specified host FC port go offline
1147 * @fc_regs: Top of MMIO region defined for specified port.
1148 * @delay_us: Number of microseconds to delay between reading port status.
1149 * @nretry: Number of cycles to retry reading port status.
1150 *
1151 * The provided MMIO region must be mapped prior to call.
1152 *
1153 * Return:
1154 * TRUE (1) when the specified port is offline
1155 * FALSE (0) when the specified port fails to go offline after timeout
1156 * -EINVAL when @delay_us is less than 1000
1157 */
1158static int wait_port_offline(u64 *fc_regs, u32 delay_us, u32 nretry)
1159{
1160 u64 status;
1161
1162 if (delay_us < 1000) {
1163 pr_err("%s: invalid delay specified %d\n", __func__, delay_us);
1164 return -EINVAL;
1165 }
1166
1167 do {
1168 msleep(delay_us / 1000);
1169 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1170 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
1171 nretry--);
1172
1173 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
1174}
1175
1176/**
1177 * afu_set_wwpn() - configures the WWPN for the specified host FC port
1178 * @afu: AFU associated with the host that owns the specified FC port.
1179 * @port: Port number being configured.
1180 * @fc_regs: Top of MMIO region defined for specified port.
1181 * @wwpn: The world-wide-port-number previously discovered for port.
1182 *
1183 * The provided MMIO region must be mapped prior to call. As part of the
1184 * sequence to configure the WWPN, the port is toggled offline and then back
1185 * online. This toggling action can cause this routine to delay up to a few
1186 * seconds. When configured to use the internal LUN feature of the AFU, a
1187 * failure to come online is overridden.
1188 *
1189 * Return:
1190 * 0 when the WWPN is successfully written and the port comes back online
1191 * -1 when the port fails to go offline or come back up online
1192 */
1193static int afu_set_wwpn(struct afu *afu, int port, u64 *fc_regs, u64 wwpn)
1194{
1195 int ret = 0;
1196
1197 set_port_offline(fc_regs);
1198
1199 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1200 FC_PORT_STATUS_RETRY_CNT)) {
1201 pr_debug("%s: wait on port %d to go offline timed out\n",
1202 __func__, port);
1203 ret = -1; /* but continue on to leave the port back online */
1204 }
1205
1206 if (ret == 0)
1207 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
1208
1209 set_port_online(fc_regs);
1210
1211 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1212 FC_PORT_STATUS_RETRY_CNT)) {
1213 pr_debug("%s: wait on port %d to go online timed out\n",
1214 __func__, port);
1215 ret = -1;
1216
1217 /*
1218 * Override for internal lun!!!
1219 */
1220 if (afu->internal_lun) {
1221 pr_debug("%s: Overriding port %d online timeout!!!\n",
1222 __func__, port);
1223 ret = 0;
1224 }
1225 }
1226
1227 pr_debug("%s: returning rc=%d\n", __func__, ret);
1228
1229 return ret;
1230}
1231
1232/**
1233 * afu_link_reset() - resets the specified host FC port
1234 * @afu: AFU associated with the host that owns the specified FC port.
1235 * @port: Port number being configured.
1236 * @fc_regs: Top of MMIO region defined for specified port.
1237 *
1238 * The provided MMIO region must be mapped prior to call. The sequence to
1239 * reset the port involves toggling it offline and then back online. This
1240 * action can cause this routine to delay up to a few seconds. An effort
1241 * is made to maintain link with the device by switching to host to use
1242 * the alternate port exclusively while the reset takes place.
1243 * failure to come online is overridden.
1244 */
1245static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs)
1246{
1247 u64 port_sel;
1248
1249 /* first switch the AFU to the other links, if any */
1250 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1251 port_sel &= ~(1 << port);
1252 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1253 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1254
1255 set_port_offline(fc_regs);
1256 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1257 FC_PORT_STATUS_RETRY_CNT))
1258 pr_err("%s: wait on port %d to go offline timed out\n",
1259 __func__, port);
1260
1261 set_port_online(fc_regs);
1262 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1263 FC_PORT_STATUS_RETRY_CNT))
1264 pr_err("%s: wait on port %d to go online timed out\n",
1265 __func__, port);
1266
1267 /* switch back to include this port */
1268 port_sel |= (1 << port);
1269 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1270 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1271
1272 pr_debug("%s: returning port_sel=%lld\n", __func__, port_sel);
1273}
1274
1275/*
1276 * Asynchronous interrupt information table
1277 */
1278static const struct asyc_intr_info ainfo[] = {
1279 {SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET},
1280 {SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0},
1281 {SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET},
1282 {SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, 0},
1283 {SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR},
1284 {SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, 0},
1285 {SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0},
1286 {SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0},
1287 {SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET},
1288 {SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0},
1289 {SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET},
1290 {SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, 0},
1291 {SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR},
1292 {SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, 0},
1293 {SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0},
1294 {SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0},
1295 {0x0, "", 0, 0} /* terminator */
1296};
1297
1298/**
1299 * find_ainfo() - locates and returns asynchronous interrupt information
1300 * @status: Status code set by AFU on error.
1301 *
1302 * Return: The located information or NULL when the status code is invalid.
1303 */
1304static const struct asyc_intr_info *find_ainfo(u64 status)
1305{
1306 const struct asyc_intr_info *info;
1307
1308 for (info = &ainfo[0]; info->status; info++)
1309 if (info->status == status)
1310 return info;
1311
1312 return NULL;
1313}
1314
1315/**
1316 * afu_err_intr_init() - clears and initializes the AFU for error interrupts
1317 * @afu: AFU associated with the host.
1318 */
1319static void afu_err_intr_init(struct afu *afu)
1320{
1321 int i;
1322 u64 reg;
1323
1324 /* global async interrupts: AFU clears afu_ctrl on context exit
1325 * if async interrupts were sent to that context. This prevents
1326 * the AFU form sending further async interrupts when
1327 * there is
1328 * nobody to receive them.
1329 */
1330
1331 /* mask all */
1332 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1333 /* set LISN# to send and point to master context */
1334 reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1335
1336 if (afu->internal_lun)
1337 reg |= 1; /* Bit 63 indicates local lun */
1338 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1339 /* clear all */
1340 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1341 /* unmask bits that are of interest */
1342 /* note: afu can send an interrupt after this step */
1343 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1344 /* clear again in case a bit came on after previous clear but before */
1345 /* unmask */
1346 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1347
1348 /* Clear/Set internal lun bits */
1349 reg = readq_be(&afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1350 reg &= SISL_FC_INTERNAL_MASK;
1351 if (afu->internal_lun)
1352 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
1353 writeq_be(reg, &afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1354
1355 /* now clear FC errors */
1356 for (i = 0; i < NUM_FC_PORTS; i++) {
1357 writeq_be(0xFFFFFFFFU,
1358 &afu->afu_map->global.fc_regs[i][FC_ERROR / 8]);
1359 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRCAP / 8]);
1360 }
1361
1362 /* sync interrupts for master's IOARRIN write */
1363 /* note that unlike asyncs, there can be no pending sync interrupts */
1364 /* at this time (this is a fresh context and master has not written */
1365 /* IOARRIN yet), so there is nothing to clear. */
1366
1367 /* set LISN#, it is always sent to the context that wrote IOARRIN */
1368 writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl);
1369 writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask);
1370}
1371
1372/**
1373 * cxlflash_sync_err_irq() - interrupt handler for synchronous errors
1374 * @irq: Interrupt number.
1375 * @data: Private data provided at interrupt registration, the AFU.
1376 *
1377 * Return: Always return IRQ_HANDLED.
1378 */
1379static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1380{
1381 struct afu *afu = (struct afu *)data;
1382 u64 reg;
1383 u64 reg_unmasked;
1384
1385 reg = readq_be(&afu->host_map->intr_status);
1386 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1387
1388 if (reg_unmasked == 0UL) {
1389 pr_err("%s: %llX: spurious interrupt, intr_status %016llX\n",
1390 __func__, (u64)afu, reg);
1391 goto cxlflash_sync_err_irq_exit;
1392 }
1393
1394 pr_err("%s: %llX: unexpected interrupt, intr_status %016llX\n",
1395 __func__, (u64)afu, reg);
1396
1397 writeq_be(reg_unmasked, &afu->host_map->intr_clear);
1398
1399cxlflash_sync_err_irq_exit:
1400 pr_debug("%s: returning rc=%d\n", __func__, IRQ_HANDLED);
1401 return IRQ_HANDLED;
1402}
1403
1404/**
1405 * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path)
1406 * @irq: Interrupt number.
1407 * @data: Private data provided at interrupt registration, the AFU.
1408 *
1409 * Return: Always return IRQ_HANDLED.
1410 */
1411static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1412{
1413 struct afu *afu = (struct afu *)data;
1414 struct afu_cmd *cmd;
1415 bool toggle = afu->toggle;
1416 u64 entry,
1417 *hrrq_start = afu->hrrq_start,
1418 *hrrq_end = afu->hrrq_end,
1419 *hrrq_curr = afu->hrrq_curr;
1420
1421 /* Process however many RRQ entries that are ready */
1422 while (true) {
1423 entry = *hrrq_curr;
1424
1425 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1426 break;
1427
1428 cmd = (struct afu_cmd *)(entry & ~SISL_RESP_HANDLE_T_BIT);
1429 cmd_complete(cmd);
1430
1431 /* Advance to next entry or wrap and flip the toggle bit */
1432 if (hrrq_curr < hrrq_end)
1433 hrrq_curr++;
1434 else {
1435 hrrq_curr = hrrq_start;
1436 toggle ^= SISL_RESP_HANDLE_T_BIT;
1437 }
1438 }
1439
1440 afu->hrrq_curr = hrrq_curr;
1441 afu->toggle = toggle;
1442
1443 return IRQ_HANDLED;
1444}
1445
1446/**
1447 * cxlflash_async_err_irq() - interrupt handler for asynchronous errors
1448 * @irq: Interrupt number.
1449 * @data: Private data provided at interrupt registration, the AFU.
1450 *
1451 * Return: Always return IRQ_HANDLED.
1452 */
1453static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1454{
1455 struct afu *afu = (struct afu *)data;
1456 struct cxlflash_cfg *cfg;
1457 u64 reg_unmasked;
1458 const struct asyc_intr_info *info;
1459 struct sisl_global_map *global = &afu->afu_map->global;
1460 u64 reg;
1461 u8 port;
1462 int i;
1463
1464 cfg = afu->parent;
1465
1466 reg = readq_be(&global->regs.aintr_status);
1467 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1468
1469 if (reg_unmasked == 0) {
1470 pr_err("%s: spurious interrupt, aintr_status 0x%016llX\n",
1471 __func__, reg);
1472 goto out;
1473 }
1474
1475 /* it is OK to clear AFU status before FC_ERROR */
1476 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1477
1478 /* check each bit that is on */
1479 for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) {
1480 info = find_ainfo(1ULL << i);
1481 if ((reg_unmasked & 0x1) || !info)
1482 continue;
1483
1484 port = info->port;
1485
1486 pr_err("%s: FC Port %d -> %s, fc_status 0x%08llX\n",
1487 __func__, port, info->desc,
1488 readq_be(&global->fc_regs[port][FC_STATUS / 8]));
1489
1490 /*
1491 * do link reset first, some OTHER errors will set FC_ERROR
1492 * again if cleared before or w/o a reset
1493 */
1494 if (info->action & LINK_RESET) {
1495 pr_err("%s: FC Port %d: resetting link\n",
1496 __func__, port);
1497 cfg->lr_state = LINK_RESET_REQUIRED;
1498 cfg->lr_port = port;
1499 schedule_work(&cfg->work_q);
1500 }
1501
1502 if (info->action & CLR_FC_ERROR) {
1503 reg = readq_be(&global->fc_regs[port][FC_ERROR / 8]);
1504
1505 /*
1506 * since all errors are unmasked, FC_ERROR and FC_ERRCAP
1507 * should be the same and tracing one is sufficient.
1508 */
1509
1510 pr_err("%s: fc %d: clearing fc_error 0x%08llX\n",
1511 __func__, port, reg);
1512
1513 writeq_be(reg, &global->fc_regs[port][FC_ERROR / 8]);
1514 writeq_be(0, &global->fc_regs[port][FC_ERRCAP / 8]);
1515 }
1516 }
1517
1518out:
1519 pr_debug("%s: returning rc=%d, afu=%p\n", __func__, IRQ_HANDLED, afu);
1520 return IRQ_HANDLED;
1521}
1522
1523/**
1524 * start_context() - starts the master context
1525 * @cxlflash: Internal structure associated with the host.
1526 *
1527 * Return: A success or failure value from CXL services.
1528 */
1529static int start_context(struct cxlflash_cfg *cfg)
1530{
1531 int rc = 0;
1532
1533 rc = cxl_start_context(cfg->mcctx,
1534 cfg->afu->work.work_element_descriptor,
1535 NULL);
1536
1537 pr_debug("%s: returning rc=%d\n", __func__, rc);
1538 return rc;
1539}
1540
1541/**
1542 * read_vpd() - obtains the WWPNs from VPD
1543 * @cxlflash: Internal structure associated with the host.
1544 * @wwpn: Array of size NUM_FC_PORTS to pass back WWPNs
1545 *
1546 * Return:
1547 * 0 on success
1548 * -ENODEV when VPD or WWPN keywords not found
1549 */
1550static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1551{
1552 struct pci_dev *dev = cfg->parent_dev;
1553 int rc = 0;
1554 int ro_start, ro_size, i, j, k;
1555 ssize_t vpd_size;
1556 char vpd_data[CXLFLASH_VPD_LEN];
1557 char tmp_buf[WWPN_BUF_LEN] = { 0 };
1558 char *wwpn_vpd_tags[NUM_FC_PORTS] = { "V5", "V6" };
1559
1560 /* Get the VPD data from the device */
1561 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
1562 if (unlikely(vpd_size <= 0)) {
1563 pr_err("%s: Unable to read VPD (size = %ld)\n",
1564 __func__, vpd_size);
1565 rc = -ENODEV;
1566 goto out;
1567 }
1568
1569 /* Get the read only section offset */
1570 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1571 PCI_VPD_LRDT_RO_DATA);
1572 if (unlikely(ro_start < 0)) {
1573 pr_err("%s: VPD Read-only data not found\n", __func__);
1574 rc = -ENODEV;
1575 goto out;
1576 }
1577
1578 /* Get the read only section size, cap when extends beyond read VPD */
1579 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1580 j = ro_size;
1581 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1582 if (unlikely((i + j) > vpd_size)) {
1583 pr_debug("%s: Might need to read more VPD (%d > %ld)\n",
1584 __func__, (i + j), vpd_size);
1585 ro_size = vpd_size - i;
1586 }
1587
1588 /*
1589 * Find the offset of the WWPN tag within the read only
1590 * VPD data and validate the found field (partials are
1591 * no good to us). Convert the ASCII data to an integer
1592 * value. Note that we must copy to a temporary buffer
1593 * because the conversion service requires that the ASCII
1594 * string be terminated.
1595 */
1596 for (k = 0; k < NUM_FC_PORTS; k++) {
1597 j = ro_size;
1598 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1599
1600 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1601 if (unlikely(i < 0)) {
1602 pr_err("%s: Port %d WWPN not found in VPD\n",
1603 __func__, k);
1604 rc = -ENODEV;
1605 goto out;
1606 }
1607
1608 j = pci_vpd_info_field_size(&vpd_data[i]);
1609 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1610 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
1611 pr_err("%s: Port %d WWPN incomplete or VPD corrupt\n",
1612 __func__, k);
1613 rc = -ENODEV;
1614 goto out;
1615 }
1616
1617 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1618 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1619 if (unlikely(rc)) {
1620 pr_err("%s: Fail to convert port %d WWPN to integer\n",
1621 __func__, k);
1622 rc = -ENODEV;
1623 goto out;
1624 }
1625 }
1626
1627out:
1628 pr_debug("%s: returning rc=%d\n", __func__, rc);
1629 return rc;
1630}
1631
1632/**
1633 * cxlflash_context_reset() - timeout handler for AFU commands
1634 * @cmd: AFU command that timed out.
1635 *
1636 * Sends a reset to the AFU.
1637 */
1638void cxlflash_context_reset(struct afu_cmd *cmd)
1639{
1640 int nretry = 0;
1641 u64 rrin = 0x1;
1642 u64 room = 0;
1643 struct afu *afu = cmd->parent;
1644 ulong lock_flags;
1645
1646 pr_debug("%s: cmd=%p\n", __func__, cmd);
1647
1648 spin_lock_irqsave(&cmd->slock, lock_flags);
1649
1650 /* Already completed? */
1651 if (cmd->sa.host_use_b[0] & B_DONE) {
1652 spin_unlock_irqrestore(&cmd->slock, lock_flags);
1653 return;
1654 }
1655
1656 cmd->sa.host_use_b[0] |= (B_DONE | B_ERROR | B_TIMEOUT);
1657 spin_unlock_irqrestore(&cmd->slock, lock_flags);
1658
1659 /*
1660 * We really want to send this reset at all costs, so spread
1661 * out wait time on successive retries for available room.
1662 */
1663 do {
1664 room = readq_be(&afu->host_map->cmd_room);
1665 atomic64_set(&afu->room, room);
1666 if (room)
1667 goto write_rrin;
1668 udelay(nretry);
1669 } while (nretry++ < MC_ROOM_RETRY_CNT);
1670
1671 pr_err("%s: no cmd_room to send reset\n", __func__);
1672 return;
1673
1674write_rrin:
1675 nretry = 0;
1676 writeq_be(rrin, &afu->host_map->ioarrin);
1677 do {
1678 rrin = readq_be(&afu->host_map->ioarrin);
1679 if (rrin != 0x1)
1680 break;
1681 /* Double delay each time */
1682 udelay(2 ^ nretry);
1683 } while (nretry++ < MC_ROOM_RETRY_CNT);
1684}
1685
1686/**
1687 * init_pcr() - initialize the provisioning and control registers
1688 * @cxlflash: Internal structure associated with the host.
1689 *
1690 * Also sets up fast access to the mapped registers and initializes AFU
1691 * command fields that never change.
1692 */
1693void init_pcr(struct cxlflash_cfg *cfg)
1694{
1695 struct afu *afu = cfg->afu;
1696 struct sisl_ctrl_map *ctrl_map;
1697 int i;
1698
1699 for (i = 0; i < MAX_CONTEXT; i++) {
1700 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
1701 /* disrupt any clients that could be running */
1702 /* e. g. clients that survived a master restart */
1703 writeq_be(0, &ctrl_map->rht_start);
1704 writeq_be(0, &ctrl_map->rht_cnt_id);
1705 writeq_be(0, &ctrl_map->ctx_cap);
1706 }
1707
1708 /* copy frequently used fields into afu */
1709 afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx);
1710 /* ctx_hndl is 16 bits in CAIA */
1711 afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host;
1712 afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl;
1713
1714 /* Program the Endian Control for the master context */
1715 writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl);
1716
1717 /* initialize cmd fields that never change */
1718 for (i = 0; i < CXLFLASH_NUM_CMDS; i++) {
1719 afu->cmd[i].rcb.ctx_id = afu->ctx_hndl;
1720 afu->cmd[i].rcb.msi = SISL_MSI_RRQ_UPDATED;
1721 afu->cmd[i].rcb.rrq = 0x0;
1722 }
1723}
1724
1725/**
1726 * init_global() - initialize AFU global registers
1727 * @cxlflash: Internal structure associated with the host.
1728 */
1729int init_global(struct cxlflash_cfg *cfg)
1730{
1731 struct afu *afu = cfg->afu;
1732 u64 wwpn[NUM_FC_PORTS]; /* wwpn of AFU ports */
1733 int i = 0, num_ports = 0;
1734 int rc = 0;
1735 u64 reg;
1736
1737 rc = read_vpd(cfg, &wwpn[0]);
1738 if (rc) {
1739 pr_err("%s: could not read vpd rc=%d\n", __func__, rc);
1740 goto out;
1741 }
1742
1743 pr_debug("%s: wwpn0=0x%llX wwpn1=0x%llX\n", __func__, wwpn[0], wwpn[1]);
1744
1745 /* set up RRQ in AFU for master issued cmds */
1746 writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start);
1747 writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end);
1748
1749 /* AFU configuration */
1750 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1751 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1752 /* enable all auto retry options and control endianness */
1753 /* leave others at default: */
1754 /* CTX_CAP write protected, mbox_r does not clear on read and */
1755 /* checker on if dual afu */
1756 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1757
1758 /* global port select: select either port */
1759 if (afu->internal_lun) {
1760 /* only use port 0 */
1761 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
1762 num_ports = NUM_FC_PORTS - 1;
1763 } else {
1764 writeq_be(BOTH_PORTS, &afu->afu_map->global.regs.afu_port_sel);
1765 num_ports = NUM_FC_PORTS;
1766 }
1767
1768 for (i = 0; i < num_ports; i++) {
1769 /* unmask all errors (but they are still masked at AFU) */
1770 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRMSK / 8]);
1771 /* clear CRC error cnt & set a threshold */
1772 (void)readq_be(&afu->afu_map->global.
1773 fc_regs[i][FC_CNT_CRCERR / 8]);
1774 writeq_be(MC_CRC_THRESH, &afu->afu_map->global.fc_regs[i]
1775 [FC_CRC_THRESH / 8]);
1776
1777 /* set WWPNs. If already programmed, wwpn[i] is 0 */
1778 if (wwpn[i] != 0 &&
1779 afu_set_wwpn(afu, i,
1780 &afu->afu_map->global.fc_regs[i][0],
1781 wwpn[i])) {
1782 pr_err("%s: failed to set WWPN on port %d\n",
1783 __func__, i);
1784 rc = -EIO;
1785 goto out;
1786 }
1787 /* Programming WWPN back to back causes additional
1788 * offline/online transitions and a PLOGI
1789 */
1790 msleep(100);
1791
1792 }
1793
1794 /* set up master's own CTX_CAP to allow real mode, host translation */
1795 /* tbls, afu cmds and read/write GSCSI cmds. */
1796 /* First, unlock ctx_cap write by reading mbox */
1797 (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */
1798 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1799 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1800 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1801 &afu->ctrl_map->ctx_cap);
1802 /* init heartbeat */
1803 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
1804
1805out:
1806 return rc;
1807}
1808
1809/**
1810 * start_afu() - initializes and starts the AFU
1811 * @cxlflash: Internal structure associated with the host.
1812 */
1813static int start_afu(struct cxlflash_cfg *cfg)
1814{
1815 struct afu *afu = cfg->afu;
1816 struct afu_cmd *cmd;
1817
1818 int i = 0;
1819 int rc = 0;
1820
1821 for (i = 0; i < CXLFLASH_NUM_CMDS; i++) {
1822 cmd = &afu->cmd[i];
1823
1824 init_completion(&cmd->cevent);
1825 spin_lock_init(&cmd->slock);
1826 cmd->parent = afu;
1827 }
1828
1829 init_pcr(cfg);
1830
1831 /* initialize RRQ pointers */
1832 afu->hrrq_start = &afu->rrq_entry[0];
1833 afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1];
1834 afu->hrrq_curr = afu->hrrq_start;
1835 afu->toggle = 1;
1836
1837 rc = init_global(cfg);
1838
1839 pr_debug("%s: returning rc=%d\n", __func__, rc);
1840 return rc;
1841}
1842
1843/**
1844 * init_mc() - create and register as the master context
1845 * @cxlflash: Internal structure associated with the host.
1846 *
1847 * Return:
1848 * 0 on success
1849 * -ENOMEM when unable to obtain a context from CXL services
1850 * A failure value from CXL services.
1851 */
1852static int init_mc(struct cxlflash_cfg *cfg)
1853{
1854 struct cxl_context *ctx;
1855 struct device *dev = &cfg->dev->dev;
1856 struct afu *afu = cfg->afu;
1857 int rc = 0;
1858 enum undo_level level;
1859
1860 ctx = cxl_get_context(cfg->dev);
1861 if (unlikely(!ctx))
1862 return -ENOMEM;
1863 cfg->mcctx = ctx;
1864
1865 /* Set it up as a master with the CXL */
1866 cxl_set_master(ctx);
1867
1868 /* During initialization reset the AFU to start from a clean slate */
1869 rc = cxl_afu_reset(cfg->mcctx);
1870 if (unlikely(rc)) {
1871 dev_err(dev, "%s: initial AFU reset failed rc=%d\n",
1872 __func__, rc);
1873 level = RELEASE_CONTEXT;
1874 goto out;
1875 }
1876
1877 rc = cxl_allocate_afu_irqs(ctx, 3);
1878 if (unlikely(rc)) {
1879 dev_err(dev, "%s: call to allocate_afu_irqs failed rc=%d!\n",
1880 __func__, rc);
1881 level = RELEASE_CONTEXT;
1882 goto out;
1883 }
1884
1885 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu,
1886 "SISL_MSI_SYNC_ERROR");
1887 if (unlikely(rc <= 0)) {
1888 dev_err(dev, "%s: IRQ 1 (SISL_MSI_SYNC_ERROR) map failed!\n",
1889 __func__);
1890 level = FREE_IRQ;
1891 goto out;
1892 }
1893
1894 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu,
1895 "SISL_MSI_RRQ_UPDATED");
1896 if (unlikely(rc <= 0)) {
1897 dev_err(dev, "%s: IRQ 2 (SISL_MSI_RRQ_UPDATED) map failed!\n",
1898 __func__);
1899 level = UNMAP_ONE;
1900 goto out;
1901 }
1902
1903 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu,
1904 "SISL_MSI_ASYNC_ERROR");
1905 if (unlikely(rc <= 0)) {
1906 dev_err(dev, "%s: IRQ 3 (SISL_MSI_ASYNC_ERROR) map failed!\n",
1907 __func__);
1908 level = UNMAP_TWO;
1909 goto out;
1910 }
1911
1912 rc = 0;
1913
1914 /* This performs the equivalent of the CXL_IOCTL_START_WORK.
1915 * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process
1916 * element (pe) that is embedded in the context (ctx)
1917 */
1918 rc = start_context(cfg);
1919 if (unlikely(rc)) {
1920 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1921 level = UNMAP_THREE;
1922 goto out;
1923 }
1924ret:
1925 pr_debug("%s: returning rc=%d\n", __func__, rc);
1926 return rc;
1927out:
1928 term_mc(cfg, level);
1929 goto ret;
1930}
1931
1932/**
1933 * init_afu() - setup as master context and start AFU
1934 * @cxlflash: Internal structure associated with the host.
1935 *
1936 * This routine is a higher level of control for configuring the
1937 * AFU on probe and reset paths.
1938 *
1939 * Return:
1940 * 0 on success
1941 * -ENOMEM when unable to map the AFU MMIO space
1942 * A failure value from internal services.
1943 */
1944static int init_afu(struct cxlflash_cfg *cfg)
1945{
1946 u64 reg;
1947 int rc = 0;
1948 struct afu *afu = cfg->afu;
1949 struct device *dev = &cfg->dev->dev;
1950
5cdac81a
MO
1951 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1952
c21e0bbf
MO
1953 rc = init_mc(cfg);
1954 if (rc) {
1955 dev_err(dev, "%s: call to init_mc failed, rc=%d!\n",
1956 __func__, rc);
1957 goto err1;
1958 }
1959
1960 /* Map the entire MMIO space of the AFU.
1961 */
1962 afu->afu_map = cxl_psa_map(cfg->mcctx);
1963 if (!afu->afu_map) {
1964 rc = -ENOMEM;
1965 term_mc(cfg, UNDO_START);
1966 dev_err(dev, "%s: call to cxl_psa_map failed!\n", __func__);
1967 goto err1;
1968 }
1969
1970 /* don't byte reverse on reading afu_version, else the string form */
1971 /* will be backwards */
1972 reg = afu->afu_map->global.regs.afu_version;
1973 memcpy(afu->version, &reg, 8);
1974 afu->interface_version =
1975 readq_be(&afu->afu_map->global.regs.interface_version);
1976 pr_debug("%s: afu version %s, interface version 0x%llX\n",
1977 __func__, afu->version, afu->interface_version);
1978
1979 rc = start_afu(cfg);
1980 if (rc) {
1981 dev_err(dev, "%s: call to start_afu failed, rc=%d!\n",
1982 __func__, rc);
1983 term_mc(cfg, UNDO_START);
1984 cxl_psa_unmap((void *)afu->afu_map);
1985 afu->afu_map = NULL;
1986 goto err1;
1987 }
1988
1989 afu_err_intr_init(cfg->afu);
1990 atomic64_set(&afu->room, readq_be(&afu->host_map->cmd_room));
1991
1992err1:
1993 pr_debug("%s: returning rc=%d\n", __func__, rc);
1994 return rc;
1995}
1996
1997/**
1998 * cxlflash_send_cmd() - sends an AFU command
1999 * @afu: AFU associated with the host.
2000 * @cmd: AFU command to send.
2001 *
2002 * Return:
2003 * 0 on success
2004 * -1 on failure
2005 */
2006int cxlflash_send_cmd(struct afu *afu, struct afu_cmd *cmd)
2007{
2008 struct cxlflash_cfg *cfg = afu->parent;
2009 int nretry = 0;
2010 int rc = 0;
2011 u64 room;
2012 long newval;
2013
2014 /*
2015 * This routine is used by critical users such an AFU sync and to
2016 * send a task management function (TMF). Thus we want to retry a
2017 * bit before returning an error. To avoid the performance penalty
2018 * of MMIO, we spread the update of 'room' over multiple commands.
2019 */
2020retry:
2021 newval = atomic64_dec_if_positive(&afu->room);
2022 if (!newval) {
2023 do {
2024 room = readq_be(&afu->host_map->cmd_room);
2025 atomic64_set(&afu->room, room);
2026 if (room)
2027 goto write_ioarrin;
2028 udelay(nretry);
2029 } while (nretry++ < MC_ROOM_RETRY_CNT);
2030
2031 pr_err("%s: no cmd_room to send 0x%X\n",
2032 __func__, cmd->rcb.cdb[0]);
2033
2034 goto no_room;
2035 } else if (unlikely(newval < 0)) {
2036 /* This should be rare. i.e. Only if two threads race and
2037 * decrement before the MMIO read is done. In this case
2038 * just benefit from the other thread having updated
2039 * afu->room.
2040 */
2041 if (nretry++ < MC_ROOM_RETRY_CNT) {
2042 udelay(nretry);
2043 goto retry;
2044 }
2045
2046 goto no_room;
2047 }
2048
2049write_ioarrin:
2050 writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin);
2051out:
2052 pr_debug("%s: cmd=%p len=%d ea=%p rc=%d\n", __func__, cmd,
2053 cmd->rcb.data_len, (void *)cmd->rcb.data_ea, rc);
2054 return rc;
2055
2056no_room:
2057 afu->read_room = true;
2058 schedule_work(&cfg->work_q);
2059 rc = SCSI_MLQUEUE_HOST_BUSY;
2060 goto out;
2061}
2062
2063/**
2064 * cxlflash_wait_resp() - polls for a response or timeout to a sent AFU command
2065 * @afu: AFU associated with the host.
2066 * @cmd: AFU command that was sent.
2067 */
2068void cxlflash_wait_resp(struct afu *afu, struct afu_cmd *cmd)
2069{
2070 ulong timeout = jiffies + (cmd->rcb.timeout * 2 * HZ);
2071
2072 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
2073 if (!timeout)
2074 cxlflash_context_reset(cmd);
2075
2076 if (unlikely(cmd->sa.ioasc != 0))
2077 pr_err("%s: CMD 0x%X failed, IOASC: flags 0x%X, afu_rc 0x%X, "
2078 "scsi_rc 0x%X, fc_rc 0x%X\n", __func__, cmd->rcb.cdb[0],
2079 cmd->sa.rc.flags, cmd->sa.rc.afu_rc, cmd->sa.rc.scsi_rc,
2080 cmd->sa.rc.fc_rc);
2081}
2082
2083/**
2084 * cxlflash_afu_sync() - builds and sends an AFU sync command
2085 * @afu: AFU associated with the host.
2086 * @ctx_hndl_u: Identifies context requesting sync.
2087 * @res_hndl_u: Identifies resource requesting sync.
2088 * @mode: Type of sync to issue (lightweight, heavyweight, global).
2089 *
2090 * The AFU can only take 1 sync command at a time. This routine enforces this
2091 * limitation by using a mutex to provide exlusive access to the AFU during
2092 * the sync. This design point requires calling threads to not be on interrupt
2093 * context due to the possibility of sleeping during concurrent sync operations.
2094 *
5cdac81a
MO
2095 * AFU sync operations are only necessary and allowed when the device is
2096 * operating normally. When not operating normally, sync requests can occur as
2097 * part of cleaning up resources associated with an adapter prior to removal.
2098 * In this scenario, these requests are simply ignored (safe due to the AFU
2099 * going away).
2100 *
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MO
2101 * Return:
2102 * 0 on success
2103 * -1 on failure
2104 */
2105int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
2106 res_hndl_t res_hndl_u, u8 mode)
2107{
5cdac81a 2108 struct cxlflash_cfg *cfg = afu->parent;
c21e0bbf
MO
2109 struct afu_cmd *cmd = NULL;
2110 int rc = 0;
2111 int retry_cnt = 0;
2112 static DEFINE_MUTEX(sync_active);
2113
5cdac81a
MO
2114 if (cfg->state != STATE_NORMAL) {
2115 pr_debug("%s: Sync not required! (%u)\n", __func__, cfg->state);
2116 return 0;
2117 }
2118
c21e0bbf
MO
2119 mutex_lock(&sync_active);
2120retry:
2121 cmd = cxlflash_cmd_checkout(afu);
2122 if (unlikely(!cmd)) {
2123 retry_cnt++;
2124 udelay(1000 * retry_cnt);
2125 if (retry_cnt < MC_RETRY_CNT)
2126 goto retry;
2127 pr_err("%s: could not get a free command\n", __func__);
2128 rc = -1;
2129 goto out;
2130 }
2131
2132 pr_debug("%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u);
2133
2134 memset(cmd->rcb.cdb, 0, sizeof(cmd->rcb.cdb));
2135
2136 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
2137 cmd->rcb.port_sel = 0x0; /* NA */
2138 cmd->rcb.lun_id = 0x0; /* NA */
2139 cmd->rcb.data_len = 0x0;
2140 cmd->rcb.data_ea = 0x0;
2141 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
2142
2143 cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */
2144 cmd->rcb.cdb[1] = mode;
2145
2146 /* The cdb is aligned, no unaligned accessors required */
2147 *((u16 *)&cmd->rcb.cdb[2]) = swab16(ctx_hndl_u);
2148 *((u32 *)&cmd->rcb.cdb[4]) = swab32(res_hndl_u);
2149
2150 rc = cxlflash_send_cmd(afu, cmd);
2151 if (unlikely(rc))
2152 goto out;
2153
2154 cxlflash_wait_resp(afu, cmd);
2155
2156 /* set on timeout */
2157 if (unlikely((cmd->sa.ioasc != 0) ||
2158 (cmd->sa.host_use_b[0] & B_ERROR)))
2159 rc = -1;
2160out:
2161 mutex_unlock(&sync_active);
2162 if (cmd)
2163 cxlflash_cmd_checkin(cmd);
2164 pr_debug("%s: returning rc=%d\n", __func__, rc);
2165 return rc;
2166}
2167
2168/**
2169 * cxlflash_afu_reset() - resets the AFU
2170 * @cxlflash: Internal structure associated with the host.
2171 *
2172 * Return:
2173 * 0 on success
2174 * A failure value from internal services.
2175 */
2176int cxlflash_afu_reset(struct cxlflash_cfg *cfg)
2177{
2178 int rc = 0;
2179 /* Stop the context before the reset. Since the context is
2180 * no longer available restart it after the reset is complete
2181 */
2182
2183 term_afu(cfg);
2184
2185 rc = init_afu(cfg);
2186
2187 pr_debug("%s: returning rc=%d\n", __func__, rc);
2188 return rc;
2189}
2190
2191/**
2192 * cxlflash_worker_thread() - work thread handler for the AFU
2193 * @work: Work structure contained within cxlflash associated with host.
2194 *
2195 * Handles the following events:
2196 * - Link reset which cannot be performed on interrupt context due to
2197 * blocking up to a few seconds
2198 * - Read AFU command room
2199 */
2200static void cxlflash_worker_thread(struct work_struct *work)
2201{
5cdac81a
MO
2202 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2203 work_q);
c21e0bbf
MO
2204 struct afu *afu = cfg->afu;
2205 int port;
2206 ulong lock_flags;
2207
5cdac81a
MO
2208 /* Avoid MMIO if the device has failed */
2209
2210 if (cfg->state != STATE_NORMAL)
2211 return;
2212
c21e0bbf
MO
2213 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2214
2215 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2216 port = cfg->lr_port;
2217 if (port < 0)
2218 pr_err("%s: invalid port index %d\n", __func__, port);
2219 else {
2220 spin_unlock_irqrestore(cfg->host->host_lock,
2221 lock_flags);
2222
2223 /* The reset can block... */
2224 afu_link_reset(afu, port,
2225 &afu->afu_map->
2226 global.fc_regs[port][0]);
2227 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2228 }
2229
2230 cfg->lr_state = LINK_RESET_COMPLETE;
2231 }
2232
2233 if (afu->read_room) {
2234 atomic64_set(&afu->room, readq_be(&afu->host_map->cmd_room));
2235 afu->read_room = false;
2236 }
2237
2238 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
2239}
2240
2241/**
2242 * cxlflash_probe() - PCI entry point to add host
2243 * @pdev: PCI device associated with the host.
2244 * @dev_id: PCI device id associated with device.
2245 *
2246 * Return: 0 on success / non-zero on failure
2247 */
2248static int cxlflash_probe(struct pci_dev *pdev,
2249 const struct pci_device_id *dev_id)
2250{
2251 struct Scsi_Host *host;
2252 struct cxlflash_cfg *cfg = NULL;
2253 struct device *phys_dev;
2254 struct dev_dependent_vals *ddv;
2255 int rc = 0;
2256
2257 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
2258 __func__, pdev->irq);
2259
2260 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
2261 driver_template.max_sectors = ddv->max_sectors;
2262
2263 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
2264 if (!host) {
2265 dev_err(&pdev->dev, "%s: call to scsi_host_alloc failed!\n",
2266 __func__);
2267 rc = -ENOMEM;
2268 goto out;
2269 }
2270
2271 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
2272 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
2273 host->max_channel = NUM_FC_PORTS - 1;
2274 host->unique_id = host->host_no;
2275 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
2276
2277 cfg = (struct cxlflash_cfg *)host->hostdata;
2278 cfg->host = host;
2279 rc = alloc_mem(cfg);
2280 if (rc) {
2281 dev_err(&pdev->dev, "%s: call to scsi_host_alloc failed!\n",
2282 __func__);
2283 rc = -ENOMEM;
2284 goto out;
2285 }
2286
2287 cfg->init_state = INIT_STATE_NONE;
2288 cfg->dev = pdev;
2289 cfg->dev_id = (struct pci_device_id *)dev_id;
2290 cfg->mcctx = NULL;
c21e0bbf
MO
2291
2292 init_waitqueue_head(&cfg->tmf_waitq);
5cdac81a 2293 init_waitqueue_head(&cfg->limbo_waitq);
c21e0bbf
MO
2294
2295 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
2296 cfg->lr_state = LINK_RESET_INVALID;
2297 cfg->lr_port = -1;
65be2c79
MO
2298 mutex_init(&cfg->ctx_tbl_list_mutex);
2299 mutex_init(&cfg->ctx_recovery_mutex);
2300 INIT_LIST_HEAD(&cfg->ctx_err_recovery);
2301 INIT_LIST_HEAD(&cfg->lluns);
c21e0bbf
MO
2302
2303 pci_set_drvdata(pdev, cfg);
2304
2305 /* Use the special service provided to look up the physical
2306 * PCI device, since we are called on the probe of the virtual
2307 * PCI host bus (vphb)
2308 */
2309 phys_dev = cxl_get_phys_dev(pdev);
2310 if (!dev_is_pci(phys_dev)) {
2311 pr_err("%s: not a pci dev\n", __func__);
2312 rc = -ENODEV;
2313 goto out_remove;
2314 }
2315 cfg->parent_dev = to_pci_dev(phys_dev);
2316
2317 cfg->cxl_afu = cxl_pci_to_afu(pdev);
2318
2319 rc = init_pci(cfg);
2320 if (rc) {
2321 dev_err(&pdev->dev, "%s: call to init_pci "
2322 "failed rc=%d!\n", __func__, rc);
2323 goto out_remove;
2324 }
2325 cfg->init_state = INIT_STATE_PCI;
2326
2327 rc = init_afu(cfg);
2328 if (rc) {
2329 dev_err(&pdev->dev, "%s: call to init_afu "
2330 "failed rc=%d!\n", __func__, rc);
2331 goto out_remove;
2332 }
2333 cfg->init_state = INIT_STATE_AFU;
2334
2335
2336 rc = init_scsi(cfg);
2337 if (rc) {
2338 dev_err(&pdev->dev, "%s: call to init_scsi "
2339 "failed rc=%d!\n", __func__, rc);
2340 goto out_remove;
2341 }
2342 cfg->init_state = INIT_STATE_SCSI;
2343
2344out:
2345 pr_debug("%s: returning rc=%d\n", __func__, rc);
2346 return rc;
2347
2348out_remove:
2349 cxlflash_remove(pdev);
2350 goto out;
2351}
2352
5cdac81a
MO
2353/**
2354 * cxlflash_pci_error_detected() - called when a PCI error is detected
2355 * @pdev: PCI device struct.
2356 * @state: PCI channel state.
2357 *
2358 * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
2359 */
2360static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
2361 pci_channel_state_t state)
2362{
65be2c79 2363 int rc = 0;
5cdac81a
MO
2364 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2365 struct device *dev = &cfg->dev->dev;
2366
2367 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
2368
2369 switch (state) {
2370 case pci_channel_io_frozen:
2371 cfg->state = STATE_LIMBO;
2372
2373 /* Turn off legacy I/O */
2374 scsi_block_requests(cfg->host);
65be2c79
MO
2375 rc = cxlflash_mark_contexts_error(cfg);
2376 if (unlikely(rc))
2377 dev_err(dev, "%s: Failed to mark user contexts!(%d)\n",
2378 __func__, rc);
5cdac81a
MO
2379 term_mc(cfg, UNDO_START);
2380 stop_afu(cfg);
2381
2382 return PCI_ERS_RESULT_NEED_RESET;
2383 case pci_channel_io_perm_failure:
2384 cfg->state = STATE_FAILTERM;
2385 wake_up_all(&cfg->limbo_waitq);
2386 scsi_unblock_requests(cfg->host);
2387 return PCI_ERS_RESULT_DISCONNECT;
2388 default:
2389 break;
2390 }
2391 return PCI_ERS_RESULT_NEED_RESET;
2392}
2393
2394/**
2395 * cxlflash_pci_slot_reset() - called when PCI slot has been reset
2396 * @pdev: PCI device struct.
2397 *
2398 * This routine is called by the pci error recovery code after the PCI
2399 * slot has been reset, just before we should resume normal operations.
2400 *
2401 * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT
2402 */
2403static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
2404{
2405 int rc = 0;
2406 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2407 struct device *dev = &cfg->dev->dev;
2408
2409 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2410
2411 rc = init_afu(cfg);
2412 if (unlikely(rc)) {
2413 dev_err(dev, "%s: EEH recovery failed! (%d)\n", __func__, rc);
2414 return PCI_ERS_RESULT_DISCONNECT;
2415 }
2416
2417 return PCI_ERS_RESULT_RECOVERED;
2418}
2419
2420/**
2421 * cxlflash_pci_resume() - called when normal operation can resume
2422 * @pdev: PCI device struct
2423 */
2424static void cxlflash_pci_resume(struct pci_dev *pdev)
2425{
2426 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2427 struct device *dev = &cfg->dev->dev;
2428
2429 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2430
2431 cfg->state = STATE_NORMAL;
2432 wake_up_all(&cfg->limbo_waitq);
2433 scsi_unblock_requests(cfg->host);
2434}
2435
2436static const struct pci_error_handlers cxlflash_err_handler = {
2437 .error_detected = cxlflash_pci_error_detected,
2438 .slot_reset = cxlflash_pci_slot_reset,
2439 .resume = cxlflash_pci_resume,
2440};
2441
c21e0bbf
MO
2442/*
2443 * PCI device structure
2444 */
2445static struct pci_driver cxlflash_driver = {
2446 .name = CXLFLASH_NAME,
2447 .id_table = cxlflash_pci_table,
2448 .probe = cxlflash_probe,
2449 .remove = cxlflash_remove,
5cdac81a 2450 .err_handler = &cxlflash_err_handler,
c21e0bbf
MO
2451};
2452
2453/**
2454 * init_cxlflash() - module entry point
2455 *
2456 * Return: 0 on success / non-zero on failure
2457 */
2458static int __init init_cxlflash(void)
2459{
2460 pr_info("%s: IBM Power CXL Flash Adapter: %s\n",
2461 __func__, CXLFLASH_DRIVER_DATE);
2462
65be2c79
MO
2463 cxlflash_list_init();
2464
c21e0bbf
MO
2465 return pci_register_driver(&cxlflash_driver);
2466}
2467
2468/**
2469 * exit_cxlflash() - module exit point
2470 */
2471static void __exit exit_cxlflash(void)
2472{
65be2c79
MO
2473 cxlflash_term_global_luns();
2474 cxlflash_free_errpage();
2475
c21e0bbf
MO
2476 pci_unregister_driver(&cxlflash_driver);
2477}
2478
2479module_init(init_cxlflash);
2480module_exit(exit_cxlflash);
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