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1da177e4 LT |
1 | /******************************************************** |
2 | * Header file for eata_dma.c and eata_pio.c * | |
3 | * Linux EATA SCSI drivers * | |
4 | * (c) 1993-96 Michael Neuffer * | |
5 | * mike@i-Connect.Net * | |
6 | * neuffer@mail.uni-mainz.de * | |
7 | ********************************************************* | |
8 | * last change: 96/08/14 * | |
9 | ********************************************************/ | |
10 | ||
11 | ||
12 | #ifndef _EATA_GENERIC_H | |
13 | #define _EATA_GENERIC_H | |
14 | ||
15 | ||
16 | ||
17 | /********************************************* | |
18 | * Misc. definitions * | |
19 | *********************************************/ | |
20 | ||
1da177e4 LT |
21 | #define R_LIMIT 0x20000 |
22 | ||
23 | #define MAXISA 4 | |
24 | #define MAXEISA 16 | |
25 | #define MAXPCI 16 | |
26 | #define MAXIRQ 16 | |
27 | #define MAXTARGET 16 | |
28 | #define MAXCHANNEL 3 | |
29 | ||
30 | #define IS_ISA 'I' | |
31 | #define IS_EISA 'E' | |
32 | #define IS_PCI 'P' | |
33 | ||
34 | #define BROKEN_INQUIRY 1 | |
35 | ||
36 | #define BUSMASTER 0xff | |
37 | #define PIO 0xfe | |
38 | ||
39 | #define EATA_SIGNATURE 0x45415441 /* BIG ENDIAN coded "EATA" sig. */ | |
40 | ||
41 | #define DPT_ID1 0x12 | |
42 | #define DPT_ID2 0x14 | |
43 | ||
44 | #define ATT_ID1 0x06 | |
45 | #define ATT_ID2 0x94 | |
46 | #define ATT_ID3 0x0 | |
47 | ||
48 | #define NEC_ID1 0x38 | |
49 | #define NEC_ID2 0xa3 | |
50 | #define NEC_ID3 0x82 | |
51 | ||
52 | ||
53 | #define EATA_CP_SIZE 44 | |
54 | ||
55 | #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */ | |
56 | #define MAX_METHOD_2 16 /* Max Devices For Method 2 */ | |
57 | #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */ | |
58 | ||
59 | #define SG_SIZE 64 | |
60 | #define SG_SIZE_BIG 252 /* max. 8096 elements, 64k */ | |
61 | ||
62 | #define UPPER_DEVICE_QUEUE_LIMIT 64 /* The limit we have to set for the | |
63 | * device queue to keep the broken | |
64 | * midlevel SCSI code from producing | |
65 | * bogus timeouts | |
66 | */ | |
67 | ||
68 | #define TYPE_DISK_QUEUE 16 | |
69 | #define TYPE_TAPE_QUEUE 4 | |
70 | #define TYPE_ROM_QUEUE 4 | |
71 | #define TYPE_OTHER_QUEUE 2 | |
72 | ||
73 | #define FREE 0 | |
74 | #define OK 0 | |
75 | #define NO_TIMEOUT 0 | |
76 | #define USED 1 | |
77 | #define TIMEOUT 2 | |
78 | #define RESET 4 | |
79 | #define LOCKED 8 | |
80 | #define ABORTED 16 | |
81 | ||
82 | #define READ 0 | |
83 | #define WRITE 1 | |
84 | #define OTHER 2 | |
85 | ||
86 | #define HD(cmd) ((hostdata *)&(cmd->device->host->hostdata)) | |
87 | #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble)) | |
88 | #define SD(host) ((hostdata *)&(host->hostdata)) | |
89 | ||
90 | /*********************************************** | |
91 | * EATA Command & Register definitions * | |
92 | ***********************************************/ | |
93 | #define PCI_REG_DPTconfig 0x40 | |
94 | #define PCI_REG_PumpModeAddress 0x44 | |
95 | #define PCI_REG_PumpModeData 0x48 | |
96 | #define PCI_REG_ConfigParam1 0x50 | |
97 | #define PCI_REG_ConfigParam2 0x54 | |
98 | ||
99 | ||
100 | #define EATA_CMD_PIO_SETUPTEST 0xc6 | |
101 | #define EATA_CMD_PIO_READ_CONFIG 0xf0 | |
102 | #define EATA_CMD_PIO_SET_CONFIG 0xf1 | |
103 | #define EATA_CMD_PIO_SEND_CP 0xf2 | |
104 | #define EATA_CMD_PIO_RECEIVE_SP 0xf3 | |
105 | #define EATA_CMD_PIO_TRUNC 0xf4 | |
106 | ||
107 | #define EATA_CMD_RESET 0xf9 | |
108 | #define EATA_CMD_IMMEDIATE 0xfa | |
109 | ||
110 | #define EATA_CMD_DMA_READ_CONFIG 0xfd | |
111 | #define EATA_CMD_DMA_SET_CONFIG 0xfe | |
112 | #define EATA_CMD_DMA_SEND_CP 0xff | |
113 | ||
114 | #define ECS_EMULATE_SENSE 0xd4 | |
115 | ||
116 | #define EATA_GENERIC_ABORT 0x00 | |
117 | #define EATA_SPECIFIC_RESET 0x01 | |
118 | #define EATA_BUS_RESET 0x02 | |
119 | #define EATA_SPECIFIC_ABORT 0x03 | |
120 | #define EATA_QUIET_INTR 0x04 | |
121 | #define EATA_COLD_BOOT_HBA 0x06 /* Only as a last resort */ | |
122 | #define EATA_FORCE_IO 0x07 | |
123 | ||
124 | #define HA_CTRLREG 0x206 /* control register for HBA */ | |
125 | #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */ | |
126 | #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processor */ | |
127 | #define HA_CTRL_8HEADS 0x08 /* CTRLREG: set for drives with* | |
128 | * >=8 heads (WD1003 rudimentary :-) */ | |
129 | ||
130 | #define HA_WCOMMAND 0x07 /* command register offset */ | |
131 | #define HA_WIFC 0x06 /* immediate command offset */ | |
132 | #define HA_WCODE 0x05 | |
133 | #define HA_WCODE2 0x04 | |
134 | #define HA_WDMAADDR 0x02 /* DMA address LSB offset */ | |
135 | #define HA_RAUXSTAT 0x08 /* aux status register offset*/ | |
136 | #define HA_RSTATUS 0x07 /* status register offset */ | |
137 | #define HA_RDATA 0x00 /* data register (16bit) */ | |
138 | #define HA_WDATA 0x00 /* data register (16bit) */ | |
139 | ||
140 | #define HA_ABUSY 0x01 /* aux busy bit */ | |
141 | #define HA_AIRQ 0x02 /* aux IRQ pending bit */ | |
142 | #define HA_SERROR 0x01 /* pr. command ended in error*/ | |
143 | #define HA_SMORE 0x02 /* more data soon to come */ | |
144 | #define HA_SCORR 0x04 /* data corrected */ | |
145 | #define HA_SDRQ 0x08 /* data request active */ | |
146 | #define HA_SSC 0x10 /* seek complete */ | |
147 | #define HA_SFAULT 0x20 /* write fault */ | |
148 | #define HA_SREADY 0x40 /* drive ready */ | |
149 | #define HA_SBUSY 0x80 /* drive busy */ | |
150 | #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ | |
151 | ||
152 | /********************************************** | |
153 | * Message definitions * | |
154 | **********************************************/ | |
155 | ||
156 | #define HA_NO_ERROR 0x00 /* No Error */ | |
157 | #define HA_ERR_SEL_TO 0x01 /* Selection Timeout */ | |
158 | #define HA_ERR_CMD_TO 0x02 /* Command Timeout */ | |
159 | #define HA_BUS_RESET 0x03 /* SCSI Bus Reset Received */ | |
160 | #define HA_INIT_POWERUP 0x04 /* Initial Controller Power-up */ | |
161 | #define HA_UNX_BUSPHASE 0x05 /* Unexpected Bus Phase */ | |
162 | #define HA_UNX_BUS_FREE 0x06 /* Unexpected Bus Free */ | |
163 | #define HA_BUS_PARITY 0x07 /* Bus Parity Error */ | |
164 | #define HA_SCSI_HUNG 0x08 /* SCSI Hung */ | |
165 | #define HA_UNX_MSGRJCT 0x09 /* Unexpected Message Rejected */ | |
166 | #define HA_RESET_STUCK 0x0a /* SCSI Bus Reset Stuck */ | |
167 | #define HA_RSENSE_FAIL 0x0b /* Auto Request-Sense Failed */ | |
168 | #define HA_PARITY_ERR 0x0c /* Controller Ram Parity Error */ | |
169 | #define HA_CP_ABORT_NA 0x0d /* Abort Message sent to non-active cmd */ | |
170 | #define HA_CP_ABORTED 0x0e /* Abort Message sent to active cmd */ | |
171 | #define HA_CP_RESET_NA 0x0f /* Reset Message sent to non-active cmd */ | |
172 | #define HA_CP_RESET 0x10 /* Reset Message sent to active cmd */ | |
173 | #define HA_ECC_ERR 0x11 /* Controller Ram ECC Error */ | |
174 | #define HA_PCI_PARITY 0x12 /* PCI Parity Error */ | |
175 | #define HA_PCI_MABORT 0x13 /* PCI Master Abort */ | |
176 | #define HA_PCI_TABORT 0x14 /* PCI Target Abort */ | |
177 | #define HA_PCI_STABORT 0x15 /* PCI Signaled Target Abort */ | |
178 | ||
179 | /********************************************** | |
180 | * Other definitions * | |
181 | **********************************************/ | |
182 | ||
183 | struct reg_bit { /* reading this one will clear the interrupt */ | |
184 | __u8 error:1; /* previous command ended in an error */ | |
185 | __u8 more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */ | |
186 | __u8 corr:1; /* data read was successfully corrected with ECC*/ | |
187 | __u8 drq:1; /* data request active */ | |
188 | __u8 sc:1; /* seek complete */ | |
189 | __u8 fault:1; /* write fault */ | |
190 | __u8 ready:1; /* drive ready */ | |
191 | __u8 busy:1; /* controller busy */ | |
192 | }; | |
193 | ||
194 | struct reg_abit { /* reading this won't clear the interrupt */ | |
195 | __u8 abusy:1; /* auxiliary busy */ | |
196 | __u8 irq:1; /* set when drive interrupt is asserted */ | |
197 | __u8 dummy:6; | |
198 | }; | |
199 | ||
200 | struct eata_register { /* EATA register set */ | |
201 | __u8 data_reg[2]; /* R, couldn't figure this one out */ | |
202 | __u8 cp_addr[4]; /* W, CP address register */ | |
203 | union { | |
204 | __u8 command; /* W, command code: [read|set] conf, send CP*/ | |
205 | struct reg_bit status; /* R, see register_bit1 */ | |
206 | __u8 statusbyte; | |
207 | } ovr; | |
208 | struct reg_abit aux_stat; /* R, see register_bit2 */ | |
209 | }; | |
210 | ||
211 | struct get_conf { /* Read Configuration Array */ | |
212 | __u32 len; /* Should return 0x22, 0x24, etc */ | |
213 | __u32 signature; /* Signature MUST be "EATA" */ | |
214 | __u8 version2:4, | |
215 | version:4; /* EATA Version level */ | |
216 | __u8 OCS_enabled:1, /* Overlap Command Support enabled */ | |
217 | TAR_support:1, /* SCSI Target Mode supported */ | |
218 | TRNXFR:1, /* Truncate Transfer Cmd not necessary * | |
219 | * Only used in PIO Mode */ | |
220 | MORE_support:1, /* MORE supported (only PIO Mode) */ | |
221 | DMA_support:1, /* DMA supported Driver uses only * | |
222 | * this mode */ | |
223 | DMA_valid:1, /* DRQ value in Byte 30 is valid */ | |
224 | ATA:1, /* ATA device connected (not supported) */ | |
225 | HAA_valid:1; /* Hostadapter Address is valid */ | |
226 | ||
227 | __u16 cppadlen; /* Number of pad bytes send after CD data * | |
228 | * set to zero for DMA commands */ | |
229 | __u8 scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. * | |
230 | * if not, zero is returned */ | |
231 | __u32 cplen; /* CP length: number of valid cp bytes */ | |
232 | __u32 splen; /* Number of bytes returned after * | |
233 | * Receive SP command */ | |
234 | __u16 queuesiz; /* max number of queueable CPs */ | |
235 | __u16 dummy; | |
236 | __u16 SGsiz; /* max number of SG table entries */ | |
237 | __u8 IRQ:4, /* IRQ used this HA */ | |
238 | IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */ | |
239 | SECOND:1, /* This is a secondary controller */ | |
240 | DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */ | |
241 | __u8 sync; /* device at ID 7 tru 0 is running in * | |
242 | * synchronous mode, this will disappear */ | |
243 | __u8 DSBLE:1, /* ISA i/o addressing is disabled */ | |
244 | FORCADR:1, /* i/o address has been forced */ | |
245 | SG_64K:1, | |
246 | SG_UAE:1, | |
247 | :4; | |
248 | __u8 MAX_ID:5, /* Max number of SCSI target IDs */ | |
249 | MAX_CHAN:3; /* Number of SCSI busses on HBA */ | |
250 | __u8 MAX_LUN; /* Max number of LUNs */ | |
251 | __u8 :3, | |
252 | AUTOTRM:1, | |
253 | M1_inst:1, | |
254 | ID_qest:1, /* Raidnum ID is questionable */ | |
255 | is_PCI:1, /* HBA is PCI */ | |
256 | is_EISA:1; /* HBA is EISA */ | |
257 | __u8 RAIDNUM; /* unique HBA identifier */ | |
258 | __u8 unused[474]; | |
259 | }; | |
260 | ||
261 | struct eata_sg_list | |
262 | { | |
263 | __u32 data; | |
264 | __u32 len; | |
265 | }; | |
266 | ||
267 | struct eata_ccb { /* Send Command Packet structure */ | |
268 | ||
269 | __u8 SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */ | |
270 | HBA_Init:1, /* Cause Controller to reinitialize */ | |
271 | Auto_Req_Sen:1, /* Do Auto Request Sense on errors */ | |
272 | scatter:1, /* Data Ptr points to a SG Packet */ | |
273 | Resrvd:1, /* RFU */ | |
274 | Interpret:1, /* Interpret the SCSI cdb of own use */ | |
275 | DataOut:1, /* Data Out phase with command */ | |
276 | DataIn:1; /* Data In phase with command */ | |
277 | __u8 reqlen; /* Request Sense Length * | |
278 | * Valid if Auto_Req_Sen=1 */ | |
279 | __u8 unused[3]; | |
280 | __u8 FWNEST:1, /* send cmd to phys RAID component */ | |
281 | unused2:7; | |
282 | __u8 Phsunit:1, /* physical unit on mirrored pair */ | |
283 | I_AT:1, /* inhibit address translation */ | |
284 | I_HBA_C:1, /* HBA inhibit caching */ | |
285 | unused3:5; | |
286 | ||
287 | __u8 cp_id:5, /* SCSI Device ID of target */ | |
288 | cp_channel:3; /* SCSI Channel # of HBA */ | |
289 | __u8 cp_lun:3, | |
290 | :2, | |
291 | cp_luntar:1, /* CP is for target ROUTINE */ | |
292 | cp_dispri:1, /* Grant disconnect privilege */ | |
293 | cp_identify:1; /* Always TRUE */ | |
294 | __u8 cp_msg1; /* Message bytes 0-3 */ | |
295 | __u8 cp_msg2; | |
296 | __u8 cp_msg3; | |
297 | __u8 cp_cdb[12]; /* Command Descriptor Block */ | |
298 | __u32 cp_datalen; /* Data Transfer Length * | |
299 | * If scatter=1 len of sg package */ | |
300 | void *cp_viraddr; /* address of this ccb */ | |
301 | __u32 cp_dataDMA; /* Data Address, if scatter=1 * | |
302 | * address of scatter packet */ | |
303 | __u32 cp_statDMA; /* address for Status Packet */ | |
304 | __u32 cp_reqDMA; /* Request Sense Address, used if * | |
305 | * CP command ends with error */ | |
306 | /* Additional CP info begins here */ | |
307 | __u32 timestamp; /* Needed to measure command latency */ | |
308 | __u32 timeout; | |
309 | __u8 sizeindex; | |
310 | __u8 rw_latency; | |
311 | __u8 retries; | |
312 | __u8 status; /* status of this queueslot */ | |
313 | struct scsi_cmnd *cmd; /* address of cmd */ | |
314 | struct eata_sg_list *sg_list; | |
315 | }; | |
316 | ||
317 | ||
318 | struct eata_sp { | |
319 | __u8 hba_stat:7, /* HBA status */ | |
320 | EOC:1; /* True if command finished */ | |
321 | __u8 scsi_stat; /* Target SCSI status */ | |
322 | __u8 reserved[2]; | |
323 | __u32 residue_len; /* Number of bytes not transferred */ | |
324 | struct eata_ccb *ccb; /* Address set in COMMAND PACKET */ | |
325 | __u8 msg[12]; | |
326 | }; | |
327 | ||
328 | typedef struct hstd { | |
329 | __u8 vendor[9]; | |
330 | __u8 name[18]; | |
331 | __u8 revision[6]; | |
332 | __u8 EATA_revision; | |
333 | __u32 firmware_revision; | |
334 | __u8 HBA_number; | |
335 | __u8 bustype; /* bustype of HBA */ | |
336 | __u8 channel; /* # of avail. scsi channels */ | |
337 | __u8 state; /* state of HBA */ | |
338 | __u8 primary; /* true if primary */ | |
339 | __u8 more_support:1, /* HBA supports MORE flag */ | |
340 | immediate_support:1, /* HBA supports IMMEDIATE CMDs*/ | |
341 | broken_INQUIRY:1; /* This is an EISA HBA with * | |
342 | * broken INQUIRY */ | |
343 | __u8 do_latency; /* Latency measurement flag */ | |
344 | __u32 reads[13]; | |
345 | __u32 writes[13]; | |
346 | __u32 reads_lat[12][4]; | |
347 | __u32 writes_lat[12][4]; | |
348 | __u32 all_lat[4]; | |
349 | __u8 resetlevel[MAXCHANNEL]; | |
350 | __u32 last_ccb; /* Last used ccb */ | |
351 | __u32 cplen; /* size of CP in words */ | |
352 | __u16 cppadlen; /* pad length of cp in words */ | |
353 | __u16 queuesize; | |
354 | __u16 sgsize; /* # of entries in the SG list*/ | |
355 | __u16 devflags; /* bits set for detected devices */ | |
356 | __u8 hostid; /* SCSI ID of HBA */ | |
357 | __u8 moresupport; /* HBA supports MORE flag */ | |
358 | struct Scsi_Host *next; | |
359 | struct Scsi_Host *prev; | |
1a68d41a | 360 | struct pci_dev *pdev; /* PCI device or NULL for non PCI */ |
1da177e4 LT |
361 | struct eata_sp sp; /* status packet */ |
362 | struct eata_ccb ccb[0]; /* ccb array begins here */ | |
363 | }hostdata; | |
364 | ||
365 | /* structure for max. 2 emulated drives */ | |
366 | struct drive_geom_emul { | |
367 | __u8 trans; /* translation flag 1=transl */ | |
368 | __u8 channel; /* SCSI channel number */ | |
369 | __u8 HBA; /* HBA number (prim/sec) */ | |
370 | __u8 id; /* drive id */ | |
371 | __u8 lun; /* drive lun */ | |
372 | __u32 heads; /* number of heads */ | |
373 | __u32 sectors; /* number of sectors */ | |
374 | __u32 cylinder; /* number of cylinders */ | |
375 | }; | |
376 | ||
377 | struct geom_emul { | |
378 | __u8 bios_drives; /* number of emulated drives */ | |
379 | struct drive_geom_emul drv[2]; /* drive structures */ | |
380 | }; | |
381 | ||
382 | #endif /* _EATA_GENERIC_H */ | |
383 | ||
384 | /* | |
385 | * Overrides for Emacs so that we almost follow Linus's tabbing style. | |
386 | * Emacs will notice this stuff at the end of the file and automatically | |
387 | * adjust the settings for this buffer only. This must remain at the end | |
388 | * of the file. | |
389 | * --------------------------------------------------------------------------- | |
390 | * Local variables: | |
391 | * c-indent-level: 4 | |
392 | * c-brace-imaginary-offset: 0 | |
393 | * c-brace-offset: -4 | |
394 | * c-argdecl-indent: 4 | |
395 | * c-label-offset: -4 | |
396 | * c-continued-statement-offset: 4 | |
397 | * c-continued-brace-offset: 0 | |
398 | * tab-width: 8 | |
399 | * End: | |
400 | */ |