projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * Generic Generic NCR5380 driver defines | |
| 3 | * | |
| 4 | * Copyright 1993, Drew Eckhardt | |
| 5 | * Visionary Computing | |
| 6 | * (Unix and Linux consulting and custom programming) | |
| 7 | * drew@colorado.edu | |
| 8 | * +1 (303) 440-4894 | |
| 9 | * | |
| 10 | * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin | |
| 11 | * K.Lentin@cs.monash.edu.au | |
| 1da177e4 LT |
12 | */ |
| 13 | ||
| 1da177e4 LT |
14 | #ifndef GENERIC_NCR5380_H |
| 15 | #define GENERIC_NCR5380_H | |
| 16 | ||
| 1da177e4 LT |
17 | #define __STRVAL(x) #x |
| 18 | #define STRVAL(x) __STRVAL(x) | |
| 19 | ||
| 702a98c6 | 20 | #ifndef SCSI_G_NCR5380_MEM |
| aa2e2cb1 | 21 | #define DRV_MODULE_NAME "g_NCR5380" |
| 1da177e4 | 22 | |
| 1da177e4 LT |
23 | #define NCR5380_map_type int |
| 24 | #define NCR5380_map_name port | |
| 1da177e4 | 25 | |
| 54d8fe44 FT |
26 | #define NCR5380_read(reg) \ |
| 27 | inb(instance->io_port + (reg)) | |
| 28 | #define NCR5380_write(reg, value) \ | |
| 29 | outb(value, instance->io_port + (reg)) | |
| 1da177e4 | 30 | |
| 12150797 OZ |
31 | #define NCR5380_implementation_fields \ |
| 32 | int c400_ctl_status; \ | |
| 33 | int c400_blk_cnt; \ | |
| aeb51152 OZ |
34 | int c400_host_buf; \ |
| 35 | int io_width; | |
| c818cb64 | 36 | |
| 1da177e4 | 37 | #else |
| 702a98c6 | 38 | /* therefore SCSI_G_NCR5380_MEM */ |
| aa2e2cb1 | 39 | #define DRV_MODULE_NAME "g_NCR5380_mmio" |
| 1da177e4 | 40 | |
| 1da177e4 LT |
41 | #define NCR5380_map_type unsigned long |
| 42 | #define NCR5380_map_name base | |
| 1da177e4 LT |
43 | #define NCR53C400_mem_base 0x3880 |
| 44 | #define NCR53C400_host_buffer 0x3900 | |
| 9d376402 | 45 | #define NCR53C400_region_size 0x3a00 |
| 1da177e4 | 46 | |
| 54d8fe44 FT |
47 | #define NCR5380_read(reg) \ |
| 48 | readb(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \ | |
| 49 | NCR53C400_mem_base + (reg)) | |
| 50 | #define NCR5380_write(reg, value) \ | |
| 51 | writeb(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \ | |
| 52 | NCR53C400_mem_base + (reg)) | |
| 1da177e4 LT |
53 | |
| 54 | #define NCR5380_implementation_fields \ | |
| 12150797 | 55 | void __iomem *iomem; \ |
| 9d376402 | 56 | resource_size_t iomem_size; \ |
| 12150797 OZ |
57 | int c400_ctl_status; \ |
| 58 | int c400_blk_cnt; \ | |
| 59 | int c400_host_buf; | |
| 1da177e4 | 60 | |
| c818cb64 | 61 | #endif |
| 1da177e4 | 62 | |
| ff3d4578 | 63 | #define NCR5380_dma_xfer_len(instance, cmd, phase) \ |
| 7e9ec8d9 | 64 | generic_NCR5380_dma_xfer_len(instance, cmd) |
| 6c4b88ca FT |
65 | #define NCR5380_dma_recv_setup generic_NCR5380_pread |
| 66 | #define NCR5380_dma_send_setup generic_NCR5380_pwrite | |
| 8053b0ee | 67 | #define NCR5380_dma_residual(instance) (0) |
| ff3d4578 | 68 | |
| 1da177e4 LT |
69 | #define NCR5380_intr generic_NCR5380_intr |
| 70 | #define NCR5380_queue_command generic_NCR5380_queue_command | |
| 71 | #define NCR5380_abort generic_NCR5380_abort | |
| 72 | #define NCR5380_bus_reset generic_NCR5380_bus_reset | |
| 8c32513b | 73 | #define NCR5380_info generic_NCR5380_info |
| 1da177e4 | 74 | |
| e5d55d1a FT |
75 | #define NCR5380_io_delay(x) udelay(x) |
| 76 | ||
| 1da177e4 LT |
77 | #define BOARD_NCR5380 0 |
| 78 | #define BOARD_NCR53C400 1 | |
| 79 | #define BOARD_NCR53C400A 2 | |
| 80 | #define BOARD_DTC3181E 3 | |
| c6084cbc | 81 | #define BOARD_HP_C2502 4 |
| 1da177e4 | 82 | |
| 1da177e4 LT |
83 | #endif /* GENERIC_NCR5380_H */ |
| 84 |