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1da177e4 LT |
1 | /* |
2 | * Generic Generic NCR5380 driver defines | |
3 | * | |
4 | * Copyright 1993, Drew Eckhardt | |
5 | * Visionary Computing | |
6 | * (Unix and Linux consulting and custom programming) | |
7 | * drew@colorado.edu | |
8 | * +1 (303) 440-4894 | |
9 | * | |
10 | * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin | |
11 | * K.Lentin@cs.monash.edu.au | |
1da177e4 LT |
12 | */ |
13 | ||
1da177e4 LT |
14 | #ifndef GENERIC_NCR5380_H |
15 | #define GENERIC_NCR5380_H | |
16 | ||
4d8c08c7 | 17 | #ifdef CONFIG_SCSI_GENERIC_NCR53C400 |
1da177e4 LT |
18 | #define BIOSPARAM |
19 | #define NCR5380_BIOSPARAM generic_NCR5380_biosparam | |
20 | #else | |
21 | #define NCR5380_BIOSPARAM NULL | |
22 | #endif | |
23 | ||
1da177e4 LT |
24 | #define __STRVAL(x) #x |
25 | #define STRVAL(x) __STRVAL(x) | |
26 | ||
702a98c6 | 27 | #ifndef SCSI_G_NCR5380_MEM |
aa2e2cb1 | 28 | #define DRV_MODULE_NAME "g_NCR5380" |
1da177e4 | 29 | |
1da177e4 LT |
30 | #define NCR5380_map_type int |
31 | #define NCR5380_map_name port | |
1da177e4 | 32 | |
4d8c08c7 | 33 | #ifdef CONFIG_SCSI_GENERIC_NCR53C400 |
1da177e4 LT |
34 | #define NCR5380_region_size 16 |
35 | #else | |
36 | #define NCR5380_region_size 8 | |
37 | #endif | |
38 | ||
54d8fe44 FT |
39 | #define NCR5380_read(reg) \ |
40 | inb(instance->io_port + (reg)) | |
41 | #define NCR5380_write(reg, value) \ | |
42 | outb(value, instance->io_port + (reg)) | |
1da177e4 | 43 | |
12150797 OZ |
44 | #define NCR5380_implementation_fields \ |
45 | int c400_ctl_status; \ | |
46 | int c400_blk_cnt; \ | |
aeb51152 OZ |
47 | int c400_host_buf; \ |
48 | int io_width; | |
c818cb64 | 49 | |
1da177e4 | 50 | #else |
702a98c6 | 51 | /* therefore SCSI_G_NCR5380_MEM */ |
aa2e2cb1 | 52 | #define DRV_MODULE_NAME "g_NCR5380_mmio" |
1da177e4 | 53 | |
1da177e4 LT |
54 | #define NCR5380_map_type unsigned long |
55 | #define NCR5380_map_name base | |
1da177e4 LT |
56 | #define NCR53C400_mem_base 0x3880 |
57 | #define NCR53C400_host_buffer 0x3900 | |
58 | #define NCR5380_region_size 0x3a00 | |
59 | ||
54d8fe44 FT |
60 | #define NCR5380_read(reg) \ |
61 | readb(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \ | |
62 | NCR53C400_mem_base + (reg)) | |
63 | #define NCR5380_write(reg, value) \ | |
64 | writeb(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \ | |
65 | NCR53C400_mem_base + (reg)) | |
1da177e4 LT |
66 | |
67 | #define NCR5380_implementation_fields \ | |
12150797 OZ |
68 | void __iomem *iomem; \ |
69 | int c400_ctl_status; \ | |
70 | int c400_blk_cnt; \ | |
71 | int c400_host_buf; | |
1da177e4 | 72 | |
c818cb64 | 73 | #endif |
1da177e4 | 74 | |
ff3d4578 FT |
75 | #define NCR5380_dma_xfer_len(instance, cmd, phase) \ |
76 | generic_NCR5380_dma_xfer_len(cmd) | |
77 | ||
1da177e4 LT |
78 | #define NCR5380_intr generic_NCR5380_intr |
79 | #define NCR5380_queue_command generic_NCR5380_queue_command | |
80 | #define NCR5380_abort generic_NCR5380_abort | |
81 | #define NCR5380_bus_reset generic_NCR5380_bus_reset | |
1da177e4 LT |
82 | #define NCR5380_pread generic_NCR5380_pread |
83 | #define NCR5380_pwrite generic_NCR5380_pwrite | |
8c32513b FT |
84 | #define NCR5380_info generic_NCR5380_info |
85 | #define NCR5380_show_info generic_NCR5380_show_info | |
1da177e4 LT |
86 | |
87 | #define BOARD_NCR5380 0 | |
88 | #define BOARD_NCR53C400 1 | |
89 | #define BOARD_NCR53C400A 2 | |
90 | #define BOARD_DTC3181E 3 | |
c6084cbc | 91 | #define BOARD_HP_C2502 4 |
1da177e4 | 92 | |
1da177e4 LT |
93 | #endif /* GENERIC_NCR5380_H */ |
94 |