[deliverable/linux.git] / drivers / scsi / g_NCR5380.h

/*
 * Generic Generic NCR5380 driver defines
 *
 * Copyright 1993, Drew Eckhardt
 *	Visionary Computing
 *	(Unix and Linux consulting and custom programming)
 *	drew@colorado.edu
 *      +1 (303) 440-4894
 *
 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
 *    K.Lentin@cs.monash.edu.au
 *
 * ALPHA RELEASE 1. 
 *
 * For more information, please consult 
 *
 * NCR 5380 Family
 * SCSI Protocol Controller
 * Databook
 *
 * NCR Microelectronics
 * 1635 Aeroplaza Drive
 * Colorado Springs, CO 80916
 * 1+ (719) 578-3400
 * 1+ (800) 334-5454
 */

#ifndef GENERIC_NCR5380_H
#define GENERIC_NCR5380_H


#define GENERIC_NCR5380_PUBLIC_RELEASE 1

#ifdef NCR53C400
#define BIOSPARAM
#define NCR5380_BIOSPARAM generic_NCR5380_biosparam
#else
#define NCR5380_BIOSPARAM NULL
#endif

#ifndef ASM
static int generic_NCR5380_abort(Scsi_Cmnd *);
static int generic_NCR5380_detect(struct scsi_host_template *);
static int generic_NCR5380_release_resources(struct Scsi_Host *);
static int generic_NCR5380_queue_command(struct Scsi_Host *, struct scsi_cmnd *);
static int generic_NCR5380_bus_reset(Scsi_Cmnd *);
static const char* generic_NCR5380_info(struct Scsi_Host *);

#ifndef CMD_PER_LUN
#define CMD_PER_LUN 2
#endif

#ifndef CAN_QUEUE
#define CAN_QUEUE 16
#endif

#define __STRVAL(x) #x
#define STRVAL(x) __STRVAL(x)

#ifndef SCSI_G_NCR5380_MEM

#define NCR5380_map_config port
#define NCR5380_map_type int
#define NCR5380_map_name port
#define NCR5380_instance_name io_port
#define NCR53C400_register_offset 0
#define NCR53C400_address_adjust 8

#ifdef NCR53C400
#define NCR5380_region_size 16
#else
#define NCR5380_region_size 8
#endif

#define NCR5380_read(reg) (inb(NCR5380_map_name + (reg)))
#define NCR5380_write(reg, value) (outb((value), (NCR5380_map_name + (reg))))

#define NCR5380_implementation_fields \
    NCR5380_map_type NCR5380_map_name

#define NCR5380_local_declare() \
    register NCR5380_implementation_fields

#define NCR5380_setup(instance) \
    NCR5380_map_name = (NCR5380_map_type)((instance)->NCR5380_instance_name)

#else 
/* therefore SCSI_G_NCR5380_MEM */

#define NCR5380_map_config memory
#define NCR5380_map_type unsigned long
#define NCR5380_map_name base
#define NCR5380_instance_name base
#define NCR53C400_register_offset 0x108
#define NCR53C400_address_adjust 0
#define NCR53C400_mem_base 0x3880
#define NCR53C400_host_buffer 0x3900
#define NCR5380_region_size 0x3a00

#define NCR5380_read(reg) readb(iomem + NCR53C400_mem_base + (reg))
#define NCR5380_write(reg, value) writeb(value, iomem + NCR53C400_mem_base + (reg))

#define NCR5380_implementation_fields \
    NCR5380_map_type NCR5380_map_name; \
    void __iomem *iomem;

#define NCR5380_local_declare() \
    register void __iomem *iomem

#define NCR5380_setup(instance) \
    iomem = (((struct NCR5380_hostdata *)(instance)->hostdata)->iomem)

#endif

#define NCR5380_intr generic_NCR5380_intr
#define NCR5380_queue_command generic_NCR5380_queue_command
#define NCR5380_abort generic_NCR5380_abort
#define NCR5380_bus_reset generic_NCR5380_bus_reset
#define NCR5380_pread generic_NCR5380_pread
#define NCR5380_pwrite generic_NCR5380_pwrite
#define NCR5380_proc_info notyet_generic_proc_info

#define BOARD_NCR5380	0
#define BOARD_NCR53C400	1
#define BOARD_NCR53C400A 2
#define BOARD_DTC3181E	3

#endif /* ndef ASM */
#endif /* GENERIC_NCR5380_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Generic Generic NCR5380 driver defines
	3	*
	4	* Copyright 1993, Drew Eckhardt
	5	* Visionary Computing
	6	* (Unix and Linux consulting and custom programming)
	7	* drew@colorado.edu
	8	* +1 (303) 440-4894
	9	*
	10	* NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
	11	* K.Lentin@cs.monash.edu.au
	12	*
	13	* ALPHA RELEASE 1.
	14	*
	15	* For more information, please consult
	16	*
	17	* NCR 5380 Family
	18	* SCSI Protocol Controller
	19	* Databook
	20	*
	21	* NCR Microelectronics
	22	* 1635 Aeroplaza Drive
	23	* Colorado Springs, CO 80916
	24	* 1+ (719) 578-3400
	25	* 1+ (800) 334-5454
	26	*/
	27
1da177e4 LT	28	#ifndef GENERIC_NCR5380_H
	29	#define GENERIC_NCR5380_H
	30
1da177e4 LT	31
	32	#define GENERIC_NCR5380_PUBLIC_RELEASE 1
	33
	34	#ifdef NCR53C400
	35	#define BIOSPARAM
	36	#define NCR5380_BIOSPARAM generic_NCR5380_biosparam
	37	#else
	38	#define NCR5380_BIOSPARAM NULL
	39	#endif
	40
	41	#ifndef ASM
	42	static int generic_NCR5380_abort(Scsi_Cmnd *);
d0be4a7d	43	static int generic_NCR5380_detect(struct scsi_host_template *);
1da177e4	44	static int generic_NCR5380_release_resources(struct Scsi_Host *);
f281233d	45	static int generic_NCR5380_queue_command(struct Scsi_Host , struct scsi_cmnd );
1da177e4	46	static int generic_NCR5380_bus_reset(Scsi_Cmnd *);
1da177e4 LT	47	static const char* generic_NCR5380_info(struct Scsi_Host *);
	48
	49	#ifndef CMD_PER_LUN
	50	#define CMD_PER_LUN 2
	51	#endif
	52
	53	#ifndef CAN_QUEUE
	54	#define CAN_QUEUE 16
	55	#endif
	56
1da177e4 LT	57	#define __STRVAL(x) #x
	58	#define STRVAL(x) __STRVAL(x)
	59
702a98c6	60	#ifndef SCSI_G_NCR5380_MEM
1da177e4 LT	61
	62	#define NCR5380_map_config port
	63	#define NCR5380_map_type int
	64	#define NCR5380_map_name port
	65	#define NCR5380_instance_name io_port
	66	#define NCR53C400_register_offset 0
	67	#define NCR53C400_address_adjust 8
	68
	69	#ifdef NCR53C400
	70	#define NCR5380_region_size 16
	71	#else
	72	#define NCR5380_region_size 8
	73	#endif
	74
	75	#define NCR5380_read(reg) (inb(NCR5380_map_name + (reg)))
	76	#define NCR5380_write(reg, value) (outb((value), (NCR5380_map_name + (reg))))
	77
c818cb64 AV	78	#define NCR5380_implementation_fields \
	79	NCR5380_map_type NCR5380_map_name
	80
	81	#define NCR5380_local_declare() \
	82	register NCR5380_implementation_fields
	83
	84	#define NCR5380_setup(instance) \
	85	NCR5380_map_name = (NCR5380_map_type)((instance)->NCR5380_instance_name)
	86
1da177e4	87	#else
702a98c6	88	/* therefore SCSI_G_NCR5380_MEM */
1da177e4 LT	89
	90	#define NCR5380_map_config memory
	91	#define NCR5380_map_type unsigned long
	92	#define NCR5380_map_name base
	93	#define NCR5380_instance_name base
	94	#define NCR53C400_register_offset 0x108
	95	#define NCR53C400_address_adjust 0
	96	#define NCR53C400_mem_base 0x3880
	97	#define NCR53C400_host_buffer 0x3900
	98	#define NCR5380_region_size 0x3a00
	99
c818cb64 AV	100	#define NCR5380_read(reg) readb(iomem + NCR53C400_mem_base + (reg))
c818cb64 AV	101	#define NCR5380_write(reg, value) writeb(value, iomem + NCR53C400_mem_base + (reg))
1da177e4 LT	102
1da177e4 LT	103	#define NCR5380_implementation_fields \
c818cb64 AV	104	NCR5380_map_type NCR5380_map_name; \
c818cb64 AV	105	void __iomem *iomem;
1da177e4 LT	106
1da177e4 LT	107	#define NCR5380_local_declare() \
c818cb64	108	register void __iomem *iomem
1da177e4 LT	109
1da177e4 LT	110	#define NCR5380_setup(instance) \
702a98c6	111	iomem = (((struct NCR5380_hostdata *)(instance)->hostdata)->iomem)
c818cb64 AV	112
c818cb64 AV	113	#endif
1da177e4 LT	114
	115	#define NCR5380_intr generic_NCR5380_intr
	116	#define NCR5380_queue_command generic_NCR5380_queue_command
	117	#define NCR5380_abort generic_NCR5380_abort
	118	#define NCR5380_bus_reset generic_NCR5380_bus_reset
1da177e4 LT	119	#define NCR5380_pread generic_NCR5380_pread
	120	#define NCR5380_pwrite generic_NCR5380_pwrite
	121	#define NCR5380_proc_info notyet_generic_proc_info
	122
	123	#define BOARD_NCR5380 0
	124	#define BOARD_NCR53C400 1
	125	#define BOARD_NCR53C400A 2
	126	#define BOARD_DTC3181E 3
	127
1da177e4 LT	128	#endif /* ndef ASM */
	129	#endif /* GENERIC_NCR5380_H */
	130