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[SCSI] hpsa: retry driver initiated commands on busy status
[deliverable/linux.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
32#include <linux/seq_file.h>
33#include <linux/init.h>
34#include <linux/spinlock.h>
edd16368
SC		 35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
667e23d4 46#include <scsi/scsi_tcq.h>
edd16368
SC		 47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
60063497 50#include <linux/atomic.h>
edd16368 51#include <linux/kthread.h>
a0c12413 52#include <linux/jiffies.h>
edd16368
SC		 53#include "hpsa_cmd.h"
54#include "hpsa.h"
55
56/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 57#define HPSA_DRIVER_VERSION "2.0.2-1"
edd16368 58#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 59#define HPSA "hpsa"
edd16368
SC		 60
61/* How long to wait (in milliseconds) for board to go into simple mode */
62#define MAX_CONFIG_WAIT 30000
63#define MAX_IOCTL_CONFIG_WAIT 1000
64
65/*define how many times we will try a command because of bus resets */
66#define MAX_CMD_RETRIES 3
67
68/* Embedded module documentation macros - see modules.h */
69MODULE_AUTHOR("Hewlett-Packard Company");
70MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73MODULE_VERSION(HPSA_DRIVER_VERSION);
74MODULE_LICENSE("GPL");
75
76static int hpsa_allow_any;
77module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 80static int hpsa_simple_mode;
81module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 84
85/* define the PCI info for the cards we can control */
86static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
7c03b870 102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 104 {0,}
105};
106
107MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
108
109/* board_id = Subsystem Device ID & Vendor ID
110 * product = Marketing Name for the board
111 * access = Address of the struct of function pointers
112 */
113static struct board_type products[] = {
edd16368
SC		 114 {0x3241103C, "Smart Array P212", &SA5_access},
115 {0x3243103C, "Smart Array P410", &SA5_access},
116 {0x3245103C, "Smart Array P410i", &SA5_access},
117 {0x3247103C, "Smart Array P411", &SA5_access},
118 {0x3249103C, "Smart Array P812", &SA5_access},
119 {0x324a103C, "Smart Array P712m", &SA5_access},
120 {0x324b103C, "Smart Array P711m", &SA5_access},
9143a961 121 {0x3350103C, "Smart Array", &SA5_access},
122 {0x3351103C, "Smart Array", &SA5_access},
123 {0x3352103C, "Smart Array", &SA5_access},
124 {0x3353103C, "Smart Array", &SA5_access},
125 {0x3354103C, "Smart Array", &SA5_access},
126 {0x3355103C, "Smart Array", &SA5_access},
127 {0x3356103C, "Smart Array", &SA5_access},
edd16368
SC		 128 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
129};
130
131static int number_of_controllers;
132
a0c12413
SC		 133static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
134static spinlock_t lockup_detector_lock;
135static struct task_struct *hpsa_lockup_detector;
136
10f66018
SC		 137static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
138static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 139static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
140static void start_io(struct ctlr_info *h);
141
142#ifdef CONFIG_COMPAT
143static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
144#endif
145
146static void cmd_free(struct ctlr_info *h, struct CommandList *c);
147static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
148static struct CommandList *cmd_alloc(struct ctlr_info *h);
149static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
01a02ffc
SC		 150static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 152 int cmd_type);
153
f281233d 154static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 155static void hpsa_scan_start(struct Scsi_Host *);
156static int hpsa_scan_finished(struct Scsi_Host *sh,
157 unsigned long elapsed_time);
667e23d4
SC		 158static int hpsa_change_queue_depth(struct scsi_device *sdev,
159 int qdepth, int reason);
edd16368
SC		 160
161static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
162static int hpsa_slave_alloc(struct scsi_device *sdev);
163static void hpsa_slave_destroy(struct scsi_device *sdev);
164
edd16368 165static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 166static int check_for_unit_attention(struct ctlr_info *h,
167 struct CommandList *c);
168static void check_ioctl_unit_attention(struct ctlr_info *h,
169 struct CommandList *c);
303932fd
DB		 170/* performant mode helper functions */
171static void calc_bucket_map(int *bucket, int num_buckets,
172 int nsgs, int *bucket_map);
7136f9a7 173static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 174static inline u32 next_command(struct ctlr_info *h);
1df8552a
SC		 175static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
176 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
177 u64 *cfg_offset);
178static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
179 unsigned long *memory_bar);
18867659 180static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
fe5389c8
SC		 181static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
182 void __iomem *vaddr, int wait_for_ready);
183#define BOARD_NOT_READY 0
184#define BOARD_READY 1
edd16368 185
edd16368
SC		 186static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
187{
188 unsigned long *priv = shost_priv(sdev->host);
189 return (struct ctlr_info *) *priv;
190}
191
a23513e8
SC		 192static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
193{
194 unsigned long *priv = shost_priv(sh);
195 return (struct ctlr_info *) *priv;
196}
197
edd16368
SC		 198static int check_for_unit_attention(struct ctlr_info *h,
199 struct CommandList *c)
200{
201 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
202 return 0;
203
204 switch (c->err_info->SenseInfo[12]) {
205 case STATE_CHANGED:
f79cfec6 206 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 207 "detected, command retried\n", h->ctlr);
208 break;
209 case LUN_FAILED:
f79cfec6 210 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 211 "detected, action required\n", h->ctlr);
212 break;
213 case REPORT_LUNS_CHANGED:
f79cfec6 214 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 215 "changed, action required\n", h->ctlr);
edd16368 216 /*
4f4eb9f1
ST		 217 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
218 * target (array) devices.
edd16368
SC		 219 */
220 break;
221 case POWER_OR_RESET:
f79cfec6 222 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 223 "or device reset detected\n", h->ctlr);
224 break;
225 case UNIT_ATTENTION_CLEARED:
f79cfec6 226 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 227 "cleared by another initiator\n", h->ctlr);
228 break;
229 default:
f79cfec6 230 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 231 "unit attention detected\n", h->ctlr);
232 break;
233 }
234 return 1;
235}
236
852af20a
MB		 237static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
238{
239 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
240 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
241 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
242 return 0;
243 dev_warn(&h->pdev->dev, HPSA "device busy");
244 return 1;
245}
246
edd16368
SC		 247static ssize_t host_store_rescan(struct device *dev,
248 struct device_attribute *attr,
249 const char *buf, size_t count)
250{
251 struct ctlr_info *h;
252 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 253 h = shost_to_hba(shost);
31468401 254 hpsa_scan_start(h->scsi_host);
edd16368
SC		 255 return count;
256}
257
d28ce020
SC		 258static ssize_t host_show_firmware_revision(struct device *dev,
259 struct device_attribute *attr, char *buf)
260{
261 struct ctlr_info *h;
262 struct Scsi_Host *shost = class_to_shost(dev);
263 unsigned char *fwrev;
264
265 h = shost_to_hba(shost);
266 if (!h->hba_inquiry_data)
267 return 0;
268 fwrev = &h->hba_inquiry_data[32];
269 return snprintf(buf, 20, "%c%c%c%c\n",
270 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
271}
272
94a13649
SC		 273static ssize_t host_show_commands_outstanding(struct device *dev,
274 struct device_attribute *attr, char *buf)
275{
276 struct Scsi_Host *shost = class_to_shost(dev);
277 struct ctlr_info *h = shost_to_hba(shost);
278
279 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
280}
281
745a7a25
SC		 282static ssize_t host_show_transport_mode(struct device *dev,
283 struct device_attribute *attr, char *buf)
284{
285 struct ctlr_info *h;
286 struct Scsi_Host *shost = class_to_shost(dev);
287
288 h = shost_to_hba(shost);
289 return snprintf(buf, 20, "%s\n",
960a30e7 290 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 291 "performant" : "simple");
292}
293
46380786 294/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 295static u32 unresettable_controller[] = {
296 0x324a103C, /* Smart Array P712m */
297 0x324b103C, /* SmartArray P711m */
298 0x3223103C, /* Smart Array P800 */
299 0x3234103C, /* Smart Array P400 */
300 0x3235103C, /* Smart Array P400i */
301 0x3211103C, /* Smart Array E200i */
302 0x3212103C, /* Smart Array E200 */
303 0x3213103C, /* Smart Array E200i */
304 0x3214103C, /* Smart Array E200i */
305 0x3215103C, /* Smart Array E200i */
306 0x3237103C, /* Smart Array E500 */
307 0x323D103C, /* Smart Array P700m */
7af0abbc 308 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 309 0x409C0E11, /* Smart Array 6400 */
310 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 311 0x40700E11, /* Smart Array 5300 */
312 0x40820E11, /* Smart Array 532 */
313 0x40830E11, /* Smart Array 5312 */
314 0x409A0E11, /* Smart Array 641 */
315 0x409B0E11, /* Smart Array 642 */
316 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 317};
318
46380786
SC		 319/* List of controllers which cannot even be soft reset */
320static u32 soft_unresettable_controller[] = {
7af0abbc 321 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 322 0x40700E11, /* Smart Array 5300 */
323 0x40820E11, /* Smart Array 532 */
324 0x40830E11, /* Smart Array 5312 */
325 0x409A0E11, /* Smart Array 641 */
326 0x409B0E11, /* Smart Array 642 */
327 0x40910E11, /* Smart Array 6i */
46380786
SC		 328 /* Exclude 640x boards. These are two pci devices in one slot
329 * which share a battery backed cache module. One controls the
330 * cache, the other accesses the cache through the one that controls
331 * it. If we reset the one controlling the cache, the other will
332 * likely not be happy. Just forbid resetting this conjoined mess.
333 * The 640x isn't really supported by hpsa anyway.
334 */
335 0x409C0E11, /* Smart Array 6400 */
336 0x409D0E11, /* Smart Array 6400 EM */
337};
338
339static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 340{
341 int i;
342
343 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 344 if (unresettable_controller[i] == board_id)
345 return 0;
346 return 1;
347}
348
349static int ctlr_is_soft_resettable(u32 board_id)
350{
351 int i;
352
353 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
354 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 355 return 0;
356 return 1;
357}
358
46380786
SC		 359static int ctlr_is_resettable(u32 board_id)
360{
361 return ctlr_is_hard_resettable(board_id) ||
362 ctlr_is_soft_resettable(board_id);
363}
364
941b1cda
SC		 365static ssize_t host_show_resettable(struct device *dev,
366 struct device_attribute *attr, char *buf)
367{
368 struct ctlr_info *h;
369 struct Scsi_Host *shost = class_to_shost(dev);
370
371 h = shost_to_hba(shost);
46380786 372 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 373}
374
edd16368
SC		 375static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
376{
377 return (scsi3addr[3] & 0xC0) == 0x40;
378}
379
380static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
381 "UNKNOWN"
382};
383#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
384
385static ssize_t raid_level_show(struct device *dev,
386 struct device_attribute *attr, char *buf)
387{
388 ssize_t l = 0;
82a72c0a 389 unsigned char rlevel;
edd16368
SC		 390 struct ctlr_info *h;
391 struct scsi_device *sdev;
392 struct hpsa_scsi_dev_t *hdev;
393 unsigned long flags;
394
395 sdev = to_scsi_device(dev);
396 h = sdev_to_hba(sdev);
397 spin_lock_irqsave(&h->lock, flags);
398 hdev = sdev->hostdata;
399 if (!hdev) {
400 spin_unlock_irqrestore(&h->lock, flags);
401 return -ENODEV;
402 }
403
404 /* Is this even a logical drive? */
405 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
406 spin_unlock_irqrestore(&h->lock, flags);
407 l = snprintf(buf, PAGE_SIZE, "N/A\n");
408 return l;
409 }
410
411 rlevel = hdev->raid_level;
412 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 413 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 414 rlevel = RAID_UNKNOWN;
415 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
416 return l;
417}
418
419static ssize_t lunid_show(struct device *dev,
420 struct device_attribute *attr, char *buf)
421{
422 struct ctlr_info *h;
423 struct scsi_device *sdev;
424 struct hpsa_scsi_dev_t *hdev;
425 unsigned long flags;
426 unsigned char lunid[8];
427
428 sdev = to_scsi_device(dev);
429 h = sdev_to_hba(sdev);
430 spin_lock_irqsave(&h->lock, flags);
431 hdev = sdev->hostdata;
432 if (!hdev) {
433 spin_unlock_irqrestore(&h->lock, flags);
434 return -ENODEV;
435 }
436 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
437 spin_unlock_irqrestore(&h->lock, flags);
438 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
439 lunid[0], lunid[1], lunid[2], lunid[3],
440 lunid[4], lunid[5], lunid[6], lunid[7]);
441}
442
443static ssize_t unique_id_show(struct device *dev,
444 struct device_attribute *attr, char *buf)
445{
446 struct ctlr_info *h;
447 struct scsi_device *sdev;
448 struct hpsa_scsi_dev_t *hdev;
449 unsigned long flags;
450 unsigned char sn[16];
451
452 sdev = to_scsi_device(dev);
453 h = sdev_to_hba(sdev);
454 spin_lock_irqsave(&h->lock, flags);
455 hdev = sdev->hostdata;
456 if (!hdev) {
457 spin_unlock_irqrestore(&h->lock, flags);
458 return -ENODEV;
459 }
460 memcpy(sn, hdev->device_id, sizeof(sn));
461 spin_unlock_irqrestore(&h->lock, flags);
462 return snprintf(buf, 16 * 2 + 2,
463 "%02X%02X%02X%02X%02X%02X%02X%02X"
464 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
465 sn[0], sn[1], sn[2], sn[3],
466 sn[4], sn[5], sn[6], sn[7],
467 sn[8], sn[9], sn[10], sn[11],
468 sn[12], sn[13], sn[14], sn[15]);
469}
470
3f5eac3a
SC		 471static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
472static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
473static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
474static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
475static DEVICE_ATTR(firmware_revision, S_IRUGO,
476 host_show_firmware_revision, NULL);
477static DEVICE_ATTR(commands_outstanding, S_IRUGO,
478 host_show_commands_outstanding, NULL);
479static DEVICE_ATTR(transport_mode, S_IRUGO,
480 host_show_transport_mode, NULL);
941b1cda
SC		 481static DEVICE_ATTR(resettable, S_IRUGO,
482 host_show_resettable, NULL);
3f5eac3a
SC		 483
484static struct device_attribute *hpsa_sdev_attrs[] = {
485 &dev_attr_raid_level,
486 &dev_attr_lunid,
487 &dev_attr_unique_id,
488 NULL,
489};
490
491static struct device_attribute *hpsa_shost_attrs[] = {
492 &dev_attr_rescan,
493 &dev_attr_firmware_revision,
494 &dev_attr_commands_outstanding,
495 &dev_attr_transport_mode,
941b1cda 496 &dev_attr_resettable,
3f5eac3a
SC		 497 NULL,
498};
499
500static struct scsi_host_template hpsa_driver_template = {
501 .module = THIS_MODULE,
f79cfec6
SC		 502 .name = HPSA,
503 .proc_name = HPSA,
3f5eac3a
SC		 504 .queuecommand = hpsa_scsi_queue_command,
505 .scan_start = hpsa_scan_start,
506 .scan_finished = hpsa_scan_finished,
507 .change_queue_depth = hpsa_change_queue_depth,
508 .this_id = -1,
509 .use_clustering = ENABLE_CLUSTERING,
510 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
511 .ioctl = hpsa_ioctl,
512 .slave_alloc = hpsa_slave_alloc,
513 .slave_destroy = hpsa_slave_destroy,
514#ifdef CONFIG_COMPAT
515 .compat_ioctl = hpsa_compat_ioctl,
516#endif
517 .sdev_attrs = hpsa_sdev_attrs,
518 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 519 .max_sectors = 8192,
3f5eac3a
SC		 520};
521
522
523/* Enqueuing and dequeuing functions for cmdlists. */
524static inline void addQ(struct list_head *list, struct CommandList *c)
525{
526 list_add_tail(&c->list, list);
527}
528
529static inline u32 next_command(struct ctlr_info *h)
530{
531 u32 a;
532
533 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
534 return h->access.command_completed(h);
535
536 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
537 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
538 (h->reply_pool_head)++;
539 h->commands_outstanding--;
540 } else {
541 a = FIFO_EMPTY;
542 }
543 /* Check for wraparound */
544 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
545 h->reply_pool_head = h->reply_pool;
546 h->reply_pool_wraparound ^= 1;
547 }
548 return a;
549}
550
551/* set_performant_mode: Modify the tag for cciss performant
552 * set bit 0 for pull model, bits 3-1 for block fetch
553 * register number
554 */
555static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
556{
557 if (likely(h->transMethod & CFGTBL_Trans_Performant))
558 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
559}
560
561static void enqueue_cmd_and_start_io(struct ctlr_info *h,
562 struct CommandList *c)
563{
564 unsigned long flags;
565
566 set_performant_mode(h, c);
567 spin_lock_irqsave(&h->lock, flags);
568 addQ(&h->reqQ, c);
569 h->Qdepth++;
570 start_io(h);
571 spin_unlock_irqrestore(&h->lock, flags);
572}
573
574static inline void removeQ(struct CommandList *c)
575{
576 if (WARN_ON(list_empty(&c->list)))
577 return;
578 list_del_init(&c->list);
579}
580
581static inline int is_hba_lunid(unsigned char scsi3addr[])
582{
583 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
584}
585
586static inline int is_scsi_rev_5(struct ctlr_info *h)
587{
588 if (!h->hba_inquiry_data)
589 return 0;
590 if ((h->hba_inquiry_data[2] & 0x07) == 5)
591 return 1;
592 return 0;
593}
594
edd16368
SC		 595static int hpsa_find_target_lun(struct ctlr_info *h,
596 unsigned char scsi3addr[], int bus, int *target, int *lun)
597{
598 /* finds an unused bus, target, lun for a new physical device
599 * assumes h->devlock is held
600 */
601 int i, found = 0;
cfe5badc 602 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 603
263d9401 604 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 605
606 for (i = 0; i < h->ndevices; i++) {
607 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 608 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 609 }
610
263d9401
AM		 611 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
612 if (i < HPSA_MAX_DEVICES) {
613 /* *bus = 1; */
614 *target = i;
615 *lun = 0;
616 found = 1;
edd16368
SC		 617 }
618 return !found;
619}
620
621/* Add an entry into h->dev[] array. */
622static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
623 struct hpsa_scsi_dev_t *device,
624 struct hpsa_scsi_dev_t *added[], int *nadded)
625{
626 /* assumes h->devlock is held */
627 int n = h->ndevices;
628 int i;
629 unsigned char addr1[8], addr2[8];
630 struct hpsa_scsi_dev_t *sd;
631
cfe5badc 632 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 633 dev_err(&h->pdev->dev, "too many devices, some will be "
634 "inaccessible.\n");
635 return -1;
636 }
637
638 /* physical devices do not have lun or target assigned until now. */
639 if (device->lun != -1)
640 /* Logical device, lun is already assigned. */
641 goto lun_assigned;
642
643 /* If this device a non-zero lun of a multi-lun device
644 * byte 4 of the 8-byte LUN addr will contain the logical
645 * unit no, zero otherise.
646 */
647 if (device->scsi3addr[4] == 0) {
648 /* This is not a non-zero lun of a multi-lun device */
649 if (hpsa_find_target_lun(h, device->scsi3addr,
650 device->bus, &device->target, &device->lun) != 0)
651 return -1;
652 goto lun_assigned;
653 }
654
655 /* This is a non-zero lun of a multi-lun device.
656 * Search through our list and find the device which
657 * has the same 8 byte LUN address, excepting byte 4.
658 * Assign the same bus and target for this new LUN.
659 * Use the logical unit number from the firmware.
660 */
661 memcpy(addr1, device->scsi3addr, 8);
662 addr1[4] = 0;
663 for (i = 0; i < n; i++) {
664 sd = h->dev[i];
665 memcpy(addr2, sd->scsi3addr, 8);
666 addr2[4] = 0;
667 /* differ only in byte 4? */
668 if (memcmp(addr1, addr2, 8) == 0) {
669 device->bus = sd->bus;
670 device->target = sd->target;
671 device->lun = device->scsi3addr[4];
672 break;
673 }
674 }
675 if (device->lun == -1) {
676 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
677 " suspect firmware bug or unsupported hardware "
678 "configuration.\n");
679 return -1;
680 }
681
682lun_assigned:
683
684 h->dev[n] = device;
685 h->ndevices++;
686 added[*nadded] = device;
687 (*nadded)++;
688
689 /* initially, (before registering with scsi layer) we don't
690 * know our hostno and we don't want to print anything first
691 * time anyway (the scsi layer's inquiries will show that info)
692 */
693 /* if (hostno != -1) */
694 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
695 scsi_device_type(device->devtype), hostno,
696 device->bus, device->target, device->lun);
697 return 0;
698}
699
bd9244f7
ST		 700/* Update an entry in h->dev[] array. */
701static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
702 int entry, struct hpsa_scsi_dev_t *new_entry)
703{
704 /* assumes h->devlock is held */
705 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
706
707 /* Raid level changed. */
708 h->dev[entry]->raid_level = new_entry->raid_level;
709 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
710 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
711 new_entry->target, new_entry->lun);
712}
713
2a8ccf31
SC		 714/* Replace an entry from h->dev[] array. */
715static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
716 int entry, struct hpsa_scsi_dev_t *new_entry,
717 struct hpsa_scsi_dev_t *added[], int *nadded,
718 struct hpsa_scsi_dev_t *removed[], int *nremoved)
719{
720 /* assumes h->devlock is held */
cfe5badc 721 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 722 removed[*nremoved] = h->dev[entry];
723 (*nremoved)++;
01350d05
SC		 724
725 /*
726 * New physical devices won't have target/lun assigned yet
727 * so we need to preserve the values in the slot we are replacing.
728 */
729 if (new_entry->target == -1) {
730 new_entry->target = h->dev[entry]->target;
731 new_entry->lun = h->dev[entry]->lun;
732 }
733
2a8ccf31
SC		 734 h->dev[entry] = new_entry;
735 added[*nadded] = new_entry;
736 (*nadded)++;
737 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
738 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
739 new_entry->target, new_entry->lun);
740}
741
edd16368
SC		 742/* Remove an entry from h->dev[] array. */
743static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
744 struct hpsa_scsi_dev_t *removed[], int *nremoved)
745{
746 /* assumes h->devlock is held */
747 int i;
748 struct hpsa_scsi_dev_t *sd;
749
cfe5badc 750 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 751
752 sd = h->dev[entry];
753 removed[*nremoved] = h->dev[entry];
754 (*nremoved)++;
755
756 for (i = entry; i < h->ndevices-1; i++)
757 h->dev[i] = h->dev[i+1];
758 h->ndevices--;
759 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
760 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
761 sd->lun);
762}
763
764#define SCSI3ADDR_EQ(a, b) ( \
765 (a)[7] == (b)[7] && \
766 (a)[6] == (b)[6] && \
767 (a)[5] == (b)[5] && \
768 (a)[4] == (b)[4] && \
769 (a)[3] == (b)[3] && \
770 (a)[2] == (b)[2] && \
771 (a)[1] == (b)[1] && \
772 (a)[0] == (b)[0])
773
774static void fixup_botched_add(struct ctlr_info *h,
775 struct hpsa_scsi_dev_t *added)
776{
777 /* called when scsi_add_device fails in order to re-adjust
778 * h->dev[] to match the mid layer's view.
779 */
780 unsigned long flags;
781 int i, j;
782
783 spin_lock_irqsave(&h->lock, flags);
784 for (i = 0; i < h->ndevices; i++) {
785 if (h->dev[i] == added) {
786 for (j = i; j < h->ndevices-1; j++)
787 h->dev[j] = h->dev[j+1];
788 h->ndevices--;
789 break;
790 }
791 }
792 spin_unlock_irqrestore(&h->lock, flags);
793 kfree(added);
794}
795
796static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
797 struct hpsa_scsi_dev_t *dev2)
798{
edd16368
SC		 799 /* we compare everything except lun and target as these
800 * are not yet assigned. Compare parts likely
801 * to differ first
802 */
803 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
804 sizeof(dev1->scsi3addr)) != 0)
805 return 0;
806 if (memcmp(dev1->device_id, dev2->device_id,
807 sizeof(dev1->device_id)) != 0)
808 return 0;
809 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
810 return 0;
811 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
812 return 0;
edd16368
SC		 813 if (dev1->devtype != dev2->devtype)
814 return 0;
edd16368
SC		 815 if (dev1->bus != dev2->bus)
816 return 0;
817 return 1;
818}
819
bd9244f7
ST		 820static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
821 struct hpsa_scsi_dev_t *dev2)
822{
823 /* Device attributes that can change, but don't mean
824 * that the device is a different device, nor that the OS
825 * needs to be told anything about the change.
826 */
827 if (dev1->raid_level != dev2->raid_level)
828 return 1;
829 return 0;
830}
831
edd16368
SC		 832/* Find needle in haystack. If exact match found, return DEVICE_SAME,
833 * and return needle location in *index. If scsi3addr matches, but not
834 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 835 * location in *index.
836 * In the case of a minor device attribute change, such as RAID level, just
837 * return DEVICE_UPDATED, along with the updated device's location in index.
838 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 839 */
840static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
841 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
842 int *index)
843{
844 int i;
845#define DEVICE_NOT_FOUND 0
846#define DEVICE_CHANGED 1
847#define DEVICE_SAME 2
bd9244f7 848#define DEVICE_UPDATED 3
edd16368 849 for (i = 0; i < haystack_size; i++) {
23231048
SC		 850 if (haystack[i] == NULL) /* previously removed. */
851 continue;
edd16368
SC		 852 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
853 *index = i;
bd9244f7
ST		 854 if (device_is_the_same(needle, haystack[i])) {
855 if (device_updated(needle, haystack[i]))
856 return DEVICE_UPDATED;
edd16368 857 return DEVICE_SAME;
bd9244f7 858 } else {
edd16368 859 return DEVICE_CHANGED;
bd9244f7 860 }
edd16368
SC		 861 }
862 }
863 *index = -1;
864 return DEVICE_NOT_FOUND;
865}
866
4967bd3e 867static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 868 struct hpsa_scsi_dev_t *sd[], int nsds)
869{
870 /* sd contains scsi3 addresses and devtypes, and inquiry
871 * data. This function takes what's in sd to be the current
872 * reality and updates h->dev[] to reflect that reality.
873 */
874 int i, entry, device_change, changes = 0;
875 struct hpsa_scsi_dev_t *csd;
876 unsigned long flags;
877 struct hpsa_scsi_dev_t **added, **removed;
878 int nadded, nremoved;
879 struct Scsi_Host *sh = NULL;
880
cfe5badc
ST		 881 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
882 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 883
884 if (!added || !removed) {
885 dev_warn(&h->pdev->dev, "out of memory in "
886 "adjust_hpsa_scsi_table\n");
887 goto free_and_out;
888 }
889
890 spin_lock_irqsave(&h->devlock, flags);
891
892 /* find any devices in h->dev[] that are not in
893 * sd[] and remove them from h->dev[], and for any
894 * devices which have changed, remove the old device
895 * info and add the new device info.
bd9244f7
ST		 896 * If minor device attributes change, just update
897 * the existing device structure.
edd16368
SC		 898 */
899 i = 0;
900 nremoved = 0;
901 nadded = 0;
902 while (i < h->ndevices) {
903 csd = h->dev[i];
904 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
905 if (device_change == DEVICE_NOT_FOUND) {
906 changes++;
907 hpsa_scsi_remove_entry(h, hostno, i,
908 removed, &nremoved);
909 continue; /* remove ^^^, hence i not incremented */
910 } else if (device_change == DEVICE_CHANGED) {
911 changes++;
2a8ccf31
SC		 912 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
913 added, &nadded, removed, &nremoved);
c7f172dc
SC		 914 /* Set it to NULL to prevent it from being freed
915 * at the bottom of hpsa_update_scsi_devices()
916 */
917 sd[entry] = NULL;
bd9244f7
ST		 918 } else if (device_change == DEVICE_UPDATED) {
919 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 920 }
921 i++;
922 }
923
924 /* Now, make sure every device listed in sd[] is also
925 * listed in h->dev[], adding them if they aren't found
926 */
927
928 for (i = 0; i < nsds; i++) {
929 if (!sd[i]) /* if already added above. */
930 continue;
931 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
932 h->ndevices, &entry);
933 if (device_change == DEVICE_NOT_FOUND) {
934 changes++;
935 if (hpsa_scsi_add_entry(h, hostno, sd[i],
936 added, &nadded) != 0)
937 break;
938 sd[i] = NULL; /* prevent from being freed later. */
939 } else if (device_change == DEVICE_CHANGED) {
940 /* should never happen... */
941 changes++;
942 dev_warn(&h->pdev->dev,
943 "device unexpectedly changed.\n");
944 /* but if it does happen, we just ignore that device */
945 }
946 }
947 spin_unlock_irqrestore(&h->devlock, flags);
948
949 /* Don't notify scsi mid layer of any changes the first time through
950 * (or if there are no changes) scsi_scan_host will do it later the
951 * first time through.
952 */
953 if (hostno == -1 || !changes)
954 goto free_and_out;
955
956 sh = h->scsi_host;
957 /* Notify scsi mid layer of any removed devices */
958 for (i = 0; i < nremoved; i++) {
959 struct scsi_device *sdev =
960 scsi_device_lookup(sh, removed[i]->bus,
961 removed[i]->target, removed[i]->lun);
962 if (sdev != NULL) {
963 scsi_remove_device(sdev);
964 scsi_device_put(sdev);
965 } else {
966 /* We don't expect to get here.
967 * future cmds to this device will get selection
968 * timeout as if the device was gone.
969 */
970 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
971 " for removal.", hostno, removed[i]->bus,
972 removed[i]->target, removed[i]->lun);
973 }
974 kfree(removed[i]);
975 removed[i] = NULL;
976 }
977
978 /* Notify scsi mid layer of any added devices */
979 for (i = 0; i < nadded; i++) {
980 if (scsi_add_device(sh, added[i]->bus,
981 added[i]->target, added[i]->lun) == 0)
982 continue;
983 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
984 "device not added.\n", hostno, added[i]->bus,
985 added[i]->target, added[i]->lun);
986 /* now we have to remove it from h->dev,
987 * since it didn't get added to scsi mid layer
988 */
989 fixup_botched_add(h, added[i]);
990 }
991
992free_and_out:
993 kfree(added);
994 kfree(removed);
edd16368
SC		 995}
996
997/*
998 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
999 * Assume's h->devlock is held.
1000 */
1001static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1002 int bus, int target, int lun)
1003{
1004 int i;
1005 struct hpsa_scsi_dev_t *sd;
1006
1007 for (i = 0; i < h->ndevices; i++) {
1008 sd = h->dev[i];
1009 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1010 return sd;
1011 }
1012 return NULL;
1013}
1014
1015/* link sdev->hostdata to our per-device structure. */
1016static int hpsa_slave_alloc(struct scsi_device *sdev)
1017{
1018 struct hpsa_scsi_dev_t *sd;
1019 unsigned long flags;
1020 struct ctlr_info *h;
1021
1022 h = sdev_to_hba(sdev);
1023 spin_lock_irqsave(&h->devlock, flags);
1024 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1025 sdev_id(sdev), sdev->lun);
1026 if (sd != NULL)
1027 sdev->hostdata = sd;
1028 spin_unlock_irqrestore(&h->devlock, flags);
1029 return 0;
1030}
1031
1032static void hpsa_slave_destroy(struct scsi_device *sdev)
1033{
bcc44255 1034 /* nothing to do. */
edd16368
SC		 1035}
1036
33a2ffce
SC		 1037static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1038{
1039 int i;
1040
1041 if (!h->cmd_sg_list)
1042 return;
1043 for (i = 0; i < h->nr_cmds; i++) {
1044 kfree(h->cmd_sg_list[i]);
1045 h->cmd_sg_list[i] = NULL;
1046 }
1047 kfree(h->cmd_sg_list);
1048 h->cmd_sg_list = NULL;
1049}
1050
1051static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1052{
1053 int i;
1054
1055 if (h->chainsize <= 0)
1056 return 0;
1057
1058 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1059 GFP_KERNEL);
1060 if (!h->cmd_sg_list)
1061 return -ENOMEM;
1062 for (i = 0; i < h->nr_cmds; i++) {
1063 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1064 h->chainsize, GFP_KERNEL);
1065 if (!h->cmd_sg_list[i])
1066 goto clean;
1067 }
1068 return 0;
1069
1070clean:
1071 hpsa_free_sg_chain_blocks(h);
1072 return -ENOMEM;
1073}
1074
1075static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1076 struct CommandList *c)
1077{
1078 struct SGDescriptor *chain_sg, *chain_block;
1079 u64 temp64;
1080
1081 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1082 chain_block = h->cmd_sg_list[c->cmdindex];
1083 chain_sg->Ext = HPSA_SG_CHAIN;
1084 chain_sg->Len = sizeof(*chain_sg) *
1085 (c->Header.SGTotal - h->max_cmd_sg_entries);
1086 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1087 PCI_DMA_TODEVICE);
1088 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1089 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1090}
1091
1092static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1093 struct CommandList *c)
1094{
1095 struct SGDescriptor *chain_sg;
1096 union u64bit temp64;
1097
1098 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1099 return;
1100
1101 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1102 temp64.val32.lower = chain_sg->Addr.lower;
1103 temp64.val32.upper = chain_sg->Addr.upper;
1104 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1105}
1106
1fb011fb 1107static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1108{
1109 struct scsi_cmnd *cmd;
1110 struct ctlr_info *h;
1111 struct ErrorInfo *ei;
1112
1113 unsigned char sense_key;
1114 unsigned char asc; /* additional sense code */
1115 unsigned char ascq; /* additional sense code qualifier */
db111e18 1116 unsigned long sense_data_size;
edd16368
SC		 1117
1118 ei = cp->err_info;
1119 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1120 h = cp->h;
1121
1122 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1123 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1124 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1125
1126 cmd->result = (DID_OK << 16); /* host byte */
1127 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1128 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1129
1130 /* copy the sense data whether we need to or not. */
db111e18
SC		 1131 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1132 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1133 else
1134 sense_data_size = sizeof(ei->SenseInfo);
1135 if (ei->SenseLen < sense_data_size)
1136 sense_data_size = ei->SenseLen;
1137
1138 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1139 scsi_set_resid(cmd, ei->ResidualCnt);
1140
1141 if (ei->CommandStatus == 0) {
1142 cmd->scsi_done(cmd);
1143 cmd_free(h, cp);
1144 return;
1145 }
1146
1147 /* an error has occurred */
1148 switch (ei->CommandStatus) {
1149
1150 case CMD_TARGET_STATUS:
1151 if (ei->ScsiStatus) {
1152 /* Get sense key */
1153 sense_key = 0xf & ei->SenseInfo[2];
1154 /* Get additional sense code */
1155 asc = ei->SenseInfo[12];
1156 /* Get addition sense code qualifier */
1157 ascq = ei->SenseInfo[13];
1158 }
1159
1160 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1161 if (check_for_unit_attention(h, cp)) {
1162 cmd->result = DID_SOFT_ERROR << 16;
1163 break;
1164 }
1165 if (sense_key == ILLEGAL_REQUEST) {
1166 /*
1167 * SCSI REPORT_LUNS is commonly unsupported on
1168 * Smart Array. Suppress noisy complaint.
1169 */
1170 if (cp->Request.CDB[0] == REPORT_LUNS)
1171 break;
1172
1173 /* If ASC/ASCQ indicate Logical Unit
1174 * Not Supported condition,
1175 */
1176 if ((asc == 0x25) && (ascq == 0x0)) {
1177 dev_warn(&h->pdev->dev, "cp %p "
1178 "has check condition\n", cp);
1179 break;
1180 }
1181 }
1182
1183 if (sense_key == NOT_READY) {
1184 /* If Sense is Not Ready, Logical Unit
1185 * Not ready, Manual Intervention
1186 * required
1187 */
1188 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1189 dev_warn(&h->pdev->dev, "cp %p "
1190 "has check condition: unit "
1191 "not ready, manual "
1192 "intervention required\n", cp);
1193 break;
1194 }
1195 }
1d3b3609
MG		 1196 if (sense_key == ABORTED_COMMAND) {
1197 /* Aborted command is retryable */
1198 dev_warn(&h->pdev->dev, "cp %p "
1199 "has check condition: aborted command: "
1200 "ASC: 0x%x, ASCQ: 0x%x\n",
1201 cp, asc, ascq);
1202 cmd->result = DID_SOFT_ERROR << 16;
1203 break;
1204 }
edd16368 1205 /* Must be some other type of check condition */
21b8e4ef 1206 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1207 "unknown type: "
1208 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1209 "Returning result: 0x%x, "
1210 "cmd=[%02x %02x %02x %02x %02x "
807be732 1211 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1212 "%02x %02x %02x %02x %02x]\n",
1213 cp, sense_key, asc, ascq,
1214 cmd->result,
1215 cmd->cmnd[0], cmd->cmnd[1],
1216 cmd->cmnd[2], cmd->cmnd[3],
1217 cmd->cmnd[4], cmd->cmnd[5],
1218 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1219 cmd->cmnd[8], cmd->cmnd[9],
1220 cmd->cmnd[10], cmd->cmnd[11],
1221 cmd->cmnd[12], cmd->cmnd[13],
1222 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1223 break;
1224 }
1225
1226
1227 /* Problem was not a check condition
1228 * Pass it up to the upper layers...
1229 */
1230 if (ei->ScsiStatus) {
1231 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1232 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1233 "Returning result: 0x%x\n",
1234 cp, ei->ScsiStatus,
1235 sense_key, asc, ascq,
1236 cmd->result);
1237 } else { /* scsi status is zero??? How??? */
1238 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1239 "Returning no connection.\n", cp),
1240
1241 /* Ordinarily, this case should never happen,
1242 * but there is a bug in some released firmware
1243 * revisions that allows it to happen if, for
1244 * example, a 4100 backplane loses power and
1245 * the tape drive is in it. We assume that
1246 * it's a fatal error of some kind because we
1247 * can't show that it wasn't. We will make it
1248 * look like selection timeout since that is
1249 * the most common reason for this to occur,
1250 * and it's severe enough.
1251 */
1252
1253 cmd->result = DID_NO_CONNECT << 16;
1254 }
1255 break;
1256
1257 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1258 break;
1259 case CMD_DATA_OVERRUN:
1260 dev_warn(&h->pdev->dev, "cp %p has"
1261 " completed with data overrun "
1262 "reported\n", cp);
1263 break;
1264 case CMD_INVALID: {
1265 /* print_bytes(cp, sizeof(*cp), 1, 0);
1266 print_cmd(cp); */
1267 /* We get CMD_INVALID if you address a non-existent device
1268 * instead of a selection timeout (no response). You will
1269 * see this if you yank out a drive, then try to access it.
1270 * This is kind of a shame because it means that any other
1271 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1272 * missing target. */
1273 cmd->result = DID_NO_CONNECT << 16;
1274 }
1275 break;
1276 case CMD_PROTOCOL_ERR:
1277 dev_warn(&h->pdev->dev, "cp %p has "
1278 "protocol error \n", cp);
1279 break;
1280 case CMD_HARDWARE_ERR:
1281 cmd->result = DID_ERROR << 16;
1282 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1283 break;
1284 case CMD_CONNECTION_LOST:
1285 cmd->result = DID_ERROR << 16;
1286 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1287 break;
1288 case CMD_ABORTED:
1289 cmd->result = DID_ABORT << 16;
1290 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1291 cp, ei->ScsiStatus);
1292 break;
1293 case CMD_ABORT_FAILED:
1294 cmd->result = DID_ERROR << 16;
1295 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1296 break;
1297 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1298 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1299 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1300 "abort\n", cp);
1301 break;
1302 case CMD_TIMEOUT:
1303 cmd->result = DID_TIME_OUT << 16;
1304 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1305 break;
1d5e2ed0
SC		 1306 case CMD_UNABORTABLE:
1307 cmd->result = DID_ERROR << 16;
1308 dev_warn(&h->pdev->dev, "Command unabortable\n");
1309 break;
edd16368
SC		 1310 default:
1311 cmd->result = DID_ERROR << 16;
1312 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1313 cp, ei->CommandStatus);
1314 }
1315 cmd->scsi_done(cmd);
1316 cmd_free(h, cp);
1317}
1318
edd16368
SC		 1319static void hpsa_pci_unmap(struct pci_dev *pdev,
1320 struct CommandList *c, int sg_used, int data_direction)
1321{
1322 int i;
1323 union u64bit addr64;
1324
1325 for (i = 0; i < sg_used; i++) {
1326 addr64.val32.lower = c->SG[i].Addr.lower;
1327 addr64.val32.upper = c->SG[i].Addr.upper;
1328 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1329 data_direction);
1330 }
1331}
1332
1333static void hpsa_map_one(struct pci_dev *pdev,
1334 struct CommandList *cp,
1335 unsigned char *buf,
1336 size_t buflen,
1337 int data_direction)
1338{
01a02ffc 1339 u64 addr64;
edd16368
SC		 1340
1341 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1342 cp->Header.SGList = 0;
1343 cp->Header.SGTotal = 0;
1344 return;
1345 }
1346
01a02ffc 1347 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1348 cp->SG[0].Addr.lower =
01a02ffc 1349 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1350 cp->SG[0].Addr.upper =
01a02ffc 1351 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1352 cp->SG[0].Len = buflen;
01a02ffc
SC		 1353 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1354 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC		 1355}
1356
1357static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1358 struct CommandList *c)
1359{
1360 DECLARE_COMPLETION_ONSTACK(wait);
1361
1362 c->waiting = &wait;
1363 enqueue_cmd_and_start_io(h, c);
1364 wait_for_completion(&wait);
1365}
1366
a0c12413
SC		 1367static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1368 struct CommandList *c)
1369{
1370 unsigned long flags;
1371
1372 /* If controller lockup detected, fake a hardware error. */
1373 spin_lock_irqsave(&h->lock, flags);
1374 if (unlikely(h->lockup_detected)) {
1375 spin_unlock_irqrestore(&h->lock, flags);
1376 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1377 } else {
1378 spin_unlock_irqrestore(&h->lock, flags);
1379 hpsa_scsi_do_simple_cmd_core(h, c);
1380 }
1381}
1382
edd16368
SC		 1383static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1384 struct CommandList *c, int data_direction)
1385{
1386 int retry_count = 0;
1387
1388 do {
7630abd0 1389 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1390 hpsa_scsi_do_simple_cmd_core(h, c);
1391 retry_count++;
852af20a
MB		 1392 } while ((check_for_unit_attention(h, c) ||
1393 check_for_busy(h, c)) && retry_count <= 3);
edd16368
SC		 1394 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1395}
1396
1397static void hpsa_scsi_interpret_error(struct CommandList *cp)
1398{
1399 struct ErrorInfo *ei;
1400 struct device *d = &cp->h->pdev->dev;
1401
1402 ei = cp->err_info;
1403 switch (ei->CommandStatus) {
1404 case CMD_TARGET_STATUS:
1405 dev_warn(d, "cmd %p has completed with errors\n", cp);
1406 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1407 ei->ScsiStatus);
1408 if (ei->ScsiStatus == 0)
1409 dev_warn(d, "SCSI status is abnormally zero. "
1410 "(probably indicates selection timeout "
1411 "reported incorrectly due to a known "
1412 "firmware bug, circa July, 2001.)\n");
1413 break;
1414 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1415 dev_info(d, "UNDERRUN\n");
1416 break;
1417 case CMD_DATA_OVERRUN:
1418 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1419 break;
1420 case CMD_INVALID: {
1421 /* controller unfortunately reports SCSI passthru's
1422 * to non-existent targets as invalid commands.
1423 */
1424 dev_warn(d, "cp %p is reported invalid (probably means "
1425 "target device no longer present)\n", cp);
1426 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1427 print_cmd(cp); */
1428 }
1429 break;
1430 case CMD_PROTOCOL_ERR:
1431 dev_warn(d, "cp %p has protocol error \n", cp);
1432 break;
1433 case CMD_HARDWARE_ERR:
1434 /* cmd->result = DID_ERROR << 16; */
1435 dev_warn(d, "cp %p had hardware error\n", cp);
1436 break;
1437 case CMD_CONNECTION_LOST:
1438 dev_warn(d, "cp %p had connection lost\n", cp);
1439 break;
1440 case CMD_ABORTED:
1441 dev_warn(d, "cp %p was aborted\n", cp);
1442 break;
1443 case CMD_ABORT_FAILED:
1444 dev_warn(d, "cp %p reports abort failed\n", cp);
1445 break;
1446 case CMD_UNSOLICITED_ABORT:
1447 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1448 break;
1449 case CMD_TIMEOUT:
1450 dev_warn(d, "cp %p timed out\n", cp);
1451 break;
1d5e2ed0
SC		 1452 case CMD_UNABORTABLE:
1453 dev_warn(d, "Command unabortable\n");
1454 break;
edd16368
SC		 1455 default:
1456 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1457 ei->CommandStatus);
1458 }
1459}
1460
1461static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1462 unsigned char page, unsigned char *buf,
1463 unsigned char bufsize)
1464{
1465 int rc = IO_OK;
1466 struct CommandList *c;
1467 struct ErrorInfo *ei;
1468
1469 c = cmd_special_alloc(h);
1470
1471 if (c == NULL) { /* trouble... */
1472 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1473 return -ENOMEM;
edd16368
SC		 1474 }
1475
1476 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1477 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1478 ei = c->err_info;
1479 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1480 hpsa_scsi_interpret_error(c);
1481 rc = -1;
1482 }
1483 cmd_special_free(h, c);
1484 return rc;
1485}
1486
1487static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1488{
1489 int rc = IO_OK;
1490 struct CommandList *c;
1491 struct ErrorInfo *ei;
1492
1493 c = cmd_special_alloc(h);
1494
1495 if (c == NULL) { /* trouble... */
1496 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1497 return -ENOMEM;
edd16368
SC		 1498 }
1499
1500 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1501 hpsa_scsi_do_simple_cmd_core(h, c);
1502 /* no unmap needed here because no data xfer. */
1503
1504 ei = c->err_info;
1505 if (ei->CommandStatus != 0) {
1506 hpsa_scsi_interpret_error(c);
1507 rc = -1;
1508 }
1509 cmd_special_free(h, c);
1510 return rc;
1511}
1512
1513static void hpsa_get_raid_level(struct ctlr_info *h,
1514 unsigned char *scsi3addr, unsigned char *raid_level)
1515{
1516 int rc;
1517 unsigned char *buf;
1518
1519 *raid_level = RAID_UNKNOWN;
1520 buf = kzalloc(64, GFP_KERNEL);
1521 if (!buf)
1522 return;
1523 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1524 if (rc == 0)
1525 *raid_level = buf[8];
1526 if (*raid_level > RAID_UNKNOWN)
1527 *raid_level = RAID_UNKNOWN;
1528 kfree(buf);
1529 return;
1530}
1531
1532/* Get the device id from inquiry page 0x83 */
1533static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1534 unsigned char *device_id, int buflen)
1535{
1536 int rc;
1537 unsigned char *buf;
1538
1539 if (buflen > 16)
1540 buflen = 16;
1541 buf = kzalloc(64, GFP_KERNEL);
1542 if (!buf)
1543 return -1;
1544 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1545 if (rc == 0)
1546 memcpy(device_id, &buf[8], buflen);
1547 kfree(buf);
1548 return rc != 0;
1549}
1550
1551static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1552 struct ReportLUNdata *buf, int bufsize,
1553 int extended_response)
1554{
1555 int rc = IO_OK;
1556 struct CommandList *c;
1557 unsigned char scsi3addr[8];
1558 struct ErrorInfo *ei;
1559
1560 c = cmd_special_alloc(h);
1561 if (c == NULL) { /* trouble... */
1562 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1563 return -1;
1564 }
e89c0ae7
SC		 1565 /* address the controller */
1566 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC		 1567 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1568 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1569 if (extended_response)
1570 c->Request.CDB[1] = extended_response;
1571 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1572 ei = c->err_info;
1573 if (ei->CommandStatus != 0 &&
1574 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1575 hpsa_scsi_interpret_error(c);
1576 rc = -1;
1577 }
1578 cmd_special_free(h, c);
1579 return rc;
1580}
1581
1582static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1583 struct ReportLUNdata *buf,
1584 int bufsize, int extended_response)
1585{
1586 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1587}
1588
1589static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1590 struct ReportLUNdata *buf, int bufsize)
1591{
1592 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1593}
1594
1595static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1596 int bus, int target, int lun)
1597{
1598 device->bus = bus;
1599 device->target = target;
1600 device->lun = lun;
1601}
1602
1603static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1604 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1605 unsigned char *is_OBDR_device)
edd16368 1606{
0b0e1d6c
SC		 1607
1608#define OBDR_SIG_OFFSET 43
1609#define OBDR_TAPE_SIG "$DR-10"
1610#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1611#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1612
ea6d3bc3 1613 unsigned char *inq_buff;
0b0e1d6c 1614 unsigned char *obdr_sig;
edd16368 1615
ea6d3bc3 1616 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1617 if (!inq_buff)
1618 goto bail_out;
1619
edd16368
SC		 1620 /* Do an inquiry to the device to see what it is. */
1621 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1622 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1623 /* Inquiry failed (msg printed already) */
1624 dev_err(&h->pdev->dev,
1625 "hpsa_update_device_info: inquiry failed\n");
1626 goto bail_out;
1627 }
1628
edd16368
SC		 1629 this_device->devtype = (inq_buff[0] & 0x1f);
1630 memcpy(this_device->scsi3addr, scsi3addr, 8);
1631 memcpy(this_device->vendor, &inq_buff[8],
1632 sizeof(this_device->vendor));
1633 memcpy(this_device->model, &inq_buff[16],
1634 sizeof(this_device->model));
edd16368
SC		 1635 memset(this_device->device_id, 0,
1636 sizeof(this_device->device_id));
1637 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1638 sizeof(this_device->device_id));
1639
1640 if (this_device->devtype == TYPE_DISK &&
1641 is_logical_dev_addr_mode(scsi3addr))
1642 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1643 else
1644 this_device->raid_level = RAID_UNKNOWN;
1645
0b0e1d6c
SC		 1646 if (is_OBDR_device) {
1647 /* See if this is a One-Button-Disaster-Recovery device
1648 * by looking for "$DR-10" at offset 43 in inquiry data.
1649 */
1650 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1651 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1652 strncmp(obdr_sig, OBDR_TAPE_SIG,
1653 OBDR_SIG_LEN) == 0);
1654 }
1655
edd16368
SC		 1656 kfree(inq_buff);
1657 return 0;
1658
1659bail_out:
1660 kfree(inq_buff);
1661 return 1;
1662}
1663
4f4eb9f1 1664static unsigned char *ext_target_model[] = {
edd16368
SC		 1665 "MSA2012",
1666 "MSA2024",
1667 "MSA2312",
1668 "MSA2324",
fda38518 1669 "P2000 G3 SAS",
edd16368
SC		 1670 NULL,
1671};
1672
4f4eb9f1 1673static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1674{
1675 int i;
1676
4f4eb9f1
ST		 1677 for (i = 0; ext_target_model[i]; i++)
1678 if (strncmp(device->model, ext_target_model[i],
1679 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1680 return 1;
1681 return 0;
1682}
1683
1684/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1685 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1686 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1687 * Logical drive target and lun are assigned at this time, but
1688 * physical device lun and target assignment are deferred (assigned
1689 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1690 */
1691static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1692 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1693{
1f310bde
SC		 1694 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1695
1696 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1697 /* physical device, target and lun filled in later */
edd16368 1698 if (is_hba_lunid(lunaddrbytes))
1f310bde 1699 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1700 else
1f310bde
SC		 1701 /* defer target, lun assignment for physical devices */
1702 hpsa_set_bus_target_lun(device, 2, -1, -1);
1703 return;
1704 }
1705 /* It's a logical device */
4f4eb9f1
ST		 1706 if (is_ext_target(h, device)) {
1707 /* external target way, put logicals on bus 1
1f310bde
SC		 1708 * and match target/lun numbers box
1709 * reports, other smart array, bus 0, target 0, match lunid
1710 */
1711 hpsa_set_bus_target_lun(device,
1712 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1713 return;
edd16368 1714 }
1f310bde 1715 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1716}
1717
1718/*
1719 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1720 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1721 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1722 * it for some reason. *tmpdevice is the target we're adding,
1723 * this_device is a pointer into the current element of currentsd[]
1724 * that we're building up in update_scsi_devices(), below.
1725 * lunzerobits is a bitmap that tracks which targets already have a
1726 * lun 0 assigned.
1727 * Returns 1 if an enclosure was added, 0 if not.
1728 */
4f4eb9f1 1729static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1730 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1731 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1732 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1733{
1734 unsigned char scsi3addr[8];
1735
1f310bde 1736 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1737 return 0; /* There is already a lun 0 on this target. */
1738
1739 if (!is_logical_dev_addr_mode(lunaddrbytes))
1740 return 0; /* It's the logical targets that may lack lun 0. */
1741
4f4eb9f1
ST		 1742 if (!is_ext_target(h, tmpdevice))
1743 return 0; /* Only external target devices have this problem. */
edd16368 1744
1f310bde 1745 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1746 return 0;
1747
c4f8a299 1748 memset(scsi3addr, 0, 8);
1f310bde 1749 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1750 if (is_hba_lunid(scsi3addr))
1751 return 0; /* Don't add the RAID controller here. */
1752
339b2b14
SC		 1753 if (is_scsi_rev_5(h))
1754 return 0; /* p1210m doesn't need to do this. */
1755
4f4eb9f1 1756 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1757 dev_warn(&h->pdev->dev, "Maximum number of external "
1758 "target devices exceeded. Check your hardware "
edd16368
SC		 1759 "configuration.");
1760 return 0;
1761 }
1762
0b0e1d6c 1763 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1764 return 0;
4f4eb9f1 1765 (*n_ext_target_devs)++;
1f310bde
SC		 1766 hpsa_set_bus_target_lun(this_device,
1767 tmpdevice->bus, tmpdevice->target, 0);
1768 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1769 return 1;
1770}
1771
1772/*
1773 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1774 * logdev. The number of luns in physdev and logdev are returned in
1775 * *nphysicals and *nlogicals, respectively.
1776 * Returns 0 on success, -1 otherwise.
1777 */
1778static int hpsa_gather_lun_info(struct ctlr_info *h,
1779 int reportlunsize,
01a02ffc
SC		 1780 struct ReportLUNdata *physdev, u32 *nphysicals,
1781 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1782{
1783 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1784 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1785 return -1;
1786 }
6df1e954 1787 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1788 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1789 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1790 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1791 *nphysicals - HPSA_MAX_PHYS_LUN);
1792 *nphysicals = HPSA_MAX_PHYS_LUN;
1793 }
1794 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1795 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1796 return -1;
1797 }
6df1e954 1798 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1799 /* Reject Logicals in excess of our max capability. */
1800 if (*nlogicals > HPSA_MAX_LUN) {
1801 dev_warn(&h->pdev->dev,
1802 "maximum logical LUNs (%d) exceeded. "
1803 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1804 *nlogicals - HPSA_MAX_LUN);
1805 *nlogicals = HPSA_MAX_LUN;
1806 }
1807 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1808 dev_warn(&h->pdev->dev,
1809 "maximum logical + physical LUNs (%d) exceeded. "
1810 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1811 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1812 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1813 }
1814 return 0;
1815}
1816
339b2b14
SC		 1817u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1818 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1819 struct ReportLUNdata *logdev_list)
1820{
1821 /* Helper function, figure out where the LUN ID info is coming from
1822 * given index i, lists of physical and logical devices, where in
1823 * the list the raid controller is supposed to appear (first or last)
1824 */
1825
1826 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1827 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1828
1829 if (i == raid_ctlr_position)
1830 return RAID_CTLR_LUNID;
1831
1832 if (i < logicals_start)
1833 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1834
1835 if (i < last_device)
1836 return &logdev_list->LUN[i - nphysicals -
1837 (raid_ctlr_position == 0)][0];
1838 BUG();
1839 return NULL;
1840}
1841
edd16368
SC		 1842static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1843{
1844 /* the idea here is we could get notified
1845 * that some devices have changed, so we do a report
1846 * physical luns and report logical luns cmd, and adjust
1847 * our list of devices accordingly.
1848 *
1849 * The scsi3addr's of devices won't change so long as the
1850 * adapter is not reset. That means we can rescan and
1851 * tell which devices we already know about, vs. new
1852 * devices, vs. disappearing devices.
1853 */
1854 struct ReportLUNdata *physdev_list = NULL;
1855 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1856 u32 nphysicals = 0;
1857 u32 nlogicals = 0;
1858 u32 ndev_allocated = 0;
edd16368
SC		 1859 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1860 int ncurrent = 0;
1861 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1862 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1863 int raid_ctlr_position;
aca4a520 1864 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1865
cfe5badc 1866 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1867 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1868 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1869 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1870
0b0e1d6c 1871 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1872 dev_err(&h->pdev->dev, "out of memory\n");
1873 goto out;
1874 }
1875 memset(lunzerobits, 0, sizeof(lunzerobits));
1876
1877 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1878 logdev_list, &nlogicals))
1879 goto out;
1880
aca4a520
ST		 1881 /* We might see up to the maximum number of logical and physical disks
1882 * plus external target devices, and a device for the local RAID
1883 * controller.
edd16368 1884 */
aca4a520 1885 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 1886
1887 /* Allocate the per device structures */
1888 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 1889 if (i >= HPSA_MAX_DEVICES) {
1890 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1891 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1892 ndevs_to_allocate - HPSA_MAX_DEVICES);
1893 break;
1894 }
1895
edd16368
SC		 1896 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1897 if (!currentsd[i]) {
1898 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1899 __FILE__, __LINE__);
1900 goto out;
1901 }
1902 ndev_allocated++;
1903 }
1904
339b2b14
SC		 1905 if (unlikely(is_scsi_rev_5(h)))
1906 raid_ctlr_position = 0;
1907 else
1908 raid_ctlr_position = nphysicals + nlogicals;
1909
edd16368 1910 /* adjust our table of devices */
4f4eb9f1 1911 n_ext_target_devs = 0;
edd16368 1912 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 1913 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 1914
1915 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 1916 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1917 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1918 /* skip masked physical devices. */
339b2b14
SC		 1919 if (lunaddrbytes[3] & 0xC0 &&
1920 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 1921 continue;
1922
1923 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 1924 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1925 &is_OBDR))
edd16368 1926 continue; /* skip it if we can't talk to it. */
1f310bde 1927 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 1928 this_device = currentsd[ncurrent];
1929
1930 /*
4f4eb9f1 1931 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 1932 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1933 * is nonetheless an enclosure device there. We have to
1934 * present that otherwise linux won't find anything if
1935 * there is no lun 0.
1936 */
4f4eb9f1 1937 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 1938 lunaddrbytes, lunzerobits,
4f4eb9f1 1939 &n_ext_target_devs)) {
edd16368
SC		 1940 ncurrent++;
1941 this_device = currentsd[ncurrent];
1942 }
1943
1944 *this_device = *tmpdevice;
edd16368
SC		 1945
1946 switch (this_device->devtype) {
0b0e1d6c 1947 case TYPE_ROM:
edd16368
SC		 1948 /* We don't *really* support actual CD-ROM devices,
1949 * just "One Button Disaster Recovery" tape drive
1950 * which temporarily pretends to be a CD-ROM drive.
1951 * So we check that the device is really an OBDR tape
1952 * device by checking for "$DR-10" in bytes 43-48 of
1953 * the inquiry data.
1954 */
0b0e1d6c
SC		 1955 if (is_OBDR)
1956 ncurrent++;
edd16368
SC		 1957 break;
1958 case TYPE_DISK:
1959 if (i < nphysicals)
1960 break;
1961 ncurrent++;
1962 break;
1963 case TYPE_TAPE:
1964 case TYPE_MEDIUM_CHANGER:
1965 ncurrent++;
1966 break;
1967 case TYPE_RAID:
1968 /* Only present the Smartarray HBA as a RAID controller.
1969 * If it's a RAID controller other than the HBA itself
1970 * (an external RAID controller, MSA500 or similar)
1971 * don't present it.
1972 */
1973 if (!is_hba_lunid(lunaddrbytes))
1974 break;
1975 ncurrent++;
1976 break;
1977 default:
1978 break;
1979 }
cfe5badc 1980 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 1981 break;
1982 }
1983 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1984out:
1985 kfree(tmpdevice);
1986 for (i = 0; i < ndev_allocated; i++)
1987 kfree(currentsd[i]);
1988 kfree(currentsd);
edd16368
SC		 1989 kfree(physdev_list);
1990 kfree(logdev_list);
edd16368
SC		 1991}
1992
1993/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1994 * dma mapping and fills in the scatter gather entries of the
1995 * hpsa command, cp.
1996 */
33a2ffce 1997static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 1998 struct CommandList *cp,
1999 struct scsi_cmnd *cmd)
2000{
2001 unsigned int len;
2002 struct scatterlist *sg;
01a02ffc 2003 u64 addr64;
33a2ffce
SC		 2004 int use_sg, i, sg_index, chained;
2005 struct SGDescriptor *curr_sg;
edd16368 2006
33a2ffce 2007 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2008
2009 use_sg = scsi_dma_map(cmd);
2010 if (use_sg < 0)
2011 return use_sg;
2012
2013 if (!use_sg)
2014 goto sglist_finished;
2015
33a2ffce
SC		 2016 curr_sg = cp->SG;
2017 chained = 0;
2018 sg_index = 0;
edd16368 2019 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2020 if (i == h->max_cmd_sg_entries - 1 &&
2021 use_sg > h->max_cmd_sg_entries) {
2022 chained = 1;
2023 curr_sg = h->cmd_sg_list[cp->cmdindex];
2024 sg_index = 0;
2025 }
01a02ffc 2026 addr64 = (u64) sg_dma_address(sg);
edd16368 2027 len = sg_dma_len(sg);
33a2ffce
SC		 2028 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2029 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2030 curr_sg->Len = len;
2031 curr_sg->Ext = 0; /* we are not chaining */
2032 curr_sg++;
2033 }
2034
2035 if (use_sg + chained > h->maxSG)
2036 h->maxSG = use_sg + chained;
2037
2038 if (chained) {
2039 cp->Header.SGList = h->max_cmd_sg_entries;
2040 cp->Header.SGTotal = (u16) (use_sg + 1);
2041 hpsa_map_sg_chain_block(h, cp);
2042 return 0;
edd16368
SC		 2043 }
2044
2045sglist_finished:
2046
01a02ffc
SC		 2047 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2048 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2049 return 0;
2050}
2051
2052
f281233d 2053static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2054 void (*done)(struct scsi_cmnd *))
2055{
2056 struct ctlr_info *h;
2057 struct hpsa_scsi_dev_t *dev;
2058 unsigned char scsi3addr[8];
2059 struct CommandList *c;
2060 unsigned long flags;
2061
2062 /* Get the ptr to our adapter structure out of cmd->host. */
2063 h = sdev_to_hba(cmd->device);
2064 dev = cmd->device->hostdata;
2065 if (!dev) {
2066 cmd->result = DID_NO_CONNECT << 16;
2067 done(cmd);
2068 return 0;
2069 }
2070 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2071
edd16368 2072 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2073 if (unlikely(h->lockup_detected)) {
2074 spin_unlock_irqrestore(&h->lock, flags);
2075 cmd->result = DID_ERROR << 16;
2076 done(cmd);
2077 return 0;
2078 }
2079 /* Need a lock as this is being allocated from the pool */
edd16368
SC		 2080 c = cmd_alloc(h);
2081 spin_unlock_irqrestore(&h->lock, flags);
2082 if (c == NULL) { /* trouble... */
2083 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2084 return SCSI_MLQUEUE_HOST_BUSY;
2085 }
2086
2087 /* Fill in the command list header */
2088
2089 cmd->scsi_done = done; /* save this for use by completion code */
2090
2091 /* save c in case we have to abort it */
2092 cmd->host_scribble = (unsigned char *) c;
2093
2094 c->cmd_type = CMD_SCSI;
2095 c->scsi_cmd = cmd;
2096 c->Header.ReplyQueue = 0; /* unused in simple mode */
2097 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2098 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2099 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2100
2101 /* Fill in the request block... */
2102
2103 c->Request.Timeout = 0;
2104 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2105 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2106 c->Request.CDBLen = cmd->cmd_len;
2107 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2108 c->Request.Type.Type = TYPE_CMD;
2109 c->Request.Type.Attribute = ATTR_SIMPLE;
2110 switch (cmd->sc_data_direction) {
2111 case DMA_TO_DEVICE:
2112 c->Request.Type.Direction = XFER_WRITE;
2113 break;
2114 case DMA_FROM_DEVICE:
2115 c->Request.Type.Direction = XFER_READ;
2116 break;
2117 case DMA_NONE:
2118 c->Request.Type.Direction = XFER_NONE;
2119 break;
2120 case DMA_BIDIRECTIONAL:
2121 /* This can happen if a buggy application does a scsi passthru
2122 * and sets both inlen and outlen to non-zero. ( see
2123 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2124 */
2125
2126 c->Request.Type.Direction = XFER_RSVD;
2127 /* This is technically wrong, and hpsa controllers should
2128 * reject it with CMD_INVALID, which is the most correct
2129 * response, but non-fibre backends appear to let it
2130 * slide by, and give the same results as if this field
2131 * were set correctly. Either way is acceptable for
2132 * our purposes here.
2133 */
2134
2135 break;
2136
2137 default:
2138 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2139 cmd->sc_data_direction);
2140 BUG();
2141 break;
2142 }
2143
33a2ffce 2144 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2145 cmd_free(h, c);
2146 return SCSI_MLQUEUE_HOST_BUSY;
2147 }
2148 enqueue_cmd_and_start_io(h, c);
2149 /* the cmd'll come back via intr handler in complete_scsi_command() */
2150 return 0;
2151}
2152
f281233d
JG		 2153static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2154
a08a8471
SC		 2155static void hpsa_scan_start(struct Scsi_Host *sh)
2156{
2157 struct ctlr_info *h = shost_to_hba(sh);
2158 unsigned long flags;
2159
2160 /* wait until any scan already in progress is finished. */
2161 while (1) {
2162 spin_lock_irqsave(&h->scan_lock, flags);
2163 if (h->scan_finished)
2164 break;
2165 spin_unlock_irqrestore(&h->scan_lock, flags);
2166 wait_event(h->scan_wait_queue, h->scan_finished);
2167 /* Note: We don't need to worry about a race between this
2168 * thread and driver unload because the midlayer will
2169 * have incremented the reference count, so unload won't
2170 * happen if we're in here.
2171 */
2172 }
2173 h->scan_finished = 0; /* mark scan as in progress */
2174 spin_unlock_irqrestore(&h->scan_lock, flags);
2175
2176 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2177
2178 spin_lock_irqsave(&h->scan_lock, flags);
2179 h->scan_finished = 1; /* mark scan as finished. */
2180 wake_up_all(&h->scan_wait_queue);
2181 spin_unlock_irqrestore(&h->scan_lock, flags);
2182}
2183
2184static int hpsa_scan_finished(struct Scsi_Host *sh,
2185 unsigned long elapsed_time)
2186{
2187 struct ctlr_info *h = shost_to_hba(sh);
2188 unsigned long flags;
2189 int finished;
2190
2191 spin_lock_irqsave(&h->scan_lock, flags);
2192 finished = h->scan_finished;
2193 spin_unlock_irqrestore(&h->scan_lock, flags);
2194 return finished;
2195}
2196
667e23d4
SC		 2197static int hpsa_change_queue_depth(struct scsi_device *sdev,
2198 int qdepth, int reason)
2199{
2200 struct ctlr_info *h = sdev_to_hba(sdev);
2201
2202 if (reason != SCSI_QDEPTH_DEFAULT)
2203 return -ENOTSUPP;
2204
2205 if (qdepth < 1)
2206 qdepth = 1;
2207 else
2208 if (qdepth > h->nr_cmds)
2209 qdepth = h->nr_cmds;
2210 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2211 return sdev->queue_depth;
2212}
2213
edd16368
SC		 2214static void hpsa_unregister_scsi(struct ctlr_info *h)
2215{
2216 /* we are being forcibly unloaded, and may not refuse. */
2217 scsi_remove_host(h->scsi_host);
2218 scsi_host_put(h->scsi_host);
2219 h->scsi_host = NULL;
2220}
2221
2222static int hpsa_register_scsi(struct ctlr_info *h)
2223{
b705690d
SC		 2224 struct Scsi_Host *sh;
2225 int error;
edd16368 2226
b705690d
SC		 2227 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2228 if (sh == NULL)
2229 goto fail;
2230
2231 sh->io_port = 0;
2232 sh->n_io_port = 0;
2233 sh->this_id = -1;
2234 sh->max_channel = 3;
2235 sh->max_cmd_len = MAX_COMMAND_SIZE;
2236 sh->max_lun = HPSA_MAX_LUN;
2237 sh->max_id = HPSA_MAX_LUN;
2238 sh->can_queue = h->nr_cmds;
2239 sh->cmd_per_lun = h->nr_cmds;
2240 sh->sg_tablesize = h->maxsgentries;
2241 h->scsi_host = sh;
2242 sh->hostdata[0] = (unsigned long) h;
2243 sh->irq = h->intr[h->intr_mode];
2244 sh->unique_id = sh->irq;
2245 error = scsi_add_host(sh, &h->pdev->dev);
2246 if (error)
2247 goto fail_host_put;
2248 scsi_scan_host(sh);
2249 return 0;
2250
2251 fail_host_put:
2252 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2253 " failed for controller %d\n", __func__, h->ctlr);
2254 scsi_host_put(sh);
2255 return error;
2256 fail:
2257 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2258 " failed for controller %d\n", __func__, h->ctlr);
2259 return -ENOMEM;
edd16368
SC		 2260}
2261
2262static int wait_for_device_to_become_ready(struct ctlr_info *h,
2263 unsigned char lunaddr[])
2264{
2265 int rc = 0;
2266 int count = 0;
2267 int waittime = 1; /* seconds */
2268 struct CommandList *c;
2269
2270 c = cmd_special_alloc(h);
2271 if (!c) {
2272 dev_warn(&h->pdev->dev, "out of memory in "
2273 "wait_for_device_to_become_ready.\n");
2274 return IO_ERROR;
2275 }
2276
2277 /* Send test unit ready until device ready, or give up. */
2278 while (count < HPSA_TUR_RETRY_LIMIT) {
2279
2280 /* Wait for a bit. do this first, because if we send
2281 * the TUR right away, the reset will just abort it.
2282 */
2283 msleep(1000 * waittime);
2284 count++;
2285
2286 /* Increase wait time with each try, up to a point. */
2287 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2288 waittime = waittime * 2;
2289
2290 /* Send the Test Unit Ready */
2291 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2292 hpsa_scsi_do_simple_cmd_core(h, c);
2293 /* no unmap needed here because no data xfer. */
2294
2295 if (c->err_info->CommandStatus == CMD_SUCCESS)
2296 break;
2297
2298 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2299 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2300 (c->err_info->SenseInfo[2] == NO_SENSE ||
2301 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2302 break;
2303
2304 dev_warn(&h->pdev->dev, "waiting %d secs "
2305 "for device to become ready.\n", waittime);
2306 rc = 1; /* device not ready. */
2307 }
2308
2309 if (rc)
2310 dev_warn(&h->pdev->dev, "giving up on device.\n");
2311 else
2312 dev_warn(&h->pdev->dev, "device is ready.\n");
2313
2314 cmd_special_free(h, c);
2315 return rc;
2316}
2317
2318/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2319 * complaining. Doing a host- or bus-reset can't do anything good here.
2320 */
2321static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2322{
2323 int rc;
2324 struct ctlr_info *h;
2325 struct hpsa_scsi_dev_t *dev;
2326
2327 /* find the controller to which the command to be aborted was sent */
2328 h = sdev_to_hba(scsicmd->device);
2329 if (h == NULL) /* paranoia */
2330 return FAILED;
edd16368
SC		 2331 dev = scsicmd->device->hostdata;
2332 if (!dev) {
2333 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2334 "device lookup failed.\n");
2335 return FAILED;
2336 }
d416b0c7
SC		 2337 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2338 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2339 /* send a reset to the SCSI LUN which the command was sent to */
2340 rc = hpsa_send_reset(h, dev->scsi3addr);
2341 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2342 return SUCCESS;
2343
2344 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2345 return FAILED;
2346}
2347
2348/*
2349 * For operations that cannot sleep, a command block is allocated at init,
2350 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2351 * which ones are free or in use. Lock must be held when calling this.
2352 * cmd_free() is the complement.
2353 */
2354static struct CommandList *cmd_alloc(struct ctlr_info *h)
2355{
2356 struct CommandList *c;
2357 int i;
2358 union u64bit temp64;
2359 dma_addr_t cmd_dma_handle, err_dma_handle;
2360
2361 do {
2362 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2363 if (i == h->nr_cmds)
2364 return NULL;
2365 } while (test_and_set_bit
2366 (i & (BITS_PER_LONG - 1),
2367 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2368 c = h->cmd_pool + i;
2369 memset(c, 0, sizeof(*c));
2370 cmd_dma_handle = h->cmd_pool_dhandle
2371 + i * sizeof(*c);
2372 c->err_info = h->errinfo_pool + i;
2373 memset(c->err_info, 0, sizeof(*c->err_info));
2374 err_dma_handle = h->errinfo_pool_dhandle
2375 + i * sizeof(*c->err_info);
2376 h->nr_allocs++;
2377
2378 c->cmdindex = i;
2379
9e0fc764 2380 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2381 c->busaddr = (u32) cmd_dma_handle;
2382 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2383 c->ErrDesc.Addr.lower = temp64.val32.lower;
2384 c->ErrDesc.Addr.upper = temp64.val32.upper;
2385 c->ErrDesc.Len = sizeof(*c->err_info);
2386
2387 c->h = h;
2388 return c;
2389}
2390
2391/* For operations that can wait for kmalloc to possibly sleep,
2392 * this routine can be called. Lock need not be held to call
2393 * cmd_special_alloc. cmd_special_free() is the complement.
2394 */
2395static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2396{
2397 struct CommandList *c;
2398 union u64bit temp64;
2399 dma_addr_t cmd_dma_handle, err_dma_handle;
2400
2401 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2402 if (c == NULL)
2403 return NULL;
2404 memset(c, 0, sizeof(*c));
2405
2406 c->cmdindex = -1;
2407
2408 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2409 &err_dma_handle);
2410
2411 if (c->err_info == NULL) {
2412 pci_free_consistent(h->pdev,
2413 sizeof(*c), c, cmd_dma_handle);
2414 return NULL;
2415 }
2416 memset(c->err_info, 0, sizeof(*c->err_info));
2417
9e0fc764 2418 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2419 c->busaddr = (u32) cmd_dma_handle;
2420 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2421 c->ErrDesc.Addr.lower = temp64.val32.lower;
2422 c->ErrDesc.Addr.upper = temp64.val32.upper;
2423 c->ErrDesc.Len = sizeof(*c->err_info);
2424
2425 c->h = h;
2426 return c;
2427}
2428
2429static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2430{
2431 int i;
2432
2433 i = c - h->cmd_pool;
2434 clear_bit(i & (BITS_PER_LONG - 1),
2435 h->cmd_pool_bits + (i / BITS_PER_LONG));
2436 h->nr_frees++;
2437}
2438
2439static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2440{
2441 union u64bit temp64;
2442
2443 temp64.val32.lower = c->ErrDesc.Addr.lower;
2444 temp64.val32.upper = c->ErrDesc.Addr.upper;
2445 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2446 c->err_info, (dma_addr_t) temp64.val);
2447 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2448 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2449}
2450
2451#ifdef CONFIG_COMPAT
2452
edd16368
SC		 2453static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2454{
2455 IOCTL32_Command_struct __user *arg32 =
2456 (IOCTL32_Command_struct __user *) arg;
2457 IOCTL_Command_struct arg64;
2458 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2459 int err;
2460 u32 cp;
2461
938abd84 2462 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2463 err = 0;
2464 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2465 sizeof(arg64.LUN_info));
2466 err |= copy_from_user(&arg64.Request, &arg32->Request,
2467 sizeof(arg64.Request));
2468 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2469 sizeof(arg64.error_info));
2470 err |= get_user(arg64.buf_size, &arg32->buf_size);
2471 err |= get_user(cp, &arg32->buf);
2472 arg64.buf = compat_ptr(cp);
2473 err |= copy_to_user(p, &arg64, sizeof(arg64));
2474
2475 if (err)
2476 return -EFAULT;
2477
e39eeaed 2478 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2479 if (err)
2480 return err;
2481 err |= copy_in_user(&arg32->error_info, &p->error_info,
2482 sizeof(arg32->error_info));
2483 if (err)
2484 return -EFAULT;
2485 return err;
2486}
2487
2488static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2489 int cmd, void *arg)
2490{
2491 BIG_IOCTL32_Command_struct __user *arg32 =
2492 (BIG_IOCTL32_Command_struct __user *) arg;
2493 BIG_IOCTL_Command_struct arg64;
2494 BIG_IOCTL_Command_struct __user *p =
2495 compat_alloc_user_space(sizeof(arg64));
2496 int err;
2497 u32 cp;
2498
938abd84 2499 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2500 err = 0;
2501 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2502 sizeof(arg64.LUN_info));
2503 err |= copy_from_user(&arg64.Request, &arg32->Request,
2504 sizeof(arg64.Request));
2505 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2506 sizeof(arg64.error_info));
2507 err |= get_user(arg64.buf_size, &arg32->buf_size);
2508 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2509 err |= get_user(cp, &arg32->buf);
2510 arg64.buf = compat_ptr(cp);
2511 err |= copy_to_user(p, &arg64, sizeof(arg64));
2512
2513 if (err)
2514 return -EFAULT;
2515
e39eeaed 2516 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2517 if (err)
2518 return err;
2519 err |= copy_in_user(&arg32->error_info, &p->error_info,
2520 sizeof(arg32->error_info));
2521 if (err)
2522 return -EFAULT;
2523 return err;
2524}
71fe75a7
SC		 2525
2526static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2527{
2528 switch (cmd) {
2529 case CCISS_GETPCIINFO:
2530 case CCISS_GETINTINFO:
2531 case CCISS_SETINTINFO:
2532 case CCISS_GETNODENAME:
2533 case CCISS_SETNODENAME:
2534 case CCISS_GETHEARTBEAT:
2535 case CCISS_GETBUSTYPES:
2536 case CCISS_GETFIRMVER:
2537 case CCISS_GETDRIVVER:
2538 case CCISS_REVALIDVOLS:
2539 case CCISS_DEREGDISK:
2540 case CCISS_REGNEWDISK:
2541 case CCISS_REGNEWD:
2542 case CCISS_RESCANDISK:
2543 case CCISS_GETLUNINFO:
2544 return hpsa_ioctl(dev, cmd, arg);
2545
2546 case CCISS_PASSTHRU32:
2547 return hpsa_ioctl32_passthru(dev, cmd, arg);
2548 case CCISS_BIG_PASSTHRU32:
2549 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2550
2551 default:
2552 return -ENOIOCTLCMD;
2553 }
2554}
edd16368
SC		 2555#endif
2556
2557static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2558{
2559 struct hpsa_pci_info pciinfo;
2560
2561 if (!argp)
2562 return -EINVAL;
2563 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2564 pciinfo.bus = h->pdev->bus->number;
2565 pciinfo.dev_fn = h->pdev->devfn;
2566 pciinfo.board_id = h->board_id;
2567 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2568 return -EFAULT;
2569 return 0;
2570}
2571
2572static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2573{
2574 DriverVer_type DriverVer;
2575 unsigned char vmaj, vmin, vsubmin;
2576 int rc;
2577
2578 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2579 &vmaj, &vmin, &vsubmin);
2580 if (rc != 3) {
2581 dev_info(&h->pdev->dev, "driver version string '%s' "
2582 "unrecognized.", HPSA_DRIVER_VERSION);
2583 vmaj = 0;
2584 vmin = 0;
2585 vsubmin = 0;
2586 }
2587 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2588 if (!argp)
2589 return -EINVAL;
2590 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2591 return -EFAULT;
2592 return 0;
2593}
2594
2595static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2596{
2597 IOCTL_Command_struct iocommand;
2598 struct CommandList *c;
2599 char *buff = NULL;
2600 union u64bit temp64;
2601
2602 if (!argp)
2603 return -EINVAL;
2604 if (!capable(CAP_SYS_RAWIO))
2605 return -EPERM;
2606 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2607 return -EFAULT;
2608 if ((iocommand.buf_size < 1) &&
2609 (iocommand.Request.Type.Direction != XFER_NONE)) {
2610 return -EINVAL;
2611 }
2612 if (iocommand.buf_size > 0) {
2613 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2614 if (buff == NULL)
2615 return -EFAULT;
b03a7771
SC		 2616 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2617 /* Copy the data into the buffer we created */
2618 if (copy_from_user(buff, iocommand.buf,
2619 iocommand.buf_size)) {
2620 kfree(buff);
2621 return -EFAULT;
2622 }
2623 } else {
2624 memset(buff, 0, iocommand.buf_size);
edd16368 2625 }
b03a7771 2626 }
edd16368
SC		 2627 c = cmd_special_alloc(h);
2628 if (c == NULL) {
2629 kfree(buff);
2630 return -ENOMEM;
2631 }
2632 /* Fill in the command type */
2633 c->cmd_type = CMD_IOCTL_PEND;
2634 /* Fill in Command Header */
2635 c->Header.ReplyQueue = 0; /* unused in simple mode */
2636 if (iocommand.buf_size > 0) { /* buffer to fill */
2637 c->Header.SGList = 1;
2638 c->Header.SGTotal = 1;
2639 } else { /* no buffers to fill */
2640 c->Header.SGList = 0;
2641 c->Header.SGTotal = 0;
2642 }
2643 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2644 /* use the kernel address the cmd block for tag */
2645 c->Header.Tag.lower = c->busaddr;
2646
2647 /* Fill in Request block */
2648 memcpy(&c->Request, &iocommand.Request,
2649 sizeof(c->Request));
2650
2651 /* Fill in the scatter gather information */
2652 if (iocommand.buf_size > 0) {
2653 temp64.val = pci_map_single(h->pdev, buff,
2654 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2655 c->SG[0].Addr.lower = temp64.val32.lower;
2656 c->SG[0].Addr.upper = temp64.val32.upper;
2657 c->SG[0].Len = iocommand.buf_size;
2658 c->SG[0].Ext = 0; /* we are not chaining*/
2659 }
a0c12413 2660 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 2661 if (iocommand.buf_size > 0)
2662 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2663 check_ioctl_unit_attention(h, c);
2664
2665 /* Copy the error information out */
2666 memcpy(&iocommand.error_info, c->err_info,
2667 sizeof(iocommand.error_info));
2668 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2669 kfree(buff);
2670 cmd_special_free(h, c);
2671 return -EFAULT;
2672 }
b03a7771
SC		 2673 if (iocommand.Request.Type.Direction == XFER_READ &&
2674 iocommand.buf_size > 0) {
edd16368
SC		 2675 /* Copy the data out of the buffer we created */
2676 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2677 kfree(buff);
2678 cmd_special_free(h, c);
2679 return -EFAULT;
2680 }
2681 }
2682 kfree(buff);
2683 cmd_special_free(h, c);
2684 return 0;
2685}
2686
2687static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2688{
2689 BIG_IOCTL_Command_struct *ioc;
2690 struct CommandList *c;
2691 unsigned char **buff = NULL;
2692 int *buff_size = NULL;
2693 union u64bit temp64;
2694 BYTE sg_used = 0;
2695 int status = 0;
2696 int i;
01a02ffc
SC		 2697 u32 left;
2698 u32 sz;
edd16368
SC		 2699 BYTE __user *data_ptr;
2700
2701 if (!argp)
2702 return -EINVAL;
2703 if (!capable(CAP_SYS_RAWIO))
2704 return -EPERM;
2705 ioc = (BIG_IOCTL_Command_struct *)
2706 kmalloc(sizeof(*ioc), GFP_KERNEL);
2707 if (!ioc) {
2708 status = -ENOMEM;
2709 goto cleanup1;
2710 }
2711 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2712 status = -EFAULT;
2713 goto cleanup1;
2714 }
2715 if ((ioc->buf_size < 1) &&
2716 (ioc->Request.Type.Direction != XFER_NONE)) {
2717 status = -EINVAL;
2718 goto cleanup1;
2719 }
2720 /* Check kmalloc limits using all SGs */
2721 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2722 status = -EINVAL;
2723 goto cleanup1;
2724 }
d66ae08b 2725 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 2726 status = -EINVAL;
2727 goto cleanup1;
2728 }
d66ae08b 2729 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 2730 if (!buff) {
2731 status = -ENOMEM;
2732 goto cleanup1;
2733 }
d66ae08b 2734 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 2735 if (!buff_size) {
2736 status = -ENOMEM;
2737 goto cleanup1;
2738 }
2739 left = ioc->buf_size;
2740 data_ptr = ioc->buf;
2741 while (left) {
2742 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2743 buff_size[sg_used] = sz;
2744 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2745 if (buff[sg_used] == NULL) {
2746 status = -ENOMEM;
2747 goto cleanup1;
2748 }
2749 if (ioc->Request.Type.Direction == XFER_WRITE) {
2750 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2751 status = -ENOMEM;
2752 goto cleanup1;
2753 }
2754 } else
2755 memset(buff[sg_used], 0, sz);
2756 left -= sz;
2757 data_ptr += sz;
2758 sg_used++;
2759 }
2760 c = cmd_special_alloc(h);
2761 if (c == NULL) {
2762 status = -ENOMEM;
2763 goto cleanup1;
2764 }
2765 c->cmd_type = CMD_IOCTL_PEND;
2766 c->Header.ReplyQueue = 0;
b03a7771 2767 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 2768 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2769 c->Header.Tag.lower = c->busaddr;
2770 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2771 if (ioc->buf_size > 0) {
2772 int i;
2773 for (i = 0; i < sg_used; i++) {
2774 temp64.val = pci_map_single(h->pdev, buff[i],
2775 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2776 c->SG[i].Addr.lower = temp64.val32.lower;
2777 c->SG[i].Addr.upper = temp64.val32.upper;
2778 c->SG[i].Len = buff_size[i];
2779 /* we are not chaining */
2780 c->SG[i].Ext = 0;
2781 }
2782 }
a0c12413 2783 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 2784 if (sg_used)
2785 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 2786 check_ioctl_unit_attention(h, c);
2787 /* Copy the error information out */
2788 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2789 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2790 cmd_special_free(h, c);
2791 status = -EFAULT;
2792 goto cleanup1;
2793 }
b03a7771 2794 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 2795 /* Copy the data out of the buffer we created */
2796 BYTE __user *ptr = ioc->buf;
2797 for (i = 0; i < sg_used; i++) {
2798 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2799 cmd_special_free(h, c);
2800 status = -EFAULT;
2801 goto cleanup1;
2802 }
2803 ptr += buff_size[i];
2804 }
2805 }
2806 cmd_special_free(h, c);
2807 status = 0;
2808cleanup1:
2809 if (buff) {
2810 for (i = 0; i < sg_used; i++)
2811 kfree(buff[i]);
2812 kfree(buff);
2813 }
2814 kfree(buff_size);
2815 kfree(ioc);
2816 return status;
2817}
2818
2819static void check_ioctl_unit_attention(struct ctlr_info *h,
2820 struct CommandList *c)
2821{
2822 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2823 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2824 (void) check_for_unit_attention(h, c);
2825}
2826/*
2827 * ioctl
2828 */
2829static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2830{
2831 struct ctlr_info *h;
2832 void __user *argp = (void __user *)arg;
2833
2834 h = sdev_to_hba(dev);
2835
2836 switch (cmd) {
2837 case CCISS_DEREGDISK:
2838 case CCISS_REGNEWDISK:
2839 case CCISS_REGNEWD:
a08a8471 2840 hpsa_scan_start(h->scsi_host);
edd16368
SC		 2841 return 0;
2842 case CCISS_GETPCIINFO:
2843 return hpsa_getpciinfo_ioctl(h, argp);
2844 case CCISS_GETDRIVVER:
2845 return hpsa_getdrivver_ioctl(h, argp);
2846 case CCISS_PASSTHRU:
2847 return hpsa_passthru_ioctl(h, argp);
2848 case CCISS_BIG_PASSTHRU:
2849 return hpsa_big_passthru_ioctl(h, argp);
2850 default:
2851 return -ENOTTY;
2852 }
2853}
2854
64670ac8
SC		 2855static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2856 unsigned char *scsi3addr, u8 reset_type)
2857{
2858 struct CommandList *c;
2859
2860 c = cmd_alloc(h);
2861 if (!c)
2862 return -ENOMEM;
2863 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2864 RAID_CTLR_LUNID, TYPE_MSG);
2865 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2866 c->waiting = NULL;
2867 enqueue_cmd_and_start_io(h, c);
2868 /* Don't wait for completion, the reset won't complete. Don't free
2869 * the command either. This is the last command we will send before
2870 * re-initializing everything, so it doesn't matter and won't leak.
2871 */
2872 return 0;
2873}
2874
01a02ffc
SC		 2875static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2876 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 2877 int cmd_type)
2878{
2879 int pci_dir = XFER_NONE;
2880
2881 c->cmd_type = CMD_IOCTL_PEND;
2882 c->Header.ReplyQueue = 0;
2883 if (buff != NULL && size > 0) {
2884 c->Header.SGList = 1;
2885 c->Header.SGTotal = 1;
2886 } else {
2887 c->Header.SGList = 0;
2888 c->Header.SGTotal = 0;
2889 }
2890 c->Header.Tag.lower = c->busaddr;
2891 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2892
2893 c->Request.Type.Type = cmd_type;
2894 if (cmd_type == TYPE_CMD) {
2895 switch (cmd) {
2896 case HPSA_INQUIRY:
2897 /* are we trying to read a vital product page */
2898 if (page_code != 0) {
2899 c->Request.CDB[1] = 0x01;
2900 c->Request.CDB[2] = page_code;
2901 }
2902 c->Request.CDBLen = 6;
2903 c->Request.Type.Attribute = ATTR_SIMPLE;
2904 c->Request.Type.Direction = XFER_READ;
2905 c->Request.Timeout = 0;
2906 c->Request.CDB[0] = HPSA_INQUIRY;
2907 c->Request.CDB[4] = size & 0xFF;
2908 break;
2909 case HPSA_REPORT_LOG:
2910 case HPSA_REPORT_PHYS:
2911 /* Talking to controller so It's a physical command
2912 mode = 00 target = 0. Nothing to write.
2913 */
2914 c->Request.CDBLen = 12;
2915 c->Request.Type.Attribute = ATTR_SIMPLE;
2916 c->Request.Type.Direction = XFER_READ;
2917 c->Request.Timeout = 0;
2918 c->Request.CDB[0] = cmd;
2919 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2920 c->Request.CDB[7] = (size >> 16) & 0xFF;
2921 c->Request.CDB[8] = (size >> 8) & 0xFF;
2922 c->Request.CDB[9] = size & 0xFF;
2923 break;
edd16368
SC		 2924 case HPSA_CACHE_FLUSH:
2925 c->Request.CDBLen = 12;
2926 c->Request.Type.Attribute = ATTR_SIMPLE;
2927 c->Request.Type.Direction = XFER_WRITE;
2928 c->Request.Timeout = 0;
2929 c->Request.CDB[0] = BMIC_WRITE;
2930 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 2931 c->Request.CDB[7] = (size >> 8) & 0xFF;
2932 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 2933 break;
2934 case TEST_UNIT_READY:
2935 c->Request.CDBLen = 6;
2936 c->Request.Type.Attribute = ATTR_SIMPLE;
2937 c->Request.Type.Direction = XFER_NONE;
2938 c->Request.Timeout = 0;
2939 break;
2940 default:
2941 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2942 BUG();
2943 return;
2944 }
2945 } else if (cmd_type == TYPE_MSG) {
2946 switch (cmd) {
2947
2948 case HPSA_DEVICE_RESET_MSG:
2949 c->Request.CDBLen = 16;
2950 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2951 c->Request.Type.Attribute = ATTR_SIMPLE;
2952 c->Request.Type.Direction = XFER_NONE;
2953 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 2954 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2955 c->Request.CDB[0] = cmd;
edd16368
SC		 2956 c->Request.CDB[1] = 0x03; /* Reset target above */
2957 /* If bytes 4-7 are zero, it means reset the */
2958 /* LunID device */
2959 c->Request.CDB[4] = 0x00;
2960 c->Request.CDB[5] = 0x00;
2961 c->Request.CDB[6] = 0x00;
2962 c->Request.CDB[7] = 0x00;
2963 break;
2964
2965 default:
2966 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2967 cmd);
2968 BUG();
2969 }
2970 } else {
2971 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2972 BUG();
2973 }
2974
2975 switch (c->Request.Type.Direction) {
2976 case XFER_READ:
2977 pci_dir = PCI_DMA_FROMDEVICE;
2978 break;
2979 case XFER_WRITE:
2980 pci_dir = PCI_DMA_TODEVICE;
2981 break;
2982 case XFER_NONE:
2983 pci_dir = PCI_DMA_NONE;
2984 break;
2985 default:
2986 pci_dir = PCI_DMA_BIDIRECTIONAL;
2987 }
2988
2989 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2990
2991 return;
2992}
2993
2994/*
2995 * Map (physical) PCI mem into (virtual) kernel space
2996 */
2997static void __iomem *remap_pci_mem(ulong base, ulong size)
2998{
2999 ulong page_base = ((ulong) base) & PAGE_MASK;
3000 ulong page_offs = ((ulong) base) - page_base;
3001 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
3002
3003 return page_remapped ? (page_remapped + page_offs) : NULL;
3004}
3005
3006/* Takes cmds off the submission queue and sends them to the hardware,
3007 * then puts them on the queue of cmds waiting for completion.
3008 */
3009static void start_io(struct ctlr_info *h)
3010{
3011 struct CommandList *c;
3012
9e0fc764
SC		 3013 while (!list_empty(&h->reqQ)) {
3014 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3015 /* can't do anything if fifo is full */
3016 if ((h->access.fifo_full(h))) {
3017 dev_warn(&h->pdev->dev, "fifo full\n");
3018 break;
3019 }
3020
3021 /* Get the first entry from the Request Q */
3022 removeQ(c);
3023 h->Qdepth--;
3024
3025 /* Tell the controller execute command */
3026 h->access.submit_command(h, c);
3027
3028 /* Put job onto the completed Q */
3029 addQ(&h->cmpQ, c);
3030 }
3031}
3032
3033static inline unsigned long get_next_completion(struct ctlr_info *h)
3034{
3035 return h->access.command_completed(h);
3036}
3037
900c5440 3038static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3039{
3040 return h->access.intr_pending(h);
3041}
3042
3043static inline long interrupt_not_for_us(struct ctlr_info *h)
3044{
10f66018
SC		 3045 return (h->access.intr_pending(h) == 0) ||
3046 (h->interrupts_enabled == 0);
edd16368
SC		 3047}
3048
01a02ffc
SC		 3049static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3050 u32 raw_tag)
edd16368
SC		 3051{
3052 if (unlikely(tag_index >= h->nr_cmds)) {
3053 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3054 return 1;
3055 }
3056 return 0;
3057}
3058
01a02ffc 3059static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC		 3060{
3061 removeQ(c);
3062 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3063 complete_scsi_command(c);
edd16368
SC		 3064 else if (c->cmd_type == CMD_IOCTL_PEND)
3065 complete(c->waiting);
3066}
3067
a104c99f
SC		 3068static inline u32 hpsa_tag_contains_index(u32 tag)
3069{
a104c99f
SC		 3070 return tag & DIRECT_LOOKUP_BIT;
3071}
3072
3073static inline u32 hpsa_tag_to_index(u32 tag)
3074{
a104c99f
SC		 3075 return tag >> DIRECT_LOOKUP_SHIFT;
3076}
3077
a9a3a273
SC		 3078
3079static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3080{
a9a3a273
SC		 3081#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3082#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3083 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3084 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3085 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3086}
3087
303932fd
DB		 3088/* process completion of an indexed ("direct lookup") command */
3089static inline u32 process_indexed_cmd(struct ctlr_info *h,
3090 u32 raw_tag)
3091{
3092 u32 tag_index;
3093 struct CommandList *c;
3094
3095 tag_index = hpsa_tag_to_index(raw_tag);
3096 if (bad_tag(h, tag_index, raw_tag))
3097 return next_command(h);
3098 c = h->cmd_pool + tag_index;
3099 finish_cmd(c, raw_tag);
3100 return next_command(h);
3101}
3102
3103/* process completion of a non-indexed command */
3104static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3105 u32 raw_tag)
3106{
3107 u32 tag;
3108 struct CommandList *c = NULL;
303932fd 3109
a9a3a273 3110 tag = hpsa_tag_discard_error_bits(h, raw_tag);
9e0fc764 3111 list_for_each_entry(c, &h->cmpQ, list) {
303932fd
DB		 3112 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3113 finish_cmd(c, raw_tag);
3114 return next_command(h);
3115 }
3116 }
3117 bad_tag(h, h->nr_cmds + 1, raw_tag);
3118 return next_command(h);
3119}
3120
64670ac8
SC		 3121/* Some controllers, like p400, will give us one interrupt
3122 * after a soft reset, even if we turned interrupts off.
3123 * Only need to check for this in the hpsa_xxx_discard_completions
3124 * functions.
3125 */
3126static int ignore_bogus_interrupt(struct ctlr_info *h)
3127{
3128 if (likely(!reset_devices))
3129 return 0;
3130
3131 if (likely(h->interrupts_enabled))
3132 return 0;
3133
3134 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3135 "(known firmware bug.) Ignoring.\n");
3136
3137 return 1;
3138}
3139
3140static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3141{
3142 struct ctlr_info *h = dev_id;
3143 unsigned long flags;
3144 u32 raw_tag;
3145
3146 if (ignore_bogus_interrupt(h))
3147 return IRQ_NONE;
3148
3149 if (interrupt_not_for_us(h))
3150 return IRQ_NONE;
3151 spin_lock_irqsave(&h->lock, flags);
a0c12413 3152 h->last_intr_timestamp = get_jiffies_64();
64670ac8
SC		 3153 while (interrupt_pending(h)) {
3154 raw_tag = get_next_completion(h);
3155 while (raw_tag != FIFO_EMPTY)
3156 raw_tag = next_command(h);
3157 }
3158 spin_unlock_irqrestore(&h->lock, flags);
3159 return IRQ_HANDLED;
3160}
3161
3162static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3163{
3164 struct ctlr_info *h = dev_id;
3165 unsigned long flags;
3166 u32 raw_tag;
3167
3168 if (ignore_bogus_interrupt(h))
3169 return IRQ_NONE;
3170
3171 spin_lock_irqsave(&h->lock, flags);
a0c12413 3172 h->last_intr_timestamp = get_jiffies_64();
64670ac8
SC		 3173 raw_tag = get_next_completion(h);
3174 while (raw_tag != FIFO_EMPTY)
3175 raw_tag = next_command(h);
3176 spin_unlock_irqrestore(&h->lock, flags);
3177 return IRQ_HANDLED;
3178}
3179
10f66018 3180static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC		 3181{
3182 struct ctlr_info *h = dev_id;
edd16368 3183 unsigned long flags;
303932fd 3184 u32 raw_tag;
edd16368
SC		 3185
3186 if (interrupt_not_for_us(h))
3187 return IRQ_NONE;
10f66018 3188 spin_lock_irqsave(&h->lock, flags);
a0c12413 3189 h->last_intr_timestamp = get_jiffies_64();
10f66018
SC		 3190 while (interrupt_pending(h)) {
3191 raw_tag = get_next_completion(h);
3192 while (raw_tag != FIFO_EMPTY) {
3193 if (hpsa_tag_contains_index(raw_tag))
3194 raw_tag = process_indexed_cmd(h, raw_tag);
3195 else
3196 raw_tag = process_nonindexed_cmd(h, raw_tag);
3197 }
3198 }
3199 spin_unlock_irqrestore(&h->lock, flags);
3200 return IRQ_HANDLED;
3201}
3202
3203static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3204{
3205 struct ctlr_info *h = dev_id;
3206 unsigned long flags;
3207 u32 raw_tag;
3208
edd16368 3209 spin_lock_irqsave(&h->lock, flags);
a0c12413 3210 h->last_intr_timestamp = get_jiffies_64();
303932fd
DB		 3211 raw_tag = get_next_completion(h);
3212 while (raw_tag != FIFO_EMPTY) {
3213 if (hpsa_tag_contains_index(raw_tag))
3214 raw_tag = process_indexed_cmd(h, raw_tag);
3215 else
3216 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC		 3217 }
3218 spin_unlock_irqrestore(&h->lock, flags);
3219 return IRQ_HANDLED;
3220}
3221
a9a3a273
SC		 3222/* Send a message CDB to the firmware. Careful, this only works
3223 * in simple mode, not performant mode due to the tag lookup.
3224 * We only ever use this immediately after a controller reset.
3225 */
edd16368
SC		 3226static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3227 unsigned char type)
3228{
3229 struct Command {
3230 struct CommandListHeader CommandHeader;
3231 struct RequestBlock Request;
3232 struct ErrDescriptor ErrorDescriptor;
3233 };
3234 struct Command *cmd;
3235 static const size_t cmd_sz = sizeof(*cmd) +
3236 sizeof(cmd->ErrorDescriptor);
3237 dma_addr_t paddr64;
3238 uint32_t paddr32, tag;
3239 void __iomem *vaddr;
3240 int i, err;
3241
3242 vaddr = pci_ioremap_bar(pdev, 0);
3243 if (vaddr == NULL)
3244 return -ENOMEM;
3245
3246 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3247 * CCISS commands, so they must be allocated from the lower 4GiB of
3248 * memory.
3249 */
3250 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3251 if (err) {
3252 iounmap(vaddr);
3253 return -ENOMEM;
3254 }
3255
3256 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3257 if (cmd == NULL) {
3258 iounmap(vaddr);
3259 return -ENOMEM;
3260 }
3261
3262 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3263 * although there's no guarantee, we assume that the address is at
3264 * least 4-byte aligned (most likely, it's page-aligned).
3265 */
3266 paddr32 = paddr64;
3267
3268 cmd->CommandHeader.ReplyQueue = 0;
3269 cmd->CommandHeader.SGList = 0;
3270 cmd->CommandHeader.SGTotal = 0;
3271 cmd->CommandHeader.Tag.lower = paddr32;
3272 cmd->CommandHeader.Tag.upper = 0;
3273 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3274
3275 cmd->Request.CDBLen = 16;
3276 cmd->Request.Type.Type = TYPE_MSG;
3277 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3278 cmd->Request.Type.Direction = XFER_NONE;
3279 cmd->Request.Timeout = 0; /* Don't time out */
3280 cmd->Request.CDB[0] = opcode;
3281 cmd->Request.CDB[1] = type;
3282 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3283 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3284 cmd->ErrorDescriptor.Addr.upper = 0;
3285 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3286
3287 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3288
3289 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3290 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3291 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3292 break;
3293 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3294 }
3295
3296 iounmap(vaddr);
3297
3298 /* we leak the DMA buffer here ... no choice since the controller could
3299 * still complete the command.
3300 */
3301 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3302 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3303 opcode, type);
3304 return -ETIMEDOUT;
3305 }
3306
3307 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3308
3309 if (tag & HPSA_ERROR_BIT) {
3310 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3311 opcode, type);
3312 return -EIO;
3313 }
3314
3315 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3316 opcode, type);
3317 return 0;
3318}
3319
edd16368
SC		 3320#define hpsa_noop(p) hpsa_message(p, 3, 0)
3321
1df8552a 3322static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3323 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3324{
3325 u16 pmcsr;
3326 int pos;
3327
3328 if (use_doorbell) {
3329 /* For everything after the P600, the PCI power state method
3330 * of resetting the controller doesn't work, so we have this
3331 * other way using the doorbell register.
3332 */
3333 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3334 writel(use_doorbell, vaddr + SA5_DOORBELL);
1df8552a
SC		 3335 } else { /* Try to do it the PCI power state way */
3336
3337 /* Quoting from the Open CISS Specification: "The Power
3338 * Management Control/Status Register (CSR) controls the power
3339 * state of the device. The normal operating state is D0,
3340 * CSR=00h. The software off state is D3, CSR=03h. To reset
3341 * the controller, place the interface device in D3 then to D0,
3342 * this causes a secondary PCI reset which will reset the
3343 * controller." */
3344
3345 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3346 if (pos == 0) {
3347 dev_err(&pdev->dev,
3348 "hpsa_reset_controller: "
3349 "PCI PM not supported\n");
3350 return -ENODEV;
3351 }
3352 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3353 /* enter the D3hot power management state */
3354 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3355 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3356 pmcsr |= PCI_D3hot;
3357 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3358
3359 msleep(500);
3360
3361 /* enter the D0 power management state */
3362 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3363 pmcsr |= PCI_D0;
3364 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3365
3366 /*
3367 * The P600 requires a small delay when changing states.
3368 * Otherwise we may think the board did not reset and we bail.
3369 * This for kdump only and is particular to the P600.
3370 */
3371 msleep(500);
1df8552a
SC		 3372 }
3373 return 0;
3374}
3375
580ada3c
SC		 3376static __devinit void init_driver_version(char *driver_version, int len)
3377{
3378 memset(driver_version, 0, len);
f79cfec6 3379 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3380}
3381
3382static __devinit int write_driver_ver_to_cfgtable(
3383 struct CfgTable __iomem *cfgtable)
3384{
3385 char *driver_version;
3386 int i, size = sizeof(cfgtable->driver_version);
3387
3388 driver_version = kmalloc(size, GFP_KERNEL);
3389 if (!driver_version)
3390 return -ENOMEM;
3391
3392 init_driver_version(driver_version, size);
3393 for (i = 0; i < size; i++)
3394 writeb(driver_version[i], &cfgtable->driver_version[i]);
3395 kfree(driver_version);
3396 return 0;
3397}
3398
3399static __devinit void read_driver_ver_from_cfgtable(
3400 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3401{
3402 int i;
3403
3404 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3405 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3406}
3407
3408static __devinit int controller_reset_failed(
3409 struct CfgTable __iomem *cfgtable)
3410{
3411
3412 char *driver_ver, *old_driver_ver;
3413 int rc, size = sizeof(cfgtable->driver_version);
3414
3415 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3416 if (!old_driver_ver)
3417 return -ENOMEM;
3418 driver_ver = old_driver_ver + size;
3419
3420 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3421 * should have been changed, otherwise we know the reset failed.
3422 */
3423 init_driver_version(old_driver_ver, size);
3424 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3425 rc = !memcmp(driver_ver, old_driver_ver, size);
3426 kfree(old_driver_ver);
3427 return rc;
3428}
edd16368 3429/* This does a hard reset of the controller using PCI power management
1df8552a 3430 * states or the using the doorbell register.
edd16368 3431 */
1df8552a 3432static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3433{
1df8552a
SC		 3434 u64 cfg_offset;
3435 u32 cfg_base_addr;
3436 u64 cfg_base_addr_index;
3437 void __iomem *vaddr;
3438 unsigned long paddr;
580ada3c 3439 u32 misc_fw_support;
270d05de 3440 int rc;
1df8552a 3441 struct CfgTable __iomem *cfgtable;
cf0b08d0 3442 u32 use_doorbell;
18867659 3443 u32 board_id;
270d05de 3444 u16 command_register;
edd16368 3445
1df8552a
SC		 3446 /* For controllers as old as the P600, this is very nearly
3447 * the same thing as
edd16368
SC		 3448 *
3449 * pci_save_state(pci_dev);
3450 * pci_set_power_state(pci_dev, PCI_D3hot);
3451 * pci_set_power_state(pci_dev, PCI_D0);
3452 * pci_restore_state(pci_dev);
3453 *
1df8552a
SC		 3454 * For controllers newer than the P600, the pci power state
3455 * method of resetting doesn't work so we have another way
3456 * using the doorbell register.
edd16368 3457 */
18867659 3458
25c1e56a 3459 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3460 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3461 dev_warn(&pdev->dev, "Not resetting device.\n");
3462 return -ENODEV;
3463 }
46380786
SC		 3464
3465 /* if controller is soft- but not hard resettable... */
3466 if (!ctlr_is_hard_resettable(board_id))
3467 return -ENOTSUPP; /* try soft reset later. */
18867659 3468
270d05de
SC		 3469 /* Save the PCI command register */
3470 pci_read_config_word(pdev, 4, &command_register);
3471 /* Turn the board off. This is so that later pci_restore_state()
3472 * won't turn the board on before the rest of config space is ready.
3473 */
3474 pci_disable_device(pdev);
3475 pci_save_state(pdev);
edd16368 3476
1df8552a
SC		 3477 /* find the first memory BAR, so we can find the cfg table */
3478 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3479 if (rc)
3480 return rc;
3481 vaddr = remap_pci_mem(paddr, 0x250);
3482 if (!vaddr)
3483 return -ENOMEM;
edd16368 3484
1df8552a
SC		 3485 /* find cfgtable in order to check if reset via doorbell is supported */
3486 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3487 &cfg_base_addr_index, &cfg_offset);
3488 if (rc)
3489 goto unmap_vaddr;
3490 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3491 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3492 if (!cfgtable) {
3493 rc = -ENOMEM;
3494 goto unmap_vaddr;
3495 }
580ada3c
SC		 3496 rc = write_driver_ver_to_cfgtable(cfgtable);
3497 if (rc)
3498 goto unmap_vaddr;
edd16368 3499
cf0b08d0
SC		 3500 /* If reset via doorbell register is supported, use that.
3501 * There are two such methods. Favor the newest method.
3502 */
1df8552a 3503 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3504 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3505 if (use_doorbell) {
3506 use_doorbell = DOORBELL_CTLR_RESET2;
3507 } else {
3508 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3509 if (use_doorbell) {
fba63097
MM		 3510 dev_warn(&pdev->dev, "Soft reset not supported. "
3511 "Firmware update is required.\n");
64670ac8 3512 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3513 goto unmap_cfgtable;
3514 }
3515 }
edd16368 3516
1df8552a
SC		 3517 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3518 if (rc)
3519 goto unmap_cfgtable;
edd16368 3520
270d05de
SC		 3521 pci_restore_state(pdev);
3522 rc = pci_enable_device(pdev);
3523 if (rc) {
3524 dev_warn(&pdev->dev, "failed to enable device.\n");
3525 goto unmap_cfgtable;
edd16368 3526 }
270d05de 3527 pci_write_config_word(pdev, 4, command_register);
edd16368 3528
1df8552a
SC		 3529 /* Some devices (notably the HP Smart Array 5i Controller)
3530 need a little pause here */
3531 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3532
fe5389c8 3533 /* Wait for board to become not ready, then ready. */
2b870cb3 3534 dev_info(&pdev->dev, "Waiting for board to reset.\n");
fe5389c8 3535 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
64670ac8 3536 if (rc) {
fe5389c8 3537 dev_warn(&pdev->dev,
64670ac8
SC		 3538 "failed waiting for board to reset."
3539 " Will try soft reset.\n");
3540 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3541 goto unmap_cfgtable;
3542 }
fe5389c8
SC		 3543 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3544 if (rc) {
3545 dev_warn(&pdev->dev,
64670ac8
SC		 3546 "failed waiting for board to become ready "
3547 "after hard reset\n");
fe5389c8
SC		 3548 goto unmap_cfgtable;
3549 }
fe5389c8 3550
580ada3c
SC		 3551 rc = controller_reset_failed(vaddr);
3552 if (rc < 0)
3553 goto unmap_cfgtable;
3554 if (rc) {
64670ac8
SC		 3555 dev_warn(&pdev->dev, "Unable to successfully reset "
3556 "controller. Will try soft reset.\n");
3557 rc = -ENOTSUPP;
580ada3c 3558 } else {
64670ac8 3559 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 3560 }
3561
3562unmap_cfgtable:
3563 iounmap(cfgtable);
3564
3565unmap_vaddr:
3566 iounmap(vaddr);
3567 return rc;
edd16368
SC		 3568}
3569
3570/*
3571 * We cannot read the structure directly, for portability we must use
3572 * the io functions.
3573 * This is for debug only.
3574 */
edd16368
SC		 3575static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3576{
58f8665c 3577#ifdef HPSA_DEBUG
edd16368
SC		 3578 int i;
3579 char temp_name[17];
3580
3581 dev_info(dev, "Controller Configuration information\n");
3582 dev_info(dev, "------------------------------------\n");
3583 for (i = 0; i < 4; i++)
3584 temp_name[i] = readb(&(tb->Signature[i]));
3585 temp_name[4] = '\0';
3586 dev_info(dev, " Signature = %s\n", temp_name);
3587 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3588 dev_info(dev, " Transport methods supported = 0x%x\n",
3589 readl(&(tb->TransportSupport)));
3590 dev_info(dev, " Transport methods active = 0x%x\n",
3591 readl(&(tb->TransportActive)));
3592 dev_info(dev, " Requested transport Method = 0x%x\n",
3593 readl(&(tb->HostWrite.TransportRequest)));
3594 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3595 readl(&(tb->HostWrite.CoalIntDelay)));
3596 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3597 readl(&(tb->HostWrite.CoalIntCount)));
3598 dev_info(dev, " Max outstanding commands = 0x%d\n",
3599 readl(&(tb->CmdsOutMax)));
3600 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3601 for (i = 0; i < 16; i++)
3602 temp_name[i] = readb(&(tb->ServerName[i]));
3603 temp_name[16] = '\0';
3604 dev_info(dev, " Server Name = %s\n", temp_name);
3605 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3606 readl(&(tb->HeartBeat)));
edd16368 3607#endif /* HPSA_DEBUG */
58f8665c 3608}
edd16368
SC		 3609
3610static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3611{
3612 int i, offset, mem_type, bar_type;
3613
3614 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3615 return 0;
3616 offset = 0;
3617 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3618 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3619 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3620 offset += 4;
3621 else {
3622 mem_type = pci_resource_flags(pdev, i) &
3623 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3624 switch (mem_type) {
3625 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3626 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3627 offset += 4; /* 32 bit */
3628 break;
3629 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3630 offset += 8;
3631 break;
3632 default: /* reserved in PCI 2.2 */
3633 dev_warn(&pdev->dev,
3634 "base address is invalid\n");
3635 return -1;
3636 break;
3637 }
3638 }
3639 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3640 return i + 1;
3641 }
3642 return -1;
3643}
3644
3645/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3646 * controllers that are capable. If not, we use IO-APIC mode.
3647 */
3648
6b3f4c52 3649static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 3650{
3651#ifdef CONFIG_PCI_MSI
3652 int err;
3653 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3654 {0, 2}, {0, 3}
3655 };
3656
3657 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 3658 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3659 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3660 goto default_int_mode;
55c06c71
SC		 3661 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3662 dev_info(&h->pdev->dev, "MSIX\n");
3663 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC		 3664 if (!err) {
3665 h->intr[0] = hpsa_msix_entries[0].vector;
3666 h->intr[1] = hpsa_msix_entries[1].vector;
3667 h->intr[2] = hpsa_msix_entries[2].vector;
3668 h->intr[3] = hpsa_msix_entries[3].vector;
3669 h->msix_vector = 1;
3670 return;
3671 }
3672 if (err > 0) {
55c06c71 3673 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 3674 "available\n", err);
3675 goto default_int_mode;
3676 } else {
55c06c71 3677 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 3678 err);
3679 goto default_int_mode;
3680 }
3681 }
55c06c71
SC		 3682 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3683 dev_info(&h->pdev->dev, "MSI\n");
3684 if (!pci_enable_msi(h->pdev))
edd16368
SC		 3685 h->msi_vector = 1;
3686 else
55c06c71 3687 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 3688 }
3689default_int_mode:
3690#endif /* CONFIG_PCI_MSI */
3691 /* if we get here we're going to use the default interrupt mode */
a9a3a273 3692 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 3693}
3694
e5c880d1
SC		 3695static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3696{
3697 int i;
3698 u32 subsystem_vendor_id, subsystem_device_id;
3699
3700 subsystem_vendor_id = pdev->subsystem_vendor;
3701 subsystem_device_id = pdev->subsystem_device;
3702 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3703 subsystem_vendor_id;
3704
3705 for (i = 0; i < ARRAY_SIZE(products); i++)
3706 if (*board_id == products[i].board_id)
3707 return i;
3708
6798cc0a
SC		 3709 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3710 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3711 !hpsa_allow_any) {
e5c880d1
SC		 3712 dev_warn(&pdev->dev, "unrecognized board ID: "
3713 "0x%08x, ignoring.\n", *board_id);
3714 return -ENODEV;
3715 }
3716 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3717}
3718
12d2cd47 3719static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC		 3720 unsigned long *memory_bar)
3721{
3722 int i;
3723
3724 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3725 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3726 /* addressing mode bits already removed */
12d2cd47
SC		 3727 *memory_bar = pci_resource_start(pdev, i);
3728 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 3729 *memory_bar);
3730 return 0;
3731 }
12d2cd47 3732 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 3733 return -ENODEV;
3734}
3735
fe5389c8
SC		 3736static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3737 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3738{
fe5389c8 3739 int i, iterations;
2c4c8c8b 3740 u32 scratchpad;
fe5389c8
SC		 3741 if (wait_for_ready)
3742 iterations = HPSA_BOARD_READY_ITERATIONS;
3743 else
3744 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3745
fe5389c8
SC		 3746 for (i = 0; i < iterations; i++) {
3747 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3748 if (wait_for_ready) {
3749 if (scratchpad == HPSA_FIRMWARE_READY)
3750 return 0;
3751 } else {
3752 if (scratchpad != HPSA_FIRMWARE_READY)
3753 return 0;
3754 }
2c4c8c8b
SC		 3755 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3756 }
fe5389c8 3757 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 3758 return -ENODEV;
3759}
3760
a51fd47f
SC		 3761static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3762 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3763 u64 *cfg_offset)
3764{
3765 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3766 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3767 *cfg_base_addr &= (u32) 0x0000ffff;
3768 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3769 if (*cfg_base_addr_index == -1) {
3770 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3771 return -ENODEV;
3772 }
3773 return 0;
3774}
3775
77c4495c 3776static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3777{
01a02ffc
SC		 3778 u64 cfg_offset;
3779 u32 cfg_base_addr;
3780 u64 cfg_base_addr_index;
303932fd 3781 u32 trans_offset;
a51fd47f 3782 int rc;
77c4495c 3783
a51fd47f
SC		 3784 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3785 &cfg_base_addr_index, &cfg_offset);
3786 if (rc)
3787 return rc;
77c4495c 3788 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3789 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 3790 if (!h->cfgtable)
3791 return -ENOMEM;
580ada3c
SC		 3792 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3793 if (rc)
3794 return rc;
77c4495c 3795 /* Find performant mode table. */
a51fd47f 3796 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 3797 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3798 cfg_base_addr_index)+cfg_offset+trans_offset,
3799 sizeof(*h->transtable));
3800 if (!h->transtable)
3801 return -ENOMEM;
3802 return 0;
3803}
3804
cba3d38b
SC		 3805static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3806{
3807 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 3808
3809 /* Limit commands in memory limited kdump scenario. */
3810 if (reset_devices && h->max_commands > 32)
3811 h->max_commands = 32;
3812
cba3d38b
SC		 3813 if (h->max_commands < 16) {
3814 dev_warn(&h->pdev->dev, "Controller reports "
3815 "max supported commands of %d, an obvious lie. "
3816 "Using 16. Ensure that firmware is up to date.\n",
3817 h->max_commands);
3818 h->max_commands = 16;
3819 }
3820}
3821
b93d7536
SC		 3822/* Interrogate the hardware for some limits:
3823 * max commands, max SG elements without chaining, and with chaining,
3824 * SG chain block size, etc.
3825 */
3826static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3827{
cba3d38b 3828 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 3829 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3830 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3831 /*
3832 * Limit in-command s/g elements to 32 save dma'able memory.
3833 * Howvever spec says if 0, use 31
3834 */
3835 h->max_cmd_sg_entries = 31;
3836 if (h->maxsgentries > 512) {
3837 h->max_cmd_sg_entries = 32;
3838 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3839 h->maxsgentries--; /* save one for chain pointer */
3840 } else {
3841 h->maxsgentries = 31; /* default to traditional values */
3842 h->chainsize = 0;
3843 }
3844}
3845
76c46e49
SC		 3846static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3847{
0fc9fd40 3848 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 3849 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3850 return false;
3851 }
3852 return true;
3853}
3854
f7c39101
SC		 3855/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3856static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3857{
3858#ifdef CONFIG_X86
3859 u32 prefetch;
3860
3861 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3862 prefetch |= 0x100;
3863 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3864#endif
3865}
3866
3d0eab67
SC		 3867/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3868 * in a prefetch beyond physical memory.
3869 */
3870static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3871{
3872 u32 dma_prefetch;
3873
3874 if (h->board_id != 0x3225103C)
3875 return;
3876 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3877 dma_prefetch |= 0x8000;
3878 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3879}
3880
3f4336f3 3881static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 3882{
3883 int i;
6eaf46fd
SC		 3884 u32 doorbell_value;
3885 unsigned long flags;
eb6b2ae9
SC		 3886
3887 /* under certain very rare conditions, this can take awhile.
3888 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3889 * as we enter this code.)
3890 */
3891 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 3892 spin_lock_irqsave(&h->lock, flags);
3893 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3894 spin_unlock_irqrestore(&h->lock, flags);
382be668 3895 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 3896 break;
3897 /* delay and try again */
60d3f5b0 3898 usleep_range(10000, 20000);
eb6b2ae9 3899 }
3f4336f3
SC		 3900}
3901
3902static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3903{
3904 u32 trans_support;
3905
3906 trans_support = readl(&(h->cfgtable->TransportSupport));
3907 if (!(trans_support & SIMPLE_MODE))
3908 return -ENOTSUPP;
3909
3910 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3911 /* Update the field, and then ring the doorbell */
3912 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3913 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3914 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3915 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 3916 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3917 dev_warn(&h->pdev->dev,
3918 "unable to get board into simple mode\n");
3919 return -ENODEV;
3920 }
960a30e7 3921 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 3922 return 0;
3923}
3924
77c4495c
SC		 3925static int __devinit hpsa_pci_init(struct ctlr_info *h)
3926{
eb6b2ae9 3927 int prod_index, err;
edd16368 3928
e5c880d1
SC		 3929 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3930 if (prod_index < 0)
3931 return -ENODEV;
3932 h->product_name = products[prod_index].product_name;
3933 h->access = *(products[prod_index].access);
edd16368 3934
e5a44df8
MG		 3935 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
3936 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
3937
55c06c71 3938 err = pci_enable_device(h->pdev);
edd16368 3939 if (err) {
55c06c71 3940 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 3941 return err;
3942 }
3943
5cb460a6
SC		 3944 /* Enable bus mastering (pci_disable_device may disable this) */
3945 pci_set_master(h->pdev);
3946
f79cfec6 3947 err = pci_request_regions(h->pdev, HPSA);
edd16368 3948 if (err) {
55c06c71
SC		 3949 dev_err(&h->pdev->dev,
3950 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 3951 return err;
3952 }
6b3f4c52 3953 hpsa_interrupt_mode(h);
12d2cd47 3954 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3955 if (err)
edd16368 3956 goto err_out_free_res;
edd16368 3957 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 3958 if (!h->vaddr) {
3959 err = -ENOMEM;
3960 goto err_out_free_res;
3961 }
fe5389c8 3962 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3963 if (err)
edd16368 3964 goto err_out_free_res;
77c4495c
SC		 3965 err = hpsa_find_cfgtables(h);
3966 if (err)
edd16368 3967 goto err_out_free_res;
b93d7536 3968 hpsa_find_board_params(h);
edd16368 3969
76c46e49 3970 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 3971 err = -ENODEV;
3972 goto err_out_free_res;
3973 }
f7c39101 3974 hpsa_enable_scsi_prefetch(h);
3d0eab67 3975 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 3976 err = hpsa_enter_simple_mode(h);
3977 if (err)
edd16368 3978 goto err_out_free_res;
edd16368
SC		 3979 return 0;
3980
3981err_out_free_res:
204892e9
SC		 3982 if (h->transtable)
3983 iounmap(h->transtable);
3984 if (h->cfgtable)
3985 iounmap(h->cfgtable);
3986 if (h->vaddr)
3987 iounmap(h->vaddr);
f0bd0b68 3988 pci_disable_device(h->pdev);
55c06c71 3989 pci_release_regions(h->pdev);
edd16368
SC		 3990 return err;
3991}
3992
339b2b14
SC		 3993static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3994{
3995 int rc;
3996
3997#define HBA_INQUIRY_BYTE_COUNT 64
3998 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3999 if (!h->hba_inquiry_data)
4000 return;
4001 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4002 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4003 if (rc != 0) {
4004 kfree(h->hba_inquiry_data);
4005 h->hba_inquiry_data = NULL;
4006 }
4007}
4008
4c2a8c40
SC		 4009static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
4010{
1df8552a 4011 int rc, i;
4c2a8c40
SC		 4012
4013 if (!reset_devices)
4014 return 0;
4015
1df8552a
SC		 4016 /* Reset the controller with a PCI power-cycle or via doorbell */
4017 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4018
1df8552a
SC		 4019 /* -ENOTSUPP here means we cannot reset the controller
4020 * but it's already (and still) up and running in
18867659
SC		 4021 * "performant mode". Or, it might be 640x, which can't reset
4022 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4023 */
4024 if (rc == -ENOTSUPP)
64670ac8 4025 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4026 if (rc)
4027 return -ENODEV;
4c2a8c40
SC		 4028
4029 /* Now try to get the controller to respond to a no-op */
2b870cb3 4030 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4031 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4032 if (hpsa_noop(pdev) == 0)
4033 break;
4034 else
4035 dev_warn(&pdev->dev, "no-op failed%s\n",
4036 (i < 11 ? "; re-trying" : ""));
4037 }
4038 return 0;
4039}
4040
2e9d1b36
SC		 4041static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4042{
4043 h->cmd_pool_bits = kzalloc(
4044 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4045 sizeof(unsigned long), GFP_KERNEL);
4046 h->cmd_pool = pci_alloc_consistent(h->pdev,
4047 h->nr_cmds * sizeof(*h->cmd_pool),
4048 &(h->cmd_pool_dhandle));
4049 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4050 h->nr_cmds * sizeof(*h->errinfo_pool),
4051 &(h->errinfo_pool_dhandle));
4052 if ((h->cmd_pool_bits == NULL)
4053 || (h->cmd_pool == NULL)
4054 || (h->errinfo_pool == NULL)) {
4055 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4056 return -ENOMEM;
4057 }
4058 return 0;
4059}
4060
4061static void hpsa_free_cmd_pool(struct ctlr_info *h)
4062{
4063 kfree(h->cmd_pool_bits);
4064 if (h->cmd_pool)
4065 pci_free_consistent(h->pdev,
4066 h->nr_cmds * sizeof(struct CommandList),
4067 h->cmd_pool, h->cmd_pool_dhandle);
4068 if (h->errinfo_pool)
4069 pci_free_consistent(h->pdev,
4070 h->nr_cmds * sizeof(struct ErrorInfo),
4071 h->errinfo_pool,
4072 h->errinfo_pool_dhandle);
4073}
4074
0ae01a32
SC		 4075static int hpsa_request_irq(struct ctlr_info *h,
4076 irqreturn_t (*msixhandler)(int, void *),
4077 irqreturn_t (*intxhandler)(int, void *))
4078{
4079 int rc;
4080
4081 if (h->msix_vector || h->msi_vector)
4082 rc = request_irq(h->intr[h->intr_mode], msixhandler,
45bcf018 4083 0, h->devname, h);
0ae01a32
SC		 4084 else
4085 rc = request_irq(h->intr[h->intr_mode], intxhandler,
45bcf018 4086 IRQF_SHARED, h->devname, h);
0ae01a32
SC		 4087 if (rc) {
4088 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4089 h->intr[h->intr_mode], h->devname);
4090 return -ENODEV;
4091 }
4092 return 0;
4093}
4094
64670ac8
SC		 4095static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4096{
4097 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4098 HPSA_RESET_TYPE_CONTROLLER)) {
4099 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4100 return -EIO;
4101 }
4102
4103 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4104 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4105 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4106 return -1;
4107 }
4108
4109 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4110 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4111 dev_warn(&h->pdev->dev, "Board failed to become ready "
4112 "after soft reset.\n");
4113 return -1;
4114 }
4115
4116 return 0;
4117}
4118
4119static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4120{
4121 free_irq(h->intr[h->intr_mode], h);
4122#ifdef CONFIG_PCI_MSI
4123 if (h->msix_vector)
4124 pci_disable_msix(h->pdev);
4125 else if (h->msi_vector)
4126 pci_disable_msi(h->pdev);
4127#endif /* CONFIG_PCI_MSI */
4128 hpsa_free_sg_chain_blocks(h);
4129 hpsa_free_cmd_pool(h);
4130 kfree(h->blockFetchTable);
4131 pci_free_consistent(h->pdev, h->reply_pool_size,
4132 h->reply_pool, h->reply_pool_dhandle);
4133 if (h->vaddr)
4134 iounmap(h->vaddr);
4135 if (h->transtable)
4136 iounmap(h->transtable);
4137 if (h->cfgtable)
4138 iounmap(h->cfgtable);
4139 pci_release_regions(h->pdev);
4140 kfree(h);
4141}
4142
a0c12413
SC		 4143static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4144{
4145 assert_spin_locked(&lockup_detector_lock);
4146 if (!hpsa_lockup_detector)
4147 return;
4148 if (h->lockup_detected)
4149 return; /* already stopped the lockup detector */
4150 list_del(&h->lockup_list);
4151}
4152
4153/* Called when controller lockup detected. */
4154static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4155{
4156 struct CommandList *c = NULL;
4157
4158 assert_spin_locked(&h->lock);
4159 /* Mark all outstanding commands as failed and complete them. */
4160 while (!list_empty(list)) {
4161 c = list_entry(list->next, struct CommandList, list);
4162 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4163 finish_cmd(c, c->Header.Tag.lower);
4164 }
4165}
4166
4167static void controller_lockup_detected(struct ctlr_info *h)
4168{
4169 unsigned long flags;
4170
4171 assert_spin_locked(&lockup_detector_lock);
4172 remove_ctlr_from_lockup_detector_list(h);
4173 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4174 spin_lock_irqsave(&h->lock, flags);
4175 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4176 spin_unlock_irqrestore(&h->lock, flags);
4177 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4178 h->lockup_detected);
4179 pci_disable_device(h->pdev);
4180 spin_lock_irqsave(&h->lock, flags);
4181 fail_all_cmds_on_list(h, &h->cmpQ);
4182 fail_all_cmds_on_list(h, &h->reqQ);
4183 spin_unlock_irqrestore(&h->lock, flags);
4184}
4185
4186#define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
4187#define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
4188
4189static void detect_controller_lockup(struct ctlr_info *h)
4190{
4191 u64 now;
4192 u32 heartbeat;
4193 unsigned long flags;
4194
4195 assert_spin_locked(&lockup_detector_lock);
4196 now = get_jiffies_64();
4197 /* If we've received an interrupt recently, we're ok. */
4198 if (time_after64(h->last_intr_timestamp +
4199 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4200 return;
4201
4202 /*
4203 * If we've already checked the heartbeat recently, we're ok.
4204 * This could happen if someone sends us a signal. We
4205 * otherwise don't care about signals in this thread.
4206 */
4207 if (time_after64(h->last_heartbeat_timestamp +
4208 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4209 return;
4210
4211 /* If heartbeat has not changed since we last looked, we're not ok. */
4212 spin_lock_irqsave(&h->lock, flags);
4213 heartbeat = readl(&h->cfgtable->HeartBeat);
4214 spin_unlock_irqrestore(&h->lock, flags);
4215 if (h->last_heartbeat == heartbeat) {
4216 controller_lockup_detected(h);
4217 return;
4218 }
4219
4220 /* We're ok. */
4221 h->last_heartbeat = heartbeat;
4222 h->last_heartbeat_timestamp = now;
4223}
4224
4225static int detect_controller_lockup_thread(void *notused)
4226{
4227 struct ctlr_info *h;
4228 unsigned long flags;
4229
4230 while (1) {
4231 struct list_head *this, *tmp;
4232
4233 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4234 if (kthread_should_stop())
4235 break;
4236 spin_lock_irqsave(&lockup_detector_lock, flags);
4237 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4238 h = list_entry(this, struct ctlr_info, lockup_list);
4239 detect_controller_lockup(h);
4240 }
4241 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4242 }
4243 return 0;
4244}
4245
4246static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4247{
4248 unsigned long flags;
4249
4250 spin_lock_irqsave(&lockup_detector_lock, flags);
4251 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4252 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4253}
4254
4255static void start_controller_lockup_detector(struct ctlr_info *h)
4256{
4257 /* Start the lockup detector thread if not already started */
4258 if (!hpsa_lockup_detector) {
4259 spin_lock_init(&lockup_detector_lock);
4260 hpsa_lockup_detector =
4261 kthread_run(detect_controller_lockup_thread,
f79cfec6 4262 NULL, HPSA);
a0c12413
SC		 4263 }
4264 if (!hpsa_lockup_detector) {
4265 dev_warn(&h->pdev->dev,
4266 "Could not start lockup detector thread\n");
4267 return;
4268 }
4269 add_ctlr_to_lockup_detector_list(h);
4270}
4271
4272static void stop_controller_lockup_detector(struct ctlr_info *h)
4273{
4274 unsigned long flags;
4275
4276 spin_lock_irqsave(&lockup_detector_lock, flags);
4277 remove_ctlr_from_lockup_detector_list(h);
4278 /* If the list of ctlr's to monitor is empty, stop the thread */
4279 if (list_empty(&hpsa_ctlr_list)) {
775bf277 4280 spin_unlock_irqrestore(&lockup_detector_lock, flags);
a0c12413 4281 kthread_stop(hpsa_lockup_detector);
775bf277 4282 spin_lock_irqsave(&lockup_detector_lock, flags);
a0c12413
SC		 4283 hpsa_lockup_detector = NULL;
4284 }
4285 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4286}
4287
edd16368
SC		 4288static int __devinit hpsa_init_one(struct pci_dev *pdev,
4289 const struct pci_device_id *ent)
4290{
4c2a8c40 4291 int dac, rc;
edd16368 4292 struct ctlr_info *h;
64670ac8
SC		 4293 int try_soft_reset = 0;
4294 unsigned long flags;
edd16368
SC		 4295
4296 if (number_of_controllers == 0)
4297 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4298
4c2a8c40 4299 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4300 if (rc) {
4301 if (rc != -ENOTSUPP)
4302 return rc;
4303 /* If the reset fails in a particular way (it has no way to do
4304 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4305 * a soft reset once we get the controller configured up to the
4306 * point that it can accept a command.
4307 */
4308 try_soft_reset = 1;
4309 rc = 0;
4310 }
4311
4312reinit_after_soft_reset:
edd16368 4313
303932fd
DB		 4314 /* Command structures must be aligned on a 32-byte boundary because
4315 * the 5 lower bits of the address are used by the hardware. and by
4316 * the driver. See comments in hpsa.h for more info.
4317 */
4318#define COMMANDLIST_ALIGNMENT 32
4319 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4320 h = kzalloc(sizeof(*h), GFP_KERNEL);
4321 if (!h)
ecd9aad4 4322 return -ENOMEM;
edd16368 4323
55c06c71 4324 h->pdev = pdev;
a9a3a273 4325 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4326 INIT_LIST_HEAD(&h->cmpQ);
4327 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4328 spin_lock_init(&h->lock);
4329 spin_lock_init(&h->scan_lock);
55c06c71 4330 rc = hpsa_pci_init(h);
ecd9aad4 4331 if (rc != 0)
edd16368
SC		 4332 goto clean1;
4333
f79cfec6 4334 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4335 h->ctlr = number_of_controllers;
4336 number_of_controllers++;
edd16368
SC		 4337
4338 /* configure PCI DMA stuff */
ecd9aad4
SC		 4339 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4340 if (rc == 0) {
edd16368 4341 dac = 1;
ecd9aad4
SC		 4342 } else {
4343 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4344 if (rc == 0) {
4345 dac = 0;
4346 } else {
4347 dev_err(&pdev->dev, "no suitable DMA available\n");
4348 goto clean1;
4349 }
edd16368
SC		 4350 }
4351
4352 /* make sure the board interrupts are off */
4353 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4354
0ae01a32 4355 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4356 goto clean2;
303932fd
DB		 4357 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4358 h->devname, pdev->device,
a9a3a273 4359 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4360 if (hpsa_allocate_cmd_pool(h))
edd16368 4361 goto clean4;
33a2ffce
SC		 4362 if (hpsa_allocate_sg_chain_blocks(h))
4363 goto clean4;
a08a8471
SC		 4364 init_waitqueue_head(&h->scan_wait_queue);
4365 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4366
4367 pci_set_drvdata(pdev, h);
9a41338e
SC		 4368 h->ndevices = 0;
4369 h->scsi_host = NULL;
4370 spin_lock_init(&h->devlock);
64670ac8
SC		 4371 hpsa_put_ctlr_into_performant_mode(h);
4372
4373 /* At this point, the controller is ready to take commands.
4374 * Now, if reset_devices and the hard reset didn't work, try
4375 * the soft reset and see if that works.
4376 */
4377 if (try_soft_reset) {
4378
4379 /* This is kind of gross. We may or may not get a completion
4380 * from the soft reset command, and if we do, then the value
4381 * from the fifo may or may not be valid. So, we wait 10 secs
4382 * after the reset throwing away any completions we get during
4383 * that time. Unregister the interrupt handler and register
4384 * fake ones to scoop up any residual completions.
4385 */
4386 spin_lock_irqsave(&h->lock, flags);
4387 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4388 spin_unlock_irqrestore(&h->lock, flags);
4389 free_irq(h->intr[h->intr_mode], h);
4390 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4391 hpsa_intx_discard_completions);
4392 if (rc) {
4393 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4394 "soft reset.\n");
4395 goto clean4;
4396 }
4397
4398 rc = hpsa_kdump_soft_reset(h);
4399 if (rc)
4400 /* Neither hard nor soft reset worked, we're hosed. */
4401 goto clean4;
4402
4403 dev_info(&h->pdev->dev, "Board READY.\n");
4404 dev_info(&h->pdev->dev,
4405 "Waiting for stale completions to drain.\n");
4406 h->access.set_intr_mask(h, HPSA_INTR_ON);
4407 msleep(10000);
4408 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4409
4410 rc = controller_reset_failed(h->cfgtable);
4411 if (rc)
4412 dev_info(&h->pdev->dev,
4413 "Soft reset appears to have failed.\n");
4414
4415 /* since the controller's reset, we have to go back and re-init
4416 * everything. Easiest to just forget what we've done and do it
4417 * all over again.
4418 */
4419 hpsa_undo_allocations_after_kdump_soft_reset(h);
4420 try_soft_reset = 0;
4421 if (rc)
4422 /* don't go to clean4, we already unallocated */
4423 return -ENODEV;
4424
4425 goto reinit_after_soft_reset;
4426 }
edd16368
SC		 4427
4428 /* Turn the interrupts on so we can service requests */
4429 h->access.set_intr_mask(h, HPSA_INTR_ON);
4430
339b2b14 4431 hpsa_hba_inquiry(h);
edd16368 4432 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
a0c12413 4433 start_controller_lockup_detector(h);
edd16368
SC		 4434 return 1;
4435
4436clean4:
33a2ffce 4437 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4438 hpsa_free_cmd_pool(h);
a9a3a273 4439 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4440clean2:
4441clean1:
edd16368 4442 kfree(h);
ecd9aad4 4443 return rc;
edd16368
SC		 4444}
4445
4446static void hpsa_flush_cache(struct ctlr_info *h)
4447{
4448 char *flush_buf;
4449 struct CommandList *c;
4450
4451 flush_buf = kzalloc(4, GFP_KERNEL);
4452 if (!flush_buf)
4453 return;
4454
4455 c = cmd_special_alloc(h);
4456 if (!c) {
4457 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4458 goto out_of_memory;
4459 }
4460 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4461 RAID_CTLR_LUNID, TYPE_CMD);
4462 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4463 if (c->err_info->CommandStatus != 0)
4464 dev_warn(&h->pdev->dev,
4465 "error flushing cache on controller\n");
4466 cmd_special_free(h, c);
4467out_of_memory:
4468 kfree(flush_buf);
4469}
4470
4471static void hpsa_shutdown(struct pci_dev *pdev)
4472{
4473 struct ctlr_info *h;
4474
4475 h = pci_get_drvdata(pdev);
4476 /* Turn board interrupts off and send the flush cache command
4477 * sendcmd will turn off interrupt, and send the flush...
4478 * To write all data in the battery backed cache to disks
4479 */
4480 hpsa_flush_cache(h);
4481 h->access.set_intr_mask(h, HPSA_INTR_OFF);
a9a3a273 4482 free_irq(h->intr[h->intr_mode], h);
edd16368
SC		 4483#ifdef CONFIG_PCI_MSI
4484 if (h->msix_vector)
4485 pci_disable_msix(h->pdev);
4486 else if (h->msi_vector)
4487 pci_disable_msi(h->pdev);
4488#endif /* CONFIG_PCI_MSI */
4489}
4490
55e14e76
SC		 4491static void __devexit hpsa_free_device_info(struct ctlr_info *h)
4492{
4493 int i;
4494
4495 for (i = 0; i < h->ndevices; i++)
4496 kfree(h->dev[i]);
4497}
4498
edd16368
SC		 4499static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4500{
4501 struct ctlr_info *h;
4502
4503 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 4504 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 4505 return;
4506 }
4507 h = pci_get_drvdata(pdev);
a0c12413 4508 stop_controller_lockup_detector(h);
edd16368
SC		 4509 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4510 hpsa_shutdown(pdev);
4511 iounmap(h->vaddr);
204892e9
SC		 4512 iounmap(h->transtable);
4513 iounmap(h->cfgtable);
55e14e76 4514 hpsa_free_device_info(h);
33a2ffce 4515 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 4516 pci_free_consistent(h->pdev,
4517 h->nr_cmds * sizeof(struct CommandList),
4518 h->cmd_pool, h->cmd_pool_dhandle);
4519 pci_free_consistent(h->pdev,
4520 h->nr_cmds * sizeof(struct ErrorInfo),
4521 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 4522 pci_free_consistent(h->pdev, h->reply_pool_size,
4523 h->reply_pool, h->reply_pool_dhandle);
edd16368 4524 kfree(h->cmd_pool_bits);
303932fd 4525 kfree(h->blockFetchTable);
339b2b14 4526 kfree(h->hba_inquiry_data);
f0bd0b68 4527 pci_disable_device(pdev);
edd16368
SC		 4528 pci_release_regions(pdev);
4529 pci_set_drvdata(pdev, NULL);
edd16368
SC		 4530 kfree(h);
4531}
4532
4533static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4534 __attribute__((unused)) pm_message_t state)
4535{
4536 return -ENOSYS;
4537}
4538
4539static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4540{
4541 return -ENOSYS;
4542}
4543
4544static struct pci_driver hpsa_pci_driver = {
f79cfec6 4545 .name = HPSA,
edd16368
SC		 4546 .probe = hpsa_init_one,
4547 .remove = __devexit_p(hpsa_remove_one),
4548 .id_table = hpsa_pci_device_id, /* id_table */
4549 .shutdown = hpsa_shutdown,
4550 .suspend = hpsa_suspend,
4551 .resume = hpsa_resume,
4552};
4553
303932fd
DB		 4554/* Fill in bucket_map[], given nsgs (the max number of
4555 * scatter gather elements supported) and bucket[],
4556 * which is an array of 8 integers. The bucket[] array
4557 * contains 8 different DMA transfer sizes (in 16
4558 * byte increments) which the controller uses to fetch
4559 * commands. This function fills in bucket_map[], which
4560 * maps a given number of scatter gather elements to one of
4561 * the 8 DMA transfer sizes. The point of it is to allow the
4562 * controller to only do as much DMA as needed to fetch the
4563 * command, with the DMA transfer size encoded in the lower
4564 * bits of the command address.
4565 */
4566static void calc_bucket_map(int bucket[], int num_buckets,
4567 int nsgs, int *bucket_map)
4568{
4569 int i, j, b, size;
4570
4571 /* even a command with 0 SGs requires 4 blocks */
4572#define MINIMUM_TRANSFER_BLOCKS 4
4573#define NUM_BUCKETS 8
4574 /* Note, bucket_map must have nsgs+1 entries. */
4575 for (i = 0; i <= nsgs; i++) {
4576 /* Compute size of a command with i SG entries */
4577 size = i + MINIMUM_TRANSFER_BLOCKS;
4578 b = num_buckets; /* Assume the biggest bucket */
4579 /* Find the bucket that is just big enough */
4580 for (j = 0; j < 8; j++) {
4581 if (bucket[j] >= size) {
4582 b = j;
4583 break;
4584 }
4585 }
4586 /* for a command with i SG entries, use bucket b. */
4587 bucket_map[i] = b;
4588 }
4589}
4590
960a30e7
SC		 4591static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4592 u32 use_short_tags)
303932fd 4593{
6c311b57
SC		 4594 int i;
4595 unsigned long register_value;
def342bd
SC		 4596
4597 /* This is a bit complicated. There are 8 registers on
4598 * the controller which we write to to tell it 8 different
4599 * sizes of commands which there may be. It's a way of
4600 * reducing the DMA done to fetch each command. Encoded into
4601 * each command's tag are 3 bits which communicate to the controller
4602 * which of the eight sizes that command fits within. The size of
4603 * each command depends on how many scatter gather entries there are.
4604 * Each SG entry requires 16 bytes. The eight registers are programmed
4605 * with the number of 16-byte blocks a command of that size requires.
4606 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 4607 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 4608 * blocks. Note, this only extends to the SG entries contained
4609 * within the command block, and does not extend to chained blocks
4610 * of SG elements. bft[] contains the eight values we write to
4611 * the registers. They are not evenly distributed, but have more
4612 * sizes for small commands, and fewer sizes for larger commands.
4613 */
d66ae08b
SC		 4614 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
4615 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 4616 /* 5 = 1 s/g entry or 4k
4617 * 6 = 2 s/g entry or 8k
4618 * 8 = 4 s/g entry or 16k
4619 * 10 = 6 s/g entry or 24k
4620 */
303932fd
DB		 4621
4622 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4623
4624 /* Controller spec: zero out this buffer. */
4625 memset(h->reply_pool, 0, h->reply_pool_size);
4626 h->reply_pool_head = h->reply_pool;
4627
d66ae08b
SC		 4628 bft[7] = SG_ENTRIES_IN_CMD + 4;
4629 calc_bucket_map(bft, ARRAY_SIZE(bft),
4630 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 4631 for (i = 0; i < 8; i++)
4632 writel(bft[i], &h->transtable->BlockFetch[i]);
4633
4634 /* size of controller ring buffer */
4635 writel(h->max_commands, &h->transtable->RepQSize);
4636 writel(1, &h->transtable->RepQCount);
4637 writel(0, &h->transtable->RepQCtrAddrLow32);
4638 writel(0, &h->transtable->RepQCtrAddrHigh32);
4639 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4640 writel(0, &h->transtable->RepQAddr0High32);
960a30e7 4641 writel(CFGTBL_Trans_Performant | use_short_tags,
303932fd
DB		 4642 &(h->cfgtable->HostWrite.TransportRequest));
4643 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4644 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 4645 register_value = readl(&(h->cfgtable->TransportActive));
4646 if (!(register_value & CFGTBL_Trans_Performant)) {
4647 dev_warn(&h->pdev->dev, "unable to get board into"
4648 " performant mode\n");
4649 return;
4650 }
960a30e7
SC		 4651 /* Change the access methods to the performant access methods */
4652 h->access = SA5_performant_access;
4653 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 4654}
4655
4656static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4657{
4658 u32 trans_support;
4659
02ec19c8
SC		 4660 if (hpsa_simple_mode)
4661 return;
4662
6c311b57
SC		 4663 trans_support = readl(&(h->cfgtable->TransportSupport));
4664 if (!(trans_support & PERFORMANT_MODE))
4665 return;
4666
cba3d38b 4667 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC		 4668 /* Performant mode ring buffer and supporting data structures */
4669 h->reply_pool_size = h->max_commands * sizeof(u64);
4670 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4671 &(h->reply_pool_dhandle));
4672
4673 /* Need a block fetch table for performant mode */
d66ae08b 4674 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 4675 sizeof(u32)), GFP_KERNEL);
4676
4677 if ((h->reply_pool == NULL)
4678 || (h->blockFetchTable == NULL))
4679 goto clean_up;
4680
960a30e7
SC		 4681 hpsa_enter_performant_mode(h,
4682 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 4683
4684 return;
4685
4686clean_up:
4687 if (h->reply_pool)
4688 pci_free_consistent(h->pdev, h->reply_pool_size,
4689 h->reply_pool, h->reply_pool_dhandle);
4690 kfree(h->blockFetchTable);
4691}
4692
edd16368
SC		 4693/*
4694 * This is it. Register the PCI driver information for the cards we control
4695 * the OS will call our registered routines when it finds one of our cards.
4696 */
4697static int __init hpsa_init(void)
4698{
31468401 4699 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 4700}
4701
4702static void __exit hpsa_cleanup(void)
4703{
4704 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 4705}
4706
4707module_init(hpsa_init);
4708module_exit(hpsa_cleanup);
Linux kernel - Deliverables
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